Academic literature on the topic 'Cadence tools'

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Journal articles on the topic "Cadence tools"

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Tyler, Neil. "SamacSys and Cadence Integrate Tools." New Electronics 51, no. 21 (2019): 9. http://dx.doi.org/10.12968/s0047-9624(23)60410-9.

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Subha Sri Lakshmi, T. "Implementation of Memory Controller using Cadence Tools." CVR Journal of Science & Technology 10, no. 1 (2016): 31–34. http://dx.doi.org/10.32377/cvrjst1007.

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Tyler, Neil. "Cadence Brings Verification IP to the Chip Level." New Electronics 53, no. 18 (2020): 9. http://dx.doi.org/10.12968/s0047-9624(22)61611-0.

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Tyler, Neil. "Cadence Brings Verification IP to the Chip Level." New Electronics 53, no. 18 (2020): 9. http://dx.doi.org/10.12968/s0047-9624(23)60377-3.

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R, Ganesh. "Design Procedure for Digital and Analog ICs using Cadence Tools." CVR Journal of Science & Technology 9, no. 1 (2015): 56–60. http://dx.doi.org/10.32377/cvrjst0911.

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Singh, Gagandeep, and Chakshu Goel. "Area Efficient Carry Select Adder (AE-CSLA) using Cadence Tools." International Journal of Engineering Trends and Technology 10, no. 10 (2014): 492–95. http://dx.doi.org/10.14445/22315381/ijett-v10p296.

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Kiran D.R, Naveen Kumar Y, Prajwal D. Nadig, et al. "Fabrication of CNTFET Simulation Using Cadence Virtuoso." international journal of engineering technology and management sciences 7, no. 3 (2023): 476–79. http://dx.doi.org/10.46647/ijetms.2023.v07i03.65.

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In this paper, the fabrication of CNTFET with the help of simulation using cadence virtuoso is presented. The process of fabricating Carbon Nanotube Field-Effect Transistors (CNTFETs) is a sophisticated task that demands great attention to detail. To aid in the design and optimization of CNTFET fabrication processes, simulation tools are often utilized. CNTFET fabrication simulations generally involve modeling the physical and chemical processes of creating the carbon nanotube channel, as well as the device's metal contacts and other components. Simulation tools such as COMSOL Multiphysics or
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Rahul, Singh, and Chandra Singh Chauhan Ram. "Power Efficient Biquadratic Filter designing using OTA." Indian Journal of Science and Technology 14, no. 29 (2021): 2448–59. https://doi.org/10.17485/IJST/v14i29.2293.

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Abstract <strong>Objectives:</strong>&nbsp;To present a power efficient Universal Biquad Operational Transconductance Amplifier circuit.&nbsp;<strong>Methods:</strong>&nbsp;OTA (operational transconductance amplifier) based Biquad filter is analyzed using three different simulated tools three different tools (CADENCE, XILINX, ORCAD and MATLAB tools) are used for designing the circuit. The 0.18mm CMOS technique is used using the Cadence tool for plan and reproduction. The same circuit has been implemented on ORCAD tool as well as Xilinx tool.&nbsp;<strong>Findings:</strong>&nbsp;The proposed Bi
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Bravyy, Yan, Dmitry Onishchenko, and Maxim Baltin. "A measurement method for biomechanical factors in sprint: maximal anaerobic power and optimal cadence." Russian journal of biomechanics. 28, no. 4 (2024): 129–36. https://doi.org/10.15593/rjbiomech/2024.4.13.

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A methodology for determining maximal anaerobic power and optimal pedaling cadence in sprint cyclists is presented, which is a key factor in track cycling performance. The study examines the impact of pedaling cadence on performance and emphasizes the importance of gear ratio selection for sprints. The research involved 10 professional sprint cyclists aged 15–19 years. Participants performed three maximal sprints with increasing resistance on a cycle ergometer equipped with an electronic braking system and sensors for precise measurement of left and right leg forces and pedaling cadence. This
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Wu, Chang Fu. "Analysis and Realization of Critical Points on Hardware Design of FPGA." Advanced Materials Research 950 (June 2014): 133–38. http://dx.doi.org/10.4028/www.scientific.net/amr.950.133.

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FPGA is one kind of important devices that can realize many functions. As the development of communication technology and computer science, more and more technologies are invented and more and more hardware design technologies are sifted out. Therefore, the hardware design based on ASIC can be not fit on the new theories realization. As a new device, FPGA has many advantages including strength function, shorter design circle, less money, more flexible and more intelligent design tools. More and More hardware designs of FPGA are pay more attentions. Therefore, it is significant to make analysis
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Dissertations / Theses on the topic "Cadence tools"

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Bravo, Sotomayor Daniel. "La gestión de las TIC y su impacto en la cadena de valor: Oportunidades para las empresas del siglo XXI." InnovaG, 2017. http://repositorio.pucp.edu.pe/index/handle/123456789/131489.

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The development of information and communication technologies (ICT), mainly in the 21st century, has generated a series of changes within an increasingly globalized world, allowing companies to incorporate technological tools according to their needs.As a result of the above, the article presents the impacts of incorporating ICTs at the level of the value chain, with the aim of analyzing the consequences within the business activities defined within it. Likewise, the potential opportunities generated by these tools are raised, in order to support decision making at the managerial level through
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Collantes, Gallo Renzo Paolo, and Orosco Jorge Antonio Portilla. "Propuesta de modelo de gestión dinámica de la cadena de producción de elementos prefabricados de concreto armado implementando herramientas informáticas integrales para reducir las pérdidas de independencia de sistemas en la construcción de edificaciones multifamiliares en Lima." Bachelor's thesis, Universidad Peruana de Ciencias Aplicadas (UPC), 2019. http://hdl.handle.net/10757/653671.

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En la siguiente investigación se busca impulsar al sector construcción en el Perú hacia las nuevas tendencias de construcción como metodologías de construcción, nuevas formas de gestionar un proyecto y llevar un control activo para acercar al sector a la industrialización de la construcción conocida como “Contruction 4.0”. Evidencia de ello es que ya se están realizando construcciones con elementos prefabricados que han garantizado la mejora en la calidad del producto, pero la forma de gestionar este nuevo método constructivo, y en general cualquier método, se encuentra aún deficiente generand
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De, la Cadena Pérez-Gallardo Alejandro [Verfasser], Benjamin [Gutachter] Dietzek, and Thomas Wilhelm [Gutachter] Bocklitz. "Development and characterization of a microscope based on pump-probe spectroscopy : a valuable tool for the study of photoactivated drugs in cellulo / Alejandro De la Cadena Pérez-Gallardo ; Gutachter: Benjamin Dietzek, Thomas Wilhelm Bocklitz." Jena : Friedrich-Schiller-Universität Jena, 2018. http://d-nb.info/1207273309/34.

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Chipana, Gutierrez Rocio Marisol, and Gutierrez Indira Zenina Portilla. "Propuesta para optimizar la programación y control de equipos compartidos para empresas constructoras mediante una herramienta tecnológica." Bachelor's thesis, Universidad Peruana de Ciencias Aplicadas (UPC), 2021. http://hdl.handle.net/10757/654619.

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En el presente artículo científico se muestra la problemática que existe en la gestión de equipos compartidos por una mala programación y control a través del estudio de un multiproyecto. Se identifica la metodología aplicada para poder proceder al diseño del software GesZech con la finalidad de poder mejorar la problemática y estar a la atura de los programas existentes en la actualidad. Esta herramienta está basada en el método de la cadena crítica y utiliza diagramas de Gantt como resultado a la programación realizada, también cuenta con opciones para el control de cumplimiento de la ejecuc
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Almanza, Inchaustegui Gerardo. "Factores que identifiquen la necesidad de implementar los sistemas de business intelligence a fin de mejorar la toma de decisiones en los procesos operativos del sector diagnóstica." Bachelor's thesis, Universidad Peruana de Ciencias Aplicadas (UPC), 2019. http://hdl.handle.net/10757/625865.

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La presente investigación tiene por objetivo, exponer los factores que hacen necesaria la implementación de Business Intelligence con el fin de mejorar la toma de decisiones, que influyen directamente en la eficiencia de los procesos operativos de importación del sector Diagnóstica. Esta investigación se divide en 5 capítulos, en las que se usó el método científico detallado en el libro Metodología de la Investigación, el cual presenta a la investigación como un proceso sistemático, los capítulos están comprendidos por marco teórico, plan de investigación, metodología, desarrollo y aplicación,
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Books on the topic "Cadence tools"

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Brunvand, Erik. Digital VLSI Chip Design with Cadence and Synopsys CAD Tools. Pearson Education, Limited, 2020.

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Digital VLSI Chip Design with Cadence and Synopsys CAD Tools. Pearson Education, Limited, 2009.

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Basek, Eric. Lessons in Cadence: Discover the Tools, Tactics and Mindset Necessary to Turn Towards the Path of Recovery Against the Struggle Within. Independently Published, 2021.

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Temperley, David. The Musical Language of Rock. Oxford University Press, 2018. http://dx.doi.org/10.1093/oso/9780190653774.001.0001.

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A theory of the structure of rock music is presented, addressing aspects such as tonality/key, harmony, rhythm/meter, melody, phrase structure, timbre/instrumentation, form, and emotional expression. The book brings together ideas from the author’s previous articles but also contains substantial new material. Rock is defined broadly (as it often is) to include a wide range of late twentieth-century Anglo-American popular styles, including 1950s rock &amp; roll, Motown, soul, “British invasion” rock, soft rock, heavy metal, disco, new wave, and alternative rock. The study largely employs the in
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Book chapters on the topic "Cadence tools"

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Savarese, Giancarlo, and Salvatore Geraci. "Realization of a Place and Route Flow Using PKS, a New Cadence Design System Tool." In Microelectronics and Microsystems. Springer London, 2000. http://dx.doi.org/10.1007/978-1-4471-0671-5_4.

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Tripathi, Suman Lata, and Balwinder Raj. "EDA Tools and Methodology for IC Design." In Exploring the Intricacies of Digital and Analog VLSI. IGI Global, 2025. https://doi.org/10.4018/979-8-3693-8084-0.ch007.

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Increasing complexity in VLSI design leads designer to develop new methodology to meet the design requirements and specifications. Electronic design automation (EDA) support to complex integrated circuit design and performance analysis at transistor, component and block level. The popular EDA tools are Cadence, Spice and TCAD etc, where designer can work at transistor or block level by adding desired component in design window for simulations and performance evaluation. Designer have choice of developing their own technology node under certain specified limit or using any exiting technology mo
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Boboc, Marius. "Connecting Communication to Curriculum and Pedagogy in Online Environments." In Web Design and Development. IGI Global, 2016. http://dx.doi.org/10.4018/978-1-4666-8619-9.ch016.

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This chapter relies on the analysis of communicative patterns, discursive sequences, and instructional strategies featured in an entirely online graduate level course featuring a combination of compulsory and optional chat sessions. Findings emphasize the use of communication dynamics to promote social presence and socially-mediated learning in online learning communities, which, for the purpose of this research project, are represented by the required synchronous discussions used in class. Recommendations focus on employing a flexible pedagogy that takes into account student characteristics,
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Boboc, Marius. "Connecting Communication to Curriculum and Pedagogy in Online Environments." In Building Online Communities in Higher Education Institutions. IGI Global, 2014. http://dx.doi.org/10.4018/978-1-4666-5178-4.ch007.

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This chapter relies on the analysis of communicative patterns, discursive sequences, and instructional strategies featured in an entirely online graduate level course featuring a combination of compulsory and optional chat sessions. Findings emphasize the use of communication dynamics to promote social presence and socially-mediated learning in online learning communities, which, for the purpose of this research project, are represented by the required synchronous discussions used in class. Recommendations focus on employing a flexible pedagogy that takes into account student characteristics,
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Boboc, Marius. "Connecting Communication to Curriculum and Pedagogy in Online Environments." In Online Course Management. IGI Global, 2018. http://dx.doi.org/10.4018/978-1-5225-5472-1.ch079.

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This chapter relies on the analysis of communicative patterns, discursive sequences, and instructional strategies featured in an entirely online graduate level course featuring a combination of compulsory and optional chat sessions. Findings emphasize the use of communication dynamics to promote social presence and socially-mediated learning in online learning communities, which, for the purpose of this research project, are represented by the required synchronous discussions used in class. Recommendations focus on employing a flexible pedagogy that takes into account student characteristics,
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Vasudeva G, Mandar Jatkar, Tripti R. Kulkarni, Roopa R. Kulkarni, Bharathi Gururaj, and Tejas M P. "Design of FinFET Based Op-Amp Using High-K Device 22 nm Technology." In Advances in Transdisciplinary Engineering. IOS Press, 2023. http://dx.doi.org/10.3233/atde231033.

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In this research paper, a design for circuit of an operational amplifier (OP-AMP) is formulated utilizing model characteristics of FinFET using high-k gain in the context of 22 nm technological advancements. To create an OP-AMP based on FinFET technology, the standard design equations for MOSFET-based OP-AMP design are tuned to FinFET based OPAMP. The OP-AMP architecture is well-suited for implementation as a subordinate circuit in the ADC design since it supports lower voltage, elevated velocity, and diminished power dissipation. The geometries of the transistors are organised to accomplish a
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Sravana, J., A. Karthik, and T. Dinesh. "A Comparative Analysis and Ideas to Reduce Various Leakage Power in Modern VLSI." In Nanoscale Field Effect Transistors: Emerging Applications. BENTHAM SCIENCE PUBLISHERS, 2023. http://dx.doi.org/10.2174/9789815165647123010012.

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In today's high-performance chips, comparative analysis and ideas for reducing power consumption have become the dominant factor in overall power consumption. This should reduce the power consumption of high-density chips, which is so great that many new techniques have been developed in the proposal to design low-power circuits and systems. Ultra-thin gate oxides, very low threshold voltages, and short channels are hallmarks of nanoscale chips. Therefore, the most difficult problem that arises in VLSI circuits and systems is power dissipation. This paper provides an overview of sources of lea
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Singh Yadav, Dharmendra, Prabhat Singh, Vibhash Choudhary, and Rakesh Murthy Gangadari. "Extensive Investigation on Even-Transistor-Configuration CMOS-based SRAM." In Nanoscale Field Effect Transistors: Emerging Applications. BENTHAM SCIENCE PUBLISHERS, 2023. http://dx.doi.org/10.2174/9789815165647123010011.

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Designing electronic devices with higher efficiency while using reduced power is a problem in the field of electronics. Digital technology utilization is increasing due to its higher speeds, lower power requirements, and stability. Accessing data requires a lot of time, so a circuit is created that will be close to the CPU to provide the information that is required. Cache memory is a type of SRAM-based faster storing device. To enhance the performance of the SRAM cell, Read Delay (RD), Write Delay (WD), read stability, write stability and power dissipation of the intended circuit should all b
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Conference papers on the topic "Cadence tools"

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S, Mala, Chandan Reddy V, Girish M L, Madan Kumar N M, and Monoj S B. "Design of a 32-Bit ALU Using Cadence tools." In 2024 4th International Conference on Mobile Networks and Wireless Communications (ICMNWC). IEEE, 2024. https://doi.org/10.1109/icmnwc63764.2024.10872332.

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Rajalakshmi, R., P. Sivakumar, G. Subhashini, and L. Krishna Kumari. "Exploring Performance Characteristics of Static and Dynamic CMOS Designs Using Cadence Tools." In 2024 4th International Conference on Sustainable Expert Systems (ICSES). IEEE, 2024. https://doi.org/10.1109/icses63445.2024.10763242.

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K, Arunkumar, S. Sushma, and Vangala Siva Teja. "Implementing and Verifying the SPI Communication Protocol in ASICs with Cadence EDA Tools." In 2024 Global Conference on Communications and Information Technologies (GCCIT). IEEE, 2024. https://doi.org/10.1109/gccit63234.2024.10861947.

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Bhat, Prathiksha R., and Krishnamurthy Nayak. "RTL to GDS II Simulation of SAD algorithm with Kogge stone adder using Cadence tools." In 2025 International Conference on Advances in Modern Age Technologies for Health and Engineering Science (AMATHE). IEEE, 2025. https://doi.org/10.1109/amathe65477.2025.11081257.

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Subbarayudu, P., Syed Zahiruddin, D. Shilpa, J. Sharmila, G. Sai Konda Reddy, and A. Chandrika. "Comparative Analysis of High-Speed Power Efficient 4:2 Compressor using Cadence Tool." In 2025 7th International Conference on Inventive Material Science and Applications (ICIMA). IEEE, 2025. https://doi.org/10.1109/icima64861.2025.11074218.

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S, Rangeetha, Narmatha A, Raja Lekshmi S, and Sahana K. "Layout Design of Low Power High Performance JK Flip-Flop with Modified Gate Diffusion Input Technique Using Cadence Virtuoso Tool for IC Design." In 2025 6th International Conference on Mobile Computing and Sustainable Informatics (ICMCSI). IEEE, 2025. https://doi.org/10.1109/icmcsi64620.2025.10883414.

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Vemu, Srinivasa Rao, P. S. S. N. Mowlika, and S. Adinarayana. "An energy efficient and high speed double tail comparator using cadence EDA tools." In 2017 International Conference on Algorithms, Methodology, Models and Applications in Emerging Technologies (ICAMMAET). IEEE, 2017. http://dx.doi.org/10.1109/icammaet.2017.8186675.

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Syn Yi, Michelle Ang, Razaidi Hussin, and Fakhrul Zaman Rokhani. "Comparator Design Resistance Mitigation by using Cadence Virtuoso Tools in 45 Nanometer Process Technology." In 2023 IEEE International Conference on Sensors and Nanotechnology (SENNANO). IEEE, 2023. http://dx.doi.org/10.1109/sennano57767.2023.10352560.

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Akashe, Shyam, Sushil Bhushan, and Sanjay Sharma. "Implementation of technology scaling on leakage reduction techniques using cadence tools with 45 nm technology." In International Conference on Nanoscience, Engineering and Technology (ICONSET 2011). IEEE, 2011. http://dx.doi.org/10.1109/iconset.2011.6167912.

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Syn Yi, Michelle Ang, Razaidi Hussin, Norhawati Ahmad, and Fakhrul Zaman Rokhani. "Area optimization of comparator layout design by using Cadence Virtuoso tools in 45 nanometer process technology." In 2021 IEEE International Conference on Sensors and Nanotechnology (SENNANO). IEEE, 2021. http://dx.doi.org/10.1109/sennano51750.2021.9642560.

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