Academic literature on the topic 'Cadence tools'
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Journal articles on the topic "Cadence tools"
Tyler, Neil. "SamacSys and Cadence Integrate Tools." New Electronics 51, no. 21 (2019): 9. http://dx.doi.org/10.12968/s0047-9624(23)60410-9.
Full textSubha Sri Lakshmi, T. "Implementation of Memory Controller using Cadence Tools." CVR Journal of Science & Technology 10, no. 1 (2016): 31–34. http://dx.doi.org/10.32377/cvrjst1007.
Full textTyler, Neil. "Cadence Brings Verification IP to the Chip Level." New Electronics 53, no. 18 (2020): 9. http://dx.doi.org/10.12968/s0047-9624(22)61611-0.
Full textTyler, Neil. "Cadence Brings Verification IP to the Chip Level." New Electronics 53, no. 18 (2020): 9. http://dx.doi.org/10.12968/s0047-9624(23)60377-3.
Full textR, Ganesh. "Design Procedure for Digital and Analog ICs using Cadence Tools." CVR Journal of Science & Technology 9, no. 1 (2015): 56–60. http://dx.doi.org/10.32377/cvrjst0911.
Full textSingh, Gagandeep, and Chakshu Goel. "Area Efficient Carry Select Adder (AE-CSLA) using Cadence Tools." International Journal of Engineering Trends and Technology 10, no. 10 (2014): 492–95. http://dx.doi.org/10.14445/22315381/ijett-v10p296.
Full textKiran D.R, Naveen Kumar Y, Prajwal D. Nadig, et al. "Fabrication of CNTFET Simulation Using Cadence Virtuoso." international journal of engineering technology and management sciences 7, no. 3 (2023): 476–79. http://dx.doi.org/10.46647/ijetms.2023.v07i03.65.
Full textRahul, Singh, and Chandra Singh Chauhan Ram. "Power Efficient Biquadratic Filter designing using OTA." Indian Journal of Science and Technology 14, no. 29 (2021): 2448–59. https://doi.org/10.17485/IJST/v14i29.2293.
Full textBravyy, Yan, Dmitry Onishchenko, and Maxim Baltin. "A measurement method for biomechanical factors in sprint: maximal anaerobic power and optimal cadence." Russian journal of biomechanics. 28, no. 4 (2024): 129–36. https://doi.org/10.15593/rjbiomech/2024.4.13.
Full textWu, Chang Fu. "Analysis and Realization of Critical Points on Hardware Design of FPGA." Advanced Materials Research 950 (June 2014): 133–38. http://dx.doi.org/10.4028/www.scientific.net/amr.950.133.
Full textDissertations / Theses on the topic "Cadence tools"
Bravo, Sotomayor Daniel. "La gestión de las TIC y su impacto en la cadena de valor: Oportunidades para las empresas del siglo XXI." InnovaG, 2017. http://repositorio.pucp.edu.pe/index/handle/123456789/131489.
Full textCollantes, Gallo Renzo Paolo, and Orosco Jorge Antonio Portilla. "Propuesta de modelo de gestión dinámica de la cadena de producción de elementos prefabricados de concreto armado implementando herramientas informáticas integrales para reducir las pérdidas de independencia de sistemas en la construcción de edificaciones multifamiliares en Lima." Bachelor's thesis, Universidad Peruana de Ciencias Aplicadas (UPC), 2019. http://hdl.handle.net/10757/653671.
Full textDe, la Cadena Pérez-Gallardo Alejandro [Verfasser], Benjamin [Gutachter] Dietzek, and Thomas Wilhelm [Gutachter] Bocklitz. "Development and characterization of a microscope based on pump-probe spectroscopy : a valuable tool for the study of photoactivated drugs in cellulo / Alejandro De la Cadena Pérez-Gallardo ; Gutachter: Benjamin Dietzek, Thomas Wilhelm Bocklitz." Jena : Friedrich-Schiller-Universität Jena, 2018. http://d-nb.info/1207273309/34.
Full textChipana, Gutierrez Rocio Marisol, and Gutierrez Indira Zenina Portilla. "Propuesta para optimizar la programación y control de equipos compartidos para empresas constructoras mediante una herramienta tecnológica." Bachelor's thesis, Universidad Peruana de Ciencias Aplicadas (UPC), 2021. http://hdl.handle.net/10757/654619.
Full textAlmanza, Inchaustegui Gerardo. "Factores que identifiquen la necesidad de implementar los sistemas de business intelligence a fin de mejorar la toma de decisiones en los procesos operativos del sector diagnóstica." Bachelor's thesis, Universidad Peruana de Ciencias Aplicadas (UPC), 2019. http://hdl.handle.net/10757/625865.
Full textBooks on the topic "Cadence tools"
Brunvand, Erik. Digital VLSI Chip Design with Cadence and Synopsys CAD Tools. Pearson Education, Limited, 2020.
Find full textDigital VLSI Chip Design with Cadence and Synopsys CAD Tools. Pearson Education, Limited, 2009.
Find full textBasek, Eric. Lessons in Cadence: Discover the Tools, Tactics and Mindset Necessary to Turn Towards the Path of Recovery Against the Struggle Within. Independently Published, 2021.
Find full textTemperley, David. The Musical Language of Rock. Oxford University Press, 2018. http://dx.doi.org/10.1093/oso/9780190653774.001.0001.
Full textBook chapters on the topic "Cadence tools"
Savarese, Giancarlo, and Salvatore Geraci. "Realization of a Place and Route Flow Using PKS, a New Cadence Design System Tool." In Microelectronics and Microsystems. Springer London, 2000. http://dx.doi.org/10.1007/978-1-4471-0671-5_4.
Full textTripathi, Suman Lata, and Balwinder Raj. "EDA Tools and Methodology for IC Design." In Exploring the Intricacies of Digital and Analog VLSI. IGI Global, 2025. https://doi.org/10.4018/979-8-3693-8084-0.ch007.
Full textBoboc, Marius. "Connecting Communication to Curriculum and Pedagogy in Online Environments." In Web Design and Development. IGI Global, 2016. http://dx.doi.org/10.4018/978-1-4666-8619-9.ch016.
Full textBoboc, Marius. "Connecting Communication to Curriculum and Pedagogy in Online Environments." In Building Online Communities in Higher Education Institutions. IGI Global, 2014. http://dx.doi.org/10.4018/978-1-4666-5178-4.ch007.
Full textBoboc, Marius. "Connecting Communication to Curriculum and Pedagogy in Online Environments." In Online Course Management. IGI Global, 2018. http://dx.doi.org/10.4018/978-1-5225-5472-1.ch079.
Full textVasudeva G, Mandar Jatkar, Tripti R. Kulkarni, Roopa R. Kulkarni, Bharathi Gururaj, and Tejas M P. "Design of FinFET Based Op-Amp Using High-K Device 22 nm Technology." In Advances in Transdisciplinary Engineering. IOS Press, 2023. http://dx.doi.org/10.3233/atde231033.
Full textSravana, J., A. Karthik, and T. Dinesh. "A Comparative Analysis and Ideas to Reduce Various Leakage Power in Modern VLSI." In Nanoscale Field Effect Transistors: Emerging Applications. BENTHAM SCIENCE PUBLISHERS, 2023. http://dx.doi.org/10.2174/9789815165647123010012.
Full textSingh Yadav, Dharmendra, Prabhat Singh, Vibhash Choudhary, and Rakesh Murthy Gangadari. "Extensive Investigation on Even-Transistor-Configuration CMOS-based SRAM." In Nanoscale Field Effect Transistors: Emerging Applications. BENTHAM SCIENCE PUBLISHERS, 2023. http://dx.doi.org/10.2174/9789815165647123010011.
Full textConference papers on the topic "Cadence tools"
S, Mala, Chandan Reddy V, Girish M L, Madan Kumar N M, and Monoj S B. "Design of a 32-Bit ALU Using Cadence tools." In 2024 4th International Conference on Mobile Networks and Wireless Communications (ICMNWC). IEEE, 2024. https://doi.org/10.1109/icmnwc63764.2024.10872332.
Full textRajalakshmi, R., P. Sivakumar, G. Subhashini, and L. Krishna Kumari. "Exploring Performance Characteristics of Static and Dynamic CMOS Designs Using Cadence Tools." In 2024 4th International Conference on Sustainable Expert Systems (ICSES). IEEE, 2024. https://doi.org/10.1109/icses63445.2024.10763242.
Full textK, Arunkumar, S. Sushma, and Vangala Siva Teja. "Implementing and Verifying the SPI Communication Protocol in ASICs with Cadence EDA Tools." In 2024 Global Conference on Communications and Information Technologies (GCCIT). IEEE, 2024. https://doi.org/10.1109/gccit63234.2024.10861947.
Full textBhat, Prathiksha R., and Krishnamurthy Nayak. "RTL to GDS II Simulation of SAD algorithm with Kogge stone adder using Cadence tools." In 2025 International Conference on Advances in Modern Age Technologies for Health and Engineering Science (AMATHE). IEEE, 2025. https://doi.org/10.1109/amathe65477.2025.11081257.
Full textSubbarayudu, P., Syed Zahiruddin, D. Shilpa, J. Sharmila, G. Sai Konda Reddy, and A. Chandrika. "Comparative Analysis of High-Speed Power Efficient 4:2 Compressor using Cadence Tool." In 2025 7th International Conference on Inventive Material Science and Applications (ICIMA). IEEE, 2025. https://doi.org/10.1109/icima64861.2025.11074218.
Full textS, Rangeetha, Narmatha A, Raja Lekshmi S, and Sahana K. "Layout Design of Low Power High Performance JK Flip-Flop with Modified Gate Diffusion Input Technique Using Cadence Virtuoso Tool for IC Design." In 2025 6th International Conference on Mobile Computing and Sustainable Informatics (ICMCSI). IEEE, 2025. https://doi.org/10.1109/icmcsi64620.2025.10883414.
Full textVemu, Srinivasa Rao, P. S. S. N. Mowlika, and S. Adinarayana. "An energy efficient and high speed double tail comparator using cadence EDA tools." In 2017 International Conference on Algorithms, Methodology, Models and Applications in Emerging Technologies (ICAMMAET). IEEE, 2017. http://dx.doi.org/10.1109/icammaet.2017.8186675.
Full textSyn Yi, Michelle Ang, Razaidi Hussin, and Fakhrul Zaman Rokhani. "Comparator Design Resistance Mitigation by using Cadence Virtuoso Tools in 45 Nanometer Process Technology." In 2023 IEEE International Conference on Sensors and Nanotechnology (SENNANO). IEEE, 2023. http://dx.doi.org/10.1109/sennano57767.2023.10352560.
Full textAkashe, Shyam, Sushil Bhushan, and Sanjay Sharma. "Implementation of technology scaling on leakage reduction techniques using cadence tools with 45 nm technology." In International Conference on Nanoscience, Engineering and Technology (ICONSET 2011). IEEE, 2011. http://dx.doi.org/10.1109/iconset.2011.6167912.
Full textSyn Yi, Michelle Ang, Razaidi Hussin, Norhawati Ahmad, and Fakhrul Zaman Rokhani. "Area optimization of comparator layout design by using Cadence Virtuoso tools in 45 nanometer process technology." In 2021 IEEE International Conference on Sensors and Nanotechnology (SENNANO). IEEE, 2021. http://dx.doi.org/10.1109/sennano51750.2021.9642560.
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