Dissertations / Theses on the topic 'Capacitance converter'

This thesis presents the simulation, design, and hardware implementation of a modified multiphase boost converter. Converter design must consider noise imposed on input and output nodes which connect to and influence the operation of other devices. Excessive noise introduces EMI which can damage sensitive circuits or impede their operation. High ripple current degrades battery lifetime and reduces operating efficiency in connected systems such as PV arrays. Converters with high ripple current also experience greater peak conduction loss and require larger components. A two-phase implementation of a modified boost converter demonstrates the input current filtering benefits of the modified topology with increased power capacity. In a 12V to 19V 95W design, the modified multiphase design exhibits a reduced input current ripple of 1.103% compared to the 9.096% of the standard multiphase design while imposing minimal detriment to overall converter efficiency. The modified topology uses two inductors and one feedback capacitance per phase. Larger value inductors generally exhibit lower current ratings as well as larger size. The split inductance of the modified multiphase topology can be designed for occupation of less total volume than the single inductance of the standard multiphase topology.

Switched reluctance motor (SRM) has become a competitive selection for many applications of electric machine drive systems recently due to its relative simple construction and its robustness. The advantages of those motors are high reliability, easy maintenance and good performance. The absence of permanent magnets and windings in rotor gives possibility to achieve very high speeds (over 10000 rpm) and turned SRM into perfect solution for operation in hard conditions like presence of vibrations or impacts. Such simple mechanical structure greatly reduces its price. Due to these features, SRM drives are used more and more into aerospace, automotive and home applications. The major drawbacks of the SRM are the complicated algorithm to control it due to the high degree of nonlinearity, also the SRM has always to be electronically commutated and the need of a shaft position sensor to detect the shaft position, the other limitations are strong torque ripple and acoustic noise effects.

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CAPES - Coordenação de Aperfeiçoamento de Pessoal de Nível Superior
Este documento apresenta uma nova técnica para a minimização da ondulação de baixa frequência, típica de conversores para o acionamento de LEDs alimentados a partir da rede elétrica. Esta estratégia baseia-se na modulação em baixa frequência da razão cíclica do conversor de modo que a ondulação de corrente possa ser reduzida e, consequentemente, as capacitâncias de filtragem do conversor possam ser minimizadas. Esta técnica foi desenvolvida para a aplicação em conversores de malha única, como é o caso de conversores de estágio único ou mesmo dois estágios integrados. A modulação da razão cíclica é projetada de maneira que o comportamento de baixa frequência das principais variáveis do conversor seja alterado, permitindo uma redução da ondulação da corrente de saída ao custo de um incremento cotrolado no conteúdo harmônico da corrente de entrada. Duas possíveis metodologias para a implementação da técnica proposta são discutidas ao longo do trabalho. A primeira envolve a injeção de harmônicas específicas no sinal da razão cíclica do conversor através de ramos adicionais na estrutura de controle. Esta abordagem foi aplicada para projetar um controlador de LEDs baseado em um conversor flyback e também em uma topologia integrada baseada na conexão cascata de dois conversores Buck-boost. Este estudo inicial foi expandido para outros conversores e uma análise generalizada acerca da influência da modulação da razão cíclica no comportamento de controladores de LED alimentados a partir da rede elétrica é apresentada. A segunda metodologia para a implementação da compensação ativa da ondulação de baixa frequência do conversor é baseada na otimização de um controlador proporcional-integral a fim de que tal elemento influencie não só no comportamento dinâmico do circuito, mas também na característica de baixa frequência do conversor. Por fim são discutidas as principais contribuições da tese e algumas propostas para trabalhos futuros são apresentadas
This document presents a novel approach for low-frequency output current ripple minimization in off-line light-emitting diode (LED) drivers. This strategy is based on the large-signal modulation of the duty-cycle so that the output ripple can be reduced and, consequently, the required filtering capacitances of the converter can be somehow decreased. This technique is devised to be used on converters in which a single control loop is employed, such as off-line single-stage or integrated converters. The duty-cycle modulation is used to change the shape of the main waveforms of the converter, especially the input and output currents. This allows for a reduction of the output current peak-to-peak ripple while the harmonic content of the input current is increased but kept within the limits imposed by the IEC standard. Two methodologies for implementing the proposed technique are discussed along the text. The first one is related to the injection of harmonic components to the duty cycle signal by means of additional branches inserted in the conventional control structure. This approach was applied to design an off-line flyback-based LED driver and also a circuit based on the Integrated Double Buck-boost converter. This first study was expanded to other topologies and a generalized analysis regarding the impact of the duty cycle modulation on off-line converters is then presented. The second methodology for implementing the ripple compensation is based on the optimization of a proportional-integral controller so that this element is designed to influence not only in the dynamic behavior of the circuit, but also in its low-frequency characteristic. Finally, the main contributions of this work are discussed and the proposals for future works are presented.

Frequency reference oscillator is a critical component of modern radio transceivers. Currently, most reference oscillators are based on low-frequency quartz crystals that are inherently bulky and incompatible with standard micro-fabrication processes. Moreover, their frequency limitation (<200MHz) requires large up-conversion ratio in multigigahertz frequency synthesizers, which in turn, degrades the phase-noise. Recent advances in MEMS technology have made realization of high-frequency on-chip low phase-noise MEMS oscillators possible. Although significant research has been directed toward replacing quartz crystal oscillators with integrated micromechanical oscillators, their phase-noise performance is not well modeled. In addition, little attention has been paid to developing electronic frequency tuning techniques to compensate for temperature/process variation and improve the absolute frequency accuracy. The objective of this dissertation was to realize high-frequency temperature-compensated high-frequency (>100MHz) micromechanical oscillators and study their phase-noise performance. To this end, low-power low-noise CMOS transimpedance amplifiers (TIA) that employ novel gain and bandwidth enhancement techniques are interfaced with high frequency (>100MHz) micromechanical resonators. The oscillation frequency is varied by a tuning network that uses frequency tuning enhancement techniques to increase the tuning range with minimal effect on the phase-noise performance. Taking advantage of extended frequency tuning range, and on-chip temperature-compensation circuitry is embedded with the sustaining circuitry to electronically temperature-compensate the oscillator. Finally, detailed study of the phase-noise in micromechanical oscillators is performed and analytical phase-noise models are derived.

Les dispositifs DBD se répandent dans un grand nombre d’applications industrielles. Utilisés depuis plus de 150 ans pour la production d’ozone afin de décontaminer l’eau à grande échelle, ils ont depuis la fin du XXème siècle investi les domaines du traitement de surface polymère, du dépôt de couche mince sur substrat et de l’émission lumineuse pour la décontamination ainsi que la médecine. Ces dispositifs sont mis en oeuvre avec un générateur électrique dont les caractéristiques impactent fortement la qualité de la décharge. Ce travail s’inscrit en partie dans le cadre du développement d’une application de traitement de surface à pression atmosphérique. Il aborde la problématique de l’augmentation de la vitesse de dépôt de couche mince au travers des paramètres de l’alimentation électrique. Plus précisément, ce travail s’intéresse aux apports d’une alimentation en courant rectangulaire et aborde également les problématiques liées à la conception et à la fabrication de ce convertisseur. En particulier, une grande attention est portée sur l’étude du transformateur élévateur, car au travers de ses éléments parasites capacitifs, ce dernier peut limiter le transfert de puissance entre la source électrique et le dispositif DBD. Un deuxième aspect de cette étude consiste à entrevoir l’intérêt que revêtent deux convertisseurs statiques dédiés à l’alimentation de dispositifs DBD. Le premier consiste en une alimentation résonante en régime de conduction discontinue dont la particularité est de posséder trois degrés de liberté (fréquence, tension d’entrée et largeur d’impulsion), ce qui lui confère un intérêt exploratoire. Le second convertisseur consiste en une alimentation résonante haute tension et haute fréquence permettant l’éviction du transformateur élévateur, et mettant en oeuvre des interrupteurs au nitrure de gallium (GaN) afin d’atteindre une fréquence de fonctionnement supérieure au mega-Hertz avec un faible niveau de pertes.

De nos jours, les capteurs capacitifs sont largement utilisés dans la mesure de grandeurs physiques telles que le déplacement, l’humidité, la pression, etc. Cette large diffusion est principalement due au développement des technologies MEMS qui ont permis de réduire leur coût, leur taille et leur consommation. Pour mesurer ces variations de capacité, des interfaces de conditionnement électronique ont été développées afin d’obtenir un signal électrique exploitable tel qu’une tension, un courant, un temps, une fréquence ou directement une sortie numérique. C’est dans ce cadre que se positionne l’objectif de cette thèse ; étudier la faisabilité d’une mesure capacitive à sortie numérique à partir d’un pont actif, une architecture développée et brevetée par l’équipe Conception et Test de Microsystèmes du LIRMM pour le conditionnement de capteurs résistifs basse consommation. La conversion numérique utilisée est une modulation Sigma-Delta 1 bit du 1er ordre, relativement facile à implémenter, et donc bien adaptée à l’intégration, à la faible consommation et à la réalisation d’interfaces génériques. Pour le retour 1 bit, deux structures de contre réaction ont été proposées : une contre-réaction résistive et une capacitive. Les résultats théoriques sont comparés à des résultats de simulations et à des mesures obtenues à partir des prototypes fabriqués en technologie CMOS 0,35μm d’Austria MicroSystem (AMS)
Nowadays, capacitive sensors are widely used in the measurement of physical quantities such as displacement, humidity, pressure, etc. This wide dissemination is mainly due to the development of MEMS technologies that have reduced their cost, size and consumption. To measure these capacitance changes, sensor electronic interfaces have been developed to obtain an exploitable electrical signal such as voltage, current, time, frequency or directly a digital output. It is in this framework that the aim of this thesis is positioned ; to study the feasibility of a capacitive measurement with digital output from an active bridge, an architecture developed and patented by the Design and Test Microsystems team of LIRMM for conditioning low power resistive sensors. The digital conversion used is a one-bit first-order Sigma-Delta modulation that is relatively easy to implement, and is well adapted to integration, low power consumption and realization of generic sensor interfaces. Two feedback architectures have been proposed: a resistive feedback and a capacitive. The theoretical results are compared with the results of simulations and measurements obtained from prototypes fabricated using a 0.35μm CMOS technology from Austria MicroSystem (AMS)

It is essential to always track maximum power from photovoltaic (PV) sources. Failure to track the global maximum power point under partial shading conditions is one of the major reasons that lead to significant power losses. Several maximum power point tracking methods have been proposed to deal with this problem. However, none of them were able to effectively identify the occurrence of partial shading. With the facility of Matlab modelling and simulation as well as the aid of a constructed solar emulator, the power-voltage characteristics of a PV panel under uniform and non-uniform irradiance conditions have been studied and some useful conclusions have been identified from observation. Based on these conclusions, a novel maximum power point tracking algorithm has been proposed, which is capable of identifying the occurrence of partial shading hence determining the need for a global scan over the operation range of PV panels for the true maximum power point. In the meantime, the effect of PV dynamics, due to the capacitance of PV cells, on maximum power point trackers has been investigated and some initial results and suggestions have been presented in this work.

This master thesis presents the development of a 100 W LED driver, suitable for outdoor and street lighting. In order to match the driver and LED features, special functionalities are added to the electronic system. To obtain a long lifetime, electrolytic capacitor are exchanged by film capacitor, with longer useful lifetime. However, this practice outcome in higher bus voltage ripple, which have to be compensated in the LED current control stage, named as power control stage. To achieve special functionalities, the proposed driver is designed to operate with universal input voltage and dimming capability, being the entire driver control implement in a digital way, increasing significantly the LED driver flexibility. After the literature review, which aimed to evaluate the characteristics of the LED driver topology structure, the two independent stage topology is selected. The buckboost converter operating in discontinuous conduction mode is employed on the power factor correction stage. The power control stage is composed by the DC/DC LLC resonant converter. Once the LED driver topology is defined, each converter is designed, following by the small signal modeling and the control system design. Experimental results of the driver operating with a reduced bus voltage capacitance (25 μF), are presented for a universal input voltage (85 – 265 VRMS) and different dimming levels (100% − 30%). A high power factor (> 0,94) and a medium to high efficiency (> 82%) is noticed in whole operation points, as well as, a reduced flicker (< 10%), being in accordance with the recent released IEEE Std 1789-2015 and IEC61000-3-2 Class C.
Este trabalho apresenta o desenvolvimento de um driver para o acionamento de um módulo de LEDs de 100 W, destinado a iluminação de exteriores ou iluminação pública. De forma a compatibilizar as características do LED com o driver, diferentes funcionalidades e condições de operação são adicionadas ao sistema eletrônico desenvolvido. Para alcançar longa vida útil, o driver desenvolvido substituiu os capacitores eletrolíticos por capacitores de filme. No entanto, essa prática resulta em maiores ondulações da tensão de barramento, as quais são compensadas pelo estágio de controle da corrente dos LEDs. De modo a aumentar as funcionalidades do driver, o mesmo opera com tensão de entrada universal e controle da intensidade luminosa, sendo o sistema de controle do driver implementado de forma digital, aumentando consideravelmente sua flexibilidade. Após revisão da literatura, a qual objetivou avaliar as características das estruturas e topologias empregadas em drivers para LEDs, seleciona-se a estrutura de dois estágios independentes. O conversor buck-boost operando no modo de condução descontínuo de corrente é empregado no estágio de correção do fator de potência. Para o estágio de controle da corrente dos LEDs, utiliza-se o conversor CC/CC meia ponte ressonante LLC. Definida a estrutura topológica, bem como os conversores utilizados, o projeto dos elementos é desenvolvido, seguido da modelagem dinâmica e do projeto do sistema de controle de cada estágio. Resultados experimentais do driver com reduzida capacitância de barramento (25 μF) mostram a sua operação com tensão de entrada universal (85 – 265 VRMS) e controle de intensidade luminosa (100% − 30%). Verificou-se um alto fator de potência (> 0,94) em toda a faixa de operação, rendimento média-alto (> 82%), bem como reduzida modulação de intensidade luminosa (< 10%), estando em conformidade com a IEEE Std 1789-2015 e a IEC61000-3-2 Classe C.

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior
This work presents the analysis and implementation of a connection between two power converters, applied to street lighting with LEDs. This connection is called optimized cascade. The main idea of this connection is the reduction of the processed energy by the second converter, increasing this way the system efficiency. Besides that, the electrolytic capacitor is eliminated, aiming the life-span increase of the converter. To do that, the capacitance is reduced, causing a low frequency ripple, which is compensated by the second converter. This way, it is possible to unify high eficiency with long life-span on this converter. Such characteristics are considered fundamentals on LED driver. To prove the idea, two prototypes were built, one based on feedback control scheme and the other on a feedback plus feedforward control scheme. Both had shown good results, however the feedback plus feedforward controller proved to be more effiective on the active compensation of the low frequency ripple. In the end, a comparison between the two most used topologies on LED driver with the optimized cascade was performed. The results had shown a possible application range, advantages e limitations of this idea.
Este trabalho apresenta a análise e implementação de uma conexão entre dois conversores de potência, com aplicação para iluminação pública com LEDs. Essa conexão foi chamada de cascata otimizada. A principal ideia dessa conexãoo é a minimização da energia processada pelo segundo conversor, aumentando assim a eficiência do sistema. Além disso, o capacitor eletrolítico é eliminado desta topologia com o intuito de aumentar a vida útil do sistema. Para tal, a capacitância é reduzida, sendo a ondulação de baixa frequência, proveniente de tal redução, compensada ativamente pelo segundo conversor. Com isso, é possível unir alta eficiência e durabilidade, características consideradas fundamentais em um driver para LEDs. Para provar a ideia, dois protótipos foram desenvolvidos, um baseado em controle feedback e o outro baseado na união de um controle feedback com feedforward. Ambos mostraram bons resultados, o entanto o controle feedback mais o feedforward mostrou-se mais eficaz na compensação ativa da ondulação de barramento. Por fim, uma comparação entre as duas topologias mais utilizadas em drivers para LED e a cascata otimizada foi realizada. Os resultados obtidos mostraram sua possível faixa de aplicação, bem como vantagens e limitações.

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior
This work presents the research and development of a connection method for static converters, called Optimized Cascade, which aims to reduce the redundant power processing in multiple stage topologies for LED driving. An initial analysis of possible solutions available on the literature is conducted, where different kinds of solutions are demonstrated, their characteristics and how they can be classified. Afterward, an analysis of the general characteristics of the optimized cascade is presented, as well as the method employed to reduce the bus capacitance value. This reduction aims to replace the electrolytic capacitor for alternative technologies, in order to increase the lifespan of the LED driver. One of the inovations of this work is the proposal of a project methodology, focusing the conversion efficiency and the capacitance reduction. Besides that, a mathematical model of the optimized cascade was derived, so as to establish the impact of the bus voltage ripple on the LED current. From this model, it has been possible to determine parameters for choosing the best operating mode for the second stage and the estimation of capacitance reduction-. Also, some controllers were analyzed to control the PC stage, on which the resonant controller has been proposed for demanding projects, regarding the capacitance value and LED current ripple. Finally, two prototypes were mounted and tested, where an efficiency of thereabout 90% was get with a power factor of 0; 99, along with total compliance with the power quality parameters and flicker. In both prototypes film capacitors were employed, contributing to enhance the lifespan of the converter, making it compatible with LED lifespan.
Este trabalho apresenta o estudo e desenvolvimento de um método de conexão de conversores, chamado Cascata Otimizada, o qual visa reduzir o processamento redundante de energia em topologias de múltiplos estágios para acionamento de LEDs. Uma análise preliminar das soluções disponíveis atualmente na literatura acadêmica é realizada, na qual são demonstrados diferentes tipos de soluções, suas características e como podem ser classificadas. Em seguida, uma análise das características gerais da cascata otimizada é apresentada, bem como o método empregado para redução da capacitância de barramento. Tal redução visa a substituição de capacitores eletrolíticos por tecnologias alternativas, com o intuito do aumento da vida útil do driver. Uma das inovações deste trabalho é a proposição uma metodologia de projeto, com foco na eficiência e na redução da capacitância. Além disso, também foi elaborado um modelo matemático, de forma a determinar o impacto da ondulação da tensão no barramento sobre a corrente nos LEDs. A partir desse modelo, foi possível estabelecer parâmetros para a escolha do melhor modo de operação para o segundo estágio e estimação da redução do capacitor de barramento. Também foram analisados diversos controladores para o segundo estágio, sendo proposto o uso do controle ressonante para projetos mais exigentes com respeito ao valor do capacitor de barramento e da ondulação na corrente de saída. Por fim, dois protótipos foram montados e testados, obtendo uma eficiência de aproximadamente 90%, fator de potência de 0;99 e total observância aos parâmetros de qualidade de energia e flicker. Em ambos os protótipos foram empregados capacitores de filme, o que contribui para elevar a vida útil do conversor, compatibilizando-a com a vida útil da carga LED.

Проаналізовано методи аналізу якісного та кількісного складу харчових продуктів. На основі проведеного огляду методів контролю якості овочів визначено, що перспективним методом кількісного аналізу вмісту мінеральних речовин в овочах є кондуктометричний метод дослідження рідин, що ґрунтується на вимірюванні електричної провідності. На основі математичного аналізу з використаннямтеорії нечітких множин вивчено вплив мінеральних добрив на вміст корисних речовин (клітковини, вуглеводів, білків). При цьому, задача розв’язана у три етапи: 1) апроксимація результатів впливу мінеральних добрив на вміст корисних речовин 2) симплекс – метод. Знаходження оптимальних значень задачі лінійного програмування - параметрів w0 та d0 3) розв’язок системи нерівностей із шуканим результатом – марка мінеральних добрив. Також здійснений розрахунок функції належності цілі та обмежень для повної картини розв’язку математичної задачі. Досліджено можливості відомого імітансного методу для контролю показників якості овочевого соку. У кондуктометричну комірку поміщались модельні рідини – овочеві соки з домішками важких металів. Вивчено залежності активної та реактивної складових електропровідності овочевого соку з домішками іонів міді та натрію в частотному діапазоні 50 Гц - 100 кГц. Використання отриманих залежностей покращує інформативність електричних досліджень і, таким чином, підвищує оперативність аналізу показників якості. Розроблений засіб вимірювання та отримані залежності дають змогу здійснювати експрес-контроль вмісту домішок в овочевих соках за електричними параметрами. Для імітансного контролю показників якості овочевого соку запропоновано і реалізовано віртуальний засіб вимірювання на основі апаратно-програмної платформи LabVIEW та з блоком NI USB 6009. Віртуальний прилад у складі: ПК з програмним забезпеченням LabVIEW, згаданого блоку NI USB 6009 та кондуктометричної комірки з соком вжито для визначення вмісту важких металів у цьому соці. Тим самим, доведено, що у виробничих умовах при незначних витратах можна оперативно контролювати якість овочів, з яких отримують досліджуваний сік. Проанализированы методы анализа качественного и количественного состава пищевых продуктов. На основе обзора методов контроля качества овощей определено, что перспективным методом количественного анализа содержания минеральных веществ в овощах есть кондуктометрический метод исследования жидкостей, основанный на измерении электрической проводимости. На основе математического анализа с использованием теории нечетких множеств изучено влияние минеральных удобрений на содержание полезных веществ (клетчатки, углеводов, белков). При этом, задача решена в три этапа: 1) аппроксимация результатов воздействия минеральных удобрений на содержание полезных веществ 2) симплекс - метод. Нахождение оптимальних значений задачи линейного програмирования - параметров w0 и d0 3) решение системы неравенств с искомым результатом - марка минеральных удобрений Расчет функции принадлежности цели и ограничений для полной картины решения математической задачи. Исследованы возможности известного имитансного метода для контроля показателей качества овощного сока. Для экспериментальных исследований разработана структура измерительного средства в составе кондуктометрической ячейки, RLС-метра, блоков управления и обработки результатов. В кондуктометрическую ячейку помещались модельные жидкости - овощные соки с примесями тяжелых металлов. Изучены зависимости активной и реактивной составляющих электропроводности овощного сока с примесями ионов меди и натрия в частотном диапазоне 50 Гц - 100 кГц. Использование полученных зависимостей улучшает информативность электрических исследований и, таким образом, повышает оперативность анализа показателей качества. Разработан способ измерения и полученные зависимости позволяют осуществлять экспресс-контроль содержания примесей в овощных соках по электрическим параметрам. Для иммитансного контроля показателей качества овощного сока предложено и реализовано виртуальное средство измерения на основе аппаратно-программной платформы LabVIEW с блоком NI USB 6009. Виртуальный прибор в составе ПК с программным обеспечением LabVIEW, упомянутого блока NI USB 6009 и кондуктометрической ячейки с соком приняты для определения содержания тяжелых металлов в этом соке. Тем самым, доказано, что в производственных условиях при незначительных затратах можно оперативно контролировать качество овощей, из которых получают исследуемый сок. The dissertation is devoted to the improvement of methodological and metrological assurance of quality control of vegetables and juices from them on the basis of their electro physical parameters analysis with the help of virtual means of immitance control. The first section analyzes the methods for the qualitative and quantitative composition of food products. Measuring methods of analysis are based on the physical, chemical and biological properties of the substance. The described methods are briefly described; their advantages and disadvantages are indicated. Electrochemical methods, which are related to changes in structure, chemical composition and concentration, are shown to be effective and provide qualitative and quantitative analysis of substances in gas, liquid or solid state. Informative parameters, in this case, are electrical parameters. In the second section, a comparative analysis of the normative base of Ukraine was carried out in order to approximate the legislation on quality and safety of vegetables and their products to the standards of international law. To optimize the overall quality index, it is proposed to use the mathematical apparatus of the theory of fuzzy sets, since the characteristics of the product must be in a certain range. As a result, several mathematical models for the complex evaluation of the quality of agricultural products for fuzzy constraints are constructed: I model is a model for identifying vegetables with the highest content of fiber, carbohydrates and proteins, depending on the amount of mineral fertilizers (maximum value of the function defining a complex quality index); II Model - a model for achieving the maximum weight of agricultural products (maximum value of the function of mass depending on mineral fertilizers); III model - a model for ensuring the cultivation of agricultural products with specified parameters of the proportion of nutrients (carbohydrates, proteins); IV Model is a model of safety of vegetables, that is, a model for assessing the safety of products in relation to its contamination by heavy metals. Based on mathematical analysis using fuzzy set theory, the effect of mineral fertilizers on the content of nutrients (fiber, carbohydrates, proteins) has been studied. In this case, the problem is solved in three stages: 1) Approximation of the results of the influence of mineral fertilizers on the content of nutrients 2) Simplex - method. Finding the parameters w0 and d0 3) The solution of the system of inequalities with all the desired results - the brand of mineral fertilizers, mathematical parameters λ Calculation of the goal affiliation function and constraints for a complete picture of the solution of a mathematical problem. In the third section, a processing of the results was developed. In conductivity cell was placed model liquids - vegetable juices with impurities of heavy metals. The dependences of the active and reactive components of electrical conductivity of vegetable juice with impurities of copper ions and sodium ions on the frequency of the electromagnetic field of 50Hz-100kHz were studied. It was found on the basis of experimental study: 1) As the frequency of the test signal increases, the active component becomes constant (independent of frequency), and the reactive component approaches zero. As the purpose of research is complex conductivity, I consider research on high frequencies uninformative. 2) At frequencies below 1000 Hz, the experimentally obtained inverse dependence of the active and reactive components of conductivity, which provides information on the quality of juice without additives. 3) In the presence of heavy metal impurities in the controlled juice sample, using immittance measurements, it is possible to prove the efficiency of this method for qualitative and quantitative analysis of carrot juice. The fourth chapter presents a developed virtual means for measuring the imitation of vegetable juice was described. For immitance control of vegetable juice quality indicators, a virtual measuring device based on the LabVIEW hardware platform and a compatible NI USB 6009 unit was proposed and implemented. This enabled the rapid analysis of the juice content of the mineral substances by electrical parameters. Thus, in production conditions, at a negligible cost, you can quickly control the quality of vegetables from which the juice is obtained. The virtual device consists of: a PC with LabVIEW software, the mentioned NI USB 6009 block and a conductivity cell with juice used to determine the content of heavy metals in this juice. To measure and calculate the imitation of the object, a sinusoidal test signal was generated in the form of voltage variable amplitude of 10-20 mV. Since the NI USB 6009 unit is not capable of generating alternating voltage, the program uses certain elements of the NI-DAQ task with the While Loop with Stop Button cycle. To do this, it was created the Channel Generation - Create Channel (Start Task, Write, Clean Task), and Wait, which governs the sinusoidal period. The immittance values were obtained by mathematical processing of voltage and current signals of the conductometric cell with the investigated juice. The operation of mathematical processing is provided by the algorithm of the virtual measuring instrument. It was carried out in three possible ways: 1. The classical method, which involves the use of Euler's equation. 2. A method of measuring active and reactive power and dividing the effective value of the signal power by the square of the current value. 3. Method using exponential Fourier transformation using the voltage and current signals of the measured object to estimate the first harmonics.

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior
This thesis presents the study and characterization of organic light-emitting diodes (OLEDs) with the proposal of obtaining an equivalent model that is useful in the OLED driver design and in lighting systems projects. Initially, a literature review covering the operating principle and the constructive aspects of OLEDs is presented. From this, a model that integrates scale, photometrical, electrical and thermal aspects is proposed. This model is static and dynamic and is called EFET. A procedure for parameter identification of the model is proposed, jointly with an analysis of the intrinsic capacitance effect on the OLED electrical, thermal and photometrical performance. The proposed model is able to predict and simulate the OLED based lighting systems before building, saving time and cost. The model is validated using different OLED samples and conclusions are derived from the experimental validation and simulation results. An approach considering the dimming methods of OLEDs is presented, showing the chromatic impact caused by each method. Finally, an OLED driver based on the concept of switched capacitor converters is proposed. The thesis results are satisfactory and provide an enhancement to the state of the art in modeling and OLED driving.
A presente tese de doutorado apresenta o estudo e a caracterização de diodos orgânicos emissores de luz (OLEDs) com a proposta de um modelo equivalente que é útil no desenvolvimento de circuitos de acionamento e na análise de OLEDs, quando aplicados em sistemas de iluminação. Inicialmente, é apresentada uma revisão bibliográfica contemplando o princípio de funcionamento e os aspectos construtivos dos OLEDs. A partir disto, um modelo que integra os aspectos de escala, fotométricos, elétricos e térmicos é proposto. Esse modelo é denominado EFET e é dividido em estático e dinâmico. Uma proposta de procedimento para identificação dos parâmetros do modelo é apresentada, juntamente com a análise do efeito da capacitância intrínseca dos OLEDs no seu desempenho elétrico, térmico e fotométrico. Com o modelo proposto pode-se predizer e simular o comportamento dos OLEDs antes de construir o sistema de iluminação, reduzindo custos e tempo de desenvolvimento. O modelo é validado empregando diferentes amostras de OLEDs. Conclusões são obtidas a partir da validação experimental e de simulações empregando simuladores elétricos e da fluidodinâmica computacional através do método de elementos finitos. Uma abordagem considerando os métodos de ajuste da intensidade luminosa de OLEDs é apresentada, evidenciando o impacto cromático provocado por cada método. Por fim, um circuito de acionamento para OLEDs baseado no conceito de capacitores chaveados é proposto. Os resultados obtidos são satisfatórios e proporcionam um incremento ao estado da arte da modelagem e acionamento de OLEDs.

碩士
國立清華大學
電機工程學系
101
Analog to digital converter are the essential bridge between nature world and digital world, and this thesis introduces a successive approximation analog to digital converter mainly used in the radar receiver, where the received RF signals are frequency-reduced after high-speed sampling, and then amplified by the baseband amplifier. The signals are then processed by the analog to digital converter and finally the converted digital signal to the computer for data analysis. In the thesis, we have proposed a successive approximation analog to digital converter, which has been greatly improved the capacitance matrix, making the size 50% less than traditional ones. The ADCs with monotonic structure capacitance matrix of different places are able to maintain the common-mode voltage, which is a huge benefit to avoid comparator from generating random offset voltages. The 10 bits in 20 million samples per second successive approximation analog to digital converter is implemented in a TSMC 65 nm CMOS process. The design is operated in 1V with ENOB 9.97 and perfect DNL, INL. The average power consumption is 620μW, and the average energy consumption is 30fJ each conversion.

碩士
國立成功大學
電機工程學系碩博士班
101
In this thesis, a half-bridge resonant capacitance switching network LLC converter is analyzed and implemented. The half-bridge resonant capacitors switching network is adopted to reduce the input current ripple. The resonant capacitors and the input capacitors are integrated so that the components can be reduced. Two transformers are connected in series on the primary side and in parallel on the secondary side, thus the voltage stress and current stress is reduced. Since the voltage and current are automatically balanced between two transformers so that their power capacity is balanced. The operating principle is analyzed, the equivalent circuit of the resonant tank is analyzed, and some important parameters are designed. Finally, a LLC half-bridge resonant converter with 400V input voltage, 24V/600W output is implemented to verify the feasibility and effectiveness of the proposed LLC converter.

碩士
國立臺灣大學
電子工程學研究所
106
This thesis presents a 12-bit 1 MS/s high power-efficient successive approximation register (SAR) analog-to-digital converter (ADC) with 0.7V supply voltage. By using detect-and-skip (DAS) algorithm, the capacitive digital-to-analog converter (DAC) switching power can be reduced. To be more power-efficient, the unit capacitance can shrink to decrease the DAC switching power largely. There is a bottleneck of weight compensation when the ADC takes the DAS algorithm to switch DAC. The weight-split compensation (WSC) can overcome this bottleneck perfectly. In the calibration mode, the reconfigurable redundancy can resolve the problem of the comparator offset. In addition, the Vcm-based tracking switching can enhance the resolution to decrease the calibration converge time. The propose ADC is fabricated using a 40-nm CMOS process. It consumes 2.47 W from a 0.7-V supply at a conversion-rate of 1 MS/s. After foreground calibration, the measured DNL and INL are +0.61/-0.57 and +0.93/-0.92 LSB. The measured SNDR and SFDR are at 66.54 dB and 89.55 dB, respectively. The ENOB performance is 10.75 b, which is equivalent to a Walden and Schreier figure-of-merit of 1.47 fJ/conversion-step and 179.6 dB, respectively.

Energy efficiency is a key requirement for wireless sensor nodes, biomedical implants, and wearable devices. The energy consumption of the sensor node needs to be minimized to avoid battery replacement, or even better, to enable the device to survive on energy harvested from the ambient. Capacitive sensors do not consume static power; thus, they are attractive from an energy efficiency perspective. In addition, they can be employed in a wide range of sensing applications. However, the sensor readout circuit–i.e., the capacitance-to-digital converter (CDC)–can be the dominant source of energy consumption in the system. Thus, the development of energy-efficient CDCs is crucial to minimizing the energy consumption of capacitive sensor nodes. In the first part of this dissertation, we propose several energy-efficient CDC architectures for low-energy sensor nodes. First, we propose a digitally-controlled coarsefine multislope CDC that employs both current and frequency scaling to achieve significant improvement in energy efficiency. Second, we analyze the limitations of successive approximation (SAR) CDC, and we address these limitations by proposing a robust parasitic-insensitive opamp-based SAR CDC. Third, we propose an inverter-based SAR CDC that achieves an energy efficiency figure-of-merit (FoM) of 31fJ/Step, which is the best energy efficiency FoM reported to date. Fourth, we propose a differential SAR CDC with quasi-dynamic operation to maintain excellent energy efficiency for a scalable sample rate. In the second part of this dissertation, we study the matching properties of small integrated capacitors, which are an integral component of energy-efficient CDCs. Despite conventional wisdom, we experimentally illustrate that the mismatch of small capacitors can be directly measured, and we report mismatch measurements for subfemtofarad integrated capacitors. We also correct the common misconception that lateral capacitors match better than vertical capacitors, and we identify the conditions that make one implementation preferable. In the third and last part of this dissertation, we investigate the potential of novel metal-organic framework (MOF) thin films in capacitive gas sensing. We provide sensitivity-based optimization and simple fabrication flow for capacitive interdigitated electrodes. We use a custom flexible gas sensor test setup that is designed and built in-house to characterize MOF-based capacitive gas sensors.

碩士
國立高雄應用科技大學
電子工程系碩士班
102
This thesis presents the design of a 10-bit 20-MS/s successive-approximation (SAR) analog-to-digital converter (ADC). The comparator-based switched capacitor (CBSC) amplifier circuit and an active charge transferring structure are proposed to reduce the capacitance loading and associating area, and thus the power consumption and manufacture cost are reduced. Moreover, we modified the control circuit to make the system tolerate a greater trigger error. The proposed ADC is simulated in a 0.18-μm CMOS process. The simulation results show that the effective number of bit (ENOB) is 9.78 bit and the power consumption is 1.323 mW at a supply voltage of 1.8 V with a sampling rate of 20 MS/s.

碩士
國立清華大學
電機工程學系
103
Imitating biomechanism of animals makes people to improve the world. The biomechanism of human is the most complexity but the most suitable for ourselves. Many odors are not safe for human to smell, such as poisonous and exhausted gases. In addition, olfaction is different from one person to others. Compare to the traditional gas detection instrument, an electronic nose (E-nose) system has various advantages including small chip size, low cost, low power dissipation, quantization of olfaction, and the capability of being exposed to dangerous gases. Therefore, it can be applied to quality control of foods, environmental monitoring, pollution measurement and disease diagnosis, etc. E-nose system is composed of a gas sensor array, a signal acquisition circuit and a pattern recognition system. Conducting polymer sensor is one of the chemical gas sensors. It has the advantages of working at room temperature, high sensitivity, and its mechanism is simple, which would be suitable for portable devices. However, the sensor capacitance could be easily affected by temperature, humidity, and background odors. In addition, the capacitance of each sensor in the sensor array are not the same after deposition of different sensing materials. Therefore, an capacitance-to-digital converter with switched-capacitor amplifier and successive approximation register analog-to-digital converter is presented in this article. Switched-capacitor convert the capacitance to voltage and changing the capacitance measurement range by selecting 4 set of reference capacitors and voltages. And analog-to-digital converter transfer the voltage to digital output for computer analysis. The prototype is implemented with TSMC 0.18 μm 1P6M process. The prototype operated at 0.7 V and measurement time is 0.25 ms. The effective number of bits are 8.35 bits, and the figure of merit is 168 fJ/step.

碩士
國立中正大學
電機工程研究所
107
A pressure sensing system consisting of the MEMS pressure sensor and the readout circuits on a single chip by CMOS MEMS technology is presented. In-house wet etching post process is used to release the MEMS structure. Pressure signal is converted into capacitance value by the proposed on-chip MEMS capacitive sensor then digitized by an Bypass Successive-Approximation-Register Capacitance to Digital Converter(Bypass SAR CDC) .Parasitic capacitance, noise and area of sensing system is greatly reduced by the integration of capacitive sensor and CDC on a single chip. The proposed Bypass SAR CDC is composed of a Interdigitater Extended CMOS MEMS Pressure Sensor, a Bypass Comparator and Bypass Control Logic; The sensor parallel plate capacitance structure is combined with interdigitated structure to increase the unit capacitance value, and increase the sensitivity of the sensor using an extended architecture. Place this sensor on a capacitor array in the Bypass SAR CDC. Hence, when the sensing capacitance changes, it will produce voltage drift. Then the system will track the voltage drift and generate output digital codes. In addition, Bypass SAR CDC can automatically adjust the power according to the ICP input signal size to achive power optimization performance. The sensitivity and sensing range of MEMS capacitive sensor are 53.25 pF/Mpa and 0-40kPa, respectively. The prototype chip is fabricated using the UMC 0.18μm 1P6M CMOS technology with an area of 1.5*1.5〖mm〗^2, 0.9μW/1.62μW(Bypass/no Bypass) power consumption and FoM 0.1 7pJ/step (Bypass) 0.307 pJ/step (no Bypass). Keywords: MEMS, capacitive sensor, sensor readout, Bypass SAR CDC

Sensor interfaces are needed to communicate the measured real-world analog values to the base¬band digital processor. They are dominated by the presence of high accuracy, high resolution analog to digital converters (ADC) in the backend. On most occasions, sensing is limited to small range measurements and low-modulation sensors where the complete dynamic range of ADC is not utilized. Designing a subsystem that integrates the sensor and the interface circuit and that works with a low resolution ADC requiring a small die-area is a challenge. In this work, we present a CMOS based area efficient, integrated sensor interface for applications like capacitance, temperature and dielectric-constant measurement. In addition, potential applica-tions for this work are in Cognitive Radios, Software Defined Radios, Capacitance Sensors, and location monitoring. The key contributions in the thesis are: 1 High Sensitivity Frequency-domain CMOS Capacitance Interface: A frequency domain capacitance interface system is proposed for a femto-farad capacitance measurement. In this technique, a ring oscillator circuit is used to generate a change in time period, due to a change in the sensor capacitance. The time-period difference of two such oscillators is compared and is read-out using a phase frequency detector and a charge pump. The output voltage of the system, is proportional to the change in the input sensor capacitance. It exhibits a maximum sensitivity of 8.1 mV/fF across a 300 fF capacitance range. 2 Sensitivity Enhancement for capacitance sensor: The sensitivity of an oscillator-based differential capacitance sensor has been improved by proposing a novel frequency domain capacitance-to-voltage (FDC) measurement technique. The capacitance sensor interface system is fabricated in a 130-nm CMOS technology with an active area of 0.17mm2 . It exhibits a maximum sensitivity of 244.8 mV/fF and a measurement resolution of 13 aF in a 10-100 fF measurement range, with a 10 pF nominal sensor capacitance and an 8-bit ADC. 3 Frequency to Digital Converter for Time/Distance measurement: A new architecture for a Vernier-based frequency-to-digital converter (VFDC) for location monitoring is pre¬sented, in which, a time interval measurement is performed with a frequency domain approach. Location monitoring is a common problem for many mobile robotic applica¬tions covering various domains, such as industrial automation, manipulation in difficult areas, rescue operations, environment exploration and monitoring, smart environments and buildings, robotic home appliances, space exploration and probing. The proposed architecture employs a new injection-locked ring oscillator (ILR) as the clock source. The proposed ILR oscillator does not need complex calibration procedures, usually required by Phase Locked Loop (PLL) based oscillators in Vernier-based time-to-digital convert¬ers. It consumes 14.4 µW and 1.15 mW from 0.4 V and 1.2 V supplies, respectively. The proposed VFDC thus achieves a large detectable range, fine time resolution, small die size and low power consumption simultaneously. The measured time-difference error is less than 50 ps at 1.2 V, enabling a resolution of 3 mm/kHz frequency shift. 4 A bio-sensor array for dielectric constant measurement: A CMOS on-chip sensor is presented to measure the dielectric constant of organic chemicals. The dielectric constant of these chemicals is measured using the oscillation frequency shift of a current controlled os¬cillator (CCO) upon the change of the sensor capacitance when exposed to the liquid. The CCO is embedded in an open-loop frequency synthesizer to convert the frequency change into voltage, which can be digitized using an off-chip analog-to-digital converter. The dielectric constant is then estimated using a detection procedure including the calibration of the sensor. 5 Integrated Temperature Sensor for thermal management: An integrated analog temper¬ature sensor which operates with simple, low-cost one-point calibration is proposed. A frequency domain technique to measure the on-chip silicon surface temperature, was used to measure the effects of temperature on the stability of a frequency synthesizer. The temperature to voltage conversion is achieved in two steps i.e. temperature to frequency, followed by frequency to voltage conversion. The output voltage can be used to com¬pensate the temperature dependent errors in the high frequency circuits, thereby reduc¬ing the performance degradation due to thermal gradient. Furthermore, a temperature measurement-based on-chip self test technique to measure the 3 dB bandwidth and the central frequency of common radio frequency circuits, was developed. This technique shows promise in performing online monitoring and temperature compensation of RF circuits.

One of the key requirements in the design of wireless sensor nodes and miniature biomedical devices is energy efficiency. For a sensor node, which is a sensor and readout circuit, to survive on limited energy sources such as a battery or harvested energy, its energy consumption should be minimized. Capacitive sensors are candidates for use in energy-constrained applications, as they do not consume static power and can be used in a wide range of applications to measure different physical, chemical or biological quantities. However, the energy consumption is dominated by the capacitive interface circuit, i.e. the capacitance-to-digital converter (CDC). Several energy-efficient CDC architectures are introduced in this dissertation to meet the demand for high resolution and energy efficiency in smart capacitive sensors. First, we propose an energy-efficient CDC based on a differential successive-approximation data converter. The proposed differential CDC employs an energy-efficient operational transconductance amplifier (OTA) based on an inverter. A wide capacitance range with fine absolute resolution is implemented in the proposed coarse-fine DAC architecture which saves 89% of silicon area. The proposed CDC achieves an energy efficiency figure-of-merit (FOM) of 45.8fJ/step, which is the best reported energy efficiency to date. Second, we propose an energy efficient CDC for high-precision capacitive resolution by using oversampling and noise shaping. The proposed CDC achieves 150 aF absolute resolution and an energy efficiency FOM of 187fJ/conversion-step which outperforms state of the art high-precision differential CDCs. In the third and last part, we propose an in-vitro cancer diagnostic biosensor-CMOS platform for low-power, rapid detection, and low cost. The introduced platform is the first to demonstrate the ability to screen and quantify the spermidine/spermine N1 acetyltransferase (SSAT) enzyme which reveals the presence of early-stage cancer, on the surface of a capacitive biosensor. This platform, which is a biosensor combined with a highly energy-efficient digital CDC, is implemented and fabricated in a CMOS technology and can sense and convert the capacitance value from the biosensor to a digital word in an energy efficient way. The platform achieves an ultra-low power consumption: four orders of magnitude less than the state-of-the-art biosensor-CMOS platforms.

M.Ing.
This study focuses its attention on conducted common mode EMI. Common mode current is the current that flows from an electrical circuit to a zero reference plane and back to the circuit again. It is known that the manner in which the common mode current flows is through stray capacitances that form between the electrical circuit and the zero reference. This study was aimed at developing a method to measure the value of the stray capacitance of a switching circuit. Determining the value of the stray capacitance by taking physical measurements on a circuit board is a challenge for a number of reasons, one of which is that great care should be taken not to add to the stray capacitance by means of the measuring equipment. By measuring the value of the stray capacitance, it will be possible to model the occurrence of Common Mode EMI better and more accurately. This could, in turn, lead to a reduction in EMI. Any body of an arbitrary shape, size and material exhibits a self-capacitance with respect to a zero reference frame. This principle, together with the principle of conservation of charge, also applies to electrical components, or circuits as a whole. The experimental work was performed on a buck DC-DC converter. The circuit was simplified to aid in analysis. By varying the value of an external capacitance and taking basic measurements, it is then possible to uniquely determine the absolute values of the self-capacitances. For every pair of external capacitance values placed in the circuit (of which one can be =0pF), a value for stray capacitance is calculated. Many data points were recorded with many different external capacitors in the circuit, resulting in a variety of stray capacitance values. In order to obtain a single value, a weighted mean of all the values was calculated. The values obtained in this proposed method of measuring the stray capacitance compares well with that obtained using the Finite Element Method. The advantage of the method presented here is that the self-capacitances are determined under the actual operational conditions, no specialised equipment is required and no unique handling of parasitics is needed. The method relies on very simple measurements and no complex data manipulations are required.

Packaging is an important element responsible for brand growth and one of the main rea-sons for producers to gain competitive advantages through technological innovation. In this re-gard, the aim of this work is to design a fully autonomous electronic system for a smart bottle packaging, being integrated in a European project named ROLL-OUT. The desired application for the smart bottle is to act as a fill-level sensor system in order to determine the liquid content level that exists inside an opaque bottle, so the consumer can exactly know the remaining quantity of the product inside. An in-house amorphous indium–gallium–zinc oxide thin-film transistor (a-IGZO TFT) model, previously developed, was used for circuit designing purposes. This model was based in an artificial neural network (ANN) equivalent circuit approach. Taking into account that only n-type oxide TFTs were used, plenty of electronic building-blocks have been designed: clock generator, non-overlapping phase generator, a capacitance-to-voltage converter and a comparator. As it was demonstrated by electrical simulations, it has been achieved good functionality for each block, having a final system with a power dissipation of 2.3 mW (VDD=10 V) not considering the clock generator. Four printed circuit boards (PCBs) have been also designed in order to help in the testing phase. Mask layouts were already designed and are currently in fabrication, foreseeing a suc-cessful circuit fabrication, and a major step towards the design and integration of complex trans-ducer systems using oxide TFTs technology.