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1
Yang, Fan. "Characterization of HFO2 Capacitors." Fogler Library, University of Maine, 2003. http://www.library.umaine.edu/theses/pdf/YangF2003.pdf.
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DeCerbo, Jennifer N. "Development and Characterization of Layered, Nitrogen-Doped Hafnium Oxide and Aluminum Oxide Films for Use as Wide Temperature Capacitor Dielectrics." University of Dayton / OhioLINK, 2015. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1429979783.
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King, Peter. "Hafnium oxide-based dielectrics by atomic layer deposition." Thesis, University of Liverpool, 2013. http://livrepository.liverpool.ac.uk/9253/.
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In 2007 there was an important change in the architecture of nanotransistors - the building blocks of modern logic and memory devices. This change was from utilising thermally grown silicon dioxide as a dielectric to so-called high-κ hafnium oxide dielectrics grown by atomic layer deposition. The first production logic devices of this era used a hafnium oxide dielectric layer deposited by thermal atomic layer deposition; using HfCl₄ and H₂O as the precursors. Present day fabrication makes use of hafnium oxide-based atomic-layer-deposited dielectric films. The latest nanotransistor devices utilise a third generation hafnium oxide-based dielectric material. This thesis examines hafnium oxide-based thin film dielectric materials prepared by thermal atomic layer deposition on silicon substrates. Specifically the enhancement of the dielectric response of hafnium oxide by the addition of other elements is examined. Two ternary materials systems were deposited by thermal atomic layer deposition and analysed: titanium-hafnium oxide and cerium-hafnium oxide. Hafnium oxide films were deposited to be used as measurement benchmarks. Cerium oxide films were also deposited and analysed in their own right as potential dielectric layers. The hafnium oxide and both ternary deposition experiments used (MeCp)₂Hf(OMe)(Me) as the hafnium precursor. The titanium-hafnium oxide growth used Ti(iOPr)₄ as a titanium source and the cerium oxide and cerium-hafnium oxide work utilised Ce(mmp)₄ as a cerium source. Post-deposition specimen sets consisted of an as-deposited sample, a sample spike-annealed in N₂ at 850°C and a sample annealed for 30 minutes at 500°C. These annealing regimes were performed to mimic typical gate-first and gate-last transistor processing steps. The compositions and thicknesses of the films were measured using medium energy ion scattering. The structure of the films was analysed by X-ray diffraction and Raman spectroscopy. Capacitance-voltage and current density-field measurements were taken from fabricated MOS capacitor specimens to assess the dielectric response of the films. X-ray diffraction and Raman measurements showed that un-doped HfO₂ had monoclinic crystallinity as-deposited and after the two annealing regimes. The dielectric constant and leakage current density, 17 and 1.7x10⁻⁷ A/cm² at -1 MV/cm respectively, are consistent with values reported in the literature for HfO₂ films. The addition of titanium suppressed the crystallinity of the material resulting in amorphous films in compositions with Ti₀.₃Hf₀.₇O₂ titanium and above. The optimum electrical results were recorded for the titanium-hafnium oxide material in the composition Ti₀.₅Hf₀.₅O₂ which had a dielectric constant of 35 as-deposited and a leakage current density of 1.0x10⁻⁷ A/cm² at -1 MV/cm. This composition of film demonstrated similar values after the 500°C/30 min anneal but both dielectric constant and leakage current density suffered after the 850°C/spike anneal; 22 and 1.8x10⁻⁶ A/cm² at -1 MV/cm respectively. Films with compositions of Ti₀.₁Hf₀.₉O₂ demonstrated much lower dielectric constant and higher leakage current density, especially after heat treatment. The addition of cerium in a Ce₀.₁₁Hf⁰.₈₉O₂ composition was found to suppress crystallinity as-deposited and then provoke a lattice-substitutional phase change to the metastable tetragonal/cubic phase after both types of heat treatment. This ceriumactivated phase change resulted in a molar volume modulation compared to un-doped HfO₂. An increased dielectric constant compared to un-doped HfO₂ of 31 was recorded for the 500 °C/30 min anneal with the 850°C/spike anneal resulting in a lower value of 21. Leakage current density was 1.3x10⁻⁷ A/cm² and 3.2x10⁻⁷ A/cm² at -1 MV/cm respectively for the same anneals. Deposition with Ce(mmp)₄ and water was found to result in cubic crystalline films across a growth temperature range 150-350 °C. The frequency dependency of the dielectric properties was found to be influenced by the crystallite size which was governed by the deposition temperature. The highest dielectric constant, 42, was measured for the 150 °C growth temperature with C-V measurements performed at 1 MHz. The two doped HfO₂-based materials systems studied have demonstrated potential as dielectric materials for use in future nanoelectronic devices.
4
Marshall, Paul Andrew. "Liquid injection MOCVD of hafnium oxide, silicate and aluminate high-k dielectrics." Thesis, University of Liverpool, 2005. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.422113.
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Gao, Yong. "Deposition, stabilization and characterization of zirconium oxide and hafnium oxide thin films for high k gate dielectrics." Diss., The University of Arizona, 2004. http://hdl.handle.net/10150/290136.
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As the MOS devices continue to scale down in feature size, the gate oxide thickness is approaching the nanometer node. High leakage current densities caused by tunneling is becoming a serious problem. Replacing silicon oxide with a high kappa material as the gate dielectrics is becoming very critical. In recent years, research has been focused on a few promising candidates, such as ZrO₂, HfO₂, Al₂O₃, Ta₂O₅, and some silicates. However, unary metal oxides tend to crystallize at relatively low temperatures (less than 700°C). Crystallized films usually have a very small grain size and high leakage current due to the grain boundaries. The alternatives are high κ oxides which are single crystal or amorphous. Silicates remain amorphous at high temperatures, but have some problems such as phase separation, interface reaction, and lower κ value. In this work, we addressed the crystallization problems of zirconium oxide and hafnium oxide thin films. Both of these two thin films were deposited by DC reactive magnetron sputtering so that very dense films were deposited with little damage. A specially designed system was set up in order to have good control of the deposition process. The crystallization behavior of as-deposited amorphous ZrO₂ and HfO₂ films was studied. It was found that the films tended to have higher crystallization temperature when the films were thinner than a critical thickness of approximately 5 nm. However, it was still well below 900°C. The crystallization temperature was significantly increased by sandwiching the high kappa oxide layer between two silica layers. Ultra thin HfO₂ films of 5nm thickness remained amorphous up to 900°C. This is the highest crystallization temperature which has been reported. The mechanisms for this effect are proposed. Electrical properties of these high kappa dielectric films were also studied. It was found that ultra thin amorphous HfO₂ and ZrO₂ films had superior electrical properties to crystalline films. The leakage current density of ultra thin amorphous films was at least two orders of magnitude lower than that of crystallized films. Amorphous films also showed much less hysteresis in the capacitance-voltage curve than uncapped crystallized films. The mechanisms for the electrical property differences between ultra thin crystalline and amorphous films were studied. Due to successful control of the low dielectric interfacial layer thickness, an effective oxide thickness of 1.2 and 1.4 nm was obtained for HfO₂ and ZrO₂ films, respectively.
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Essary, Chad Robert. "Ultraviolet-assisted oxidation and nitridation of hafnium and hafnium aluminum alloys as potential gate dielectrics for metal oxide semiconductor applications." [Gainesville, Fla.] : University of Florida, 2004. http://purl.fcla.edu/fcla/etd/UFE0006612.
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Deng, Linfeng, and 邓林峰. "A study on pentacene organic thin-film transistors with Hf-based oxideas gate dielectric." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2011. http://hub.hku.hk/bib/B47244513.
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Compared with its inorganic counterpart, organic thin-film transistor (OTFT) has advantages such as low-temperature fabrication, adaptability to large-area flexible substrate, and low cost. However, they usually need high operating voltage and thus are not suitable for portable applications. Although reducing their gate–dielectric thickness can lower the operating voltage, it increases their gate leakage. A better way is making use of high-κ gate dielectric, which is the main theme of this research.
Firstly, pentacene OTFTs with HfO2 gate dielectric nitrided in N2O or NH3 at 200 oC were studied. The NH3-annealed OTFT displayed higher carrier mobility, larger on/off current ratio, smaller sub-threshold swing and smaller Hooge?s parameter than the N2O-annealed device. All these advantages were attributed to more nitrogen incorporation at the dielectric surface by the NH3 annealing which provided stronger passivation of surface traps.
The incorporation of lanthanum to hafnium oxide was demonstrated to realize enhanced interface in the pentacene OTFTs. Therefore, pentacene OTFTs with HfLaO gate dielectric annealed in N2, NH3, O2 or NO at 400 oC were investigated. Among the 4 devices, the NH3-annealed OTFT obtained the highest carrier mobility, smallest sub-threshold swing and smallest 1/f noise. All these should be attributed to the improved interface between the gate dielectric and the organic semiconductor associated with the passivation effects of the NH3 annealing on the dielectric surface.
The processing temperature of OTFTs is a big concern because use of flexible or glass substrate is the trend in organic electronics. Therefore, the HfLaO gate dielectric was annealed in N2, NH3, or O2 at two different temperatures, 200 oC and 400 oC. For all the annealing gases, the OTFTs annealed at 400 oC achieved higher carrier mobility, which could be supported by SEM image that pentacene tended to form larger grains (thus less carrier scattering) on HfLaO annealed at 400 oC. Furthermore, the HfLaO film annealed at 400 oC achieved much smaller leakage because more thermal energy at higher annealing temperature could remove oxide defects more effectively.
Fluorination of the HfLaO film (annealed in N2 or NH3 at 400 oC) in a plasma based on CHF3 and O2 was also proposed. For both annealing gases, the OTFT with a 100-s plasma treatment achieved higher carrier mobility and smaller 1/f noise than that without plasma treatment. All these improvements should be due to fluorine incorporation at the dielectric surface which passivated the traps there. By contrast, for longer time (300 s or 900 s) of plasma treatment, the performance of the OTFTs deteriorated due to damage of dielectric surface induced by excessive plasma treatment.
Lastly, a comparative study was done on pentacene OTFTs with HfLaO or La2O3 as gate dielectric. For the same annealing gas (H2, N2, NH3, or O2 at 400 oC), the OTFT with La2O3 gate dielectric obtained lower carrier mobility, smaller on/off current ratio, and larger threshold voltage than that based on HfLaO. The worse performance of the OTFTs with La2O3 gate dielectric was due to the degradation of La2O3 film caused by moisture absorption.published_or_final_version
Electrical and Electronic Engineering
Doctoral
Doctor of Philosophy
8
Ukirde, Vaishali. "Trapping of hydrogen in Hf-based high κ dielectric thin films for advanced CMOS applications." Thesis, University of North Texas, 2007. https://digital.library.unt.edu/ark:/67531/metadc5114/.
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In recent years, advanced high κ gate dielectrics are under serious consideration to replace SiO2 and SiON in semiconductor industry. Hafnium-based dielectrics such as hafnium oxides, oxynitrides and Hf-based silicates/nitrided silicates are emerging as some of the most promising alternatives to SiO2/SiON gate dielectrics in complementary metal oxide semiconductor (CMOS) devices. Extensive efforts have been taken to understand the effects of hydrogen impurities in semiconductors and its behavior such as incorporation, diffusion, trapping and release with the aim of controlling and using it to optimize the performance of electronic device structures. In this dissertation, a systematic study of hydrogen trapping and the role of carbon impurities in various alternate gate dielectric candidates, HfO2/Si, HfxSi1-xO2/Si, HfON/Si and HfON(C)/Si is presented. It has been shown that processing of high κ dielectrics may lead to some crystallization issues. Rutherford backscattering spectroscopy (RBS) for measuring oxygen deficiencies, elastic recoil detection analysis (ERDA) for quantifying hydrogen and nuclear reaction analysis (NRA) for quantifying carbon, X-ray diffraction (XRD) for measuring degree of crystallinity and X-ray photoelectron spectroscopy (XPS) were used to characterize these thin dielectric materials. ERDA data are used to characterize the evolution of hydrogen during annealing in hydrogen ambient in combination with preprocessing in oxygen and nitrogen.
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Albertin, Kátia Franklin. "Estudo de camadas dielétricas para aplicação em capacitores MOS." Universidade de São Paulo, 2007. http://www.teses.usp.br/teses/disponiveis/3/3140/tde-08012008-144158/.
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Foram estudados filmes de oxinitreto de silício obtidos por PECVD à 320°C, a partir da mistura gasosa de N2O+SiH4+He, com diferentes valores de pressão e potência de deposição com o objetivo de produzir boa qualidade de interface deste material com o Si e de obter uma baixa densidade de carga efetiva visando a aplicação desses filmes em dispositivos semicondutores MOS. Os resultados mostraram que com uma pressão de deposição de 0,160 mbar e potências menores que 125 W/cm2 é possível obter um valor de densidade de estados de interface (Dit) de 4x1010 eV-1.cm-2, campo elétrico de ruptura (Ebd) de 13 MV/cm, valores comparáveis ao SiO2 térmico e uma densidade de carga efetiva (Nss) de 4x1011 cm-2. Segundo resultados experimentais esse valor de Nss é o mínimo possível que se pode atingir com a limpeza química utilizada em nosso laboratório. Pode-se dizer que estes são resultados bastante interessantes considerando que se trata de um material obtido por PECVD à baixa temperatura, porém viável para aplicação em dispositivos MOS. Iniciando os estudos com dielétricos de maiores valores de constante dielétrica optamos por estudar filmes de TiOx (k=40-100), obtidos por sputtering reativo, a partir da mistura gasosa de Ar+O2 e utilizando alvo de Ti. Foram fabricados capacitores MOS com estes filmes e obteve-se valores de constante dielétrica que variaram de 40-160. Porém esses materiais ainda apresentavam valores apreciáveis de corrente de fuga que foram minimizadas em ordens de grandeza quando utilizados dielétricos de dupla camada com SiO2 ou SiOxNy (otimizado neste trabalho) na interface, além de se observar uma melhora significativa da qualidade de interface. Utilizando dupla camada dielétrica com filmes de SiOxNy e SiO2, ainda espessos (³ 1nm) para camada intermediária, obteve-se uma constante dielétrica efetiva em torno de 20. Vale ressaltar que os dois filmes SiOxNy e TiOx, conseqüentemente a dupla camada, foram fabricados a baixas temperaturas.Silicon oxynitride films obtained by the PECVD technique from N2O+SiH4+He gaseous mixtures, at 320°C, with different deposition pressure and RF power were studied intending to improve the interface quality with Si, decreasing the effective charge density and the interface state density in order to utilize them in MOS semiconductor devices. The results showed that with a deposition pressure of 0.160 mbar and a RF power density lower than 125 W/cm2 it is possible to obtain interface state density (Dit) values of 4x1010 eV-1.cm-2, Electrical Breakdown (Ebd) of 13 MV/cm, comparable with the obtained for thermally grown SiO2 , and an effective charge density (Nss) of 4x1011 cm-2. According with experimental results this Nss value is the minimum attainable with our chemical cleaning process. In this way it can be said that these results are very promising, considering that these materials were obtained by PECVD at low temperatures, but still viable for MOS devices application. In order to initiate studies with high dielectrics constant material, TiOx films (k= 40-180), obtained by reactive sputtering through the Ar+O2 gaseous mixture utilizing a Ti target, were chosen. MOS capacitors with these films were fabricated and dielectric constant values varying from 40 to 160 were obtained. However, until now, these materials have presented appreciable leakage current values, which were, minimize by orders of magnitude with the addition of a thin SiO2 or SiOxNy (optimized in this work) layer at the interface were utilized. This thin layer also resulted in a significant improvement of the interface quality. Utilizing double dielectric layer with SiOxNy or SiO2, still thick (³ 1nm) as intermediate layer a dielectric constant value of 20 was obtained. Its important to mention that the SiOxNy and TiOx films, and consequently the double layer, were deposited at low temperatures.
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Lin, Yu-Shih, and 林育詩. "Scalable Hafnium-oxide-based dielectrics for the applications of Si, InAs and InGaAs MOS Capacitors." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/76389576867040425599.
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碩士國立交通大學
光電工程研究所
105
In this thesis, the different high-k dielectrics deposited on different substrates such as Si, InAs, and InGaAs. In order to realize high performance metal-oxide-semiconductor field-effect transistors ( MOSFETs ) devices, it is essential to have a suitable high-k gate dielectric with low interface trap density ( Dit ) , a low equivalent oxide thickness ( EOT ) and low leakage current. In the past, HfO2 which has a higher dielectric constant has been regarded as a replacement of SiO2 on gate dielectrics. Although HfO2 provides the thicker physical thickness as the same capacitance than SiO2, it has poor thermal stability and larger leakage current than Al2O3 which has a low dielectric constant. In this work, among the different high-k dielectrics deposited on Si substrates, we have found that the Al incorporated HfO2 film can be effectively improved it thermal stability and reduced the calculated equivalent thickness ( CET ) with low leakage current simultaneously. Compared with the HfO2/Al2O3 stacks, the HfAlO film with the Al concentration of 2.57 % demonstrated the CET about 2.08 nm and leakage current of 7.19×〖10〗^(-9) A/cm2 on Si. Moreover, III-V materials have been intensively studies for next generation logic devices beyond 10 nm nodes owing to their high electron mobility. In order to realize III-V materials as a feasible alternative channel for MOSFET in post-Si era, numerous of III-V materials, such as InGaAs, and InAs, have been studied to investigate its carrier transport and interface properties. To incorporate III-V materials as a channel in a MOSFET, high-quality dielectric/III-V gate stacks with low Dit, scalable EOT with low gate leakage current are mandatory. We investigated the characteristics of InAs-based and InGaAs-based MOSCAPs. Also, the same fabrications of high-k dielectrics on Si were transferred on InAs and InGaAs substrates to realize low CET III-V devices. The different chemical cleaning ways and pre-dosing of metallic precursors pretreatment for the III-V interface improvement were studied; besides, the impacts of interface properties on InAs and InGaAs with different high-k dielectrics deposition for the EOT reduction with low leakage current have been demonstrated. Substrates with HCl and HF solutions chemical cleaning and TMA in situ self-cleaning presented the better interface properties. Finally, with inserting Al2O3 inter-layer, the Hf-based film of HfAlO provided the good interface quality with a lower CET of 2.3 nm on InAs and CET of 2.7 nm on InGaAs. As the results, the Hf-based film of HfAlO with the Al concentration of 2.57 % demonstrated the better thermal stability, and it is important to form a stable interface within the best thermal budget of transistors fabrication process. It also provides the low EOT with low leakage current. The HfAlO film can be regarded as a promising gate dielectric of MOSCAPs for EOT scaling.
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"Synthesis and characterization of ultrathin HfO₂ gate dielectrics." 2006. http://library.cuhk.edu.hk/record=b5892976.
Full textAbstract:
Wang Lei.Thesis (M.Phil.)--Chinese University of Hong Kong, 2006.
Includes bibliographical references.
Abstracts in English and Chinese.
List of Figures --- p.vi
Chapter Chapter 1 --- Introduction --- p.1
Chapter 1.1 --- Scaling issues of Metal-Oxide-Semiconductor field effect transistor --- p.1
Chapter 1.2 --- Alternative high-k gate dielectrics --- p.4
Chapter 1.3 --- Overview of this thesis --- p.9
References --- p.10
Chapter Chapter 2 --- Deposition and characterization techniques for ultrathin HfO2 films --- p.11
Chapter 2.1 --- Introduction --- p.11
Chapter 2.2 --- Ultrathin Hf02 Films Growth and Post Deposition Modification --- p.11
Chapter 2.2.1 --- Ultrahigh Vacuum Electron-beam Evaporation --- p.11
Chapter 2.2.2 --- High Concentration Ozone Annealing --- p.12
Chapter 2.2.3 --- Plasma Immersion Ion Implantation --- p.14
Chapter 2.2.4 --- Rapid Thermal Annealing --- p.16
Chapter 2.3 --- Compositional Characterization Techniques --- p.17
Chapter 2.3.1 --- X-ray Photoelectron Spectroscopy --- p.17
Chapter 2.3.2 --- Rutherford Backscattering Spectrometry --- p.18
Chapter 2.4 --- Structural and Surface Morphological Characterization Techniques --- p.19
Chapter 2.4.1 --- High-Resolution Transmission Electron Microscopy --- p.19
Chapter 2.4.2 --- Ultrahigh Vacuum Scanning Tunneling Microscopy --- p.20
Chapter 2.4.3 --- Ultrahigh Vacuum Atomic Force Microscopy --- p.22
Chapter 2.5 --- Electrical Characterization --- p.24
Chapter 2.5.1 --- Capacitance-voltage (C-V) Measurement --- p.24
Chapter 2.5.2 --- Current-voltage (I-V) Measurement --- p.25
References --- p.26
Chapter Chapter 3 --- Control of interfacial silicate between Hf and SiO2 by high concentration ozone --- p.27
Chapter 3.1 --- Introduction --- p.27
Chapter 3.2 --- Experimental procedure --- p.28
Chapter 3.3 --- Results and discussion --- p.29
Chapter 3.4 --- Conclusion --- p.35
References --- p.36
Chapter Chapter 4 --- Electrical characteristics of postdepositon annealed ultrathin Hf02 films --- p.37
Chapter 4.1 --- Introduction --- p.37
Chapter 4.2 --- Capacitance of gate stack in metal-insulator-semiconductor structure --- p.38
Chapter 4.3 --- Electrical characteristics of ultrathin HfO2 films by high temperature Ozone oxidation --- p.39
Chapter 4.4 --- Electrical and structural properties of ultrathin HfO2 films by high temperature rapid thermal annealing --- p.46
Chapter 4.5 --- Conclusion --- p.48
References --- p.50
Chapter Chapter 5 --- Effect of nitrogen incorporation on thermal stability of ultrathin Hf02 films --- p.51
Chapter 5.1 --- Introduction --- p.51
Chapter 5.2 --- Experimental procedure --- p.52
Chapter 5.3 --- Results and discussion --- p.52
Chapter 5.4 --- Conclusion --- p.58
References --- p.59
Chapter Chapter 6 --- Local characterization of ultrathin HfO2 films by in-situ Ultrahigh Vacuum Scanning Probe Microscopy --- p.61
Chapter 6.1 --- Introduction --- p.61
Chapter 6.2 --- Experimental procedure --- p.62
Chapter 6.3 --- Morphology and structure of initial growth of HfO2 --- p.63
Chapter 6.4 --- Local characterization of ultrathin HfO2 films by in-situ UHV-STM --- p.66
Chapter 6.5 --- UHV c-AFM study of leakage path evolution in ultrathin Hf02 films --- p.71
Chapter 6.6 --- Conclusion --- p.72
References --- p.73
Chapter Chapter 7 --- Conclusion --- p.74
Publications --- p.76
12
Revathy, P. "High-k Dielectrics For Metal-Insulator-Metal Capacitors." Thesis, 2013. http://etd.iisc.ernet.in/handle/2005/2597.
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Metal-insulator-metal (MIM) capacitors are used for analog, RF, and DRAM applications in ICs. The International Technology Roadmap for Semiconductors (ITRS) specifies continuing increase in capacitance density (> 7 fF/ m2), lower leakage current density (< 10 8 A/cm2), very low effective oxide thickness (EOT < 1 nm, for DRAM applications), and better capacitance density-voltage (C-V) linearity ( < 100 ppm/V2, for analog/RF applications). In addition, the maximum fabrication/processing temper-ature should not be greater than 400 0C, in order to be compatible with the thermal budget of back-end fabrication steps. Low dielectric constants of conventional SiO2 and Si3N4 capacitors limit the capacitance densities of these devices. Although scaling down of dielectric thickness increases the capacitance density, it results in large leakage current density and poor C-V linearity.
In this work, the effects of high-k materials (Eu2O3, Gd2O3, TiO2) on the device performance of MIM capacitors are studied. The performance of multi-dielectric stack, and doped-dielectric stack devices are also investigated. The effects of anneal temperature, anneal ambient, anneal mode, and dielectric thickness on device performance are evaluated. C-V, current density-voltage (J-V), and reliability measurements are performed to benchmark the electrical performance, and this is correlated to the structural and material properties of the films through ellipsometry, scanning electron microscopy (SEM), X-ray diffraction (XRD), and X-ray photoelectron spectroscopy (XPS) measurements.
High-performance MIM capacitors are fabricated by using (RF sputtered) Eu2O3 dielectric. The fabricated devices are subjected to different anneal conditions, to study their device performance. Forming gas (FG) and argon (Ar) annealed devices are shown to have higher capacitance densities (7 fF/ m2jF G), lower leakage current densities (3.2 10 8 A/cm2jAr at -1 V), and higher , compared to oxygen (O2) annealed de-vices ( 100kHz = 193 ppm/V2jO2). The electrical characterization results are correlated with the surface chemical states of the films through XPS measurements. The annealing ambient is shown to alter the surface chemical states, which, in turn, modulate the electrical characteristics.
High-density MIM capacitors are fabricated by using (RF sputtered) Gd2O3, and Gd2O3-Eu2O3 stacked dielectrics. The fabricated Gd2O3 capacitors are also subjected to different anneal conditions, to study their device performance. Although Gd2O3 capacitors provide high capacitance density (15 fF/ m2), they suffer from high leakage current density, high , and poor reliability. Therefore, stacked dielectrics of Gd2O3 and Eu2O3
(Gd2O3/Eu2O3 and Eu2O3/Gd2O3) are fabricated to reduce leakage current density, improve , and improve reliability, with only a marginal reduction in capacitance density, compared to Gd2O3 capacitors. Density of defects and barrier/trap heights are extracted for the fabricated capacitors, and correlated with the device characteristics.
High-performance MIM capacitors with bilayer dielectric stacks of (ALD-deposited) TiO2-ZrO2, and Si-doped ZrO2 are characterized. Devices with (ALD-deposited) TiO2/ ZrO2/TiO2 (TZT) and AlO-doped TZT stacks are also characterized. The influence of doping on the device performance is studied. The surface chemical states of the deposited films are analyzed by high-resolution XPS. The structural analysis of the samples is performed by XRD measurements, and this is correlated to the electrical characteristics of the devices. Reliability measurements are performed to study the effects of constant voltage and current stress on device performance. High capacitance density (> 45 fF/ m2), low leakage current density (< 5 10 8 A/cm2 at -1 V, for most devices), and sub-nm EOT are achieved. These parameters exceed the ITRS specifications for DRAM storage capacitors.
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Choi, Rino Lee Jack Chung-Yeung. "Processing and reliability studies on hafnium oxide and hafnium silicate for the advanced gate dielectric application." 2004. http://repositories.lib.utexas.edu/bitstream/handle/2152/1907/choir042.pdf.
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Choi, Rino. "Processing and reliability studies on hafnium oxide and hafnium silicate for the advanced gate dielectric application." Thesis, 2004. http://hdl.handle.net/2152/1907.
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Schaeffer, James Kenyon. "Hafnium dioxide gate dielectrics, metal gate electrodes, and phenomena occurring at their interfaces." Thesis, 2004. http://hdl.handle.net/2152/1258.
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Schaeffer, James Kenyon Ekerdt John G. "Hafnium dioxide gate dielectrics, metal gate electrodes, and phenomena occurring at their interfaces." 2004. http://wwwlib.umi.com/cr/utexas/fullcit?p3143465.
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Lu, Nan. "High-permittivity dielectrics and high mobility semiconductors for future scaled technology: Hf-based High-K gate dielectrics and interface engineering for HfO₂/Ge CMOS device." Thesis, 2006. http://hdl.handle.net/2152/2826.
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"Microstructure and electronic structure study of Hf-based high-K thin films." 2006. http://library.cuhk.edu.hk/record=b5893041.
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Wang Xiaofeng = Hf基高K介电薄膜的微观结构和电子结构研究 / 王晓峰.Thesis (M.Phil.)--Chinese University of Hong Kong, 2006.
Includes bibliographical references (leaves 62-67).
Text in English; abstracts in English and Chinese.
Wang Xiaofeng = Hf ji gao K jie dian bo mo de wei guan jie gou he dian zi jie gou yan jiu / Wang Xiaofeng.
Table of Contents --- p.iv
List of Figures --- p.vii
List of Tables --- p.x
Chapter 1 --- Introduction --- p.1
Chapter 2 --- Background --- p.3
Chapter 2.1 --- Ideal high-k materials --- p.3
Chapter 2.1.1 --- Current problems with Si02 and possible solutions --- p.3
Chapter 2.1.2 --- Requirements on the high-k gate dielectric materials --- p.6
Chapter 2.2 --- Recent results on high-k gate dielectrics --- p.8
Chapter 2.2.1 --- A1203 --- p.8
Chapter 2.2.2 --- Y203 and La203 --- p.9
Chapter 2.2.3 --- Hf02 and Zr02 --- p.10
Chapter 2.2.4 --- Pseudo-binary Alloys --- p.10
Chapter 3 --- Experimental and Instrumentation --- p.13
Chapter 3.1 --- Transmission electron microscopy (TEM) --- p.13
Chapter 3.2 --- Transmission electron diffraction (TED) --- p.15
Chapter 3.3 --- Electron energy loss spectroscopy (EELS) --- p.16
Chapter 4 --- Data Analysis Methodology --- p.22
Chapter 4.1 --- Diffraction analysis --- p.22
Chapter 4.1.1 --- Ring ratio analysis for polycrystal diffraction pattern --- p.23
Chapter 4.1.2 --- RDF analysis for amorphous materials --- p.24
Chapter 4.2 --- Eliminating the plural scattering in EELS --- p.29
Chapter 4.2.1 --- Removal of plural scattering from inner-shell edges --- p.30
Chapter 4.2.2 --- Fourier-Ratio deconvolution --- p.30
Chapter 4.2.3 --- "Demonstration using Co L2,3 core-loss spectrum" --- p.31
Chapter 5 --- The Temperature Effect on the Microstructure of HfO2 Films --- p.37
Chapter 5.1 --- Experimental --- p.38
Chapter 5.2 --- Phase identification and crystallinity analysis of the Hf02 thin films --- p.38
Chapter 5.2.1 --- Phase and crystallinity analysis from TEDs --- p.38
Chapter 5.2.2 --- The phase and crystallinity evolution with the growth temperature --- p.39
Chapter 5.3 --- The local symmetry of Hf atom in the films --- p.40
Chapter 6 --- Effect of A1 Addition on the Microstructure and Electronic Structure of HfO2 Films --- p.43
Chapter 6.1 --- Experimental --- p.44
Chapter 6.2 --- RDF analysis of HfAlO films --- p.45
Chapter 6.3 --- The local symmetry of Hf atom in the HfAlO films --- p.46
Chapter 6.4 --- Loss functions of HfAlO films --- p.48
Chapter 7 --- Comparison of A1 and Y Addition on the Microstructure of Hf02 Films --- p.56
Chapter 7.1 --- Experimental --- p.57
Chapter 7.2 --- Phase identification and crystallinity analysis of the alloy thin films --- p.57
Chapter 7.2.1 --- Phase and crystallinity analysis from TEDs --- p.57
Chapter 7.2.2 --- The phase and crystallinity evolution with the Y and A1 incorporation --- p.58
Chapter 7.3 --- The local symmetry of Hf atom in the alloy thin films --- p.59
Chapter 8 --- Conclusion --- p.61
Bibliography --- p.62
19
Krishnan, Siddarth A. "Characterization and reliability of HFO₂ and hfsion gate dielectrics with tin metal gate." Thesis, 2005. http://hdl.handle.net/2152/2255.
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Sim, Jang Hoan. "Charge trapping effects on mobility and threshold voltage instability in high-k gate stacks." Thesis, 2005. http://hdl.handle.net/2152/2316.
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Lin, Shin Yu, and 林信宇. "Investigation on characteristics of niobium nitride and molybdenum nitride gates on hafnium oxide gate dielectrics." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/91108897930458042664.
Full textAbstract:
碩士國立聯合大學
材料科學工程學系碩士班
99
In this study, niobium nitride (NbNx) and molybdenum nitride (MoNx) thin films are deposited by magnetron sputtering on various thicknesses of HfO2 gate dielectrics (i.e., 2 nm, 4 nm, 6 nm, 8 nm, and 12 nm) to fabricate the metal/oxide/semiconductor capacitors. The incorporation of nitrogen into the NbNx and MoNx films is controlled by N2/(Ar+N2) flow ratios. The Nb/NbNx and Mo/MoNx gate stacks are deposited on HfO2, and followed by forming gas annealing (FGA) at 400oC for 30 min. The characteristics of Nb/NbNx and Mo/MoNx thin films deposited with various N2/(Ar+N2) flow ratios, before and after FGA, are examined. In addition, the effective work functions (Φm) of gate electrodes are also extracted from capacitance-voltage (C-V) curves to discuss the relation between material properties and the shift of Φm. The thicknesses and surface morphology of NbNx and MoNx films are determined by field emission scanning electron microscopy (FESEM). The crystal structure is identified by grazing incidence angle x-ray diffractometer (GIAXRD). The composition and chemical bonding of NbNx and MoNx films are tailored by X-ray photoelectron spectroscopy (XPS). For electrical properties, the resistivity is measured by four point probe, and C-V curves are obtained by using the LCR meter (Agilent E4980A) to extract the Φm. The SEM and GIAXRD results show that the morphology and crystal structure of NbNx and MoNx films exhibit a transition when the N2/(Ar+N2) flow ratio is more than 2%. The surface morphology changes from polyhedron to slab, and the phase changes from body-centered- cubic to face-centered- cubic structure. The NbNx structure is becoming nearly amorphous when the N2/(Ar+N2) flow ratio increases, whereas the MoNx structure shows increased crystallinity. Moreover, the resistivity of MoNx films, before and after FGA, is lower than that of NbNx films using the same deposition parameters. The results reveal that the Φm of NbNx films ranges from 3.83 eV to 4.17 eV, and that of MoNx films ranges from 4.58 eV to 5.23 eV. It suggests that the Φm can be modulated by the nitrogen content. Consequently, the NbNx and MoNx gate electrodes are promising for applications in n-channel and p-channel metal-oxide-semiconductor field-effect transistors, respectively.
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Wang, Chih-Cheng, and 王志誠. "The Fabrication and Characterization MIS of Capacitors and Field-effect Transistors with Hafnium Carbide Metal Gate and Hafnium Oxide high-κ Insulator." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/58543309570444001266.
Full textAbstract:
碩士國立成功大學
微電子工程研究所碩博士班
96
In order to increase the operation speed of device and reduce the production cost therein, the dimension of device has been continuously scaled down. Traditional silicon dioxide (SiO2) dielectric with thickness less than 2 nm will produce intolerable huge amount of leakage current because of quantum tunneling effect. In addition, poly-Si gate is unable to meet the requirement of low power and high speed operations because of the challenging issues of poly-Si depletion, boron penetration and high resistance value. These facts thus lead to a future trend of using both metal gate and high-κ materials in advanced CMOSFETs. In this study, capacitors and field effect transistors (FETs) were fabricated using magnetron sputtering deposited hafnium carbide (HfC) and hafnium oxide to serve as the gate metal and gate insulator, respectively. XRD, ESCA, and AES were used to analyze the film properties. It was observed that the HfC films have the strongest diffraction signal in the phase of (1 1 1) when deposited with sputtering power 200 W and annealed at 400℃. The composition ratio of HfC was maintained 1:9. In this case, the resistivity of the HfC thin film is much lower than that of the poly-Si gate, and almost not affected by thermal annealing. MIS capacitors with HfC/HfO2/p-Si structure and n-FETs based on the same MIS structure were fabricated and characterized. Capacitance-Voltage (C-V) and leakage current for the MIS capacitors, the Id-Vd and Id-Vg characteristics of n-FETs were measured and analyzed. According to measured C-V curves, a minimum EOT around 2.5 nm was achieved with the HfO2 high-κ films prepared in this work. Typical values of Ion/Ioff ratio, threshold voltage, subthreshold swing, and mobility obtained from the fabricated n-FETs with HfC(400 nm)/HfO2(15 nm)/p-Si MIS structure were 1E+5, 0.091 V, 132 mV/dec, and 187 cm2/V-sec, respectively. Based on our preliminary experimental results, it is expected that the sputtered HfC and HfO2 films could be a potential candidate utilized for future MOSFETs.
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Kang, Changseok. "A study on the material and device characteristics of hafnium oxynitride MOSFETs with TaN gate electrodes." Thesis, 2004. http://hdl.handle.net/2152/1153.
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Kang, Changseok Lee Jack Chung-Yeung. "A study on the material and device characteristics of hafnium oxynitride MOSFETs with TaN gate electrodes." 2004. http://wwwlib.umi.com/cr/utexas/fullcit?p3143280.
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Akbar, Mohammad Shahariar Lee Jack Chung-Yeung. "Process development, characterization, transient relaxation, and reliability study of HfO₂ and HfSi(x)O(y) gate oxide for 45nm technology and beyond." 2005. http://repositories.lib.utexas.edu/bitstream/handle/2152/1495/akbarm58099.pdf.
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YU, HUNG-YI, and 余泓毅. "Investigation on characteristics of tantalum/molydenum and titanium/zirconium isomorphous alloy gates on hafnium oxide dielectrics." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/g57snf.
Full textAbstract:
碩士國立聯合大學
材料科學工程學系碩士班
104
High-k/metal gate (HKMG) technology has become the mainstream in high-performance logic devices for sub 45 nm technology nodes. In this research, we will integrate the HKMG structure for the next generation transistor. We will deposit an amorphous metal alloy as gate electrodes on HfO2 to study the electrical properties as compared to its crystalline counterpart. For device fabrication, different thicknesses of HfO2 dielectrics (4, 6, 8, and 12 nm) are deposited on Si substrate by metal-organic chemical vapor deposition. The Ta-Mo and Ti-Zr films are then deposited on HfO2/Si by cosputtering. The composition of Ta-Mo and Ti-Zr films are controlled by varying the radio-frequency power (100W/0W、80W/20W、60W/40W、40W/60W、20W/80W、0W/100W) on the Ta/Mo and Ti/Zr targets to form a Ta-Mo/HfO2/Si and Ti-Zr/HfO2/Si metal-oxide-semiconductor (MOS) capacitor. The thickness and surface morphology of Ta-Mo and Ti-Zr films are examined by field-emission scanning electron microscopy. The composition is examined by electron probe microanalyzer. The crystal structure is identified by grazing incident angle X-ray diffraction. Chemical bonding of films is characterized by X-ray photoelectron spectroscopy. The resistivity is measured by using a four-point probe. Electrical properties of the MOS capacitors are characterized by capacitance–voltage (C-V) measurements. The effective work function is extracted from the C-V curves with different thicknesses of HfO2. The GIAXRD result suggests that the Ta-Mo film deposited at Ta 80W-Mo 20W and Ti-Zr film deposited at Ti 60W-Zr 40W show amorphous structures, accompanied by a slow deposition rate. The composition of Ta-Mo and Ti-Zr films is dependent on the plasma power applied to the target. The resistivity of Ta-Mo and Ti-Zr films decreases with increasing Ta and Zr contents, respectively. Effective work functions of Ta-Mo and Ti-Zr films are in between the work function of their constituent metals. Besides, the work functions of Ta-Mo films fall in the midgap region (~4.6 eV) of silicon, whereas those of Ti-Zr films are near the work function of silicon conduction band (~4.1 eV).
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Akbar, Mohammad Shahariar. "Process development, characterization, transient relaxation, and reliability study of HfO₂ and HfSi(x)O(y) gate oxide for 45nm technology and beyond." Thesis, 2005. http://hdl.handle.net/2152/1495.
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Wang, Tsung-Miau, and 王宗苗. "Characterization and Temperature Detection Application of Si-based Metal-Oxide-Semiconductor (MOS) Capacitors with Thin Dielectrics." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/79297505702991918133.
Full textAbstract:
博士國立臺灣大學
電機工程學研究所
95
For MOS (n) capacitors, the saturation current is mainly attributed to the electron-hole pair recombination mechanism. But for MOS (p) capacitors, the saturation current is mainly attributed to the electron-hole pair generation mechanism, and is also controlled by interface trap densities (Dit), bulk traps, and suboxide. It can be examined by the electroluminescent (EL) method and their temperature dependencies. For the MOS (n) capacitors, because of the recombination mechanism, the EL phenomenon is easily found. However, for MOS (p) capacitors, because of the generation mechanism, the temperature response can be found. Furthermore, negative capacitance is found on a certain portion of MOS (n) C-V curves. It is probably in connection with the charge trapped and de-trapped in the interface and the charges have different phases. As the device size increasing, the negative capacitance is more obvious. For MOS (p) capacitors, the probability of soft breakdown (SBD) increases with temperature when biased in the saturation current region under substrate injection. The increase in the probability of SBD follows from the fact that increasing the temperature increases both the number of minority carriers and Dit, when the positive substrate injection region is biased. The amount of electrons near SiO2/Si interface will cause the percolation phenomenon effect. Therefore, the number of charges across the silicon dioxide increases so the voltage drop across the oxide increases, and finally SBD occurs. It is regarded as that the voltage will rearrange. The voltage rearrangement effect will damage the oxide films with a certain oxide thickness. We successfully demonstrated the temperature distribution on the 3-inch Si wafer by the conventional MOS (p) capacitors with pure SiO2 dielectrics. But when the thickness of SiO2 films increases slightly, the temperature sensitivity will decrease. It is not suitable for the application under low voltage operation. To do some improvement, the MOS (p) capacitors with hafnium oxide (HfO2) film added on SiO2 were demonstrated as reliable temperature-detecting devices for the first time. The saturation current of MOS (p) capacitor with added HfO2 film is easy to saturate within 0.5 V. Each increase of 10 °C almost doubles the saturation current. These devices are reliable even though they had been electrically stressed at various temperatures (30~90°C) for 4 hours. They are potential to be integrated into the circuits as temperature detectors for ultra large scaled integration technology
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Wang, Tsung-Miau. "Characterization and Temperature Detection Application of Si-based Metal-Oxide-Semiconductor (MOS) Capacitors with Thin Dielectrics." 2007. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-0907200715530300.
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Yip, Gordon. "Development of Al2O3 Gate Dielectrics for Organic Thin-film Transistors." Thesis, 2008. http://hdl.handle.net/1807/11174.
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The focus of this thesis is on radio frequency magnetron sputtered aluminum oxide thin films developed for use as the gate dielectric for organic thin film transistors. The effect of top metal electrodes on the electrical characteristics of aluminum oxide metal-insulator-metal capacitors has been studied to determine an optimum material combination for minimizing the leakage current, while maximizing the breakdown field. The leakage current and breakdown characteristics were observed to have a strong dependence on the top electrode material. Devices with Al top electrodes exhibited significantly higher breakdown voltages compared to devices with Au, Ni, Cu and Ag electrodes. Introducing an Al diffusion barrier dramatically increased the breakdown field and reduced the leakage current for capacitors with Ag, Au and Cu top electrodes. The electrical characteristics were found to relate well to material properties, of the contacting metals, such as ionization potential and diffusion coefficient.
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Rhee, Se Jong. "Electrical and material characteristics of hafnium-based multi-metal high-k gate dielectrics for future scaled CMOS technology: physics, reliability, and process development." Thesis, 2005. http://hdl.handle.net/2152/2287.
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Choi, Changhwan. "The effects of silicon, nitrogen and oxygen incorporation and oxygen-scavenging technique on performances of hafnium-based gate dielectric MOSFETs." Thesis, 2006. http://hdl.handle.net/2152/2478.
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Li, Fei 1972. "Compact gate capacitance and gate current modeling of ultra-thin (EOT ~ 1 nm and below) SiO₂ and high-k gate dielectrics." Thesis, 2006. http://hdl.handle.net/2152/2565.
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Wu, Yu-Zhen, and 吳昱震. "Electrical and Reliability Characteristics of Advanced Metal-Oxide-Semiconductor Capacitors with Various Ti- and Al-doped HfLaON Dielectrics." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/5ctn7h.
Full textAbstract:
碩士國立虎尾科技大學
機械與機電工程研究所
98
High-dielectric-constant (high-k) gate oxides with larger physical thickness while identical equivalent-oxide-thickness (EOT) have been widely used to supersede SiO2 for reducing gate leakage current in metal-oxide-semiconductor (MOS) devices. In this thesis, electrical and reliability characteristics of advanced MOS capacitors with various Ti- and Al-doped HfLaON dielectrics were demonstrated. Various Ti and TiAl concentrations in HfLaTiON and HfLaTiAlON dielectrics were achieved by co-sputter time of Ti, TiAl, and Hf2La2O7 targets. Modulated parameters include the co-sputter time of Ti, TiAl, and Hf2La2O7 targets, as well as post-deposition annealing (PDA). The compositions, crystalline properties, and energy band gap of HfLaTiON and HfLaTiAlON dielectrics were investigated by XPS, XRD, and UV/VIS/IR spectrophotometer, respectively. The results indicate that lower EOT of 0.17 nm and interface trap density (Dit) can be obtained by Ti-doped HfLaON dielectrics. The estimated Schottky barrier height during gate injection in Ta/HfLaTiON interface was around 0.8 eV. Also the results indicate that lower EOT of 0.093 nm and interface trap density (Dit) can be obtained by TiAl-doped HfLaON dielectrics. The estimated Schottky barrier height during gate injection in Ta/HfLaTiAlON interface was around 0.74 eV.
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Luo, Min-Cheng, and 羅敏誠. "Improved Electrical and Reliability Characteristics of Metal-Oxide-Semiconductor Capacitors with HfLaO Dielectrics using Laser Annealing with Various Frequencies." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/3pd32w.
Full textAbstract:
碩士國立虎尾科技大學
機械與機電工程研究所
100
In this thesis, the improved electrical and reliability characteristics of metal-oxide- semiconductor (MOS) capacitors with HfLaO dielectrics using laser annealing with were who’s demonstrated frequence. The HfLaO dielectric was formed by the RF sputter. The Ta and Al films were used for the electrode of MOS capacitors. The comparison of HfLaO-gated MOS capacitors with the rapid-thermal annealing (RTA) and laser annealing (LA) were achieved. The results suggest that the HfLaO-gated MOS capacitor with EOT of 1.6 nm and interface trap density of 1.62 x 1010 cm-2eV-1 was explored. On the other hand, the HfLaO-gated MOS capacitors with LA were also addressed. The 1024 nm in wavelength of the Nd:YAG laser was used to demonstrate the electrical and reliability properties of MOS capacitor. The conditions of laser include laser power, speed, and frequency. The results indicate that the HfLaO-gated MOS capacitor with EOT of 1.16 nm was demonstrated by using LA under speed of 100 mm/s, power of 70%, and frequency of 20 ~ 40 kHz. By tuning suitably laser condition, high quality HfLaO dielectric can be obtained.
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Ok, Injo 1974. "A study on electrical and material characteristics of hafnium oxide with silicon interface passivation on III-V substrate for future scaled CMOS technology." Thesis, 2008. http://hdl.handle.net/2152/3974.
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The continuous improvement in the semiconductor industry has been successfully achieved by the reducing dimensions of CMOS (complementary metal oxide semiconductor) technology. For the last four decades, the scaling down of physical thickness of SiO₂ gate dielectrics has improved the speed of output drive current by shrinking of transistor area in front-end-process of integrated circuits. A higher number of transistors on chip resulting in faster speed and lower cost can be allowable by the scaling down and these fruitful achievements have been mainly made by the thinning thickness of one key component - Gate Dielectric - at Si based MOSFET (metal-oxide-semiconductor field effect transistor) devices. So far, SiO₂ (silicon dioxide) gate dielectric having the excellent material and electrical properties such as good interface (i.e., Dit ~ 2x10¹⁰ eV⁻¹cm⁻²), low gate leakage current, higher dielectric breakdown immunity (≥10MV/cm) and excellent thermal stability at typical Si processing temperature has been popularly used as the leading gate oxide material. The next generation Si based MOSFETs will require more aggressive gate oxide scaling to meet the required specifications. Since high-k dielectrics provide the same capacitance with a thicker film, the leakage current reduction, therefore, less the standby power consumption is one of the huge advantages. Also, it is easier to fabricate during the process because the control of film thickness is still not in the critical range compared to the same leakage current characteristic of SiO₂ film. HfO₂ based gate dielectric is considered as the most promising candidate among materials being studied since it shows good characteristics with conventional Si technology and good device performance has been reported. However, it has still many problems like insufficient thermals stability on silicon such as low crystallization temperature, low k interfacial regrowth, charge trapping and so on. The integration of hafnium based high-k dielectric into CMOS technology is also limited by major issues such as degraded channel mobility and charge trapping. One approach to overcome these obstacles is using alternative substrate materials such as SiGe, GaAs, InGaAs, and InP to improve channel mobility.text
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Lee, Choong-ho. "Technology development and study of rapid thermal CVD high-K gate dielectrics and CVD metal gate electrode for future ULSI MOSFET device integration zirconium oxide, and hafnium oxide /." 2003. http://wwwlib.umi.com/cr/utexas/fullcit?p3118036.
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Kim, Young-Hee Lee Jack Chung-Yeung. "Interface engineering and reliability characteristics of HfO₂ with poly Si gate and dual metal (Ru-Ta alloy, Ru) gate electrode for beyond 65nm technology." 2004. http://repositories.lib.utexas.edu/bitstream/handle/2152/2044/kimy042.pdf.
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Kim, Young-Hee. "Interface engineering and reliability characteristics of HfO₂ with poly Si gate and dual metal (Ru-Ta alloy, Ru) gate electrode for beyond 65nm technology." Thesis, 2004. http://hdl.handle.net/2152/2044.
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Kim, Hyoung-sub 1966. "A study of HfO₂-based MOSCAPs and MOSFETs on III-V substrates with a thin germanium interfacial passivation layer." 2008. http://hdl.handle.net/2152/17914.
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Since metal-oxide-semiconductor (MOS) devices have been adopted into integrated circuits, the endless demands for higher performance and lower power consumption have been a primary challenge and a technology-driver in the semiconductor electronics. The invention of complementary MOS (CMOS) technology in the 1980s, and the introduction of voltage and physical dimension scaling in the 1990s would be good examples to keep up with the everlasting demands. In the 2000s, technology continuously evolves and seeks for more power efficiency ways such as high-k dielectrics, metal gate electrodes, strained substrates, and high mobility channel materials. As a gate dielectric, silicon dioxide (SiO₂), most widely used in CMOS integrated circuits, has many prominent advantages, including a high quality interface (e.g. Dit ~ low 1010 cm-2eV-1), a good thermal stability in contact with silicon (Si), a large energy bandgap and the large energy band offsets in reference to Si, and a high quality dielectric itself. As the thickness of SiO₂ keeps shrinking, however, SiO₂ is facing its physical limitations from the viewpoint of gate dielectric leakage currents and reliability requirements. High-k dielectric materials have attracted extensive attention in the last decade due to their great potential for maintaining further down-scaling in equivalent oxide thickness (EOT) and a low dielectric leakage current. HfO₂ has been considered as one of the most promising candidates because of a high dielectric constant (k ~ 20-25), a large energy band gap (~ 6 eV) and the large band offsets (> 1.5 eV), and a good thermal stability. To enhance carrier mobility, strained substrates and high mobility channel materials have attracted a great deal of attention, thus III-V compound semiconductor substrates have emerged as one of possible candidates, in spite of several technical barriers, being believed as barriers so far. The absence of high quality and thermodynamically stable native oxide, like SiO₂ on Si, has been one such hurdle to implement MOS systems on III-V substrates. However, recently, there have been a number of remarkable improvements on MOS applications on them, inspiring more vigorous research activities. In this research, HfO2-based MOS capacitors and metal-oxidesemiconductor field effect transistors (MOSFETs) with a thin germanium (Ge) interfacial passivation layer (IPL) on III-V compound substrates were investigated. It was found that a thin Ge IPL could effectively passivate the surface of III-V substrate, consequently providing a high quality interface and an excellent gate oxide scalability. N-channel MOSFETs on GaAs, InGaAs, and InP substrates were successfully demonstrated and a minimum EOT of ~ 9 Å from MOS capacitors was achieved. This research has begun with GaAs substrate, and then expanded to InGaAs, InP, InAs, and InSb substrates, which eventually helped to understand the role of a Ge IPL and to guide future research direction. Overall, MOS devices on III-V substrates with an HfO₂ gate dielectric and a Ge IPL have demonstrated feasibility and potential for further investigations.text
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Ganapathi, K. Lakshmi. "Optimization of HfO2 Thin Films for Gate Dielectric Applications in 2-D Layered Materials." Thesis, 2014. http://hdl.handle.net/2005/3219.
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Recently, high-κ materials have become the focus of research and been extensively utilized as the gate dielectric layer in aggressive scaled complementary metal-oxide-semiconductor (CMOS) technology. Hafnium dioxide (HfO2) is the most promising high-κ material because of its excellent chemical, thermal, mechanical and dielectric properties and also possesses good thermodynamic stability and better band offsets with silicon. Hence, HfO2 has already been used as gate dielectric in modern CMOS devices.
For future technologies, it is very difficult to scale the silicon transistor gate length, so it is a necessary requirement of replacing the channel material from silicon to some high mobility material. Two-dimensional layered materials such as graphene and molybdenum disulfide (MoS2) are potential candidates to replace silicon. Due to its planar structure and atomically thin nature, they suit well with the conventional MOSFET technology and are very stable mechanically as well as chemically.
HfO2 plays a vital role as a gate dielectric, not only in silicon CMOS technology but also in future nano-electronic devices such as graphene/MoS2 based devices, since high-κ media is expected to screen the charged impurities located in the vicinity of channel material, which results in enhancement of carrier mobility. So, for sustenance and enhancement of new technology, extensive study of the functional materials and its processing is required.
In the present work, optimization of HfO2 thin films for gate dielectric applications in Nano-electronic devices using electron beam evaporation is discussed. HfO2 thin films have been optimized in two different thickness regimes, (i) about 35 nm physical thicknesses for back gate oxide graphene/MoS2 transistors and (ii) about 5 nm physical thickness to get Equivalent Oxide Thickness (EOT) less than 1 nm for top gate applications. Optical, chemical, compositional, structural and electrical characterizations of these films have been done using Ellipsometry, X-ray Photoelectron Spectroscopy (XPS), Rutherford Back Scattering (RBS), X-ray Diffraction (XRD), Capacitance-Voltage and Current-Voltage characterization techniques.
The amount of O2 flow rate, during evaporation is optimized for 35 nm thick HfO2 films, to achieve the best optical, chemical and electrical properties. It has been observed that with increasing oxygen flow rate, thickness of the films increased and refractive index decreased due to increase in porosity resulting from the scattering of the evaporant. The films deposited at low O2 flow rates (1 and 3 SCCM) show better optical and compositional properties. The effects of post deposition annealing (PDA) and post metallization annealing (PMA) in forming gas ambient (FGA) on the optical and electrical properties of the films have been analyzed. The film deposited at 3 SCCM O2 flow rate shows the best properties as measured on MOS capacitors. A high density film (ρ=8.2 gram/cm3, 85% of bulk density) with high dielectric constant of κ=19 and leakage current density of J=2.0×10-6 A/cm2 at -1 MV/cm has been achieved at optimized deposition conditions.
Bilayer graphene on HfO2/Si substrate has been successfully identified and also transistor has been fabricated with HfO2 (35 nm) as a back gate. High transconductance compared to other back gated devices such as SiO2/Si and Al2O3/Si and high mobility have been achieved. The performance of back gated bilayer graphene transistors on HfO2 films deposited at two O2 flow rates of 3 SCCM and 20 SCCM has been evaluated. It is found that the device on the film deposited at 3 SCCM O2 flow rate shows better properties. This suggests that an optimum oxygen pressure is necessary to get good quality films for high performance devices.
MoS2 layers on the optimized HfO2/Si substrate have been successfully identified and transistor has been fabricated with HfO2 (32 nm) as a back gate. The device is switching at lower voltages compared to SiO2 back gated devices with high ION/IOFF ratio (>106).
The effect of film thickness on optical, structural, compositional and electrical properties for top gate applications has been studied. Also the effect of gate electrode material and its processing on electrical properties of MOS capacitors have been studied. EOT of 1.2 nm with leakage current density of 1×10-4 A/cm2 at -1V has been achieved.
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Jajala, Bujjamma. "Ion Assisted Deposition Of HfO2 Thin Films For CMOS Gate Dielectric Applications." Thesis, 2010. http://etd.iisc.ernet.in/handle/2005/2241.
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The scaling down of Complementary Metal Oxide Semiconductor (CMOS) transistors to sub-100nm requires replacement of conventional Silicon dioxide layer with high dielectric constant (K) material for gate dielectric. Among the various high-K dielectrics that have been studied, HfO2 is found to be a promising candidate because of its high dielectric constant (~25), large band gap (5.68 eV), thermodynamic stability and good interface with Si.
The HfO2 films have already been deposited using different growth techniques such as Atomic layer Deposition (ALD), Metalorgonic Chemical Vapor Deposition (MOCVD) and Pulsed Laser Deposition (PLD). Ion Assisted Deposition (IAD) is a novel technique that has been successfully employed to produce optical coatings of required quality. This growth technique presents many advantages over the other techniques such as formation from solid oxide sources, low growth temperatures (25-3000C) and film densification by ion bombardment. Hence this technique has been used to prepare HfO2 films in the present investigations.
This thesis presents the structural, optical and electrical properties of HfO2 thin films prepared by Ion assisted deposition (IAD). The suitability of Ion assisted deposition process and the importance of investigations on the influence of process parameters on the film characteristics have been brought out in the process parameters-structure-composition and properties correlation presented in this thesis.
The aim of this work is to process and characterize HfO2 films and investigate the influence of process parameters on the structure, composition and properties of the films to identify their suitability for CMOS gate applications. HfO2 films were deposited on p-type Si (100) wafers by Ion assisted deposition in an electron beam evaporation (Leybold,L-560) system. Pre-bombardment of the substrates with Argon ions has been done to remove any native oxide layer formation on Silicon by using a hallow cathode ion source (DENTON VACUUM CC103). During the film deposition a collimated oxygen ion beam, generated from the ion source is directed towards the substrate. The oxygen ion current is controlled by adjusting the voltage applied to the ion source and the oxygen flow through the ion source. The oxygen ions bombard the film as it grows and in that process improves its packing density as well as its stoichiometry.
Keeping the deposition rate and thickness constant, HfO2 films have been deposited by varying Ion Current, Ion energy and substrate temperature. MOS capacitors were fabricated with Aluminum as gate electrode deposited by thermal evaporation.
Ellipsometry techniques have been used to measure the optical thickness of the films. The interfacial layer (IL) formed at the HfO2/ Si interface was investigated by using Fourier transform Infrared spectroscopy (FT-IR). The structural characterization was carried out by X-ray diffraction technique. The high frequency capacitance-voltage and DC leakage current characteristics were measured to analyze the electrical characteristics of MOS capacitors.
The effect of post deposition annealing (PDA) of the films at 600°C and 700ºC in Forming Gas (15%H2+85%N2) ambient and Post metallization annealing (PMA) at 400ºC in the same ambient was also investigated to observe the changes in electrical characteristics.
The initial step of this work was to compare the characteristics of the films deposited by reactive evaporation and Ion assisted deposition which confirmed the superiority of the quality of IAD coatings and justified the need to proceed further with a more detailed study on the influence of various parameters on the properties of IAD coatings.
HfO2 films deposited on substrates maintained at 1000C exhibited better structural, Optical and Electrical properties. The leakage current in these films were lower which has been attributed to silicate free interface as confirmed by XRD studies. Investigations on films deposited with oxygen ion beams of different currents in the range 20 to 40mA indicated that the films deposited at 20mA ion current showed better electrical properties. Better stoichiometry of these films as indicated by FT IR studies was one of the reasons for their improved performance. Annealing of these films at 6000C and 7000C in FGA medium resulted in creation of silicates and silicides at the interface thereby increasing the leakage currents and degraded the film properties.
The films deposited with oxygen ion beams generated with a driving voltage 265V showed better structural and optical properties with silicate free interface compared with low and high driving voltages.
Among all the films, the maximum dielectric constant of about 21.9 with a minimum EOT of 5.5 nm corresponding to a film deposited at ion current 20mA with PMA 400°C in FG ambient for 20minites is achieved. The lowest value of interface charge density achieved is 2.7 x1012 per cm-2 eV-1 corresponding to the sample deposited at substrate temperature 100°C with deposition rate of 0.5Å/sec followed by post metallization annealing at 400°C in forming gas for 20minutes. The range of Dit values that were obtained are varying from 2.7x 1012 – 16.7x1012 cm-2eV-1.It was also found that, the samples deposited at higher ion currents show lower Dit values than the samples deposited at lower ion currents.
From the I−V analysis, the leakage current density is found to be comparatively less in IAD than in reactive evaporation. Leakage current increases with increase in substrate temperature and the same trend is observed with annealed films also. The lowest leakage current density of 1.05x10–8 A/cm2 at a gate bias of 1V was observed in the films deposited at substrate temperature 1000C.
The present thesis focused on the suitability of the Ion Assisted deposition process for the preparation of HfO2 films for high-K gate dielectric application and the importance of investigations on the influence of process parameters on the film characteristics.
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Νικολάου, Νικόλαος. "Διατάξεις παγίδευσης φορτίου (Memories) με τη χρήση νέων υλικών υψηλής διηλεκτρικής σταθεράς." Thesis, 2014. http://hdl.handle.net/10889/8504.
Full textAbstract:
Στη παρούσα Διατριβή διερευνήθηκε η χρήση υλικών υψηλής διηλεκτρικής σταθεράς (high-k) ως οξειδίων ελέγχου σε διατάξεις παγίδευσης φορτίου τύπου MONOS (Μetal-Οxide-Νitride-Οxide-Silicon). Τα οξείδια που εξετάστηκαν ήταν το HfO2, τo ZrO2 και το Al2O3. Η ανάπτυξή τους πραγματοποιήθηκε με χρήση της μεθόδου εναπόθεσης ατομικού στρώματος (ALD).
Οι ιδιότητες των δομών μνήμης μελετήθηκαν συναρτήσει: (α) των πρόδρομων μορίων της εναπόθεσης για τα HfO2 και ZrO2, (β) του οξειδωτικού μέσου της εναπόθεσης για την περίπτωση του Al2O3 και (γ) της επακόλουθης ανόπτησης. Η ηλεκτρική συμπεριφορά των δομών εξετάστηκε με την κατασκευή πυκνωτών τύπου MOS.
Τα υμένια του HfO2 αναπτύχθηκαν επί διστρωματικής στοίβας SiO2/Si3N4 με (α) αλκυλαμίδιο του χαφνίου (ΤΕΜΑΗ) και Ο3 στους 275 oC, και (β) κυκλοπενταδιενύλιο του χαφνίου (HfD-04) και Ο3 στους 350 οC. Ομοίως, τα υμένια του ZrO2 αναπτύχθηκαν επί διστρωματικής στοίβας SiO2/Si3N4 με: (α) αλκυλαμίδιο του ζιρκονίου (ΤΕΜΑΖ) και Ο3 στους 275 oC και (β) κυκλοπενταδιενύλιο του ζιρκονίου (ZrD-04) με Ο3 στους 350 oC. Ο δομικός χαρακτηρισμός, για το HfO2, φανέρωσε πως η ύπαρξη ή όχι κρυσταλλικού χαρακτήρα και η σύσταση του οξειδίου εξαρτάται τόσο από το πρόδρομο μόριο αλλά και από την ανόπτηση (600 οC, 2 min). Αντίθετα, το ZrO2 έχει σε κάθε περίπτωση κρυσταλλικότητα. Τα ηλεκτρικά χαρακτηριστικά των πυκνωτών Si/SiO2/Si3N4/high-k/Pt, δείχνουν ότι οι δομές έχουν ικανοποιητική συμπεριφορά ως στοιχεία μνήμης αφού όλες οι ιδιότητες πληρούν τις βασικές προϋποθέσεις ως στοιχεία μνήμης, παρά την ανυπαρξία ενεργειακού φραγμού μεταξύ στρώματος παγίδευσης και οξειδίου ελέγχου. Η ικανότητα παγίδευσης και η επίδοση των δομών με HfO2 και ZrO2 δεν διαφοροποιούνται σημαντικά με χρήση διαφορετικού πρόδρομου μορίου ή με την ανόπτηση. Ο έλεγχος όμως της αντοχής των δομών σε επαναλαμβανόμενους παλμούς εγγραφής/διαγραφής αναδεικνύει ότι αμφότερες οι δομές που ανεπτύχθησαν με βάση το κυκλοπενταδιενύλιο έχουν μειωμένη αντοχή ηλεκτρικής καταπόνησης.
Τo Al2O3 αναπτύχθηκε χρησιμοποιώντας το μόριο ΤΜΑ και ως οξειδωτικό μέσο: (α) H2O, (β) O3 και (γ) Plasma Ο2 (μέθοδος PE-ALD) σε συνδυασμό με ΤΜΑ. Οι δομές στην αρχική κατάσταση, χωρίς ανόπτηση, χαρακτηρίζονται από ισχυρό ρεύμα έγχυσης ηλεκτρονίων από την πύλη (υπό αρνητικές τάσεις) περιορίζοντας την ικανότητα φόρτισης και την επίδοση διαγραφής. Η ανόπτηση σε φούρνο και αδρανές περιβάλλον (850 ή 1050 oC, 15 min) προκάλεσε σημαντική βελτίωση των ηλεκτρικών χαρακτηριστικών των δομών λόγω του σημαντικού περιορισμού του παραπάνω φαινομένου. Μετά το στάδιο της ανόπτησης οι συνδυασμοί ΤΜΑ/Η2Ο και ΤΜΑ/Plasma Ο2 έχουν καλύτερες χαρακτηριστικές σε σχέση με αυτές του συνδυασμού ΤΜΑ/Ο3. Το φαινόμενο της διαρροής ηλεκτρονίων από την πύλη αποδίδεται στη μεγάλη συγκέντρωση και χωρική κατανομή του υδρογόνου στο υμένιο υψηλής διηλεκτρικής σταθεράς.
Τέλος, διερευνήθηκε η τροποποίηση των ιδιοτήτων μνήμης των δομών με εμφύτευση ιόντων αζώτου χαμηλής ενέργειας και υψηλής δόσης στο Al2O3 και επακόλουθη ανόπτηση υψηλής θερμοκρασίας. Η παρουσία αζώτου στο υμένιο καθώς και ο χημικός δεσμός του εμφυτευμένου αζώτου είναι συνάρτηση της θερμοκρασίας ανόπτησης. Επομένως, οι ιδιότητες μνήμης εξαρτώνται από τη μορφή σύνδεσης και την συγκέντρωση του εμφυτευμένου αζώτου στο τροποποιημένο Al2O3. Η υψηλή θερμοκρασία ανόπτησης (1050 οC, 15 min) φαίνεται να αποφέρει δομές με τις καλύτερες ιδιότητες μνήμης.This thesis studies the functionality of high-k oxides as blocking oxide layers in SONOS type charge-trap memory devices. The oxide materials that were examined were the HfO2, the ZrO2 and the Al2O3. All these blocking oxide layers were deposited by atomic layer deposition technique (ALD). The electrical performance of the trilayer stacks was examined using Pt-gate MOS-type capacitors. The properties of the memory structures were examined as a function of: (a) precursor chemistry of HfO2 and ZrO2 deposition, (b) the deposition oxidizing agent in the case of Al2O3 and (c) subsequent high temperature annealing steps. The HfO2 films were deposited on SiO2/Si3N4 bilayer stacks using: (a) hafnium alkylamide (TEMAH) and O3 at 275 oC, and (b) hafnium cyclopentadienyl (HfD-04) and O3 at 350 oC. Similarly the ZrO2 films were deposited by (a) zirconium alkylamide (TEMAZ) and O3 at 275 oC, and (b) zirconium cyclopentadienyl (ZrD-04) and O3 at 350 oC The structural characterization of the HfO2 showed that the crystallinity of the deposited high-k material depends on the precursor choice and the post deposition annealing step (600 °C, 2 min). On the contrary ZrO2 is deposited in a crystalline phase independent of the deposition conditions and the choice of the precursors. The electrical characterization of Si/SiO2/Si3N4/high-k/Pt capacitors showed that all fabricated structures operate well as memory elements, despite the absence of an energy barrier between the trapping layer and control oxide. The trapping efficiency and the performance of structures with HfO2 or ZrO2 blocking layers do not revealed a dependence upon the precursor chemistry. However, endurance testing using continuous write/erase pulses showed that both structures deposited by cyclopentadienyl precursors cannot sustain the resulting electrical stress. The Al2O3 layers were deposited using the TMA molecule while three different oxidizing agents were used: (a) H2O, (b) O3 and (c) oxygen plasma. Electrical testing of the resulting Pt-gate trilayer capacitors showed that in the deposited condition all three samples were characterized by gate electrode induced electron leakage currents in the negative bias regime, which completely masked the substrate hole injection effects. This effect limits the performance and the functionality of the memory stacks. After a high temperature annealing step (850 or 1050 oC, 15 min) this leakage current is reduced significantly and the stacks can function as memory elements. The results point to suggest that after annealing the best performance is exhibited by the TMA/H2O and TMA/Plasma O2 samples. The effect of gate induced electron leakage current is attributed to hydrogen related contamination, which has been verified by ToF-ERDA in depth profile measurements, at least for the case of TMA/H2O samples. The modification of the memory properties of the SiO2/Si3N4/Al2O3 stacks was also investigated using low energy and high fluence nitrogen implantation into Al2O3 layer. The concentration and the chemical bonding of the implanted nitrogen is a function of annealing temperature. The memory properties of the stack depend therefore on the chemical bonding and the concentration of the remaining nitrogen in the modified Al2O3. The high temperature annealing (1050 oC, 15 min) appears to provide the structures with improved memory properties in terms of retention and fast erase performance.