Academic literature on the topic 'Cascaded integrated comb filter'

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Journal articles on the topic "Cascaded integrated comb filter"

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Agarwal, Ashok, and Lakshmi Bopanna. "Low Latency Area-Efficient Distributed Arithmetic Based Multi-Rate Filter Architecture for SDR Receivers." Journal of Circuits, Systems and Computers 27, no. 08 (2018): 1850133. http://dx.doi.org/10.1142/s0218126618501335.

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In software defined radio (SDR) receivers, sample rate conversion (SRC) and channelization are two computational intensive tasks. Coefficient-less cascaded-integrator-comb (CIC) filters achieve SRC with low computational complexity, but the design of its gain droop compensation filter involves coefficients. These coefficients vary with the change in radio standards. In this paper, an architecture for variable digital filter (VDF) for gain droop compensation employing a set of fixed coefficient sub-filters and multi-dimensional polynomials in terms of spectral parameters is realized based on distributed arithmetic (DA). As the coefficients in the sub-filters are fixed, the proposed method uses ROM-based LUTs giving rise to low computational complexity. The proposed DA–VDF filter is synthesized on an application specific integrated circuit (ASIC) employing CMOS 90[Formula: see text]nm technology using Synopsis Design Complier. The proposed architecture achieves low latency at a reduced area delay product (ADP) of 78% and an efficiency of 72% in energy per sample (EPS) when compared with the conventional MAC-based architecture.
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Mewada, Hiren K., and Jitendra Chaudhari. "Low computation digital down converter using polyphase IIR filter." Circuit World 45, no. 3 (2019): 169–78. http://dx.doi.org/10.1108/cw-02-2019-0015.

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Purpose The digital down converter (DDC) is a principal component in modern communication systems. The DDC process traditionally entails quadrature down conversion, bandwidth reducing filters and commensurate sample rate reduction. To avoid group delay, distortion linear phase FIR filters are used in the DDC. The filter performance specifications related to deep stopband attenuation, small in-band ripple and narrow transition bandwidth lead to filters with a large number of coefficients. To reduce the computational workload of the filtering process, filtering is often performed as a two-stage process, the first stage being a down sampling Hoegenauer (or cascade-integrated comb) filter and a reduced sample rate FIR filter. An alternative option is an M-Path polyphase partition of a band cantered FIR filter. Even though IIR filters offer reduced workload to implement a specific filtering task, the authors avoid using them because of their poor group delay characteristics. This paper aims to propose the design of M-path, approximately linear phase IIR filters as an alternative option to the M-path FIR filter. Design/methodology/approach Two filter designs are presented in the paper. The first approach uses linear phase IIR low pass structure to reduce the filter’s coefficient. Whereas the second approach uses multipath polyphase structure to design approximately linear phase IIR filter in DDC. Findings The authors have compared the performance and workload of the proposed polyphase structured IIR filters with state-of-the-art filter design used in DDC. The proposed design is seen to satisfy tight design specification with a significant reduction in arithmetic operations and required power consumption. Originality/value The proposed design is an alternate solution to the M-path polyphase FIR filter offering very less number of coefficients in the filter design. Proposed DDC using polyphase structured IIR filter satisfies the requirement of linear phase with the least number of computation cost in comparison with other DDC structure.
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Park, Chester Sungchung, Sunwoo Kim, Jooho Wang, and Sungkyung Park. "Design and Implementation of a Farrow-Interpolator-Based Digital Front-End in LTE Receivers for Carrier Aggregation." Electronics 10, no. 3 (2021): 231. http://dx.doi.org/10.3390/electronics10030231.

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A digital front-end decimation chain based on both Farrow interpolator for fractional sample-rate conversion and a digital mixer is proposed in order to comply with the long-term evolution standards in radio receivers with ten frequency modes. Design requirement specifications with adjacent channel selectivity, inband blockers, and narrowband blockers are all satisfied so that the proposed digital front-end is 3GPP-compliant. Furthermore, the proposed digital front-end addresses carrier aggregation in the standards via appropriate frequency translations. The digital front-end has a cascaded integrator comb filter prior to Farrow interpolator and also has a per-carrier carrier aggregation filter and channel selection filter following the digital mixer. A Farrow interpolator with an integrate-and-dump circuitry controlled by a condition signal is proposed and also a digital mixer with periodic reset to prevent phase error accumulation is proposed. From the standpoint of design methodology, three models are all developed for the overall digital front-end, namely, functional models, cycle-accurate models, and bit-accurate models. Performance is verified by means of the cycle-accurate model and subsequently, by means of a special C++ class, the bitwidths are minimized in a methodic manner for area minimization. For system-level performance verification, the orthogonal frequency division multiplexing receiver is also modeled. The critical path delay of each building block is analyzed and the spectral-domain view is obtained for each building block of the digital front-end circuitry. The proposed digital front-end circuitry is simulated, designed, and both synthesized in a 180 nm CMOS application-specific integrated circuit technology and implemented in the Xilinx XC6VLX550T field-programmable gate array (Xilinx, San Jose, CA, USA).
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Teymourzaedh, Rozita. "VLSI Implementation of Novel Class of High Speed Pipelined Digital Signal Processing Filter for Wireless Receivers." American Journal of Engineering and Applied Sciences.vISSN 1941-7020 3, no. 4 (2010): 663–69. https://doi.org/10.5281/zenodo.1239903.

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The need for high performance transceiver with high Signal to Noise Ratio (SNR) has driven the communication system to utilize latest technique identified as over sampling systems. It was the most economical modulator and decimation in communication system. It has been proven to increase the SNR and is used in many high performance systems such as in the Analog to Digital Converter (ADC) for wireless transceiver. This research work presented the design of the novel class of decimation and its VLSI implementation which was the sub-component in the over sampling technique. The design and realization of main unit of decimation stage that was the Cascaded Integrator Comb (CIC) filter, the associated half band filters and the droop correction are also designed. The Verilog HDL code in Xilinx ISE environment has been derived to describe the proposed advanced CIC filter properties. Consequently, Virtex-II FPGA board was used to implement and test the design on the real hardware. The ASIC design implementation was performed accordingly and resulted power and area measurement on chip core layout. The proposed design focused on the trade-off between the high speed and the low power consumption as well as the silicon area and high resolution for the chip implementation which satisfies wireless communication systems. The synthesis report illustrates the maximum clock frequency of 332 MHz with the active core area of 0.308×0.308 mm2. It can be concluded that VLSI implementation of proposed filter architecture is an enabler in solving problems that affect communication capability in DSP application.
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Sengar, Suverna. "Performance Evaluation of Cascaded Integrator-Comb (CIC) Filter." IOSR Journal of Engineering 02, no. 02 (2012): 222–28. http://dx.doi.org/10.9790/3021-0202222228.

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Bai, Mingsian R., and Jienwen Lai. "Broadband Spatially Feedforward Active Noise Control Algorithms Using a Comb Filter." Journal of Vibration and Acoustics 125, no. 1 (2003): 18–23. http://dx.doi.org/10.1115/1.1525003.

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A controller composed of a nonrecursive filter and a recursive filter is used to approximate the ideal controller for a spatially feedforward duct ANC problem. The nonrecursive part represents the dynamics of the transducer, whereas the recursive part is in the form of a comb filter. The parameters of the comb filter are obtained from the impulse response of the controller by using the least-square method. The comb filter is then cascaded with the nonrecursive part implemented as either a fixed filter or an adaptive filter. In the latter approach, two types of LMS-based algorithms are used. The proposed algorithms are implemented on the platform of a digital signal processor. Experimental results showed that the approximated controller attained 17 dB maximal attenuation in the frequency band 200∼600Hz.
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Jovanovic-Dolecek, Gordana. "Design of multiplierless comb compensators with magnitude response synthesized as sinewave functions." Facta universitatis - series: Electronics and Energetics 33, no. 1 (2020): 1–14. http://dx.doi.org/10.2298/fuee2001001j.

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This paper presents a research on design of multiplierless comb compensators with magnitude response synthesized as sinewave functions. First, it is elaborated the importance of comb decimation filter and why we need its compensator. In continuation are presented some favorable characteristics of comb compensator. The compensators, with magnitude characteristic synthesized as sinewave functions fulfill those favorable characteristics. Next, are described some most important results on design of compensators with sinewave-based magnitude responses including single and cascaded sinewave-based functions. In all designs are presented the overall corresponding magnitude responses and the zooms in the passband. The parameters of design generally depend only on number of cascaded combs and generally do not depend on decimation factor. Design parameters are presented in tables along with the corresponding required number of adders.
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Kwentus, A. Y., Zhongnong Jiang, and A. N. Willson. "Application of filter sharpening to cascaded integrator-comb decimation filters." IEEE Transactions on Signal Processing 45, no. 2 (1997): 457–67. http://dx.doi.org/10.1109/78.554309.

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Ferreira, José L., Yan Wu, and Ronald M. Aarts. "Enhancement of the Comb Filtering Selectivity Using Iterative Moving Average for Periodic Waveform and Harmonic Elimination." Journal of Healthcare Engineering 2018 (2018): 1–14. http://dx.doi.org/10.1155/2018/7901502.

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A recurring problem regarding the use of conventional comb filter approaches for elimination of periodic waveforms is the degree of selectivity achieved by the filtering process. Some applications, such as the gradient artefact correction in EEG recordings during coregistered EEG-fMRI, require a highly selective comb filtering that provides effective attenuation in the stopbands and gain close to unity in the pass-bands. In this paper, we present a novel comb filtering implementation whereby the iterative filtering application of FIR moving average-based approaches is exploited in order to enhance the comb filtering selectivity. Our results indicate that the proposed approach can be used to effectively approximate the FIR moving average filter characteristics to those of an ideal filter. A cascaded implementation using the proposed approach shows to further increase the attenuation in the filter stopbands. Moreover, broadening of the bandwidth of the comb filtering stopbands around −3 dB according to the fundamental frequency of the stopband can be achieved by the novel method, which constitutes an important characteristic to account for broadening of the harmonic gradient artefact spectral lines. In parallel, the proposed filtering implementation can also be used to design a novel notch filtering approach with enhanced selectivity as well.
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Amrane, Raouf, Youcef Brik, Samir Zeghlache, Mohamed Ladjal, and Djamel Chicouche. "Sampling Rate Optimization for Improving the Cascaded Integrator Comb Filter Characteristics." Traitement du Signal 38, no. 1 (2021): 97–103. http://dx.doi.org/10.18280/ts.380110.

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The cascaded integrator comb (CIC) filters are characterized by coefficient less and reduced hardware requirement, which make them an economical finite impulse response (FIR) class in many signal processing applications. They consist of an integrator section working at the high sampling rate and a comb section working at the low sampling rate. However, they don’t have well defined frequency response. To remedy this problem, several structures have been proposed but the performance is still unsatisfactory. Thence, this paper deals with the improvement of the CIC filter characteristics by optimizing its sampling rate. This solution increases the performance characteristics of CIC filters by improving the stopband attenuation and ripple as well as the passband droop. Also, this paper presents a comparison of the proposed method with some other existing structures such as the conventional CIC, the sharpened CIC, and the modified sharpened CIC filters, which has proven the effectiveness of the proposed method.
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Dissertations / Theses on the topic "Cascaded integrated comb filter"

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Yang, Harry. "Design and implementation of a cascaded integrator comb (CIC) decimation filter." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 2001. http://www.collectionscanada.ca/obj/s4/f2/dsk3/ftp04/MQ61029.pdf.

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Stephen, Graham. "On cascaded integrator-comb-based decimination filters for high throughput rate filed programmable gate array implementation." Thesis, University of Strathclyde, 2009. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.501857.

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Chang, Bor-Tang, and 張伯廷. "The IC design of Cascade Integrator Comb Filters for Sigma-Delta Converter application." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/23769628256010920168.

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碩士<br>中華科技大學<br>電子工程研究所碩士班<br>104<br>Analog-to-digital converter (referred to ADC) plays an important role in electronic systems because it is the bridge between analog and digital signals. The audio signal processing requires high-resolution applications.Of the various ADC types, the Sigma-Delta modulator (referred to ΣΔ modulator), due to its high-resolution characteristics, is the top choice in the audio signal processing. This is because the ΣΔ modulator has noise-shaping, frequency shifting, and oversampling characteristics, enabling to shift in-band quantization errors to out of band, the rear end of which is to use Merge Cascade Integrator Comb filter (referred to MCIC Filter) so as to achieve high-resolution requirements. This paper presents an integrated circuit designed for the ΣΔ modulator using MCIC filter. This MCIC filter can convert high-speed low-resolution signals produced by ΣΔ modulator to low-speed high-resolution signals, which results not only in saving hardware but maintaining the Signal to Noise Ratio. Based on MATLAB simulation of a functional block diagram, this paper intends to write hardware circuit code in Verilog HDL, using QuartusΠ synthesizer circuit as prototype verification, and finally applying Design Compiler Tools to perform logic synthesis using TSMC 0.18μm 1P6M Process Cell-Based Design Flow automatically synthesized layout.
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Book chapters on the topic "Cascaded integrated comb filter"

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Nigam, Satyam. "Hardware Implementation of Cascaded Integrator-Comb Filter Using Canonical Signed-Digit Number System." In Lecture Notes in Networks and Systems. Springer Nature Singapore, 2023. http://dx.doi.org/10.1007/978-981-19-8563-8_10.

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harris, fredric j. "Cascade Integrator Comb Filters." In Multirate Signal Processing for Communication Systems, 2nd ed. River Publishers, 2022. http://dx.doi.org/10.1201/9781003338888-12.

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Sinha, Tusshar Manish, Job Mathew George, Prakhar Srivastava, et al. "Dual Band Substrate Integrated Waveguide (SIW) Filter with Curved Comb Shape Slots on Top for High Selectivity." In Lecture Notes in Electrical Engineering. Springer Nature Singapore, 2022. http://dx.doi.org/10.1007/978-981-19-1645-8_32.

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Jain, Vivek, and Navneet Agrawal. "Implement Multichannel Fractional Sample Rate Convertor using Genetic Algorithm." In Research Anthology on Multi-Industry Uses of Genetic Programming and Algorithms. IGI Global, 2021. http://dx.doi.org/10.4018/978-1-7998-8048-6.ch024.

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In this paper reduce power of multichannel fractional sample rate convertor by minimized hamming distance between consecutive coefficients of filter using Genetic algorithm. The main component of multichannel fractional sample rate convertor is Cascaded multiple architecture finite impulse response filter (CMFIR filter). CMFIR is implemented by cascading of cascaded integrator-comb (CIC) &amp; multiply accumulate architecture (MAC) FIR filter. Genetic algorithm minimizes the hamming distance between consecutive coefficients of CMFIR filter. By Minimizing the hamming distance of consecutive filter coefficient reduces the transaction from 0 to 1 or 1 to 0. These techniques reduce the switching activity of CMOS transistor which is directly reduces Dynamic power consumption by multichannel sample rate convertor, it also minimizes the total power consumption of multichannel fractional sample rate convertor. later than use genetic algorithm on 1 to 128 channel Down sample rate convertor total power reduced by 3.44% to 61.56%, dynamic power reduced by 9.09% to 56.25% .1 to 128 channel Up sample rate convertor total power reduced by 2.81% to 45.42%, dynamic power reduced by 4.76% to 56%, 1 to 128 channel fractional sample rate convertor total power reduced by 1.44% to 17.17%, dynamic power reduced by 6.25% to 19.92%.
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"The application of Cascade Integrator Comb filter on quasi-continuous wave system." In Engineering Management and Industrial Engineering. CRC Press, 2015. http://dx.doi.org/10.1201/b18407-22.

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Amiri, Iraj Sadegh, Abdolkarim Afroozeh, and Harith Ahmad. "Analysis of single Micro-Ring Resonators (MRR), add/drop filter MRR and cascaded MRR." In Integrated Micro-Ring Photonics. CRC Press, 2016. http://dx.doi.org/10.1201/9781315682990-3.

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Conference papers on the topic "Cascaded integrated comb filter"

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Rama, Y. Sri, E. Vijaya Babu, K. V. Balaramakrishna, Sanjana Mohithe, Siri Chandana Prodduturi, and Bhoomika Amgoth. "VLSI based Cascaded Integrator Comb (CIC) Filter for RADAR." In 2025 5th International Conference on Trends in Material Science and Inventive Materials (ICTMIM). IEEE, 2025. https://doi.org/10.1109/ictmim65579.2025.10988181.

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Khalil, Mostafa, Hao Sun, Thomas Papatheodorakos, Rhys Adams, and Lawrence R. Chen. "Optical Frequency Comb Generation Using Integrated Cascaded MZMs on SOI." In 2024 Photonics North (PN). IEEE, 2024. http://dx.doi.org/10.1109/pn62551.2024.10621787.

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Wu, Junmin, Dinghong Jia, Qinxuan Zhong, Quanyuan Feng, and Qianyin Xiang. "A Cascaded Quadruplet Substrate Integrated Waveguide Filter Based on Quartz Glass Substrate." In 2024 International Conference on Microwave and Millimeter Wave Technology (ICMMT). IEEE, 2024. http://dx.doi.org/10.1109/icmmt61774.2024.10671944.

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Chaudhury, Soumit Samadder, Seema Awasthi, and Rajat Kumar Singh. "Cascaded Quarter-Circular Mushroom Resonators loaded to Substrate Integrated Waveguide for Semi Selective Bandpass Filter." In 2024 IEEE Microwaves, Antennas, and Propagation Conference (MAPCON). IEEE, 2024. https://doi.org/10.1109/mapcon61407.2024.10923286.

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Alboon, Shadi A. "Dual Optical notch/comb-notch filter with tunable wavelength based on the integrated Michelson and Gires-Tournois interferometers." In 2024 15th International Conference on Communications (COMM). IEEE, 2024. http://dx.doi.org/10.1109/comm62355.2024.10741472.

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Wang, Zhenzheng, Zhaoxi Chen, Ke Zhang, Hanke Feng, and Cheng Wang. "Widely and fast tunable vernier micro-ring filter based on an LNOI platform." In CLEO: Applications and Technology. Optica Publishing Group, 2024. http://dx.doi.org/10.1364/cleo_at.2024.atu4m.4.

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We report an LNOI vernier cascaded micro-ring filter integrated with both thermo-optic and electro-optic tuning electrodes, featuring a 41-nm thermo-optic tuning range, 6-ns electro-optic response time, and a high sidelobe suppression ratio of 19.2 dB.
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Hong, Peng, and Zhang Yuhua. "The Efficient Design and Modification of Cascaded Integrator Comb Filter." In 2010 WASE International Conference on Information Engineering (ICIE 2010). IEEE, 2010. http://dx.doi.org/10.1109/icie.2010.38.

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Kwentus, A., O. Lee, and A. N. Willson. "A 250 Msample/sec programmable cascaded integrator-comb decimation filter." In VLSI Signal Processing, IX. IEEE, 1996. http://dx.doi.org/10.1109/vlsisp.1996.558351.

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"Study and Application of an Improved Cascaded Integrator-Comb Filter." In 2018 3rd International Conference on Computer Science and Information Engineering. Clausius Scientific Press, 2018. http://dx.doi.org/10.23977/iccsie.2018.1009.

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Shan, Baotang, and Xiaohang Ren. "Study and Application of an Improved Cascaded Integrator-Comb Filter." In 2019 IEEE 2nd International Conference on Automation, Electronics and Electrical Engineering (AUTEEE). IEEE, 2019. http://dx.doi.org/10.1109/auteee48671.2019.9033208.

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