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Journal articles on the topic 'ChipScope'

Author: Grafiati

Published: 4 June 2021

Last updated: 4 February 2022

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1

G.Shanthi, G. Shanthi. "CHIPSCOPE Implementation of CRC circuit architecture." IOSR journal of VLSI and Signal Processing 2, no. 1 (2013): 07–14. http://dx.doi.org/10.9790/4200-0210714.

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2

Diéguez, Angel, Steffen Bornemann, Katarzyna Kluczyk-Korch, Kateryna Trofymchuk, Viktorija Glembockyte, and Stefan Schrittwieser. "ChipScope Symposium: Novel Approaches for a Chip-Sized Optical Microscope." Proceedings 56, no. 1 (December 9, 2020): 5. http://dx.doi.org/10.3390/proceedings2020056005.

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In the Chipscope project funded by the EU, a completely new strategy towards optical microscopy is explored by a team of researchers from different European institutions. In this workshop, the different researchers of the project will explain the last advances obtained in the project, presenting the microscopes, how light emission is produced, and the detection principles and simulations.

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3

Divakaran, Ruckmani, Srinivas Babu N, Shashi Kiran S, and Byrareddy H.C. "IMPLEMENTATION AND VERIFICATION OF RISC PROCESSOR ON FPGA USING CHIPSCOPE PRO TOOL." International Journal of Current Engineering and Scientific Research 6, no. 6 (June 2019): 59–65. http://dx.doi.org/10.21276/ijcesr.2019.6.6.12.

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4

Leander, Kevin M. "ChipScope: Actually, That Funny Way of Looking at it Works Pretty Well." E-Learning and Digital Media 11, no. 5 (January 2014): 471–74. http://dx.doi.org/10.2304/elea.2014.11.5.471.

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5

Qin, Peng, Hao Lu, Zhi Ye Jiang, Jin Liang Bai, Lu Gao, and Gang Meng. "Design and Test of High Speed Digitization Sampling Circuit Based on FPGA." Applied Mechanics and Materials 482 (December 2013): 386–89. http://dx.doi.org/10.4028/www.scientific.net/amm.482.386.

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To sample wideband IF signal with large amounts of data, a high-speed data acquisition program is presented. The program focus on circuit design, issues that need attention, and high-speed sampling signal deceleration strategy. The 2.4GHz rate sampling data acquisition, reception and demux are completed with ADC083000 and Field-Programmable Gate Array (FPGA). At last, a result of sampling with the converter is offered by chipscope software. The result verified ADC083000 has an excellent performance with more than 6.5 bit ENOB and good phase coherence. In engineering practice, the design has been used and has good performance.

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6

AV, Shruthi, Electa Alice, and Mohammed Bilal. "Low Power VLSI Design and Implementation of Area-Optimized 256-bit AEStandard for Real Time Images on Vertex 5." International Journal of Reconfigurable and Embedded Systems (IJRES) 2, no. 2 (July 1, 2013): 83. http://dx.doi.org/10.11591/ijres.v2.i2.pp83-88.

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A new Vertex6-chipscope based implementation scheme of the AES-256 (Advanced Encryption Standard, with 256-bit key) encryption and decryption algorithm is proposed in this paper. For maintaining the speed of encryption and decryption, the pipelining technology is applied and the mode of data transmission is modified in this design so that the chip size can be reduced. The 256-bit plaintext and the 256- bit initial key, as well as the 256-bit output of cipher-text, are all divided into four 32-bit consecutive units respectively controlled by the clock. In this novel work, substantial improvement in performance in terms of area, power and dynamic speed has been obtained.

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7

Wang, Jiang Wei, Mu Yan Ma, and Jun Min Leng. "Design of Real-Time Image Collecting Module Based on FPGA." Advanced Materials Research 532-533 (June 2012): 1095–99. http://dx.doi.org/10.4028/www.scientific.net/amr.532-533.1095.

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A new pixel collecting interface board based on FPGA is designed, it is a part of conveyer belt’s fault detection device. The previous system’s controller chip CPLD is replaced by FPGA, the memory FIFO chips are replaced by SRAM, the chip CY7C68013 is chosen as the USB 2.0 controller and works in Slave FIFO transmission mode. The firmware program and application program are compiled to transmit data. The Chipscope Pro Tools are used in the system to debug online, and the correctness of data transmission can be analyzed and verified. The experimental results demonstrate that the new pixel collecting interface board has the advantage of high-speed data acquisition, and can transmit data in real time and correctly. It also has a good scalability and can be used into other high-speed acquisition systems.

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8

Muhammad, A. B., Denny Darlis, and Arfianto Fahmi. "Design and Realization of Digital Modulator BPSK, QPSK and 16-QAM on FPGA." Journal of Measurements, Electronics, Communications, and Systems 2, no. 1 (December 31, 2016): 1. http://dx.doi.org/10.25124/jmecs.v2i1.1482.

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Innovations in the field of wireless communication are growing very rapidly in line with the behavior of modern societies that have high mobility, need of the flexible services, easy access, and high speed data transfer to facilitate any activities of its users. The needs of every user of any variety are more than just voice, video, data transfer, up to a demanding streaming multimedia capabilities and reliability of the communication system used. One of the factors that affect the quality and speed of data transfer in wireless communications is modulation. The development of technological modulation allows data transfer rate to become faster, more resistant to noise, and have high security (encryption) in order to secure data sent over the lead. The implementation of digital modulator PSK (Phase Shift Keying Modulation) and QAM (Quadrature Amplitude Modulation) on FPGA is designed to simplify the design of a hardware by representing the input which is prepared by using the VHDL programming language. The input will be programmed by logic gates contained in the FPGA into a circuit that functions as a digital modulator. This device can map the input bits into a modulator output that has been mapped in accordance with the coordinates of the constellation. The expected results of the implementation are three types of digital modulator, namely: BPSK, QPSK and 16-QAM to be implemented on FPGA Xilinx Spartan-6 XC6SLX45 CSG324C; modulation type to be used can be selected by entering input on the programs implemented in the FPGA. In the design used input from laptop devices with UART interface and data types for input is ASCII 8 bit for later analysis simulation results modulation of the input to each modulator using Modelsim for simulation design and Chipscope for simulation system design implemented in the FPGA.

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9

Murthy, C. Srinivasa, and K. Sridevi. "Optimized DA-reconfigurable FIR filters for software defined radio channelizer applications." Circuit World 47, no. 3 (June 8, 2021): 252–61. http://dx.doi.org/10.1108/cw-11-2020-0332.

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Purpose In this paper, the authors present different methods for reconfigurable finite impulse response (RFIR) filter design. Distributed arithmetic (DA)-based reconfigurable FIR filter design is suitable for software-defined radio (SDR) applications. The main contribution of reconfiguration is reuse of registers, multipliers, adders and to optimize various parameters such as area, power dissipation, speed, throughput, latency and hardware utilizations of flip-flops and slices. Therefore, effective design of building blocks will be optimized for RFIR filter with all the above parameters. Design/methodology/approach The modified, direct form register structure of FIR filter contributes the reuse concept and allows utilization of less number of registers and parallel computation operations. The disadvantage of DA and other conventional methods is delay increases proportionally with filter length. This is due to different partial products generated by adders. The usage of adder and multipliers in DA-FIR filter restricts the area and power dissipation because of their complexity of generation of sum and carry bits. The hardware implementation time of an adder can be reduced by parallel prefix adder (PPA) usage based on Ling equation. PPA uses shift-add multiplication, which is a repetitive process of addition, and this process is known as Bypass Zero feed multiplicand in direct multiplication, and the proposed technique optimizes area-power product efficiently. The modified DA (MDA)-based RFIR filter is designed for 64 taps filter length (N). The design is developed by using Verilog hardware description language and implemented on field-programmable gate array. Also, this design validates SDR channel equalizer. Findings Both RFIR and SDR are integrated as single system and implemented on Artix-7 development board of XC7A100tCSG324 and exploited the advantages in area-delay, power-speed products and energy efficiency. The theoretical and practical comparisons have been carried out, and the results are compared with existing DA-RFIR designs in terms of throughput, latency, area-delay, power-speed products and energy efficiency, which are improved by 14.5%, 23%, 6.5%, 34.2% and 21%, respectively. Originality/value The DA-based RFIR filter is validated using Chipscope Pro software tool on Artix-7 FPGA in Xilinx ISE design suite and compared constraint parameters with existing state-of-art results. It is also tested the filtering operation by applying the RFIR filter on Audio signals for removal of noisy signals and it is found that 95% of noise signals are filtered effectively.

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10

Castro, Jasmine O., Shwathy Ramesan, Amgad R. Rezk, and Leslie Y. Yeo. "Continuous tuneable droplet ejection via pulsed surface acoustic wave jetting." Soft Matter 14, no. 28 (2018): 5721–27. http://dx.doi.org/10.1039/c7sm02534c.

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11

Shih, Ta-Ming, Chris H. Sarantos, Susan M. Haynes, and John E. Heebner. "Chipscale, single-shot gated ultrafast optical recorder." Optics Express 20, no. 1 (December 21, 2011): 414. http://dx.doi.org/10.1364/oe.20.000414.

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12

Stegmaier, Matthias, Carlos Ríos, Harish Bhaskaran, C. David Wright, and Wolfram H. P. Pernice. "Nonvolatile All-Optical 1 × 2 Switch for Chipscale Photonic Networks." Advanced Optical Materials 5, no. 1 (October 6, 2016): 1600346. http://dx.doi.org/10.1002/adom.201600346.

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13

Zhang, Zhaojian, Junbo Yang, Heng Xu, Siyu Xu, Yunxin Han, Xin He, Jingjing Zhang, Jie Huang, Dingbo Chen, and Wanlin Xie. "A plasmonic ellipse resonator possessing hybrid modes for ultracompact chipscale application." Physica Scripta 94, no. 12 (October 22, 2019): 125511. http://dx.doi.org/10.1088/1402-4896/ab4677.

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14

Zhang, Zhaojian, Junbo Yang, Wei Bai, Yunxin Han, Xin He, Jingjing Zhang, Jie Huang, Dingbo Chen, Siyu Xu, and Wanlin Xie. "Chipscale plasmonic modulators and switches based on metal–insulator–metal waveguides with Ge2Sb2Te5." Journal of Nanophotonics 13, no. 04 (November 20, 2019): 1. http://dx.doi.org/10.1117/1.jnp.13.046009.

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15

Song, Y. K., W. R. Patterson, C. W. Bull, J. Beals, N. Hwang, A. P. Deangelis, C. Lay, et al. "Development of a Chipscale Integrated Microelectrode/Microelectronic Device for Brain Implantable Neuroengineering Applications." IEEE Transactions on Neural Systems and Rehabilitation Engineering 13, no. 2 (June 2005): 220–26. http://dx.doi.org/10.1109/tnsre.2005.848337.

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16

Zhang, Zhaojian, Junbo Yang, Xin He, Yunxin Han, Jie Huang, and Dingbo Chen. "Tunable plasmon-induced transparency and slow light in terahertz chipscale semiconductor plasmonic waveguides." Journal of Physics D: Applied Physics 53, no. 31 (June 1, 2020): 315101. http://dx.doi.org/10.1088/1361-6463/ab8322.

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17

Weng, Wenle, Aleksandra Kaszubowska-Anandarajah, Junqiu Liu, Prince M. Anandarajah, and Tobias J. Kippenberg. "Frequency division using a soliton-injected semiconductor gain-switched frequency comb." Science Advances 6, no. 39 (September 2020): eaba2807. http://dx.doi.org/10.1126/sciadv.aba2807.

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With optical spectral marks equally spaced by a frequency in the microwave or the radio frequency domain, optical frequency combs have been used not only to synthesize optical frequencies from microwave references but also to generate ultralow-noise microwaves via optical frequency division. Here, we combine two compact frequency combs, namely, a soliton microcomb and a semiconductor gain-switched comb, to demonstrate low-noise microwave generation based on a novel frequency division technique. Using a semiconductor laser that is driven by a sinusoidal current and injection-locked to microresonator solitons, our scheme transfers the spectral purity of a dissipative soliton oscillator into the subharmonic frequencies of the microcomb repetition rate. In addition, the gain-switched comb provides dense optical spectral emissions that divide the line spacing of the soliton microcomb. With the potential to be fully integrated, the merger of the two chipscale devices may profoundly facilitate the wide application of frequency comb technology.

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18

KUMAR, M. RAVI. "ELECTROCARDIOGRAM (ECG) SIGNAL PROCESSING ON FPGA FOR EMERGING HEALTHCARE APPLICATIONS." International Journal of Electronics Signals and Systems, October 2012, 91–96. http://dx.doi.org/10.47893/ijess.2012.1089.

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In this project an ECG signal processing module will be implemented in VHDL on FPGA platform. The digital filtering will be carried out with low pass FIR architecture. Filters shall filter the 50 Hz coupled noise and other high frequency noises. The filtered signal is subjected to Short Time Fourier transform by which lot of inferences can be made by medical experts. A recorded ECG signal will be used as test input to test the modules implemented on FPGA. The Modelsim Xilinx Edition and Xilinx Integrated Software Environment will be used simulation and synthesis respectively. The Xilinx Chipscope tool will be used to test the results, while the logic running on FPGA. The Xilinx Spartan 3 Family FPGA development board will be used this project.

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19

Chen, Jun. "Chipscale waveguide source for photonic quantum-information processing." SPIE Newsroom, 2010. http://dx.doi.org/10.1117/2.1201005.002948.

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20

Marchand, Paul J., Johann Riemensberger, J. Connor Skehan, Jia-Jung Ho, Martin H. P. Pfeiffer, Junqiu Liu, Christoph Hauger, Theo Lasser, and Tobias J. Kippenberg. "Soliton microcomb based spectral domain optical coherence tomography." Nature Communications 12, no. 1 (January 18, 2021). http://dx.doi.org/10.1038/s41467-020-20404-9.

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AbstractSpectral domain optical coherence tomography (OCT) is a widely employed, minimally invasive bio-medical imaging technique, which requires a broadband light source, typically implemented by super-luminescent diodes. Recent advances in soliton based photonic integrated frequency combs (soliton microcombs) have enabled the development of low-noise, broadband chipscale frequency comb sources, whose potential for OCT imaging has not yet been unexplored. Here, we explore the use of dissipative Kerr soliton microcombs in spectral domain OCT and show that, by using photonic chipscale Si3N4 resonators in conjunction with 1300 nm pump lasers, spectral bandwidths exceeding those of commercial OCT sources are possible. We characterized the exceptional noise properties of our source (in comparison to conventional OCT sources) and demonstrate that the soliton states in microresonators exhibit a residual intensity noise floor at high offset frequencies that is ca. 3 dB lower than a traditional OCT source at identical power, and can exhibit significantly lower noise performance for powers at the milli-Watt level. Moreover, we demonstrate that classical amplitude noise of all soliton comb teeth are correlated, i.e., common mode, in contrast to superluminescent diodes or incoherent microcomb states, which opens a new avenue to improve imaging speed and performance beyond the thermal noise limit.

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21

Zhang, Zhaojian, Junbo Yang, Yunxin Han, Xin He, Jie Huang, and Dingbo Chen. "Hybridization-induced resonances with high-quality factor in a plasmonic chipscale ring-disk nanocavity." Waves in Random and Complex Media, March 19, 2020, 1–10. http://dx.doi.org/10.1080/17455030.2020.1742401.

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22

Weng, Wenle, Aleksandra Kaszubowska-Anandarajah, Jijun He, Prajwal D. Lakshmijayasimha, Erwan Lucas, Junqiu Liu, Prince M. Anandarajah, and Tobias J. Kippenberg. "Gain-switched semiconductor laser driven soliton microcombs." Nature Communications 12, no. 1 (March 3, 2021). http://dx.doi.org/10.1038/s41467-021-21569-7.

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AbstractDissipative Kerr soliton generation using self-injection-locked III-V lasers has enabled fully integrated hybrid microcombs that operate in turnkey mode and can access microwave repetition rates. Yet, continuous-wave-driven soliton microcombs exhibit low energy conversion efficiency and high optical power threshold, especially when the repetition frequencies are within the microwave range that is convenient for direct detection with off-the-shelf electronics. Here, by actively switching the bias current of injection-locked III-V semiconductor lasers with switching frequencies in the X-band and K-band microwave ranges, we pulse-pump both crystalline and integrated microresonators with picosecond laser pulses, generating soliton microcombs with stable repetition rates and lowering the required average pumping power by one order of magnitude to a record-setting level of a few milliwatts. In addition, we unveil the critical role of the phase profile of the pumping pulses, and implement phase engineering on the pulsed pumping scheme, which allows for the robust generation and the stable trapping of solitons on intracavity pulse pedestals. Our work leverages the advantages of the gain switching and the pulse pumping techniques, and establishes the merits of combining distinct compact comb platforms that enhance the potential of energy-efficient chipscale microcombs.

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