Relevant bibliographies by topics / Circuit scheme

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'Circuit scheme'

Author: Grafiati
Published: 28 May 2022
Last updated: 30 July 2025

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Journal articles on the topic "Circuit scheme"

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Yang, Da Bin, Young Woo Lee, and Young-woo Lee. "Asymmetric Signal Scanning Scheme to Detect Invasive Attacks." Korean Institute of Smart Media 12, no. 1 (2023): 17–23. http://dx.doi.org/10.30693/smj.2023.12.1.17.

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Design-For-Security (DFS) methodology is to protect integrated circuits from physical attacks, and that can be implemented by adding a security circuit to detect abnormal external access. Among the abnormal accesses called invasive attack, microprobing and FIB circuit editing are classified as the most powerful methods because they have direct access. Microprobing deliberately inject defects into the wire of circuit through probes, or reads and changes data. FIB circuit editing is methods of reconnecting or destroying circuits to neutralize security circuits or to access data. Previous DFS met
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WAH WU, CHAI, GUO-QUN ZHONG, and LEON O. CHUA. "SYNCHRONIZING NONAUTONOMOUS CHAOTIC SYSTEMS WITHOUT PHASE-LOCKING." Journal of Circuits, Systems and Computers 06, no. 03 (1996): 227–41. http://dx.doi.org/10.1142/s0218126696000182.

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Pecora and Carroll1 have shown how two nonautonomous chaotic circuits driven by periodic forcing can be synchronized using the master-slave driving principle. However, in their scheme, the periodic forcing in both circuits needs to be phase-locked through some additional circuitry for the system to synchronize. In this paper, we show two ways in which this can be avoided. In the first scheme, the two circuits are connected in a master-slave driving configuration and the periodic forcing is included in the driving signal such that it eliminates the need for the slave circuit to have an external
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Jiao, Su Min, Cai Hong Wang, and Xue Mei Wang. "Large-Scale Analog Circuit Evolutionary Design Using a Real-Coded Scheme." Applied Mechanics and Materials 220-223 (November 2012): 2036–39. http://dx.doi.org/10.4028/www.scientific.net/amm.220-223.2036.

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Analog circuits are of great importance in electronic system design. Recent evolutionary design results are usually small-scale analog circuits. This paper proposes a real-coded mechanism and uses it in the large-scale analog circuit evolutionary design. The proposed scheme evolves the circuit topology and size to a uniformed continuous space, in which the circuit representation is closed and of causality. Experimental results show that the proposed scheme can work successfully on many analog circuits with different kinds of characteristics. Comparing with other evolutionary methods before, th
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Jurić-Grgić, Ivica, Tonći Modrić, and Marin Mandić. "Transient Linear Circuit Analysis Using Finite Element Technique." Applied Sciences 12, no. 19 (2022): 9554. http://dx.doi.org/10.3390/app12199554.

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In this paper, a novel algorithm for a transient linear circuit analysis based on the Finite Element Technique (FET) was established. The FET procedure allows a straightforward solution for complex electric circuits since it is based on the Finite Element Method (FEM) approach. The developed algorithm allows us to select various types of time integration schemes when forming a local system of equations for a coupled circuit finite element. To illustrate the basic principle of the developed FET-based algorithm and to perform transient analysis, a random coupled linear circuit was analyzed. Nume
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WANG, XINSHENG, YIZHE HU, LIANG HAN, JINGHU LI, CHENXU WANG, and MINGYAN YU. "A LOW POWER AND VARIATION-INSENSITIVE CURRENT-MODE SIGNALING SCHEME." Journal of Circuits, Systems and Computers 22, no. 08 (2013): 1350068. http://dx.doi.org/10.1142/s0218126613500680.

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Process and supply variations all have a large influence on current-mode signaling (CMS) circuits, limiting their application on the fields of high-speed low power communication over long on-chip interconnects. A variation-insensitive CMS scheme (CMS-Bias) was offered, employing a particular bias circuit to compensate the effects of variations, and was robust enough against inter-die and intra-die variations. In this paper, we studied in detail the principle of variation tolerance of the CMS circuit and proposed a more suitable bias circuit for it. The CMS-Bias with the proposed bias circuit (
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Tang, Xiao-Bin, and Masayoshi Tachibana. "A BIST Scheme for Dynamic Comparators." Electronics 11, no. 24 (2022): 4169. http://dx.doi.org/10.3390/electronics11244169.

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This paper proposes a built-in self-test (BIST) scheme for detecting catastrophic faults in dynamic comparators. In this scheme, a feedback loop is designed using the characteristics of the comparator; monitoring the voltage in the feedback loop can determine the presence of a circuit fault. The proposed BIST scheme and the circuit under testing are realized at the transistor level. The proposed BIST scheme was simulated using HSPICE. The simulated fault coverage is approximately 87.8% with 90 test circuits. To further verify the effectiveness of the proposed BIST scheme, six faults were injec
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Pan, Naiqiao, Tian Chen, Houjun Sun, and Xiangdong Zhang. "Electric-Circuit Realization of Fast Quantum Search." Research 2021 (July 26, 2021): 1–8. http://dx.doi.org/10.34133/2021/9793071.

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Quantum search algorithm, which can search an unsorted database quadratically faster than any known classical algorithms, has become one of the most impressive showcases of quantum computation. It has been implemented using various quantum schemes. Here, we demonstrate both theoretically and experimentally that such a fast search algorithm can also be realized using classical electric circuits. The classical circuit networks to perform such a fast search have been designed. It has been shown that the evolution of electric signals in the circuit networks is analogies of quantum particles random
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Chua, Leon. "Genesis of Chua's scheme." Izvestiya VUZ. Applied Nonlinear Dynamics 1, no. 3 (1993): 4–16. https://doi.org/10.18500/0869-6632-1993-1-3-4-16.

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The article is a systematic presentation of the sequence of technical steps that the author went through in developing a chaos-generating circuit. The design procedure, although clear in nature, could not have been invented without using some important properties of nonlinear circuits and their physical implementations.
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Al-Rufaee, F. M., B. A. Yakimovich, and V. V. Kuvshinov. "Comparative circuit analysis for piezoelectric generators in low-power applications." E3S Web of Conferences 592 (2024): 03010. http://dx.doi.org/10.1051/e3sconf/202459203010.

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This paper presents the results of experimental analysis of piezoelectric-based power conversion circuits under vibration. Three types of circuits were evaluated: a standard full bridge rectifier (S-FBR) circuit, a self power synchronous electrical charge extraction circuit (SECE-sp), and an optimized self power synchronous charge extraction circuit (SECEopt-sp). Experiments were conducted to evaluate the effectiveness of energy conversion under real operating conditions. The results showed that the SECEopt-sp scheme has the highest energy conversion effectiveness and stable output power, outp
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Zulkifli, Nur Shahirah, Nooraida Samsudin, Suzanna Ridzuan Aw, Wan Farah Hanan Wan Osman, Shahreen Kasim, and Tole Sutikno. "Centroidal-polygon: a new modified Euler to improve speed of resistor-inductor circuit equation." Indonesian Journal of Electrical Engineering and Computer Science 24, no. 3 (2021): 1399. http://dx.doi.org/10.11591/ijeecs.v24.i3.pp1399-1404.

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Two types of first-order circuits are resistor-capacitor (RC) and resistorinductor (RL). This paper focuses on the RL circuit equation. The centroidalpolygon (CP) scheme will be tested using SCILAB 6.0 software. This new scheme (CP scheme) is addressed to improve the speed. For the first order circuit equation, the complexity is focused on the time complexity, which is speed of the time taken to complete the simulation in the electrical part. The CP scheme is compared with the previous studies, polygon (P) and harmonic-polygon (HP). The result shows that the CP scheme is less computational and
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Dissertations / Theses on the topic "Circuit scheme"

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Srinivasan, Gopikrishna. "Multiscale EM and circuit simulation using the Laguerre-FDTD scheme for package-aware integrated-circuit design." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/24705.

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Thesis (Ph.D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2008.<br>Committee Chair: Prof. Madhavan Swaminathan; Committee Member: Prof. Andrew Peterson; Committee Member: Prof. Sungkyu Lim
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Shang, Qi. "A new short circuit fault detection scheme for fault tolerant drive systems." Thesis, University of Newcastle Upon Tyne, 2009. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.500891.

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The civil aerospace industry is moving towards the 'more electric aeroplane'. The benefits are reduced weight and reduced maintenance which will result in better fuel economy and lower flight cost per mile. One of the important technologies is fault tolerant yet power dense electrical drive systems which have very high reliability to meet safety-critical aircraft applications. The particular subject of this thesis is fault detection in permanent magnet synchronous machines. The specific target application is a 16kW, 15,000 rpm aircraft engine fuel pump drive that has previously been developed
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Ha, Myunghyun. "EM simulation using the Laguerre-FDTD scheme for multiscale 3-D interconnections." Diss., Georgia Institute of Technology, 2011. http://hdl.handle.net/1853/42850.

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As the current electronic trend is toward integrating multiple functions in a single electronic device, there is a clear need for increasing integration density which is becoming more emphasized than in the past. To meet the industrial need and realize the new system-integration law [1], three-dimensional (3-D) integration is becoming necessary. 3-D integration of multiple functional IC chip/package modules requires co-simulation of the chip and the package to evaluate the performance of the system accurately. Due to large scale differences in the physical dimensions of chip-package structures
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Ji, Liang. "Improving fault location through interpole analysis of circuit breaker and automatic reclose scheme operation." Thesis, University of Strathclyde, 2012. http://oleg.lib.strath.ac.uk:80/R/?func=dbin-jump-full&object_id=19009.

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This research concentrates on the development and evaluation of novel single ended impedance based fault location methods, which are easy and economical to implement in practice. The conventional single ended impedance based fault location methods normally suffer from negative effects associated with variability and inaccuracies in fault resistance, distance to fault and from the impact of variable remote end short circuit level. A novel concept of a single ended impedance based fault location method using analysis of 'interpole' states, which arise during the operation of the circuit breaker
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Rydberg, Ray Robert. "A gasp of fresh air a high speed distributed FIFO scheme for managing interconnect parasitics /." Online access for everyone, 2005. http://www.dissertations.wsu.edu/Thesis/Spring2005/R%5FRydberg%5F050505.pdf.

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Jimenez, Carrizosa Miguel. "Hierarchical control scheme for multi-terminal high voltage direct current power networks." Thesis, Paris 11, 2015. http://www.theses.fr/2015PA112039/document.

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Cette thèse traite de la commande hiérarchique de réseaux à courant continu multi-terminaux à haute tension (MT-HVDC) intégrant des sources d'énergie renouvelables à grande échelle. Le schéma de contrôle proposé est composé de quatre ‘couches’ : le contrôle local où se trouvent les convertisseurs de puissance, avec une échelle de temps de l’ordre de la milliseconde ; le contrôle primaire qui est décentralisé et appliqué à plusieurs terminaux avec une échelle du temps de l’ordre de la seconde ; un niveau de commande où la communication est prise en compte et où l’approche de Modèle du Commande
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Libéros, Véronique. "Etablissement automatique de schémas équivalents pour des dispositifs de puissance intégrés." Toulouse, INSA, 1989. http://www.theses.fr/1989ISAT0035.

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Il s'agit d'un outil logiciel d'aide a la conception. En considerant les etapes technologiques de realisation de structure integrees, une liste des primitives physiques est dressee, ainsi que celle des primitives electriques associees permettant de decrire le fonctionnement electrique reel des dispositifs. Description du logiciel. Exemples choisis dont thyristor a gachette isolee et inverseur cmos
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Уніят, Сергій Васильович, та Serhiy Uniyat. "Прилад для реєстрації та визначення частоти дихання людини". Master's thesis, Тернопільський національний технічний університет імені Івана Пулюя, 2020. http://elartu.tntu.edu.ua/handle/lib/33250.

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Кваліфікаційну роботу виконано на кафедрі біотехнічних систем Тернопільського національного технічного університету<br>У кваліфікаційній роботі розроблено прилад для реєстрації та визначення частоти дихання людини. Розроблено структурну схему приладу, на основі якої розроблено схему принципову електричну. Основою щодо розробки схем структурної та електричної принципової була модель приладу, яку побудовано на принципі аналізу температур між вдихаючим та видихаючим повітрям як перетворювач теплової енергії в електричний сигнал. Використовуючи засіб Simulink проведено експериментальне дослідження
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Lukošius, Tomas. "Loginių schemų struktūros analizė. VHDL loginių schemų kelių skaičiavimas. Kelių pasiskirstymas schemos realizacijose. Fiktyvių kelių ieškojimas." Master's thesis, Lithuanian Academic Libraries Network (LABT), 2004. http://vddb.library.lt/obj/LT-eLABa-0001:E.02~2004~D_20040531_140639-43575.

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The combinational logic circuits, which are performing some kind of logic function, can have several realizations. Realizations differ from each other, because of the elements of the database used in circuit. The test of one scheme realization do not necessarily fully verify mistakes of the other realization. The number of pathways in different realizations may also differ. The determination of dependence between test's propriety and the number of pathways for different circuits is the main task in this paper. After finding pathways in different realizations of circuit, and comparing these pat
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Panda, Uma R. "An efficient single-latch scan-design scheme/." Thesis, McGill University, 1985. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=63266.

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Books on the topic "Circuit scheme"

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Scarman Centre. National CCTV Evaluation Team. National evaluation of CCTV: Early findings on scheme implementation : effective practice guide. Home Office, 2003.

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State Level Workshop on the Working of the Lead Bank Scheme in Manipur (1979 Imphal, India). Proceedings of the State Level Workshop on the Working of the Lead Bank Scheme in Manipur, held at circuit house lounge, Imphal, Manipur, on August 31 and September 1, 1979. United Bank of India, 1985.

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Deng, Yangdong. 3-Dimensional VLSI: A 2.5-Dimensional Integration Scheme. Springer-Verlag Berlin Heidelberg, 2010.

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högskola, Chalmers tekniska, ed. Den omriktarmatade asynkronmaskinens ekvivalenta schema: The equivalent circuit of the inverterfed asynchronous machine. Chalmers tekniska högskola, Sektionen för elektro- och datorteknik, 1985.

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Gordeev-Burgvic, Daniel'. Automation and management of water supply and sanitation systems. INFRA-M Academic Publishing LLC., 2025. https://doi.org/10.12737/1958352.

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The textbook briefly describes the basics of automation and the theory of automatic regulation, the elements of automatic devices, the construction of functional circuits of automation, control and measuring devices and devices. The principles and basic schemes of automation of water supply and sanitation systems are considered. Meets the requirements of the latest generation of federal state educational standards for higher education. For students studying in the specialty "Water Supply and sanitation" in the fields of "Construction", "Management in technical systems", "Automation of technolo
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Cuthbert, Bruce N. The Nimh Research Domain Criteria Project. Edited by Dennis S. Charney, Eric J. Nestler, Pamela Sklar, and Joseph D. Buxbaum. Oxford University Press, 2017. http://dx.doi.org/10.1093/med/9780190681425.003.0071.

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The Research Domain Criteria (RDoC) project grew from recognized deficiencies in currently used diagnostic schemes for mental illness, such as the Diagnostic and Statistical Manual of Mental Disorders (DSM). While the latter is based on a series of signs and symptoms of illnesses that can co-occur in groups of individuals, without consideration of underlying biological factors, RDoC is based on the increasing ability to relate normal as well as abnormal behavior to particular molecules and circuits in the brain across animal species and humans. Behavioral domains include negative valence syste
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Electric DC Circuit As Mathematical Programming Models. Schemes, Algorithms and Programs. Lulu Press, Inc., 2015.

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Mittra, Raj, Yinchao Chen, and Qunsheng Cao. Multiresolution Time Domain Scheme for Electromagnetic Engineering (Wiley Series in Microwave and Optical Engineering). Wiley-Interscience, 2005.

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I tour operator e le agenzie di viaggi: Circuiti operativi, schemi gestionali e bilancio d'esercizio. CLUEB, 2000.

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Kaplan, David M. Neural Computation, Multiple Realizability, and the Prospects for Mechanistic Explanation. Oxford University Press, 2018. http://dx.doi.org/10.1093/oso/9780199685509.003.0008.

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There is an ongoing philosophical and scientific debate concerning the nature of computational explanation in the neurosciences. Recently, some have cited modeling work involving so-called canonical neural computations—standard computational modules that apply the same fundamental operations across multiple brain areas—as evidence that computational neuroscientists sometimes employ a distinctive explanatory scheme from that of mechanistic explanation. Because these neural computations can rely on diverse circuits and mechanisms, modeling the underlying mechanisms is supposed to be of limited e
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Book chapters on the topic "Circuit scheme"

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Arm, Claude, Jean-Marc Masgonty, and Christian Piguet. "Double-Latch Clocking Scheme for Low-Power I.P. Cores." In Integrated Circuit Design. Springer Berlin Heidelberg, 2000. http://dx.doi.org/10.1007/3-540-45373-3_23.

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Tang, Ning, Lei Wang, Tian Xia, and Weidong Wu. "Design and Implementation of Full Adder Circuit Based on Memristor." In Proceeding of 2021 International Conference on Wireless Communications, Networking and Applications. Springer Nature Singapore, 2022. http://dx.doi.org/10.1007/978-981-19-2456-9_17.

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AbstractIn order to break through the traditional von Neumann architecture of computing and memory cell separation and speed up the computing speed, it is necessary to realize in memory computing, and memristor is an excellent carrier to realize in memory computing. Then, the development, principle, characteristics and application prospect of memristor are briefly introduced, and the characteristic curve of memristor is obtained by simulating the model of memristor. The principle and characteristics of memristor are explained more intuitively. Then, based on the memory resistor, the simple log
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Alì, Giuseppe, Andreas Bartel, Markus Brunk, and Sebastian Schöps. "A Convergent Iteration Scheme for Semiconductor/Circuit Coupled Problems." In Scientific Computing in Electrical Engineering SCEE 2010. Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-22453-9_25.

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Guo, Jiao, Jie Chen, Ting Li, Heping Fu, and Ruichang Qiu. "An Online Monitoring Scheme for Circuit Breakers Contact System." In Lecture Notes in Electrical Engineering. Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-2866-8_46.

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Rath, Shanti S., Asit Mohanty, Prakash K. Ray, Rachita Sarangi, and Gayadhar Panda. "Selective Short Circuit Scheme-Based Protection for AC Microgrid." In Lecture Notes in Electrical Engineering. Springer Nature Singapore, 2024. https://doi.org/10.1007/978-981-97-7018-2_38.

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Doh, Hyun Jung, Joon Soo Yoo, Mi Yeon Hong, Kang Hoon Lee, Tae Min Ahn, and Ji Won Yoon. "Principal Component Analysis over the Boolean Circuit Within TFHE Scheme." In Information Security Applications. Springer Nature Singapore, 2024. http://dx.doi.org/10.1007/978-981-99-8024-6_3.

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Ye, Chengjin, Chao Guo, and Yi Ding. "Iterative Online Fault Identification Scheme for High Voltage Circuit Breaker." In Risk-Based Planning and Operation Strategy Towards Short Circuit Resilient Power Systems. Springer Nature Singapore, 2023. http://dx.doi.org/10.1007/978-981-19-9725-9_9.

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Cai, Yupeng, Tongwei Yu, Hai Qian, Yan Lu, and Shengyang Lu. "Secondary Virtual Circuit Test Scheme Based on Intelligent Substation SCD File." In Advances in Intelligent Systems and Computing. Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-31129-2_18.

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Zhang, Yongzhi, Xiaohui Tang, Fengguang Wang, and Hang Lv. "Process Circuit Automation Configuration Scheme Applied to Digital Transformation of Substations." In Lecture Notes in Electrical Engineering. Springer Nature Singapore, 2024. https://doi.org/10.1007/978-981-97-8816-3_67.

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Makwana, Vijay H., and Bhavesh R. Bhalja. "Digital Distance Relaying Scheme for Parallel Transmission Lines During Inter-circuit Faults." In Energy Systems in Electrical Engineering. Springer Singapore, 2016. http://dx.doi.org/10.1007/978-981-10-1572-4_4.

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Conference papers on the topic "Circuit scheme"

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Wang, Kunfang, Luhui Wang, Kunpeng Ren, and Tao Liang. "Design of Integrated Circuit Auxiliary Testing Scheme Based on FPGA." In 2024 4th International Conference on Electronics, Circuits and Information Engineering (ECIE). IEEE, 2024. http://dx.doi.org/10.1109/ecie61885.2024.10627487.

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Hou, Daizheng, Yanfei Zhang, and Yafu Zhou. "A Novel Heat Dissipation Optimization Design Scheme of Printed Circuit Board." In 2024 3rd International Conference on Energy, Power and Electrical Technology (ICEPET). IEEE, 2024. http://dx.doi.org/10.1109/icepet61938.2024.10627435.

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Otto, Simon, Andreas Lauer, Achim Bahr, Pia Bergtholdt, David Schaefer, and Winfried Simon. "Reflection Surface Modeling using the Equivalent Circuit FDTD Scheme with Sheet Impedances." In 2024 Asia-Pacific Microwave Conference (APMC). IEEE, 2024. https://doi.org/10.1109/apmc60911.2024.10867624.

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Chang, Che-Jui, and Yin-Tsung Hwang. "Efficient Image Alignment Scheme for Automated Optical Inspection of Printed Circuit Boards." In 2024 IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia). IEEE, 2024. https://doi.org/10.1109/icce-asia63397.2024.10774058.

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Tao, Qiuyu, Jiabao Ye, Xuecheng Cui, et al. "A Novel High Speed Low Power Differential Circuit-Based FRAM Read Scheme." In 2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT). IEEE, 2024. https://doi.org/10.1109/icsict62049.2024.10831211.

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Fedorov, A. "New Excitation Regimes and Pump Modes for Discharge Excimer Lasers." In The European Conference on Lasers and Electro-Optics. Optica Publishing Group, 1998. http://dx.doi.org/10.1364/cleo_europe.1998.cthh9.

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In this review, a possibility of efficient quasi-stationary excitation regime is shown basing on experimental data obtained by the author and by other research groups. This regime is provide by multi-circuit excitation schemes with different UV sources and results in long optical pulses [1,2]. The self-sustained discharge is necessary to obtain this regime depending from buffer gas, discharge current density, duration of UV-pulse and resonator. Multi-circuit excitation circuits with automatic stabilized preionization sources and back up. For instance, in Ne-based mixtures three-circuit scheme
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S, Riju, and Soni Meera G. V. "High Speed Built in Self-Test via Pattern Generation." In The International Conference on scientific innovations in Science, Technology, and Management. International Journal of Advanced Trends in Engineering and Management, 2023. http://dx.doi.org/10.59544/lgqz5151/ngcesi23p122.

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This paper presents the built-in self-test (BIST) design of a C-testable high-speed carry-free divider which can be fully tested by 72 test patterns irrespective of the divider size. Using a graph labelling scheme, the test patterns, expected outputs, and control signals can be represented by sets of labels and generated by a simple circuitry. As a result, test patterns can be easily generated inside chips, responses to test patterns need not to be stored, and use of expensive test equipment is not necessary. Results show that the hardware cost for generating such labels is virtually constant
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Tsuchiya, Yosuke, Teppei Matsuzaki, Tetsuo Takeshige, and Tsuyoshi Oguchi. "Development of Cost Advantageous Designs for Headlight System Using Light Emitting Diodes." In JSAE/SAE 2015 Small Engine Technologies Conference & Exhibition. Society of Automotive Engineers of Japan, 2015. http://dx.doi.org/10.4271/2015-32-0750.

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&lt;div class="section abstract"&gt;&lt;div class="htmlview paragraph"&gt;So far, the application of LED headlights to the motorcycle has been limited for only high-priced models, because LED light units and the drivers are expensive. In our development, the cost reduction of light source units was examined by implementing multiple medium intensity LEDs. Distributed mounting scheme was created for LEDs placed on the circuit board to meet the heat dissipation requirement without a heat sink, which is usually installed. By new mounting scheme, the requirement of heat dissipation has been success
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Musa, Mohammed H. H., Abdelaziz Y. M. Abbas, and Abu Sabah I. A. Ahmed. "Cross-Country, Evolving, and Inter-Circuit Relaying Scheme for Double-Circuit Transmission Line." In 2020 International Conference on Computer, Control, Electrical, and Electronics Engineering (ICCCEEE). IEEE, 2021. http://dx.doi.org/10.1109/iccceee49695.2021.9429581.

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Sekine, Tadatoshi, and Hideki Asai. "Generalized leapfrog scheme for large-scale circuit simulation." In 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS). IEEE, 2009. http://dx.doi.org/10.1109/epeps.2009.5338473.

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Reports on the topic "Circuit scheme"

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Zarza, E., D. Alarcón, M. Frasquet, and P. Saini. Integration schemes and BOPs more commonly used in commercial SHIP applications. IEA SHC Task 64, 2022. http://dx.doi.org/10.18777/ieashc-task64-2022-0001.

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The main objective of the Subtask B in the new Task 64/IV is the definition of modularized and normalized components/subsystems for applications in the field of Solar Heat for industrial Processes (SHIP), e.g. for the balance of plant (BOP), solar field, thermal energy storage and hydraulic circuit.
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Yang, Yu, Hen-Geul Yeh, and Cesar Ortiz. Battery Management System Development for Electric Vehicles and Fast Charging Infrastructure Improvement. Mineta Transportation Institute, 2024. http://dx.doi.org/10.31979/mti.2024.2325.

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The electric vehicle (EV) has become increasingly popular due to its being zero-emission. However, a significant challenge faced by EV drivers is the range anxiety associated with battery usage. Addressing this concern, this project develops a more efficient battery management system (BMS) for electric vehicles based on a real-time, state-of-charge (SOC) estimation. The proposed study delivers three modules: (1) a new equivalent circuit model (ECM) for lithium-ion batteries, (2) a new SOC estimator based on the moving horizon method, and (3) an on-board FPGA implementation of the classical Cou
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HACHE, J. M. Acceptance test procedure for removal of CS1K circuit switcher block and trip schemes. Office of Scientific and Technical Information (OSTI), 1999. http://dx.doi.org/10.2172/797710.

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Segletes, Steven. The Use of Engineering Circuit Analysis to Describe the Joule-Heating Distribution of Several Electrical-Conductivity Averaging Schemes for Mixed Computational Cells. DEVCOM Army Research Laboratory, 2021. http://dx.doi.org/10.21236/ad1135713.

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Payment Systems Report - June of 2021. Banco de la República, 2022. http://dx.doi.org/10.32468/rept-sist-pag.eng.2021.

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Banco de la República provides a comprehensive overview of Colombia’s finan¬cial infrastructure in its Payment Systems Report, which is an important product of the work it does to oversee that infrastructure. The figures published in this edition of the report are for the year 2020, a pandemic period in which the con¬tainment measures designed and adopted to alleviate the strain on the health system led to a sharp reduction in economic activity and consumption in Colom¬bia, as was the case in most countries. At the start of the pandemic, the Board of Directors of Banco de la República adopted
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