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Ogalde, Ortiz José Alberto. "Diseño e implementación de un experimento de electrónica fuera del equilibrio a bordo de un nanosatélite de baja órbita." Tesis, Universidad de Chile, 2019. http://repositorio.uchile.cl/handle/2250/170852.
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Tesis para optar al grado de Magíster en Ciencias de la Ingeniería, Mención EléctricaMemoria para optar al título de Ingeniero Civil Eléctrico
Históricamente, la mecánica estadística ha creado herramientas para describir la evolución de sistemas y procesos en equilibrio termodinámico. Sin embargo, los procesos del mundo real no siempre ocurren en condiciones de equilibrio. La turbulencia en fluidos, la materia granular y las máquinas moleculares son sistemas que tienen que lidiar constantemente con esta condición. En base a esto, se han desarrollado herramientas ampliamente utilizadas por la comunidad científica, conocidas como los Teoremas de Fluctuación. No obstante, se ha demostrado -mediante experimentos y simulaciones- que dichos teoremas no son válidos incluso en sistemas de primer orden. Especificamente en [1], se demostró que para un circuito RC fuera del equilibrio, las fluctuaciones de potencia inyectada se atañen a los teoremas de fluctuación solamente si la magnitud de las fluctuaciones son acotadas a un rango específico, lo cual rápidamente deja de ser cierto al aumentar la magnitud del forzante. En vista de esta problemática, este trabajo de tesis busca ampliar la investigación anterior mediante la exposición de un circuito RC a un ambiente espacial. El objetivo principal es desarrollar un experimento que se inserta como carga útil o payload para el nanosatélite SUCHAI. Y además se busca medir los cambios en las fluctuaciones de potencia inyectada con respecto al ambiente espacial. Este payload forma parte de la misión de SUCHAI y conforma la primera iteración de una familia de experimentos electrónicos que permiten acceder al espacio a tiempo real y a costos accesibles. Los resultados obtenidos muestran que es posible forzar un circuito RC a un estado fuera del equilibrio bajo las restricciones del Cubesat. Sin embargo, los datos satelitales no muestran diferencias sustanciales con respecto a las fluctuaciones en tierra. Con respecto al escenario descrito, se realizaron pruebas en ambientes controlados de presión (5 · 10 −6 y 760 [Torr]) y temperatura (−30 ◦ C a 45 ◦ C); donde simultáneamente se comparó la decisión de utilizar un generador de señales y un osciloscopio para excitar y medir el circuito. Estos datos tampoco muestran una diferencia en las fluctuaciones generada por los cambios de presión y tempe- ratura. En una prueba final, se propuso medir un RC equivalente independiente al satélite y además filtrar la respuesta del generador de señales desde 20 MHz a 1.8 KHz, donde se logró percibir cambios considerables en las fluctuaciones debido al cambio de presión atmosférica. En conclusión, se establece la posibilidad de forzar un circuito RC a un estado fuera del equilibrio de forma controlada dentro de un Cubesat. Además, se demuestra la resilencia de los componentes RC comerciales de tecnología SMD a los cambios de presión y temperatura. Por otra parte, la elección de instrumentos de excitación (generador de números aleatorios y DAC), junto los instrumentos de medición (ADC) y el espectro del forzante para el ex- perimento deben ser probados anteriormente en ambientes controlados como una cámara de termovacío, para así validar la factibilidad de medir el ambiente mediante este enfoque.
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Al-Khaleel, Mohammad D. "Optimized waveform relaxation methods for RC type circuits." Thesis, McGill University, 2002. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=78235.
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The waveform relaxation method is a very efficient and reliable method, it has been widely used in several fields including circuit theory, for solving large systems of ordinary differential equations as well as partial differential equations. The convergence rate of the classical waveform relaxation approach is not uniform over the time interval for which the equations are integrated. A new approach called the optimized waveform relaxation approach was proposed with a remarkable and great improvement in the convergence behavior by introducing new transmission conditions. Here, we continue the work done on the optimized waveform relaxation by extending previous results and trying to get a better performance as well as a more general optimized waveform relaxation approach. We use two RC circuits to illustrate the theory and the performance obtained by improving the convergence behavior of the new algorithm.
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Takagi, Kentaro, Ichiro Jikuya, Gou Nishida, Maschke Bernhard, and Kinji Asaka. "A study on the discretization of a distributed RC circuit model." IEEE, 2008. http://hdl.handle.net/2237/13888.
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Goldman, Matthew 1965. "A low sensitivity dual feedback active RC bandpass filter." Thesis, The University of Arizona, 1989. http://hdl.handle.net/10150/277139.
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This thesis presents the analysis and characterization of a low sensitivity dual feedback active RC bandpass filter. Chapter 2 details the analysis of the network and a method of simplifying the resultant transfer function by a single pole/zero cancellation. Chapter 3 characterizes the simplified transfer function through an analysis of the quality factor and of the center frequency gain as functions of the individual variables of the circuit. It also details sensitivity analyses of these characteristic quantities and a stability analysis. Lastly, chapter 3 presents graphical representations of the equations developed so that they can be used as design tools. It then goes through the details of applying these graphs to an example network. Chapter 4 explains the differences between experimental data and predicted data by discussing some of the nonlinearities neglected in the original analysis. Finally chapter 5 restates the design technique in light of the predominant nonlinearities.
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Bottesi, Marilda Solon Teixeira 1955. "Estudo da sensibilidade de filtros ativos RC de 2ª ordem usando VCVS." [s.n.], 1986. http://repositorio.unicamp.br/jspui/handle/REPOSIP/259136.
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Orientador: Helio Drago RomanoDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica
Made available in DSpace on 2018-07-14T06:02:08Z (GMT). No. of bitstreams: 1 Bottesi_MarildaSolonTeixeira_M.pdf: 6315052 bytes, checksum: 0eb12b8f9f20873aed73fcf40df6805e (MD5) Previous issue date: 1986
Resumo: Neste trabalho apresentamos inicialmente as figuras de sensibilidade através das quais foi possível calcular a sensibilidade dos filtros ativos RC de 2ª Ordem sob vários aspectos. Para tanto foram mostradas as principais estruturas elementares de filtros ativos e os elementos ativos que as compõem. A partir dessa visão global, particularizamos o estudo para filtros com fontes controladas (VCVS), mostrando como sintetizar estruturas elementares através das Funções de Transferência e de Drivingpoint e finalmente calculando as Figuras de Sensibilidade para cada estrutura apresentada. Os resultados obtidos foram colocados em uma tabela de maneira que um projetista por exemplo, possa calcular a sensibilidade de um determinado filtro apenas por substituição dos valores de seus parâmetros
Mestrado
Mestre em Engenharia Elétrica
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Theophanous, Theophanis. "Moisture measurements in concrete and characterization using impedance spectroscopy and RC network circuits." Diss., Virginia Tech, 2008. http://hdl.handle.net/10919/27945.
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The importance of moisture in concrete is unquestionable. However, quantifying the moisture in concrete is very difficult as concrete microstructure water interactions are not well understood. Concrete is a very complex material spanning the range from the atom to the civil infrastructure. It is the medium that controls moisture at the FRP/concrete interface. Concrete is also a composite material at the level of concrete/rebar, aggregate/sand/cement paste and at the hydration product level.
Water is vital in concrete microstructure development, properties and concrete durability. A moisture sensor based on the dielectric and resistive properties of cement paste was developed. Impedance spectroscopy techniques are used to explore the moisture behavior in relation to dielectric and resistive properties of the sensors. The sensor capacitive response is frequency dependent and it has been described with a multi-linear curve. Resistance values are related to capacitance through a power Law. Both the capacitance/moisture and capacitance/resistance behaviors were observed in all four cement/sand/aggregate mixtures considered.
Although the dielectric constants of water and dry cement paste are not frequency dependent with in the 400 kHz and 10 MHz frequencies considered, the effective dielectric constant of the mixture is frequency dependent
Mixing rules cannot predict the effective dielectric constant of the dielectric medium used in the sensors. Impedance analysis indicated also multiple time constants exist within the cement paste. Using the observation from the experimental results in conjunction to the high conductivity of cement pore solution a random R-C network model was developed to explore the impedance behavior of cement paste.Ph. D.
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Filippone, Michele. "THEORIE DE LIQUIDE DE FERMI DU CIRCUIT RC QUANTIQUE AVEC DES INTERACTIONS FORTES." Phd thesis, Ecole Normale Supérieure de Paris - ENS Paris, 2013. http://tel.archives-ouvertes.fr/tel-00908428.
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Cette thèse développe une théorie effective de liquide de Fermi pour décrire la dynamique électronique dans un circuit RC quantique dans des régimes de forte interaction. Ce dispositif est composé d'une boîte quantique connectée à un réservoir d'électrons par un point de contact quantique. La boîte quantique est aussi couplée capacitivement à une grille métallique. Ce dispositif n'admet pas de courant continu, mais seulement un courant alternatif. Son comportement est analogue à celui d'un circuit RC classique et ne respecte pas les lois de Kirchhoff si le transport est cohérent. La résistance de relaxation de charge est universellement fixée à R_q = h/2e^2 , sans dépendre de l'ouverture du point de contact quantique, différement de ce qui est observé en transport direct. Nous étudions des régimes de blocage de Coulomb, provoqués par les fortes interactions électroniques. Nous démontrons que la dynamique électronique est sans interactions de façon effective à basse énergie. Nous prouvons la validité d'une formule de Korringa-Shiba généralisée, prédisant l'universalité de R_q même en présence de fortes interactions. Nous étudions aussi les comportements non universels de R q causés par la présence d'un champ magnétique. Une attention particulière est dédiée à la physique Kondo. Nous démontrons l'existence d'un pic géant pour R q , correspondant à la destruction du singulet Kondo. Notre approche est étendue à des dispositifs de symétrie SU(4), respectée par des boîtes quantiques avec dégénérescence orbitale. En appliquant les méthodes analytiques ici dévéloppées, nous dérivons l'expression exacte de la température Kondo dans le cas avec symétrie SU(4).
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Renault, Patricia. "Méthodes de réduction de réseaux RC appliquées aux outils de vérification de circuits submicroniques." Paris 6, 2003. http://www.theses.fr/2003PA066579.
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Lee, Wai Kit. "Modeling the distributed RC effects of BiCMOS technology at high frequency operations /." View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ECED%202006%20LEE.
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Deville, Yannick. "Filtres actifs RC hyperfréquences intégrés sur arséniure de gallium." Grenoble 1, 1989. http://www.theses.fr/1989GRE10015.
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Les filtres etudies sont en grande partie des filtres d'ordre 2: filtres passe-bande a forte selectivite, filtre coupe-bande, filtres passe-tout. Ces filtres passe-tout ont ete utilises pour realiser des dephaseurs 90**(o) large bande
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Lasanen, K. (Kimmo). "Integrated analogue CMOS circuits and structures for heart rate detectors and other low-voltage, low-power applications." Doctoral thesis, Oulun yliopisto, 2011. http://urn.fi/urn:isbn:9789514294556.
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Abstract This thesis describes the development of low-voltage, low-power circuit blocks and structures for portable, battery-operated applications such as heart rate detectors, pacemakers and hearing-aid devices. In this work, the definition for low supply voltage operation is a voltage equal to or less than the minimum supply voltage needed to operate an analogue switch, i.e. VDD(min) ≤ 2VT + Vov, which enables the use of a single cell battery whose polar voltage is 1 – 1.5 V. The targeted power consumption is in a range of microwatts. The design restrictions for analogue circuit design caused by the low supply voltage requirement of the latest and future CMOS process technologies were considered and a few circuit blocks, namely two operational amplifiers, a Gm–C filter and a bandgap voltage reference circuit, were first designed to investigate their feasibility for the above-mentioned low-voltage and low-power environment. Two operational amplifiers with the same target specifications were designed with two different types of input stages, i.e. a floating-gate and a bulk-driven input stage, in order to compare their properties. Based on the experiences collected from the designed circuit blocks, an analogue CMOS preprocessing stage for a heart rate detector and a self-calibrating RC oscillator for clock and resistive/capacitive sensor applications were designed, manufactured and tested. The analogue preprocessing stage for a heart rate detector includes a continuous-time offset-compensated preamplifier with a gain of 40 dB, an 8th-order switched-opamp switched-capacitor bandpass filter, a 32-kHz crystal oscillator and a bias circuit, and it achieves the required performance with a supply voltage range of 1.0 – 1.8 V and a current consumption of 3 μA. The self-calibrating RC oscillator operates with supply voltages of 1.2 – 3.0 V and achieves a tunable frequency range of 0.2 – 150 MHz with a total accuracy of ±1% within a supply voltage range of 1.2 – 1.5 V, a temperature range from -20 to 60 °C and a current consumption of less than 70 μA @ 5 MHz with external high precision resistor and capacitor. The measurement results prove that the developed low-voltage low-power analogue circuit structures can achieve the required performance and therefore be successfully implemented with modern CMOS process technologies with limited supply voltagesTiivistelmä Tämä väitöskirja käsittelee matalan käyttöjännitteen pienitehoisten piirirakenteiden kehittämistä kannettaviin, paristokäyttöisiin sovelluksiin kuten esimerkiksi sykemittareihin, sydämen tahdistimiin ja kuulolaitteisiin. Matalalla käyttöjännitteellä tarkoitetaan jännitettä, joka on pienempi tai yhtäsuuri kuin analogisen kytkimen tarvitsema pienin mahdollinen käyttöjännite, VDD(min) ≤ 2VT + Vov, joka mahdollistaa piirin toiminnan yhdellä paristolla, jonka napajännite on 1 – 1,5 V. Tavoiteltu tehonkulutus on mikrowattiluokkaa. Piirirakenteiden suunnittelussa otettiin huomioon viimeisimpien ja lähitulevaisuuden CMOS-valmistusteknologioiden aiheuttamat matalan käyttöjännitteen erityisvaatimukset ja niiden pohjalta kehitettiin aluksi kaksi erilaista operaatiovahvistinta, GmC-suodatin, ja bandgap-jännitereferenssi. Operaatiovahvistimet toteutettiin samoin tavoitevaatimuksin kahdella eri tekniikalla käyttäen toisen vahvistimen tuloasteessa ns. kelluvahilaisia tulotransistoreita ja toisen tuloasteessa ns. allasohjattuja tulotransistoreita. Kehitetyistä rakenteista saatujen kokemusten pohjalta suunniteltiin, valmistettiin ja testattiin kaksi erilaista CMOS-teknologialla toteutettua mikropiiriä, jotka olivat analoginen esikäsittelypiiri sydämen sykkeen mittaukseen ja itsekalibroiva RC-oskillaattori resistiivisiin/kapasitiivisiin sensorisovelluksiin. Sydämen sykkeen esikäsittelypiiri sisältää jatkuva-aikaisen, offset-kompensoidun esivahvistimen, jonka vahvistus on 40 dB, kytketyistä kapasitansseista ja kytketyistä operaatiovahvistimista koostuvan kahdeksannen asteen kaistanpäästösuodattimen, 32 kHz kideoskillaattorin ja bias-piirin. Esikäsittelypiiri saavuttaa vaadittavan suorituskyvyn 1,0 – 1,8 V käyttöjännitteellä ja 3 μA virrankulutuksella. Itsekalibroivan RC-oskillaattorin käyttöjännitealue puolestaan on 1,2 – 3,0 V ja käyttökelpoinen taajuusalue 0,2 – 150 MHz. Ulkoista tarkkuusvastusta ja kondensaattoria käytettäessä oskillaattori saavuttaa ±1 % tarkkuuden 1,2 – 1,5 V käyttöjännitteillä ja -20 – 60 °C lämpötila-alueella virrankulutuksen jäädessä alle 70 μA @ 5 MHz. Mittaustulokset osoittavat, että kehitetyt matalan käyttöjännitteen pienitehoiset analogiset rakenteet saavuttavat vaadittavan suorituskyvyn ja voidaan näin ollen menestyksekkäästi valmistaa moderneilla matalan käyttöjännitteen CMOS-teknologioilla
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Bratti, Vatison Mauro. "Desenvolvimento de um kit didático experimental para o ensino de resistores, capacitores e circuitos de temporização RC." Universidade Tecnológica Federal do Paraná, 2018. http://repositorio.utfpr.edu.br/jspui/handle/1/3092.
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Acompanha: Produto educacional: Desenvolvimento de um kit didático experimental para o ensino de resistores, capacitores e circuitos de temporização RCCoordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)
O Ensino de Física tem sofrido inúmeras transformações nas últimas décadas, discute-se muito sobre a inserção de diferentes recursos didáticos em sala de aula a fim de gerar um ambiente de aprendizagem diferente do tradicional, bem como proporcionar condições de uma aprendizagem efetiva para o aluno. O sistema tradicional do ensino de Física vem perdendo aos poucos a eficácia, o significado e até mesmo o interesse por parte do aluno em buscar conhecimento. O convívio constante com as mídias de maneira inapropriada tem provocado uma imensa perda de tempo, tornando-se um adversário desleal contra o estudo, restando assim pouco tempo para a aprendizagem. Nesse sentido, esse trabalho tem como objetivo o desenvolvimento de um novo método com uma proposta experimental e investigativa, baseado na teoria de Vygotsky, visando despertar no educando o interesse e a busca pelo saber, uma vez que ele é parte principal do processo, e que a partir de seus conhecimentos prévios é que o professor introduz seu conhecimento, proporcionando melhor interação entre professor e aluno, e também propiciando o desenvolvimento cognitivo e social no ambiente escolar. O kit didático experimental desenvolvido torna-se uma ferramenta de grande valia, que possibilita ao professor trabalhar um método diferenciado onde ele poderá relacionar a parte teórica com a parte prática, possibilitando com o kit trabalhar o conteúdo de resistores e capacitores por completo, de um modo que despertará no aluno um maior interesse. A tecnologia utilizada para o desenvolvimento do kit foi a plataforma de desenvolvimento Arduino que é composta por um microcontrolador e periféricos, devido ao fácil acesso a materiais didáticos disponíveis, possibilitando a fácil reprodução do protótipo futuramente por pessoas com pouco conhecimento na área e por ser uma plataforma open-source. Esse produto desenvolvido vem ao encontro das politicas de inclusão propostas pelos governos, que tem o objetivo de incluir na sociedade pessoas com necessidades educacionais especiais, pensando nisso, essa ideia vem contribuir e dar suporte a alunos com deficiências auditiva ou visual, bem como os demais alunos do ensino regular ou até mesmo superior, que necessitam estudar o conteúdo abordado aqui.
The teaching of physics has undergone numerous transformations in the last decades, much is discussed about the insertion of different didactic resources in the classroom in order to generate a learning environment different from the traditional one, as well as to provide conditions of an effective learning for the student. The traditional system of physics teaching has gradually lost its effectiveness, meaning and even the student's interest in seeking knowledge. The constant conviviality with the media in an inappropriate way has caused an immense loss of time, becoming an unfair opponent against the study, thus leaving little time for learning. In this sense, this work aims to develop a new method with an experimental and investigative proposal, based on Vygotsky's theory, aiming to awaken in the student the interest and the search for knowledge, since it is a main part of the process, and that from their previous knowledge is that the teacher introduces their knowledge, providing better interaction between teacher and student, and also fostering cognitive and social development in the school environment. The developed experimental teaching kit becomes a valuable tool that allows the teacher to work a different method where he can relate the theoretical part to the practical part, allowing the kit to work the contents of resistors and capacitors completely, so that the student will be more interested. The technology used for the development of the kit was the Arduino development platform which is composed of a microcontroller and peripherals, due to the easy access to available didactic material, allowing the easy reproduction of the prototype in the future by people with little knowledge in the area and being a open-source platform. This developed product is in line with the inclusion policies proposed by governments, which aims to include people with special educational needs in society. With this in mind, this idea contributes to and supports students with hearing or visual impairments, as well as other students of regular or even higher education, who need to study the content covered here.
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Gabelli, Julien. "Mise en évidence de la cohérence quantique des conducteurs en régime dynamique." Phd thesis, Université Pierre et Marie Curie - Paris VI, 2006. http://tel.archives-ouvertes.fr/tel-00011619.
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Cette thèse est consacrée à l'étude expérimentale du transport dynamique cohérent dans des conducteurs mésoscopiques. Nous avons mis en oeuvre un dispositif expérimental permettant de mesurer pour la première fois l'admittance complexe de circuits quantiques à très basse température (30 mK) dans la gamme de fréquence 1-2 GHz avec une résolution en phase inférieure au degré. Nous avons alors répondu expérimentalement aux travaux théoriques de A. Prêtre, H. Thomas et M. Büttiker concernant le transport dynamique cohérentà travers un circuit RC mésoscopique quantique. Nous avons confirmé que la résistance de relaxation de charge d'un tel circuit est constante et égale au demi quantum de résistance h/2e^2. Cette étude a été suivie de la mesure de l'admittance d'un contact ponctuel quantique (CPQ) où nous avons mis en évidence un effet inductif des barres de Hall reliant le CPQ aux
contacts ohmiques et mesuré une inductance cinétique quantifiée. Une dernière partie de ce travail de thèse concerne la caractérisation de la statistique de photons émis par un conducteur à l'équilibre thermique. Nous avons démontré qu'il est possible, à l'aide d'une expérience de type Hanbury-Brown & Twiss sur des photons GHz, d'étudier la statistique quantique
des photons émis par un conducteur quantique.
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Fève, Gwendal. "Quantification du courant alternatif : la boîte quantique comme source d' électrons uniques subnanoseconde." Phd thesis, Université Pierre et Marie Curie - Paris VI, 2006. http://tel.archives-ouvertes.fr/tel-00119589.
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Cette thèse est consacrée à l'étude du transport dynamique subnanoseconde de chargesdans un conducteur quantique modèle : le circuit RC quantique. En appliquant des tensions
hyperfréquence sur une grille située au dessus d'une boîte quantique de taille submicronique,
on peut sonder la dynamique de transfert de charges de la boîte vers son réservoir. Dans
le régime linéaire, elle est caractérisée par une capacité quantique reliée à la densité d'états
de la boîte et une résistance de relaxation de charge constante et égale au demi quantum
de résistance h/2e^2 lorsqu'un seul mode de conduction est transmis du réservoir à la boîte. Je
me suis plus largement consacré à l'étude du régime non linéaire obtenu en appliquant des
tensions créneau d'amplitude comparable à l'énergie d'addition de la boîte (énergie nécessaire
pour ajouter une charge élémentaire). J'ai mis en évidence dans ce régime une quantification
du courant alternatif en unité de 2ef qui traduit l'émission et l'absorption par la boîte d'une
charge unique à chaque période du signal d'excitation. Ce dispositif fonctionne alors comme
une source d'électrons uniques analogue aux sources de photons uniques en optique. L'évolution
du temps d'émission de la charge par effet tunnel en fonction des différents paramètres
contrôlables (couplage de la boîte au réservoir, potentiel de la boîte ...) a été déterminée dans
une large gamme temporelle, de la centaine de picosecondes à la dizaine de nanosecondes. Ces
résultats sont en excellent accord avec un modèle théorique simple que j'ai développé durant
ma thèse. Ils ouvrent la voie à des expériences d'optique électronique à une seule particule.
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Nečasová, Gabriela. "Paralelní numerické řešení parciálních diferenciálních rovnic." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2014. http://www.nusl.cz/ntk/nusl-236119.
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This thesis deals with the topic of partial differential equations parallel solutions. First, it focuses on ordinary differential equations (ODE) and their solution methods using Taylor polynomial. Another part is devoted to partial differential equations (PDE). There are several types of PDE, there are parabolic, hyperbolic and eliptic PDE. There is also explained how to use TKSL system for PDE computing. Another part focuses on solution methods of PDE, these methods are forward, backward and combined methods. There was explained, how to solve these methods in TKSL and Matlab systems. Computing accuracy and time complexity are also discussed. Another part of thesis is PDE parallel solutions. Thanks to the possibility of PDE convertion to ODE systems it is possible to represent each ODE equation by independent operation unit. These units enable parallel computing. The last chapter is devoted to implementation. Application enables generation of ODE systems for TKSL system. These ODE systems represent given hyperbolic PDE.
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Kubát, Pavel. "Analogové elektronické emulátory obvodů neceločíselného řádu." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2021. http://www.nusl.cz/ntk/nusl-442475.
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Diploma thesis deals with circuits contain fractional-order elements. The first part of this paper deals with this problem, there were also described methods of design fractionalorder elements and types of circuits containing the fractiona-order elements which can be applied in practice. Used active elements for practical part can be found in the second chapter. Design of GIC circuits and implementation of fractional-order element inside the circuit are shown in the last chapture. Parasitic analysis and stability of frequency filter containing fractional-order element had been also described.
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Kadlčík, Libor. "Efektivní použití obvodů zlomkového řádu v integrované technice." Doctoral thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2020. http://www.nusl.cz/ntk/nusl-432494.
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Integrace a derivace jsou obvykle známy pro celočíselný řád (tj. první, druhý, atd.). Existuje ale zobecnění pro zlomkové (neceločíselné) řády, které lze implementovat pomocí elektronických obvodů zlomkového řádu (případně provést jejich aproximaci) a které poskytuje nový stupeň volnosti pro návrh elektronických obvodů. Obvody zlomkového řádu jsou obvykle aproximovány diskrétními součástkami pomocí RC struktur s velkými rozsahy odporů a kapacit, a tím se jeví nepraktické pro použití v integrovaných obvodech. Tato práce prezentuje implementaci obvodů zlomkového řádu v integerovaných obvodech a jejich praktické využití v této oblasti. Jsou použity prvky se soustředěnými parametry (např. RC žebřík) i prvky s rozprostřenými parametery (např. R-PMOScap, skládající se z nesalicidovaného proužku polykrystalického křemíku nad hradlovým oxidem); je použita pouze technologie typu analogvý CMOS bez dodatečných procesních kroků. Užití obvodů zlomkového řádu bylo demonstrováno realizací několika integrovaných napěťových regulátorů, v nichž obvody zlomkového řádu realizují řízení zlomkového řádu za účelem dosažení silné stejnosměrné regulace a dobré stability regulační smyčky - i bez použití kompenzační nuly nebo příliš vysoké externí kapacity (některé napěťové regulátory dovolují i zatěžovací kapacitou v rozsahu nula až nekonečno).
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Lale, Adem. "Architectures d'intégration mixte monolithique-hybride de cellules de commutation de puissance sur puces multi-pôles silicium et assemblages optimisés." Thesis, Toulouse 3, 2017. http://www.theses.fr/2017TOU30174/document.
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Actuellement, le module de puissance (convertisseur de puissance) standard hybride 2D est la technologie de référence qui domine le marché de la moyenne et de la forte puissance. Ce dernier se présente sous la forme d'un boitier à multi-puces discrètes. Les puces à semi-conducteur sont reliées entre elles par des faisceaux de wire-bonding (câblage par fils) pour former des cellules de commutation. La technologie d'interconnexion wire-bonding présente une grande maturité technologique, et ses modes de défaillance sont bien connus aujourd'hui. Toutefois, cette technologie est un facteur limitant en termes de performances électrique et thermomécanique, d'intégrabilité tridimensionnelle et de productivité. Ces travaux de thèse ont pour objectif de proposer et d'étudier de nouvelles architectures de convertisseurs de puissance très intégrés. Comparée à la technologie hybride, dite de référence, les architectures proposées visent à un degré d'intégration plus poussé, avec un effort d'intégration partagé et conjoint au niveau semi-conducteur (intégration monolithique) et au niveau assemblage (intégration hybride). L'intégration monolithique consiste à intégrer les interrupteurs formant les cellules de commutation dans de nouvelles architectures de puces, passant ainsi de la notion de puce dipôle à celle de macro-puce multi-pôle. L'intégration hybride repose sur le développement de nouvelles technologies de report et d'assemblage de ces macro-puces. Pour valider les trois nouvelles architectures d'intégrations proposées, la démarche a consisté dans un premier temps à étudier et valider le fonctionnement des nouvelles puces par des simulations SentaurusTM TCAD. Ensuite, les puces multi-pôles ont été réalisées en s'appuyant sur la filière IGBT disponible dans la plateforme de micro-fabrication du LAAS-CNRS. Pour finir, les puces ont été reportées sur des cartes PCB, afin de réaliser des circuits de conversions prototypes. La maille de commutation très intégrée proposée présente une inductance parasite inférieure au nanohenry, ce qui est remarquable comparée à ce qui est présenté dans l'état de l'art (env. 20 nH)Currently, the standard 2D hybrid power module (power converter) is the reference technology for the medium and high power market. This hybrid power module is a discrete multi-chip case. The semi-conductor chips are interconnected by wire-bonding to form switching cells. The wire-bonding interconnection technology is a limiting factor in terms of electrical and thermomechanical performances, three-dimensional integrability and productivity. The aim of this thesis is to study new architectures of very integrated power converters. Compared to the so-called hybrid reference technology, the proposed architectures aim at a greater degree of integration, with an integration at both the semi-conductor level (monolithic integration) and the packaging level (hybrid integration). Monolithic integration consists in integrating switching cells into new multi-terminal macro-chip architectures. Hybrid integration consists in developing of new technologies to assemble these macro-chips. To validate the different proposed integration architectures, the first step was to study and validate the operating modes of the new chips by SentaurusTM TCAD simulations. Then, the multi-terminal chips were realized in the micro and nanotechnology platform of LAAS-CNRS laboratory. Finally, the chips were bonded on PCB substrates to realize power converter circuit prototypes. The highly integrated switching loop presents a stray inductance loop lower than one nanohenry, wich is an important improvement as compared to the values reported in literature (about 20 nH)
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Lizama, Arcos Ignacio Esteban. "New gate drive unit concepts for IGBTs and reverse conducting IGBTs." Doctoral thesis, Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2017. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-231024.
Full textAbstract:
This work presents different novel gate drive unit (GDU) concepts for IGBT and reverse conducting IGBT (RC-IGBT). They have been experimentally tested with medium voltage class IGBT modules (1200...1700V/650…1400A) and a RC-IGBT module (1200V/200A). The switching behaviour of the RC-IGBT was investigated, and a new trigger pulse pattern to drive the RC-IGBT was developed, designed and implemented. The experimental results showed that the switching losses were reduced by 20% in the RC-IGBT compared to the switching losses of a standard diode.
Two novel schemes are introduced to estimate the collector current through the IGBT, based on the measurement of the voltage across the internal stray inductance of the IGBT module. Furthermore, a GDU concept was derived to balance the on-state collector currents of parallel-connected IGBTs, reducing the current imbalance to 5%. Also, a new fast short circuit protection method (FSCP) for IGBT modules was developed, designed and implemented in another GDU, allowing turning-off the considered IGBT in less than 1μs, reducing the IGBT stress. Another scheme implemented in a GDU features an improved gate current switching profile of the IGBT, which reduces the switching losses by 25% compared to the standard switching method. In order to reduce the conduction losses, a GDU with an increased turn-on gate-emitter voltage (larger than 20 V) was investigated. In the investigated IGBT, the on-state losses were reduced by 18% when a gate-emitter voltage of 35V is used compared to when a gate-emitter voltage of 15V is used.
All these new GDU concepts have been implemented with a simple and inexpensive electronic circuitry, which is an important feature for a possible industrial implementation.
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Huang, Guo-Xian, and 黃國賢. "RC Layout and Switched-Capacitor Circuit Design." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/84674006622000067969.
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碩士大葉大學
電機工程學系碩士班
92
The layout design is important in analog CMOS IC design flow. Having low susceptibility to digital noise and low sensitivity to process variation are necessary qualities for the layout design. Therefore, the layout design is always a time-consuming and manual task. In this thesis, we discuss the optimal layout design of resister and capacitor. Furthermore, we use TSMC 0.25um technology to implement various switched-capacitor circuits, such as inverter, adder, integrator, 1bit digital to analog converter, and sigma-delta modulator, and so on. Key words: RC layout、Switched-Capacitor Circuit、Sigma-Delta Modulator
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Zhang, Zi-Yang, and 張梓洋. "Study on the RC Delay Issues for the External Compensation AMOLED Circuit." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/why4xa.
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碩士國立交通大學
光電工程研究所
106
In this paper, we study on the RC delay issues for the external compensation method of Sentinel Voltage Control for AMOLED circuit with real-time feedback. This circuit has ramping bus and sensing bus to connect the pixel and the driver IC. Ramping bus is used to pass input signal, and sensing bus is used to pass sensing current. Since there are parasitic resistors and capacitors on the ramping bus and the sensing bus, the input signal and the sensing current can be affected by the RC delay. Because the proposed external compensation circuit is a real-time feedback, the delayed signal and wrong sensing current may cause serious problems in the circuit. In order to solve the problem of input signal delay, we propose two methods. The main concept of the first method is capacitive coupling, and the driving voltage is pulled back the expected value by capacitive coupling. The concept of the second method is to add a delay block to make the delay input signal of near end and far end be the same. We also propose a method to solve the effect of RC delay on the sensing bus. The concept of the method is to add an analog computer to correct the wrong sensing current to the right value. Finally, we propose two methods that deal with the effects of RC delay on the both buses. The first method uses the look-up table and delay time adjustment. The concept is to form a table with the near end data and use it for and far end. According to the required driving current, we select the best available sensing voltage in the table and make minor adjustment in the ramp stop time with a delay block. The second method is to adjust the near-end and far-end I-V converting factor with different component. For the same driving current, the sensing currents of the near and far ends translate to the same sensing voltage through different I-V converting component. Therefore, we make the external compensation AMOLED circuit useful even with the RC delay on buses.
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Chang, Chou-Wei, and 張朝偉. "DESIGN AND ANALYSIS OF RC-INVERTER-SUBSTRATE AND GATE TRIGGERING NMOS ESD PROTECTION CIRCUIT." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/76202639503916170644.
Full textAbstract:
碩士清雲科技大學
電子工程研究所
94
Grounded-gate NMOS devices are commonly used for ESD protection but its non-uniform current distribution problem will reduce its ESD performance. Gate-coupling technique that increases the gate bias and reduces the voltage of first trigger point enables uniform ESD current distribution. Because the gate-coupling style still has its weakness of gate over-driving problem. A substrate-and-gate-triggering style is proposed to overcome the over-driving problem. Substrate-and-gate-triggering structure not only improve the over-driving problem, its layout area consumption is only 1/3 smaller than that of gate-coupling technique. we further investigates an ESD detection circuit which uses an RC inverter with a MOS structure to distinguish the ESD pulse and drives this NMOS clamping device. The second breakdown current of the RC-inv-SGTNMOS is 2.95A which is almost 58% improvement from the GGNMOS case. As compared with the RC-inv-GCNMOS and RC-GCNMOS styles, the RC-inv-SGTNMOS has faster drain voltage response time and also a higher second breakdown current value without gate over-driving effect.
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Chang, Chou-Wei. "DESIGN AND ANALYSIS OF RC-INVERTER-SUBSTRATE AND GATE TRIGGERING NMOS ESD PROTECTION CIRCUIT." 2008. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0022-2305200802542000.
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Hsiao, Min-Chien, and 蕭民健. "Exploring Integrated Laboratory Instruction for General Physics Experiments — A Case Study of RC/RL Circuits." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/66432265463296660793.
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碩士國立臺灣大學
物理研究所
99
ABSTRACT The aim of the study was to design an integrated laboratory teaching system meeting the context in Taiwan – taking RC/RL basic AC circuit as the topic to design two integrated laboratory teaching models, including “manipulation skill training experiment – guided inquiry experiment – open guided inquiry experiment” and “manipulation skill training experiment – confirmatory experiment – open guided inquiry experiment.” ELVIS was used to replace traditional instrument. The main purpose was to explore the learning effects of the two teaching models on students, which included the influences of scientific concepts, instrument manipulation, problem solving, and experiment design on the students. In addition, the study also compared the differences between students’ learning that the two teaching models caused to realize the degrees students could accept about integrated laboratory teaching and ELVIS. Seventy four students attending the same general physics course participated in the group instruction of this study. All the data were collected and analyzed by a questionnaire, pre-test and post-test of learning effects, video recording at classroom, and experiment recording learning sheets. The results were as follows: I. Integrated Laboratory Teaching Models The two integrated laboratory teaching models were designed according to the effective teaching model by Dick & Reiser (1989): i. Instrument-training experiment - confirmatory experiment - open guided inquiry experiment ii. Instrument-training experiment – guided inquiry experiment - open guided inquiry experiment II. The two integrated laboratory teaching methods had significant effects on improving students’ learning. III. There was no significant difference between the two integrated laboratory teaching methods on improving students’ learning effects. IV. Students’ feelings and opinions about ELVIS i. ELVIS could elicit students’ attention and their willingness to conduct experiments. ii. ELVIS could make students feel it easy and convenient to conduct experiments. iii. Eighty percent of the students preferred to conduct experiments by ELVIS. iv. Students felt it important to be familiar with ELVIS before conducting experiments. v. Students felt it necessary to learn ELVIS for the first experiment. vi. Fifty percent of the students had confidence of using ELVIS to measure the nature of circuit elements and not being afraid of operating instruments. V. Students ‘feelings and opinions about integrated laboratory teaching i. Students felt that the first instrument learning course was helpful for experiments; besides, they would be more familiar with the manipulation of ELVIS after the teacher’s lecturing. ii. Students felt that the instructor’s guidance and lecture were helpful for learning. iii. Students could understand the meaning of the steps of experiments and the electricity concepts the experiments conveyed. iv. Group discussion could enhance learning. v. About the second experiment, A group students preferred confirmatory experiments, while for B group students, some of them preferred inquiry-based experiments, others preferred confirmatory experiments. vi. Integrated laboratory teaching could help students learn the ability of analyzing statistics and graphs, cultivate the ability of exploration, enhance learning effects, and investigate the nature of unknown circuit elements. vii. Students liked the entire experiment arrangement. viii. What students gained most in the integrated laboratory teaching included the understanding of electricity-related concepts and the manipulation of ELVIS, which was the goal of this teaching design.
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Wu, Meng-Chun, and 吳孟駿. "Frequency-Modulated Electrical Properties of InAs Quantum Dots Schottky Diode : Using Equivalent RC Circuit Model." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/uqd699.
Full textAbstract:
碩士國立交通大學
電子物理系所
105
There are two cases in this study. In the first case, we discuss frequency-modulated electrical properties of InAs/InGaAs dot-in-well layer embedded in a GaAs Schottky diode, and build the equivalent RC circuit model to explain this appearance. After we check the equivalent RC circuit model, we express the capacitance and conductance to frequency, and work out the capacitance of Schottky and QD, and finally simulate the C-f and G/f-f plots. In the second case, we discuss the capacitance of Schottky, capacitance of QD and resistance of QD in the different bias, and use the theoretical arithmetic to calculate the capacitance and barrier height of QD under zero bias. Then we compare the results of theoretical arithmetic with equivalent RC circuit model. To sum up, we use frequency-modulated electrical measurement for QD layer, which is located outside the depletion region, and then demonstrate the capacitance and resistance of QD with equivalent RC circuit model and theoretical arithmetic. As a result, we confirm the equivalent RC circuit model is correct.
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Yu, Jingjing. "Electromagnetic Interference (EMI) Resisting Analog Integrated Circuit Design Tutorial." Thesis, 2012. http://hdl.handle.net/1969.1/ETD-TAMU-2012-08-11687.
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This work introduces fundamental knowledge of EMI, and presents three basic features correlated to EMI susceptibility: nonlinear distortion, asymmetric slew rate (SR) and parasitic capacitance. Different existing EMI-resisting techniques are analyzed and compared to each other in terms of EMI-Induced input offset voltage and other important specifications such as current consumption.
In this work, EMI-robust analog circuits are proposed, of which the architecture is based on source-buffered differential pair in the previous publications. The EMI performance of the proposed topologies has been verified within a test IC which was fabricated in NCSU 0.5um CMOS technology. Experimental results are presented when an EMI disturbance signal of 400mV and 800mV amplitude was injected at the input terminals, and compared with a conventional and an existing topology. The tested maximal EMI-induced input offset voltage corresponds to -222mV for the new structure, which is compared to -712mV for the conventional one and -368mV for the one using existing source-buffered technique in literature. Furthermore the overall performances of the circuits such as current consumption or input referred noise are also provided with the corresponding simulation results.
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Pan, Sheng-Shiang, and 潘盛祥. "The Electrical Properties of Schottky Diode Modulated by Electrons Confined in InAs Quantum Dots：Using Equivalent RC Circuit Model." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/34855814166111760222.
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碩士國立交通大學
電子物理系所
102
In the study, the InAs/InGaAs quantum dots (QDs) growth under low temperature produces the EL2 defect. We discuss excess electrons accumulated in quantum dots (QDs) generate the potential drop, and the ability of electron confinement is enhanced by EL2 defect. Initially, the optical properties are studied by photoluminescence (PL), and the information of defect is found by deep level transient spectroscopy (DLTS). We observe the QDs with EL2 defect, the Capacitance-Voltage (C-V) performance were influenced obviously under illumination. Therefore, we assume the sample is the GaAs Schottky diode series connect with the QDs of capacitor property. We establish the equivalent RC circuit model, using the RS parallel connect with the Cs represent the GaAs Schottky diode, and the CQD represent the QDs. Under sweeping bias, we inference the Current-Voltage (I-V) relationship, that current and sweep rate are in direct proportion. Furthermore, we correct the Possion’s equation when the GaAs Schottky series connect with a capacitor. The capacitance is dependent on the RC time constant due to the applied bias contribute different ratio to two devices. The InAs QDs with EL2 defect sample were studied by C-V and I-V measurement under illumination, then the result is similar to the assumption of RC equivalent circuit. The response of capacitance and current are dependent on EL2 defect and light energy. Finally, we discuss the band bending around the QDs, and the EL2 defect induce the QDs with the property of capacitor.
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Lin, Chen-Hao, and 林真豪. "The Mechanism and Equivalent RC Circuit Model of Schottky Diode Modulated by Embedded InAs Quantum Dots under Illumination." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/06779337409686789747.
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碩士國立交通大學
電子物理系所
103
In this study, we discuss the mechanism of the apparently increased capacitance under illumination. The InAs/GaAs quantum dots (QDs) sample can be considered as a GaAs Schottky diode with InAs QDs, and the measured capacitance of Schottky diode can be influenced by the carriers stored in QDs. Since the photocurrent significant charges the QDs, the capacitance of Schottky diode can be apparently increased after illumination. An additional plateau is formed after illumination in C-V, and this new plateau is confirmed as the potential drop of charged quantum dots (QDs). Therefore, the QDs is considered as a capacitor, and the equivalent circuit modal can be build. Through the analysis of the modal, the effective capacitance of QDs can be determined as 4000 pF, and the determined capacitance is independent on illumination power. Besides, we found that the QDs can also be significant charged under high temperature. At last, an In0.14AlAs layer capping on the QDs can enhance the carrier confinement of QDs. So a larger capacitance of Schottky diode is measured for the QDs sample with thicker In0.14AlAs layer.
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Kulkarni, Raghavendra Laxman. "Analog Baseband Filters and Mixed Signal Circuits for Broadband Receiver Systems." Thesis, 2011. http://hdl.handle.net/1969.1/ETD-TAMU-2011-12-10550.
Full textAbstract:
Data transfer rates of communication systems continue to rise fueled by aggressive demand for voice, video and Internet data. Device scaling enabled by modern lithography has paved way for System-on-Chip solutions integrating compute intensive digital signal processing. This trend coupled with demand for low power, battery-operated consumer devices offers extensive research opportunities in analog and mixed-signal designs that enable modern communication systems.
The first part of the research deals with broadband wireless receivers. With an objective to gain insight, we quantify the impact of undesired out-band blockers on analog baseband in a broadband radio. We present a systematic evaluation of the dynamic range requirements at the baseband and A/D conversion boundary. A prototype UHF receiver designed using RFCMOS 0.18[mu]m technology to support this research integrates a hybrid continuous- and discrete-time analog baseband along with the RF front-end. The chip consumes 120mW from a 1.8V/2.5V dual supply and achieves a noise figure of 7.9dB, an IIP3 of -8dBm (+2dbm) at maximum gain (at 9dB RF attenuation).
High linearity active RC filters are indispensable in wireless radios. A novel feed-forward OTA applicable to active RC filters in analog baseband is presented.
Simulation results from the chip prototype designed in RFCMOS 0.18[mu]m technology show an improvement in the out-band linearity performance that translates to increased dynamic range in the presence of strong adjacent blockers.
The second part of the research presents an adaptive clock-recovery system suitable for high-speed wireline transceivers. The main objective is to improve the jitter-tracking and jitter-filtering trade-off in serial link clock-recovery applications. A digital state-machine that enables the proposed mixed-signal adaptation solution to achieve this objective is presented. The advantages of the proposed mixed-signal solution operating at 10Gb/s are supported by experimental results from the prototype in RFCMOS 0.18[mu]m technology.
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Huang, Chih-Pin, and 黃志斌. "The photocurrent suppressed by light-induced excess electrons in GaAsN/GaAs quantum well：Analysis of RC time constant of the equivalent circuit." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/q78hdz.
Full textAbstract:
碩士國立交通大學
電子物理系所
102
This study elucidates the carrier redistribution, electric field variation, formation mechanism of interior potential drop, and photocurrent suppression of GaAsN/GaAs quantum well (QW) under illumination. Initially, according to the photoluminescence (PL) and TEM analysis, thermal annealing ameliorates the N-composition fluctuation and decreases the amount of N-atoms clusters, resulting in the reduction of N-related localized states after thermal annealing. Moreover, thermal annealing enhances QW confinement of electrons. We apply capacitance-voltage (C-V) measurement to confirm that the sample after thermal annealing is resulting in a large rise of photocapacitance under illumination. Accroding to our model for light induced excess electrons in QW, we consider that the energy band can be divided into the Schottky band (The energy band between Schottky contact and QW) and the quantum band (The energy band around QW) under the illuminating energy of 1.32eV. Light induced excess electrons cause a temporary existence of net negative charge in QW when illumination achieving the steady-state, resulting in a rise of potential drop across the quantum band. In order to maintain the balance of potential drop across the energy band, the potential drop across the Schottky band must eventually decline, which decreases photocurrent from the top GaAs layer, the so-called “Photocurrent suppression”. This phenomenon can be observed in the various sweep rate of current-voltage (I-V) measurement at low temperature. If the sweep rate is slow, then the photocurrent suppression becomes significant. Furthermore, we analyze the various sweep rate of I-V measurements under different temperature. In these experiments, at low temperature, the rate of photocurrent suppression is slow, which is attributed to smaller charging current to the QW. As temperature increases, the rate of photocurrent suppression becomes faster because of increasing charging current. Thus, the different rate of photocurrent suppression is due to the different resistance of the equivalent circuit. The resistance is decreased with increasing temperature. On the other hand, according to the various sweep rate of I-V measurements under the illuminating energy of 1.22eV, we’ve also observed that the photocurrent suppression not only for top GaAs layer, but also for QW. This result indicates that energy states of QW are gradually occupied by electrons. These elecrtons work to decrease absorption and carrier generation, resulting in the decrease of photocurrent from GaAsN/GaAs QW.
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Lizama, Arcos Ignacio Esteban. "New gate drive unit concepts for IGBTs and reverse conducting IGBTs." Doctoral thesis, 2016. https://tud.qucosa.de/id/qucosa%3A30672.
Full textAbstract:
This work presents different novel gate drive unit (GDU) concepts for IGBT and reverse conducting IGBT (RC-IGBT). They have been experimentally tested with medium voltage class IGBT modules (1200...1700V/650…1400A) and a RC-IGBT module (1200V/200A). The switching behaviour of the RC-IGBT was investigated, and a new trigger pulse pattern to drive the RC-IGBT was developed, designed and implemented. The experimental results showed that the switching losses were reduced by 20% in the RC-IGBT compared to the switching losses of a standard diode.
Two novel schemes are introduced to estimate the collector current through the IGBT, based on the measurement of the voltage across the internal stray inductance of the IGBT module. Furthermore, a GDU concept was derived to balance the on-state collector currents of parallel-connected IGBTs, reducing the current imbalance to 5%. Also, a new fast short circuit protection method (FSCP) for IGBT modules was developed, designed and implemented in another GDU, allowing turning-off the considered IGBT in less than 1μs, reducing the IGBT stress. Another scheme implemented in a GDU features an improved gate current switching profile of the IGBT, which reduces the switching losses by 25% compared to the standard switching method. In order to reduce the conduction losses, a GDU with an increased turn-on gate-emitter voltage (larger than 20 V) was investigated. In the investigated IGBT, the on-state losses were reduced by 18% when a gate-emitter voltage of 35V is used compared to when a gate-emitter voltage of 15V is used.
All these new GDU concepts have been implemented with a simple and inexpensive electronic circuitry, which is an important feature for a possible industrial implementation.