Academic literature on the topic 'Circuits digitaux'

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Journal articles on the topic "Circuits digitaux"

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Alexeyev, Alexander A., and Michael M. Green. "Secure Communications Based on Variable Topology of Chaotic Circuits." International Journal of Bifurcation and Chaos 07, no. 12 (1997): 2861–69. http://dx.doi.org/10.1142/s0218127497001941.

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A new technique for synchronization of chaotic circuits is proposed. This technique, based on varying a circuit's overall topology rather than varying a set of continuous parameters, offers a possible resolution to the tradeoff between security and synchronizability inherent in existing chaotic systems. The encryption key is represented by a mapping from a set of nodes to a set of switches in the circuit. This method significantly improves reliability and can be easily interfaced to digital control circuits.
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Raman, Karthik, and Andreas Wagner. "The evolvability of programmable hardware." Journal of The Royal Society Interface 8, no. 55 (2010): 269–81. http://dx.doi.org/10.1098/rsif.2010.0212.

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In biological systems, individual phenotypes are typically adopted by multiple genotypes. Examples include protein structure phenotypes, where each structure can be adopted by a myriad individual amino acid sequence genotypes. These genotypes form vast connected ‘neutral networks’ in genotype space. The size of such neutral networks endows biological systems not only with robustness to genetic change, but also with the ability to evolve a vast number of novel phenotypes that occur near any one neutral network. Whether technological systems can be designed to have similar properties is poorly u
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Stavrinidou, Eleni, Roger Gabrielsson, Eliot Gomez, et al. "Electronic plants." Science Advances 1, no. 10 (2015): e1501136. http://dx.doi.org/10.1126/sciadv.1501136.

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The roots, stems, leaves, and vascular circuitry of higher plants are responsible for conveying the chemical signals that regulate growth and functions. From a certain perspective, these features are analogous to the contacts, interconnections, devices, and wires of discrete and integrated electronic circuits. Although many attempts have been made to augment plant function with electroactive materials, plants’ “circuitry” has never been directly merged with electronics. We report analog and digital organic electronic circuits and devices manufactured in living plants. The four key components o
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D., Vaithiyanathan, Megha Singh Kurmi, Alok Kumar Mishra, and Britto Pari J. "Performance analysis of multi-scaling voltage level shifter for low-power applications." World Journal of Engineering 17, no. 6 (2020): 803–9. http://dx.doi.org/10.1108/wje-02-2020-0043.

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Purpose In complementary metal-oxide-semiconductor (CMOS) logic circuits, there is a direct square proportion of supply voltage on dynamic power. If the supply voltage is high, then more amount of energy will be consumed. Therefore, if a low voltage supply is used, then dynamic power will also be reduced. In a mixed signal circuit, there can be a situation when lower voltage circuitry has to drive large voltage circuitry. In such a case, P-type metal-oxide-semiconductor of high-voltage circuitry may not be switched off completely by applying a low voltage as input. Therefore, there is a need f
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Pawase, Ramesh, and N. P. Futane. "MEMS Seismic Sensor with FPAA Based Interface Circuit for Frequency-Drift Compensation using ANN." International Journal of Reconfigurable and Embedded Systems (IJRES) 6, no. 2 (2018): 120. http://dx.doi.org/10.11591/ijres.v6.i2.pp120-126.

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<p>Electrochemical MEMS seismic sensor is limited by its non-ideality of frequency dependent characteristics hence interface circuits for compensation is necessary. The conventional compensation circuits are limited by high power consumption, bulky external hardware circuitry. In these methods digital circuits are also limited by inherent analog to digital conversion and vice versa which consumes significant power, acquires more size and limits speed. A Field programmable analog array (FPAA) overcomes these limitations and gives fast, simple and user friendly development platform with le
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Farmer, Hugo S. W. "How Do You Qualify as a Whistleblower Under The Dodd-Frank Act? Blowing the Whistle on a Circuit Split." Journal of Law and Commerce 36, no. 2 (2018): 101–30. http://dx.doi.org/10.5195/jlc.2018.139.

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Recently, a circuit split has arisen with regard to the Dodd-Frank Wall Street Reform and Consumer Protection Act. The circuit split concerns the question of what it takes for an individual to qualify as a “whistleblower” under the terms of the statute. This circuit split is surprising, as the Dodd- Frank Act purports to answer this question itself by providing a definition of this term, a definition which the Fifth Circuit has treated as being conclusive. Nonetheless, the Second and the Ninth Circuits have held that with respect to some, but not all, of the Dodd-Frank Act, this statutory “whi
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Jiménez, Alejandro Dueñas, and Francisco Jiménez Hernández. "Confirming the Signal Integrity in Transmission of Digital Signals on Microstrip Straight Circuits via the Eye Diagrams." JOURNAL OF ADVANCES IN PHYSICS 5, no. 1 (2014): 737–41. http://dx.doi.org/10.24297/jap.v5i1.1972.

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Because of the high volume of processing, transmission, and information storage, electronic systems presently requires faster clock speeds tosynchronizethe integrated circuits. Presently the “speeds” on the connections of a printed circuit board (PCB) are in the order of the GHz. At these frequencies the behavior of the interconnects are more like that of a transmission line, and hence distortion, delay, and phase shift- effects caused by phenomena like cross talk, ringing and over shot are present and may be undesirable for the performance of a circuit or system.Some of these phrases were
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Zhang, Xiao Feng, Fo Chang Xie, Guo Wei Yang, and Wei Zhang. "The Transceiver Circuit Design of Digital Ultrasonic System." Advanced Materials Research 834-836 (October 2013): 968–73. http://dx.doi.org/10.4028/www.scientific.net/amr.834-836.968.

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This paper introduces the design process of the digital ultrasonic transmission circuit: echo receiving circuit and the echo signal regulate circuit. Among them, outside 500 V DC - DC module for high voltage power input, use non-tuned type circuit design ultrasonic transmission circuit ; Select high voltage fast recovery diode FR107 design echo receiving limiter circuit; Using ultra-high speed, low noise, low distortion of the integrated operational amplifier MAX4104ESA design preamplifier circuits and the band-pass filter circuits; Using linear decibels, low noise, wide bandwidth, high gain a
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CARD, HOWARD C., DEAN K. McNEILL, CHRISTIAN R. SCHNEIDER, ROLAND S. SCHNEIDER, and BRION K. DOLENKO. "TOLERANCE OF ON-CHIP LEARNING TO VARIOUS CIRCUIT INACCURACIES." Journal of Circuits, Systems and Computers 08, no. 02 (1998): 315–27. http://dx.doi.org/10.1142/s0218126698000146.

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An investigation is made of the tolerance of various in-circuit learning algorithms to component imprecision and other circuit limitations in artificial neural networks. In contrast with most previous work, the various circuit limitations are treated separately for their effects on learning. Supervised learning mechanisms including backpropagation and contrastive Hebbian learning, and unsupervised soft competitive learning were found to be sufficiently tolerant of those levels of arithmetic inaccuracy, noise, nonlinearity, weight decay, and statistical variation from fabrication that we have e
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Ferreira Pontes, Matheus, Clayton Farias, Rafael Schvittz, Paulo Butzen, and Leomar Da Rosa Jr. "Survey on Reliability Estimation in Digital Circuits." Journal of Integrated Circuits and Systems 16, no. 3 (2021): 1–11. http://dx.doi.org/10.29292/jics.v16i3.568.

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The aggressive technology scaling has significantly affected the circuit reliability. The interaction of environmental radiation with the devices in the integrated circuits (ICs) may be the dominant reliability aspect of advanced ICs. Several techniques have been explored to mitigate the radiation effects and guarantee a satisfactory reliability levels. In this context, estimating circuit radiation reliability is crucial and a challenge that has not yet been overcome. For decades, several different methods have been proposed to provide circuit reliability. Recently, the radiation effects have
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Dissertations / Theses on the topic "Circuits digitaux"

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Krischer, Stefan. "Méthodes de vérification de circuits digitaux." Vandoeuvre-les-Nancy, INPL, 1994. http://www.theses.fr/1994INPL043N.

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Cette thèse propose des outils pour la vérification formelle de la correction de circuits matériels. Pour la vérification de la correction d'un circuit combinatoire par rapport a sa spécification, une nouvelle méthode pour spécifier des fonctions booléennes est présentée, les systèmes de réécriture booléens (BTRS), puis une transformation d'un BTRS en deux expressions booléennes est décrite qui permet de vérifier la correction, la complétude et la cohérence d'une spécification par rapport a une implémentation. Pour la vérification de circuits séquentiels, deux nouveaux algorithmes qui décident
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Archambeau, Éric. "Test fonctionnel des circuits intégrés digitaux." Grenoble INPG, 1985. http://tel.archives-ouvertes.fr/tel-00316164.

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L'objet de cette thèse est l'étude de deux méthodes de génération automatique de vecteurs de test pour les circuits intégrés digitaux. Après un rappel des problèmes actuels posés par le test des circuits VLSI (partie I), deux méthodes de génération automatique de vecteurs de test adressant deux types différents d'hypothèses de pannes sont présentées: une méthode heuristique de génération de vecteurs (partie II) et une méthode de test pseudo-exhaustif (partie III)
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Archambeau, Eric Saucier Gabrièle. "Test fonctionnel des circuits intégrés digitaux." S.l. : Université Grenoble 1, 2008. http://tel.archives-ouvertes.fr/tel-00316164.

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Láník, Jan. "La réduction de consommation dans les circuits digitaux." Thesis, Université Grenoble Alpes (ComUE), 2016. http://www.theses.fr/2016GREAM016/document.

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Le sujet de cette thèse est la réduction de consommation dans les circuits digitaux, et plus particulièrement dans ce cadre les méthodes basées sur la réduction de la fréquence de commutation moyenne, au niveau transistor. Ces méthodes sont structurelles, au sens où elles ne sont pas liées à l’optimisation des caractéristiques physique du circuit mais sur la structure de l’implémentation logique, et de ce fait parfaitement indépendantes de la technologie considérée. Nous avons développé dans ce cadre deux méthodes nouvelles. La première est basée sur l’optimisation de la structure de la partie
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Pierre, Laurence. "Représentation fonctionnelle et preuve automatisée de circuits digitaux." Aix-Marseille 1, 1990. http://www.theses.fr/1990AIX11308.

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L'objet de cette these est la verification formelle de circuits digitaux syndrones consideres au niveau transfert de registres. Le processus de preuve s'insere dans le systeme de cao cascade, ie les circuits sont decrits au moyen du hdl associe, et les descriptions sont transformees automatiquement de facon a satisfaire les formats d'entree des demonstrateurs mis en jeu pour la verification. Suivant le type de circuit a traiter, le processus de preuve choisit l'un des deux systemes de demonstration suivants le demonstrateur de tautologie tache, ou le systeme inductif de boyer-moore. Cette thes
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Girard, Patrick. "Diagnostic de pannes temporelles dans les circuits digitaux." Montpellier 2, 1992. http://www.theses.fr/1992MON20053.

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L'objet de cette these est le developpement d'une methodologie de diagnostic des pannes temporelles dans les circuits digitaux. Nous avons propose une alternative a l'utilisation de la simulation de fautes, basee sur l'analyse de chemins critiques. Les resultats obtenus ont permis de mettre en evidence la surete et la precision du processus de diagnostic
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Rogacki, Rémy. "Simulation symbolique de descriptions comportementales de circuits digitaux." Montpellier 2, 1992. http://www.theses.fr/1992MON20222.

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La simulation symbolique est une méthode de vérification dérivée de la simulation conventionnelle dans laquelle les valeurs numériques des entrées du modèle sont remplacées par des symboles. La simplification de ces valeurs symboliques constitue un point important d'une part, pour une mise en œuvre efficace de cette technique de simulation et, d'autre part, pour fournir des informations significatives au concepteur. Un simulateur symbolique de descriptions comportementales de circuits digitaux est présenté. Le mécanisme de simulation, adapté a la représentation interne de la description VHDL,
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Salem, Ashraf Mohamed El-Farghly. "Vérification formelle des circuits digitaux décrits en VHDL." Grenoble 1, 1992. http://tel.archives-ouvertes.fr/tel-00340910.

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L'objet de cette these est la verification formelle des circuits digitaux decrits en vhdl. Nous avons, en premier lieu restreint vhdl pour le rendre utilisable par les outils de preuve existants, en proposant un sous-ensemble, appele p-vhdl, afin de decrire les circuits combinatoires et les circuits sequentiels synchrones. Un tel sous ensemble a une semantique beaucoup plus simple que celle de vhdl complet. En fait, le retard delta a ete remplace par une simple fonction de sequencement. Et l'echelle de temps devient la periode de l'horloge. Ainsi, la machine d'etat fini a pu etre utilisee comm
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Salem, Ashraf Mohamed El-Farghly Borrione Dominique Caspi Paul Anceau François. "Vérification formelle des circuits digitaux décrits en VHDL." S.l. : Université Grenoble 1, 2008. http://tel.archives-ouvertes.fr/tel-00340910.

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Michel, Xavier. "Contribution à l'optimisation automatique de circuits digitaux CMOS submicroniques." Montpellier 2, 2003. http://www.theses.fr/2003MON20111.

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Books on the topic "Circuits digitaux"

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Bobyr', Maksim, Vitaliy Titov, and Vladimir Ivanov. Design of analog and digital devices. INFRA-M Academic Publishing LLC., 2020. http://dx.doi.org/10.12737/1070341.

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The textbook contains the material necessary for the formation of students ' knowledge of the basics of analog and digital circuitry and the principles of building digital nodes, instilling skills in the development and design of digital devices, as well as performing practical work and a course project in the discipline "electrical Engineering, electronics and circuit engineering". Methods of calculation of analog circuits and synthesis of discrete devices of combinational type and automata with memory are considered. Examples of calculation of analog circuits and implementation of digital de
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Shoji, Masakazu. Theory of CMOS digital circuits and circuit failures. Princeton University Press, 1992.

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Shoji, Masakazu. Theory of CMOS digital circuits and circuit failures. Princeton University Press, 1992.

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Sansen, Willy. Analog Circuit Design: MOST RF Circuits, Sigma-Delta Converters and Translinear Circuits. Springer US, 1996.

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Streib, William J. Digital circuits. Goodheart-Willcox Co., 1997.

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J, Adam L., ed. Digital circuits. E. Arnold, 1990.

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Abdelilah, Amalou. Digital circuits. Weber Systems, Inc., 1989.

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Streib, William J. Digital circuits. Goodheart-Willcox, 1990.

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Anthony, Zeppa, and Deem Bill R, eds. Digital circuits. Prentice-Hall, 1987.

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Digital electronic circuits. Prentice-Hall, 1988.

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Book chapters on the topic "Circuits digitaux"

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Islam, Mahfuzul, and Hidetoshi Onodera. "Monitor Circuits for Cross-Layer Resiliency." In Dependable Embedded Systems. Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-52017-5_16.

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AbstractCross-layer resiliency has become a critical deciding factor for any successful product. This chapter focuses on monitor circuits that are essential in realizing the cross-layer resiliency. The role of monitor circuits is to establish a bridge between the hardware and other layers by providing information about the devices and the operating environment in run-time. This chapter explores delay-based monitor circuits for design automation with the existing cell-based design methodology. The chapter discusses several design techniques to monitor parameters of threshold voltage, temperature, leakage current, critical delay, and aging. The chapter then demonstrates a reconfigurable architecture to monitor multiple parameters with small area footprint. Finally, an extraction methodology of physical parameters is discussed for model-hardware correlation. Utilizing the cell-based design flow, delay-based monitors can be placed inside the target digital circuit and thus a better correlation between monitor and target circuit behavior can be realized.
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Gastaldi, Roberto, and Giovanni Campardo. "Digital Circuits." In Electronic Experiences in a Virtual Lab. Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-45179-0_5.

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Báez-Lópe, David, and Félix E. Guerrero-Castro. "Digital Circuits." In Circuit Analysis with Multisim. Springer International Publishing, 2011. http://dx.doi.org/10.1007/978-3-031-79840-5_6.

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Schubert, Thomas F., and Ernest M. Kim. "Digital Circuits." In Fundamentals of Electronics. Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-031-79886-3_5.

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Deschamps, Jean-Pierre, Elena Valderrama, and Lluís Terés. "Combinational Circuits." In Digital Systems. Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-41198-9_2.

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Deschamps, Jean-Pierre, Elena Valderrama, and Lluis Terés. "Sequential Circuits." In Digital Systems. Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-41198-9_4.

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Tietze, Ulrich, Christoph Schenk, and Eberhard Gamm. "Digital-Analog and Analog-Digital Converters." In Electronic Circuits. Springer Berlin Heidelberg, 2008. http://dx.doi.org/10.1007/978-3-540-78655-9_18.

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Tietze, Ulrich, Christoph Schenk, and Eberhard Gamm. "Digital Filters." In Electronic Circuits. Springer Berlin Heidelberg, 2008. http://dx.doi.org/10.1007/978-3-540-78655-9_19.

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Sziray, József. "Test Generation for Short-Circuit Faults in Digital Circuits." In Studies in Computational Intelligence. Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-03206-1_21.

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Nixon, Mark S. "Logic Circuits." In Introductory Digital Design. Macmillan Education UK, 1995. http://dx.doi.org/10.1007/978-1-349-13508-0_3.

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Conference papers on the topic "Circuits digitaux"

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Karki, Sagar. "Systematic EFA Approach in Locating Floating Nodes in Analog Mixed Signal Devices." In ISTFA 2011. ASM International, 2011. http://dx.doi.org/10.31399/asm.cp.istfa2011p0359.

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Abstract With advancements in technology, it is nearly impossible to find the defects in integrated circuits without applying appropriate failure isolation techniques. Failure isolation is a critical step in identifying the physical defect on integrated circuits. This paper addresses the challenges imposed by floating node conditions on both analog and digital circuitry, and a case study for each circuit type is presented. Different approaches along with the challenges involved in isolating each case in a very timely manner are addressed. Finally, the usefulness of global isolation tools, such
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Gaber, Lamya, Aziza I. Hussein, and Mohammed Moness. "Incremental Automatic Correction for Digital VLSI Circuits." In 10th International Conference on Advances in Computing and Information Technology (ACITY 2020). AIRCC Publishing Corporation, 2020. http://dx.doi.org/10.5121/csit.2020.101508.

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The impact of the recent exponential increase in complexity of digital VLSI circuits has heavily affected verification methodologies. Many advances toward verification and debugging techniques of digital VLSI circuits have relied on Computer Aided Design (CAD). Existing techniques are highly dependent on specialized test patterns with specific numbers increased by the rising complexity of VLSI circuits. A second problem arises in the form of large sizes of injecting circuits for correction and large number of SAT solver calls with a negative impact on the resultant running time. Three goals ar
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Chao, Paul C. P., Li-Chi Hsu, and Trong-Hieu Tran. "A New Small-Sized Non-Dispersive Infrared (NDIR) Sensor and its Drive/Readout Circuits." In ASME 2016 Conference on Information Storage and Processing Systems. American Society of Mechanical Engineers, 2016. http://dx.doi.org/10.1115/isps2016-9562.

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A new miniaturized, non-dispersive, infrared (NDIR) sensor for CO2 intended to be installed in mobile phones and its drive/readout circuits are presented in this study. A typical NDIR sensor consists of three main components; an infrared (IR) light-emitter (light source), a gas chamber, a photo detector (PD) light receiver) and the associated drive/readout circuits. The geometry of the gas chamber is optimized to minimize the total module size to approximately 10 mm × 5 mm × 5 mm, which is much smaller than commercially-available gas sensors. Driver and readout circuits are successfully design
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Seo, Kuhn, Brent Wahl, Myrna Mayonte, and Young Gon Kim. "Methodologies for Isolating Faults in Multi Chip Fiber Optic Transceivers That Use GHz Mixed Signal ICs." In ISTFA 2002. ASM International, 2002. http://dx.doi.org/10.31399/asm.cp.istfa2002p0251.

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Abstract This paper outlines a methodology which accurately identifies fault locations in Mixed Signal Integrated Circuits (ICs). The architecture of Mixed Signal ICs demands more attention during failure analysis because of the complexity of measuring both the analog and digital signals in a compact circuit. In this paper, the GHz range of data signal or radio frequency (RF) signal from an internal IC circuit will be extracted by a high-impedance active single probe in order to find the internal IC circuit failure locations. The advantages of using a single probe is that it can maneuver to ex
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Byunghyun Jang, Jin Kyung Lee, Minsu Choi, and Kyung Ki Kim. "On-chip aging prediction circuit in nanometer digital circuits." In 2014 International SoC Design Conference (ISOCC). IEEE, 2014. http://dx.doi.org/10.1109/isocc.2014.7087599.

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Livramento, Vinícius Dos Santos, and José Luís Güntzel. "Timing Optimization During the Physical Synthesis of Cell-Based VLSI Circuits." In XXX Concurso de Teses e Dissertações da SBC. Sociedade Brasileira de Computação - SBC, 2017. http://dx.doi.org/10.5753/ctd.2017.3465.

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The evolution of CMOS technology made possible integrated circuits with billions of transistors assembled into a single silicon chip, giving rise to the jargon Very-Large-Scale Integration (VLSI). VLSI circuits span a wide range class of applications, including Application Specific Circuits and Systems-On-Chip. The latter are responsible for fueling the consumer electronics market, especially in the segment of smartphones and tablets, which are responsible for pushing hardware performance requirements every new generation. The required clock frequency affects the performance of a VLSI circuit
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"Session 31 Overview: Digital Circuit Techniques for Emerging Applications: Digital Circuits Subcommittee." In 2020 IEEE International Solid- State Circuits Conference - (ISSCC). IEEE, 2020. http://dx.doi.org/10.1109/isscc19947.2020.9063060.

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Sylvester, Dennis, Koji Hirairi, and Edith Beigne. "Session 18 overview: Adaptive circuits and digital regulators: Digital circuit techniques subcommittee." In 2018 IEEE International Solid - State Circuits Conference - (ISSCC). IEEE, 2018. http://dx.doi.org/10.1109/isscc.2018.8310302.

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Zamanlooy, B., A. Ayatollahi, S. M. Fakhraie, and M. Chahardori. "Investigating Different Circuit Styles for Digital Circuits Using Organic Transistors." In 2007 International Symposium on Integrated Circuits. IEEE, 2007. http://dx.doi.org/10.1109/isicir.2007.4441782.

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Yao, Zhipeng, Liangjun Ge, Kamil Abbas, and Zhou Shiliang. "The Comparison of the Transducer Circuits for the Two-Phase Flow Conductivity Probe." In 2016 24th International Conference on Nuclear Engineering. American Society of Mechanical Engineers, 2016. http://dx.doi.org/10.1115/icone24-60685.

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The void fraction of two-phase flow can be measured by conductivity probe due to the difference of conductivity between air and water. It’s difficult to detect the conductivity of the probe directly so transducer circuits should be used to transfer the conductivity to voltage, and the voltage can be sampled by DAQ device. Two transducer circuits are designed for two-phase flow double sensor conductivity probe. One is a simple DC circuit, it’s made up of a constant DC voltage and a resistance, and the resistance is cascaded with the probe. Voltage drop across the resistance is depend on conduct
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Reports on the topic "Circuits digitaux"

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Eckmann, S. T., and G. H. Chisholm. Assigning functional meaning to digital circuits. Office of Scientific and Technical Information (OSTI), 1997. http://dx.doi.org/10.2172/569121.

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Goldman, Susan R., and Gautam Biswas. Assessing Digital Circuit Design. Defense Technical Information Center, 1995. http://dx.doi.org/10.21236/ada297983.

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Averin, D. V. Semiconductor Single-Electron Digital Devices and Circuits. Defense Technical Information Center, 1993. http://dx.doi.org/10.21236/ada278338.

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Reddy, Sudhakar M. On Timing Faults in Digital Logic Circuits. Defense Technical Information Center, 1993. http://dx.doi.org/10.21236/ada268714.

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Allen, Jonathan. The Design of High-Performance Circuits for Digital Signal Processing. Defense Technical Information Center, 1990. http://dx.doi.org/10.21236/ada217786.

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Van Duzer, T., Stephen R. Whiteley, Lizhen Zheng, et al. Hybrid Josephson-CMOS Random Access Memory with Interfacing to Josephson Digital Circuits. Defense Technical Information Center, 2013. http://dx.doi.org/10.21236/ada596658.

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Van Duzer, Theodore. Novel Memory Structure for 4 K Operation with Interfacing to Josephson Digital Circuits. Defense Technical Information Center, 2010. http://dx.doi.org/10.21236/ada534898.

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Garris, Michael D., Mary T. Laamanen, Craig S. Russell, and Lawrence D. Nadel. Recommendation: closed circuit television (CCTV) digital video export profile - level 0. National Institute of Standards and Technology, 2016. http://dx.doi.org/10.6028/nist.ir.8161.

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Garris, Michael D., Mary T. Laamanen, Craig S. Russell, and Lawrence D. Nadel. Assessment of closed circuit television digital video recording and export technologies. National Institute of Standards and Technology, 2017. http://dx.doi.org/10.6028/nist.ir.8172.

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Malis, A., P. Pate, and D. Zelig. Synchronous Optical Network/Synchronous Digital Hierarchy (SONET/SDH) Circuit Emulation over Packet (CEP). Edited by R. Cohen. RFC Editor, 2007. http://dx.doi.org/10.17487/rfc4842.

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