Journal articles on the topic 'CMOS process'
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Yu, Ting, Ben Xian Peng, and Feng Qi Yu. "Absolute Pressure Sensor Based on Standard CMOS Process." Advanced Materials Research 875-877 (February 2014): 2238–42. http://dx.doi.org/10.4028/www.scientific.net/amr.875-877.2238.
Full textUchino, T., P. Ashburn, Y. Kiyota, and T. Shiba. "A CMOS-Compatible Rapid Vapor-Phase Doping Process for CMOS Scaling." IEEE Transactions on Electron Devices 51, no. 1 (2004): 14–19. http://dx.doi.org/10.1109/ted.2003.820643.
Full textJOUVET, N., M. A. BOUNOUAR, S. ECOFFEY, et al. "RECENT DEVELOPMENTS ON 3D INTEGRATION OF METALLIC SET ONTO CMOS PROCESS FOR MEMORY APPLICATION." International Journal of Nanoscience 11, no. 04 (2012): 1240024. http://dx.doi.org/10.1142/s0219581x12400248.
Full textLinares Aranda, Mónico, W. Calleja Arriaga, A. Torres Jacome, and C. R. Báez Álvarez. "A modular and generic monolithic integrated MEMS fabrication process." Superficies y Vacío 30, no. 3 (2017): 30–39. http://dx.doi.org/10.47566/2017_syv30_1-030030.
Full textHaond, M., M. T. Basso, E. deCoster, J. Guelen, and C. Lair. "Developing a 0.18-micron CMOS process." IEEE Micro 19, no. 5 (1999): 16–22. http://dx.doi.org/10.1109/40.798105.
Full textHallam, P., P. J. Mather, and M. Brouwer. "CMOS process independent propagation delay macromodelling." Electronics Letters 31, no. 9 (1995): 702. http://dx.doi.org/10.1049/el:19950476.
Full textPichler, P., A. Burenkov, J. Lorenz, C. Kampen, and L. Frey. "Future challenges in CMOS process modeling." Thin Solid Films 518, no. 9 (2010): 2478–84. http://dx.doi.org/10.1016/j.tsf.2009.09.150.
Full textYu, Le, Yaozu Guo, Haoyu Zhu, Mingcheng Luo, Ping Han, and Xiaoli Ji. "Low-Cost Microbolometer Type Infrared Detectors." Micromachines 11, no. 9 (2020): 800. http://dx.doi.org/10.3390/mi11090800.
Full textShawkat, Mst Shamim Ara, Mohammad Habib Ullah Habib, Md Sakib Hasan, Mohammad Aminul Haque, and Nicole McFarlane. "Perimeter Gated Single Photon Avalanche Diodes in Sub-Micron and Deep-Submicron CMOS Processes." International Journal of High Speed Electronics and Systems 27, no. 03n04 (2018): 1840018. http://dx.doi.org/10.1142/s0129156418400189.
Full textZhang, Chenyu, Nairui Hu, and Zhaoyang Liu. "The Simulation of the Terahertz Modulator by CMOS Process." Journal of Physics: Conference Series 2478, no. 6 (2023): 062038. http://dx.doi.org/10.1088/1742-6596/2478/6/062038.
Full textParameswaran, M., Lj Ristic, A. C. Dhaded, H. P. Baltes, W. Allegretto, and A. M. Robinson. "Fabrication of microbridges in standard complementary metal oxide semiconductor technology." Canadian Journal of Physics 67, no. 4 (1989): 184–89. http://dx.doi.org/10.1139/p89-032.
Full textMarfungah, Siti, and Suartini Suartini. "The Position Of Commitment-Making Officials As Legal Subjects In Disputes Over Construction Service Agreements In Indonesian Courts." Eduvest - Journal of Universal Studies 4, no. 11 (2024): 10015–25. http://dx.doi.org/10.59188/eduvest.v4i11.1603.
Full textLv, Hongming, Huaqiang Wu, Jinbiao Liu, et al. "Inverted process for graphene integrated circuits fabrication." Nanoscale 6, no. 11 (2014): 5826–30. http://dx.doi.org/10.1039/c3nr06904d.
Full textPoehls, L. M. Bolzani, M. C. R. Fieback, S. Hoffmann-Eifert, et al. "Review of Manufacturing Process Defects and Their Effects on Memristive Devices." Journal of Electronic Testing 37, no. 4 (2021): 427–37. http://dx.doi.org/10.1007/s10836-021-05968-8.
Full textKi, Donghan, Minwoong Lee, Namho Lee, and Seongik Cho. "Design and Validation of a V-Gate n-MOSFET-Based RH CMOS Logic Circuit with Tolerance to the TID Effect." Electronics 12, no. 15 (2023): 3331. http://dx.doi.org/10.3390/electronics12153331.
Full textWakita, Kosuke, Eiichi Sano, Masayuki Ikebe, et al. "Design and Fabrication of Terahertz Detectors Based on 180-nm CMOS Process Technology." International Journal of High Speed Electronics and Systems 25, no. 03n04 (2016): 1640014. http://dx.doi.org/10.1142/s0129156416400140.
Full textPerez, Maximiliano S., Betiana Lerner, Daniel E. Resasco, et al. "Carbon Nanotube Integration with a CMOS Process." Sensors 10, no. 4 (2010): 3857–67. http://dx.doi.org/10.3390/s100403857.
Full textBABA, Toshihiko. "Silicon Photonics Based on CMOS-Compatible Process." Review of Laser Engineering 42, no. 3 (2020): 223. http://dx.doi.org/10.2184/lsj.42.3_223.
Full textSwirhun, S. E., E. Sangiorgi, A. J. Weeks, R. M. Swanson, K. C. Saraswat, and R. W. Dutton. "A VLSI-Suitable Schottky-Barrier CMOS Process." IEEE Journal of Solid-State Circuits 20, no. 1 (1985): 114–22. http://dx.doi.org/10.1109/jssc.1985.1052283.
Full textSaha, Samar K. "Modeling Process Variability in Scaled CMOS Technology." IEEE Design & Test of Computers 27, no. 2 (2010): 8–16. http://dx.doi.org/10.1109/mdt.2010.50.
Full textKeane, John P., Chris H. Kim, Qunzeng Liu, and Sachin S. Sapatnekar. "Process and Reliability Sensors for Nanoscale CMOS." IEEE Design & Test of Computers 29, no. 5 (2012): 8–17. http://dx.doi.org/10.1109/mdt.2012.2211561.
Full textMather, P. J., M. Brouwer, and P. Hallam. "CMOS-process-independent average power dissipation macromodelling." Electronics Letters 31, no. 16 (1995): 1337–38. http://dx.doi.org/10.1049/el:19950914.
Full textDaga, J. M., S. Turgis, and D. Auvergne. "Inverter delay modelling for submicrometre CMOS process." Electronics Letters 32, no. 22 (1996): 2070. http://dx.doi.org/10.1049/el:19961394.
Full textParpia, Z., C. A. T. Salama, and R. A. Hadaway. "A CMOS-compatible high-voltage IC process." IEEE Transactions on Electron Devices 35, no. 10 (1988): 1687–94. http://dx.doi.org/10.1109/16.7374.
Full textVolz, C., and L. Blossfeld. "A high-performance bipolar/CMOS process-CIT2." IEEE Transactions on Electron Devices 35, no. 11 (1988): 1861–65. http://dx.doi.org/10.1109/16.7398.
Full textSwirhun, S. E., E. Sangiorgi, A. J. Weeks, R. M. Swanson, K. C. Saraswat, and R. W. Dutton. "A VLSI-suitable Schottky-barrier CMOS process." IEEE Transactions on Electron Devices 32, no. 2 (1985): 194–202. http://dx.doi.org/10.1109/t-ed.1985.21929.
Full textLin, Wen, M. L. Chen, R. H. Doklan, and C. Y. Lu. "Dopant diffusion in poly gate CMOS process." Solid-State Electronics 32, no. 11 (1989): 965–69. http://dx.doi.org/10.1016/0038-1101(89)90157-3.
Full textSaul, P. H., D. W. Howard, and C. J. Greenwood. "VLSI process compatible 8 bit CMOS DAC." IEE Proceedings E Computers and Digital Techniques 132, no. 2 (1985): 99. http://dx.doi.org/10.1049/ip-e.1985.0014.
Full textWenbin, Zhao, Chen Haifeng, Xiao Zhiqiang, Li Leilei, and Yu Zongguang. "W-plug via electromigration in CMOS process." Journal of Semiconductors 30, no. 5 (2009): 056001. http://dx.doi.org/10.1088/1674-4926/30/5/056001.
Full textSaul, P. H., D. W. Howard, and C. J. Greenwood. "VLSI process compatible 8 bit CMOS DAC." IEE Proceedings I Solid State and Electron Devices 132, no. 2 (1985): 99. http://dx.doi.org/10.1049/ip-i-1.1985.0021.
Full textNg, W. T., and C. A. T. Salama. "A CMOS-compatible complementary SINFET HVIC process." IEEE Transactions on Electron Devices 38, no. 8 (1991): 1935–42. http://dx.doi.org/10.1109/16.119036.
Full textRoy, Avisek, Mehdi Azadmehr, Bao Q. Ta, Philipp Häfliger, and Knut E. Aasmundtveit. "Design and Fabrication of CMOS Microstructures to Locally Synthesize Carbon Nanotubes for Gas Sensing." Sensors 19, no. 19 (2019): 4340. http://dx.doi.org/10.3390/s19194340.
Full textWong, Hei. "Abridging CMOS Technology." Nanomaterials 12, no. 23 (2022): 4245. http://dx.doi.org/10.3390/nano12234245.
Full textLIU, T. M., R. G. SWARTZ, and T. Y. CHIU. "HIGH PERFORMANCE ECL-BiCMOS TECHNOLOGY." International Journal of High Speed Electronics and Systems 04, no. 03 (1993): 283–99. http://dx.doi.org/10.1142/s0129156493000133.
Full textWeng, Chun Jen. "Etching Process Effects of CMOS Transistor Gate Manufacturing Nanotechnology Fabrication Integration." Applied Mechanics and Materials 83 (July 2011): 91–96. http://dx.doi.org/10.4028/www.scientific.net/amm.83.91.
Full textJonak-Auer, I., and S. Jessenig. "Processing of an Integrated Optical Sensor with Almost 100% Quantum Efficiency." Key Engineering Materials 644 (May 2015): 45–48. http://dx.doi.org/10.4028/www.scientific.net/kem.644.45.
Full textTong, Yushang. "Simulation and optimization of metal gate CMOS process and circuit by TCAD." Journal of Physics: Conference Series 2634, no. 1 (2023): 012011. http://dx.doi.org/10.1088/1742-6596/2634/1/012011.
Full textXu, Haoran, Jianghua Ding, and Jian Dang. "Design and Characteristics of CMOS Inverter based on Multisim and Cadence." Journal of Physics: Conference Series 2108, no. 1 (2021): 012034. http://dx.doi.org/10.1088/1742-6596/2108/1/012034.
Full textZolnikov, Vladimir, Svetlana Evdokimova, Irina ZHuravlyeva, Elena Maklakova, and Anna Ilunina. "FEATURES OF THE TECHNOLOGICAL PROCESS OF MANUFACTURING SPACE-BASED MICROCHIPS USING CMOS KNS TECHNOLOGY." Modeling of systems and processes 13, no. 3 (2020): 53–58. http://dx.doi.org/10.12737/2219-0767-2020-13-3-53-58.
Full textKempf, P., R. Hadaway, and J. Kolk. "Complementary metal oxide semiconductor compatible high-voltage transistors." Canadian Journal of Physics 65, no. 8 (1987): 1003–8. http://dx.doi.org/10.1139/p87-161.
Full textJeong, Sang-Hun, Nam-Ho Lee, Min-Woong Lee, and Seong-Ik Cho. "Analysis of Radiation Effects in CMOS 0.18um Process Unit Devices." Transactions of The Korean Institute of Electrical Engineers 66, no. 3 (2017): 540–44. http://dx.doi.org/10.5370/kiee.2017.66.3.540.
Full textWang, Wei, Xiaoyuan Bao, Li Chen, Ting Chen, Guanyu Wang та Jun Yuan. "High photon detection efficiency single photon avalanche diode in 0.18 μm standard CMOS process". Modern Physics Letters B 31, № 17 (2017): 1750193. http://dx.doi.org/10.1142/s0217984917501937.
Full textLi, Mingzhe. "A Method for Reducing Offset in CMOS Operational Amplifiers." Applied and Computational Engineering 128, no. 1 (2025): 37–42. https://doi.org/10.54254/2755-2721/2025.20230.
Full textKANG, XIAOXU, QINGYUN ZUO, CHAO YUAN, SHOUMIAN CHEN, and YUHANG ZHAO. "LOW STRESS TaN THIN FILM DEVELOPMENT FOR MEMS/SENSOR ELECTRODE APPLICATION." Journal of Circuits, Systems and Computers 22, no. 09 (2013): 1340017. http://dx.doi.org/10.1142/s0218126613400173.
Full textDave, Marshnil, Maryam Shojaei Baghini, and Dinesh Kumar Sharma. "A process and temperature compensated current reference circuit in CMOS process." Microelectronics Journal 43, no. 2 (2012): 89–97. http://dx.doi.org/10.1016/j.mejo.2011.11.008.
Full textZaziabl, Adam. "A 800μW 1GHz Charge Pump Based Phase-Locked Loop in Submicron CMOS Process". International Journal of Electronics and Telecommunications 56, № 4 (2010): 411–16. http://dx.doi.org/10.2478/v10177-010-0055-7.
Full textGABARA, THAD. "PULSED LOW POWER CMOS." International Journal of High Speed Electronics and Systems 05, no. 02 (1994): 159–77. http://dx.doi.org/10.1142/s0129156494000097.
Full textYang, Lung-Jieh, Reshmi Waikhom, Horng-Yuan Shih, and Yi-Kuen Lee. "Foundry Service of CMOS MEMS Processes and the Case Study of the Flow Sensor." Processes 10, no. 7 (2022): 1280. http://dx.doi.org/10.3390/pr10071280.
Full textYelamarthi, Kumar, and Chien-In Henry Chen. "Dynamic CMOS Load Balancing and Path Oriented in Time Optimization Algorithms to Minimize Delay Uncertainties from Process Variations." VLSI Design 2010 (March 7, 2010): 1–13. http://dx.doi.org/10.1155/2010/230783.
Full textDehlinger, Dietrich, Benjamin Sullivan, Sadik Esener, Dalibor Hodko, Paul Swanson, and Michael J. Heller. "Automated Combinatorial Process for Nanofabrication of Structures Using Bioderivatized Nanoparticles." JALA: Journal of the Association for Laboratory Automation 12, no. 5 (2007): 267–76. http://dx.doi.org/10.1016/j.jala.2007.05.006.
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