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Dissertations / Theses on the topic 'Combinatorial circuits'

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Published: 4 June 2021

Last updated: 20 February 2023

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1

Agnihotri, Ameya Ramesh. "Combinatorial optimization techniques for VLSI placement." Diss., Online access via UMI:, 2007.

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2

Cox, Robert Sidney Sternberg Paul W. Sternberg Paul W. "Transcriptional regulation and combinatorial genetic logic in synthetic bacterial circuits /." Diss., Pasadena, Calif. : California Institute of Technology, 2008. http://resolver.caltech.edu/CaltechETD:etd-03042008-130011.

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3

Rinderknecht, William John. "A power reduction algorithm for combinatorial CMOS circuits using input disabling." Thesis, Massachusetts Institute of Technology, 1994. http://hdl.handle.net/1721.1/36543.

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Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1995.<br>Includes bibliographical references (p. 61-62).<br>by William John Rinderknecht.<br>M.S.

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4

Hacker, Charles Hilton, and n/a. "WinLogiLab - A Computer-Based Teaching Suite for Digital Logic Design." Griffith University. School of Engineering, 2001. http://www4.gu.edu.au:8080/adt-root/public/adt-QGU20050915.172404.

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This thesis presents an interactive computerised teaching suite developed for the design of combinatorial and sequential logic circuits. This suite fills a perceived gap in the currently available computer-based teaching software for digital logic design. Several existing digital logic educational software are available, however these existing programs were found to be unsuitable for our use in providing alternative mode subject delivery. This prompted the development of a Microsoft Windows TM tutorial suite, called WinLogiLab. WinLogiLab comprises of a set of tutorials that uses student provi

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5

Hacker, Charles. "WinLogiLab - A Computer-Based Teaching Suite for Digital Logic Design." Thesis, Griffith University, 2001. http://hdl.handle.net/10072/367209.

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This thesis presents an interactive computerised teaching suite developed for the design of combinatorial and sequential logic circuits. This suite fills a perceived gap in the currently available computer-based teaching software for digital logic design. Several existing digital logic educational software are available, however these existing programs were found to be unsuitable for our use in providing alternative mode subject delivery. This prompted the development of a Microsoft Windows TM tutorial suite, called WinLogiLab. WinLogiLab comprises of a set of tutorials that uses student provi

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6

Coward, Bob. "Genroute : a genetic algorithm (printed wire board (PWB) router) /." Online version of thesis, 1991. http://hdl.handle.net/1850/10711.

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7

Duran, Arqué Berta. "Combinatorial perspective on the gene expression circuits established by the CPEB-family of RNA binding proteins." Doctoral thesis, Universitat de Barcelona, 2020. http://hdl.handle.net/10803/673591.

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The complex changes that take place in the mature Xenopus oocyte and early embryo are orchestrated in the absence of transcription. Until zygotic transcription starts, after the mid-blastula transition, cells rely on tight spatiotemporal translational regulation. Some maternal mRNAs accumulate during oocyte growth and are stored, translationally silent. Upon stimuli, stored, silenced mRNAs become cytoplasmically polyadenylated and, subsequently, engage in translation. The timing and extent of translational activation are dictated by a complex code of 3’UTR motifs recogn

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8

Goulart, Sobrinho Edilton Furquim [UNESP]. "Uma ferramenta alternativa para síntese de circuitos lógicos usando a técnica de circuito evolutivo." Universidade Estadual Paulista (UNESP), 2007. http://hdl.handle.net/11449/87253.

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Made available in DSpace on 2014-06-11T19:22:35Z (GMT). No. of bitstreams: 0 Previous issue date: 2007-05-25Bitstream added on 2014-06-13T20:49:18Z : No. of bitstreams: 1 goulartsobrinho_ef_me_ilha.pdf: 944900 bytes, checksum: 47dc5d964428b7cb8bd18e1e00e1d994 (MD5)<br>Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)<br>Neste trabalho descreve-se uma metodologia para síntese e otimização de circuitos digitais, usando a teoria de algoritmos evolutivos e como plataforma os dispositivos reconfiguráveis, denominada Hardware Evolutivo do inglês- Evolvable Hardware - EHW. O EHW,

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9

Nafkha, Amor. "A geometrical approach detector for solving the combinatorial optimisation problem : application in wireless communication systems." Lorient, 2006. http://www.theses.fr/2006LORIS067.

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Cette thèse s'intéresse à la résolution du problème classique de décodage d'un mélange linéaire entaché d'un bruit additif gaussien. A partir d'une observation bruitée: y = Hx+b, d'un vecteur d'entiers x mélangé linéairement par une matrice H connue, b étant un vecteur de bruit, on cherche le vecteur x minimisant la distance Euclidienne entre y et le vecteur Hx. Ce problème est réputé NP-complet. Il intervient dans un grand nombre de systèmes de télécommunications (MIMO, MC-CDMA, etc. ). Nous proposons dans cette thèse un algorithme de résolution quasi optimal de ce problème et bien adapté à u

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10

Goulart, Sobrinho Edilton Furquim. "Uma ferramenta alternativa para síntese de circuitos lógicos usando a técnica de circuito evolutivo /." Ilha Solteira : [s.n.], 2007. http://hdl.handle.net/11449/87253.

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Orientador: Suely Cunha Amaro Mantovani<br>Banca: José Raimundo de Oliveira<br>Banca: Nobuo Oki<br>Resumo: Neste trabalho descreve-se uma metodologia para síntese e otimização de circuitos digitais, usando a teoria de algoritmos evolutivos e como plataforma os dispositivos reconfiguráveis, denominada Hardware Evolutivo do inglês- Evolvable Hardware - EHW. O EHW, tornou-se viável com o desenvolvimento em grande escala dos dispositivos reconfiguráveis, Programmable Logic Devices (PLDs), cuja arquitetura e função podem ser determinadas por programação. Cada circuito pode ser representado como um

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11

Mohamed, Mohamed Hassan Wahba Ayman. "Diagnostic des erreurs de conception dans les circuits digitaux : le cas des erreurs simples." Grenoble 1, 1997. http://www.theses.fr/1997GRE10086.

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Le diagnostic automatique des erreurs de conception est un probleme important dans le domaine de la cao. Bien que des outils automatises de synthese soient employes pour generer des structures de circuits correctes-par-construction, celles-ci sont souvent modifiees manuellement pour refleter des petites modifications faites sur la specification, ou pour ameliorer certaines caracteristiques critiques de la conception. Les outils de verification peuvent reveler l'existence d'erreurs, mais ils ne donnent aucune information sur leurs emplacements ou la facon de les corriger. Ces outils generent se

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12

Duvillié, Guillerme. "Approximation, complexité paramétrée et stratégies de résolution de problèmes d'affectation multidimensionnelle." Thesis, Montpellier, 2016. http://www.theses.fr/2016MONTT321/document.

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Au cours de la thèse, nous nous sommes intéressés aux problèmes d'empilement de wafers. Ces problèmes apparaissent lors de la fabrication de processeurs en 3 dimensions. Au cours du processus de fabrication, les puces électroniques doivent être empilées les unes sur les autres. Jusqu'à peu, ces dernières, une fois gravées sur des plaques de silicium appelées wafers, étaient découpées, puis triées afin d'écarter les puces défectueuses et enfin assemblées les unes entre elles.Cependant empiler les wafers plutôt que les puces présente de nombreux avantages techniques et financiers. Naturellement,

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13

Bastos, Antonio Josefran de Oliveira. "Circuitos hamiltonianos em hipergrafos e densidades de subpermutações." Universidade de São Paulo, 2016. http://www.teses.usp.br/teses/disponiveis/45/45134/tde-06092017-192427/.

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O estudo do comportamento assintótico de densidades de algumas subestruturas é uma das principais áreas de estudos em combinatória. Na Teoria das Permutações, fixadas permutações ?1 e ?2 e um inteiro n > 0, estamos interessados em estudar o comportamento das densidades de ?1 e ?2 na família de permutações de tamanho n. Assim, existem duas direções naturais que podemos seguir. Na primeira direção, estamos interessados em achar a permutação de tamanho n que maximiza a densidade das permutações ?1 e ?2 simultaneamente. Para n suficientemente grande, explicitamos a densidade máxima que uma família

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14

Dias, Mauricio Araujo. "Um sistema criptografico para curvas elipticas sobre GF(2m) implementado em circuitos programaveis." [s.n.], 2007. http://repositorio.unicamp.br/jspui/handle/REPOSIP/260923.

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Orientador: Jose Raimundo de Oliveira<br>Tese (doutorado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação<br>Made available in DSpace on 2018-08-09T13:54:55Z (GMT). No. of bitstreams: 1 Dias_MauricioAraujo_D.pdf: 794928 bytes, checksum: a328a640d35118ea7fb606ac9f4ab2b2 (MD5) Previous issue date: 2007<br>Resumo: Este trabalho propõe um sistema criptográfico para Criptografia baseada em Curvas Elípticas (ECC). ECC é usada alternativamente a outros sistemas criptográficos, como o algoritmo RSA (Rivest-Shamir-Adleman), por oferecer a menor chave e a maior se

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15

Gwellem, Chrys. "Decompositions, Packings, and Coverings of Complete Directed Gaphs with a 3-Circuit and a Pendent Arc." Digital Commons @ East Tennessee State University, 2007. https://dc.etsu.edu/etd/2029.

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In the study of Graph theory, there are eight orientations of the complete graph on three vertices with a pendant edge, K3 ∪ {e}. Two of these are the 3-circuit with a pendant arc and the other six are transitive triples with a pendant arc. Necessary and sufficient conditions are given for decompositions, packings, and coverings of the complete digraph with the two 3-circuit with a pendant arc orientations.

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16

Ponnuswami, Ashok Kumar. "Intractability Results for some Computational Problems." Diss., Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/24638.

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In this thesis, we show results for some well-studied problems from learning theory and combinatorial optimization. Learning Parities under the Uniform Distribution: We study the learnability of parities in the agnostic learning framework of Haussler and Kearns et al. We show that under the uniform distribution, agnostically learning parities reduces to learning parities with random classification noise, commonly referred to as the noisy parity problem. Together with the parity learning algorithm of Blum et al, this gives the first nontrivial algorithm for agnostic learning of parities. We u

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17

Rombach, Michaela Puck. "Colouring, centrality and core-periphery structure in graphs." Thesis, University of Oxford, 2013. http://ora.ox.ac.uk/objects/uuid:7326ecc6-a447-474f-a03b-6ec244831ad4.

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Krivelevich and Patkós conjectured in 2009 that χ(G(n, p)) ∼ χ=(G(n, p)) ∼ χ∗=(G(n, p)) for C/n < p < 1 − ε, where ε > 0. We prove this conjecture for n−1+ε1 < p < 1 − ε2 where ε1, ε2 > 0. We investigate several measures that have been proposed to indicate centrality of nodes in networks, and find examples of networks where they fail to distinguish any of the vertices nodes from one another. We develop a new method to investigate core-periphery structure, which entails identifying densely-connected core nodes and sparsely-connected periphery nodes. Finally, we present an experiment and an anal

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18

Ahmad, Mumtaz. "Stratégies d'optimisation de la mémoire pour le calcul d'applications linéaires et l'indexation de document partagés." Phd thesis, Université Henri Poincaré - Nancy I, 2011. http://tel.archives-ouvertes.fr/tel-00641866.

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Cette thèse vise à développer des stratégies permettant d'augmenter la puissance du calcul séquentiel et des systèmes distribués, elle traite en particulier, la décomposition séquentielle des opérations ainsi que des systèmes d'édition collaboratifs décentralisés. La croissance rapide de l'utilisation des nouvelles technologies informatiques résulte de la nécessité d'avoir des performances élevées, dans tout domaine lié au calcul informatique. Une telle quête de performances a abouti à une plus grande complexité dans les architectures informatiques, conduisant à un stress non négligeable dans

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19

Brassard, Serge. "Méthodologie et modélisation floues des connaissances dans l'activité de conception en électrotechnique : application à la réalisation d'un système expert d'aide à la conception de l'appareillage électrique." Grenoble INPG, 1989. http://www.theses.fr/1989INPG0093.

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La conception de l'appareillage électrique relève dune méthodologie généralement fort complexe. Les problèmes posés par la conception de l'appareillage électrique sont analysés et montrent l'inefficacité des méthodes mathématiques. Une approche ensembliste floue est exposée et permet de modéliser l'aspect heuristique du problème ainsi que les aspects scientifiques et industriels de la conception. Un système expert d'aide à la conception des disjoncteurs à arc tournant a été réalisé. Les résultats obtenus sont commentés et montrent l'intérêt d'une telle approche

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20

huang, yungyi, and 黃勇益. "A Heuristic Algorithm for Synthesizing Combinatorial QuantumBoolean Circuits." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/12393400231914102397.

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碩士<br>國立中興大學<br>電機工程學系<br>93<br>For a quantum computer, the synthesis of quantum Boolean circuits is an essential aim. In addition, it seems that constructing a circuit with an n-bit Toffoli gatewith n 3 is neither practical nor economical. In this paper, we introduce a heuristic algorithm for synthesizing any combinational quantum Boolean circuit with a gate library containing only Not, CNot and Toffoli gates. Our algorithm mainly adopts the primary linking rule and secondary linking rule to simplify a circuit. Moreover, we propose a method for selecting a path with lower cost during the sim

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21

Han, Benjamin, and 韓定中. "Diagnosis of Combinatorial Digital Circuits from First Principles." Thesis, 1996. http://ndltd.ncl.edu.tw/handle/33163737562788836207.

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碩士<br>國立中山大學<br>電機工程研究所<br>84<br>The diagnostic problem arises when the observed behavior of a system deviates from the expectation. Assuming that the design of the system is correct in the sense that it is con- sistent with its specification, a diagnosis is a hypothesis of faults within the system under the observations obtained so far which can explain the discrepancies between the expected and the actual behavior of the system. The reason to perform diag- nosis is that by replacing only

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22

Cox, Robert Sidney III. "Transcriptional Regulation and Combinatorial Genetic Logic in Synthetic Bacterial Circuits." Thesis, 2008. https://thesis.library.caltech.edu/871/1/cox_thesis_final_cover.pdf.

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<p>We engineered several synthetic regulatory circuits to study transcriptional regulation in bacteria. We developed a new technique for DNA construction, built and characterized in vivo a library of genetic logic gates, examined the role of genetic noise transcriptional regulation using a fluorescent multi-reporter system, and characterized a synthetic circuit for the control of population density.</p> <p>We used synthetic duplex DNA fragments and very short cohesive overhangs to direct ordered assemblies of diverse combinatorial libraries. Multiple DNA fragments were simultaneously ligate

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