Journal articles: 'Common Mode Voltage (CMV)'

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R. Linga, Swamy, and R. Somanatham. "Reduction of common mode voltage for cascaded 3-level inverter using SVPWM." i-manager’s Journal on Electrical Engineering 15, no. 4 (2022): 1. http://dx.doi.org/10.26634/jee.15.4.18626.

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The common mode voltage (CMV) generated by multilevel inverters can be reduced. This paper presents a Spacevector pulse width modulation (SVPWM) approach for cascaded 3-level inverters to reduce common mode voltage. Conventional 3-level pulse width modulated (PWM) inverters are widely known for producing high-frequency commonmode voltages with high dv/dt. Motor shaft voltages and bearing currents can be caused by common mode voltages. In this work, to reduce common mode voltage, partial CMV elimination technique is used. In this method the redundant states of 3-level inverter having CMV less than or equal to Vdc/6 are only used and the redundant states having CMV greater than Vdc/6 are avoided by implementing SVPWM, where Vdc is the input DC voltage of inverter. A simulation of an dc SVM technique to reduce common mode voltage is implemented. Bearing voltages, bearing currents and total harmonic distortion (THD) are evaluated in the performance analysis. The results will prove the reduction of CMV with the proposed technique compared to conventional SVPWM.

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Wei, Hongye, Xiuhe Wang, and Xinghua Wang. "Brushless DC Motor Common-mode Voltage Analysis." Journal of Physics: Conference Series 2452, no. 1 (March 1, 2023): 012015. http://dx.doi.org/10.1088/1742-6596/2452/1/012015.

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Abstract Brushless DC motors (BLDCMs) with their own performance of obvious advantages: good speed regulation performance and high efficiency. BLDCMs have continuously replaced brushed DC and induction motors in many competitive fields and obtained more extensive applications. The common-mode voltage (CMV) in the motor parasitic capacitance coupling in the motor shaft induces the shaft voltage. It then triggers the shaft current, resulting in electrical corrosion of the bearing. It is necessary to conduct a systematic scientific analysis of its CMV. For different modulation methods, the phase voltages under three conditions without PWM modulation, HPWM_LPWM modulation, and HPWM_LON modulation are studied, FFT, and then the CMV is analyzed. Then, the correctness of the analysis is verified by simulation analysis.

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Chaturvedi, Pradyumn, Shailendra Jain, and Pramod Agarwal. "Carrier-Based Common Mode Voltage Control Techniques in Three-Level Diode-Clamped Inverter." Advances in Power Electronics 2012 (September 19, 2012): 1–12. http://dx.doi.org/10.1155/2012/327157.

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Switching converters are used in electric drive applications to produce variable voltage, variable frequency supply which generates harmful large dv/dt and high-frequency common mode voltages (CMV). Multilevel inverters generate lower CMV as compared to conventional two-level inverters. This paper presents simple carrier-based technique to control the common mode voltages in multilevel inverters using different structures of sine-triangle comparison method such as phase disposition (PD), phase opposition disposition (POD) by adding common mode voltage offset signal to actual reference voltage signal. This paper also presented the method to optimize the magnitude of this offset signal to reduce CMV and total harmonic distortion in inverter output voltage. The presented techniques give comparable performance as obtained in complex space vector-based control strategy, in terms of number of commutations, magnitude, and rate of change of CMV and harmonic profile of inverter output voltage. Simulation and experimental results presented confirm the effectiveness of the proposed techniques to control the common mode voltages.

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Negesse, Belete Belayneh, Chang-Hwan Park, Seung-Hwan Lee, Seon-Woong Hwang, and Jang-Mok Kim. "Optimized Modulation Method for Common-Mode Voltage Reduction in H7 Inverter." Energies 14, no. 19 (October 7, 2021): 6409. http://dx.doi.org/10.3390/en14196409.

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The three-phase H7 inverter topology installs an additional power semiconductor switch to the positive or negative node of the DC-link for reducing the common-mode voltage (CMV) by disconnecting the inverter from the DC source during the zero-voltage vectors. The conventional CMV reduction method for the three-phase H7 inverter uses modified discontinuous pulse width modulation (MDPWM) and generates a switching signal for the additional switch using logical operations. However, the conventional method is unable to eliminate the CMV for the entire dwell time of the zero-voltage vectors. It only has the effect of reducing the CMV in a limited area of the space vector where the V7 zero voltage vector is applied. Therefore, this paper proposes an optimized modulation method that can reduce the CMV during the entire dwell time of zero-voltage vectors. The proposed method moves the switching patterns by adding an offset voltage to guarantee that only one kind of zero-voltage vector, V7, is applied in the system. It then turns off the seventh switch only during the zero-voltage vector to disconnect the inverter from the DC source. As a result, the CMV and the leakage current are attenuated for the entire dwell time of the zero-voltage vector. Simulation and experimental results confirm the validity of the proposed method.

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Liu, Haiming, Linfeng Huang, Cheng Lin, Yifu Ding, Yun Wang, and Shanhu Li. "Analysis of High-Frequency Common Mode Component Characteristics of Common Mode Peak Voltage Suppression Method for Indirect Matrix Converter." Energies 15, no. 11 (May 28, 2022): 3991. http://dx.doi.org/10.3390/en15113991.

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A variety of modulation strategies for suppressing output common-mode voltage (CMV) of indirect matrix converters (IMC) have been proposed, but most of them mainly reduce the peak of CMV by 42.3%. The frequency-domain characteristics of CMV have not been deeply analyzed. In order to improve the theory of frequency-domain characteristics of output common-mode voltage of IMC, this paper proposed a common-mode frequency domain analysis of five common-mode voltage peak suppression modulation methods for IMC. The common-mode voltage spectrum corresponding to the five modulation methods is obtained by the triple Fourier series, and the variation laws of the output common-mode components of the five modulation methods under different modulation indexes are compared and analyzed. By comparing and analyzing the low-frequency amplitude characteristics and high-frequency amplitude characteristics of five modulation methods, the suppression performance of the five modulation methods is evaluated. Finally, experiments verify the correctness of the theoretical analysis of the frequency domain characteristics of the output common-mode voltage of the indirect matrix converter.

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Wang, Fusheng, Sai Weng, Lizhong Ye, and Tao Chen. "A Novel Low Common-Mode Voltage Modulation Strategy for ANPC-5L Inverter." E3S Web of Conferences 185 (2020): 01015. http://dx.doi.org/10.1051/e3sconf/202018501015.

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In order to suppress the leakage current of the active neutral point clamed five-level (ANPC-5L) inverter, this paper proposes a novel low common-mode voltage (CMV) modulation strategy based on the space vector modulation thought. Only the 55 voltage vectors with low CMV amplitude instead of all 125 voltage vectors are utilized. The CMV amplitude is suppressed to one-twelfth of the DC bus voltage (Vdc). In the simplified five-level space vector diagram, “obtuse triangle” synthesis principle is used to control the CMV changes twice in each carrier cycle, and get lower output current total harmonic distortion (THD). According to the vector thought, a carrier implementation method based on zero sequence voltage injection and carrier splitting is proposed. This method simplifies the calculation and is easy to implement.Simulation results prove the correctness and feasibility of this low CMV modulation strategy.

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Zalhaf, Amr, Mazen Abdel-Salam, and Mahmoud Ahmed. "An Active Common-Mode Voltage Canceler for PWM Converters in Wind-Turbine Doubly-Fed Induction Generators." Energies 12, no. 4 (February 21, 2019): 691. http://dx.doi.org/10.3390/en12040691.

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Wind energy integration in power grids is increasing day by day to reduce the use of fossil fuels, and consequently greenhouse gas emissions. Using the pulse-width modulated (PWM) power converters in wind turbine generators, specifically in doubly-fed induction generators, results in generating a common-mode voltage (CMV). This common-mode voltage causes a flow of common-mode current (CMC) that leaks through the stray capacitances in the generator structure. These currents impose a voltage on the generator bearing which may deteriorate them. In the current work, an active common-mode voltage canceler (ACMVC) is developed to eliminate the CMV produced by a PWM converter. The ACMVC generates a compensating voltage at the converter terminals to eliminate the CMV with a subsequent reduction of the voltage stress on the generator bearing. This compensating voltage has the same amplitude as CMV, but opposite polarity. A simulation of the ACMVC model is performed using the PSCAD/EMTDC (Electromagnetic Transient Design and Control) software package. Results confirm the effectiveness of ACMVC in canceling not only the CMV but the CMC and bearing voltage as well. In addition, the relationship between the rise time of CMV and the peak value of CMC is investigated.

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Guo, Yujing, and Junhuai Zhang. "Modulation Technique Design of An Improved Zero Common Mode Voltage (CMV)." Journal of Physics: Conference Series 2563, no. 1 (August 1, 2023): 012020. http://dx.doi.org/10.1088/1742-6596/2563/1/012020.

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Abstract Voltage imbalance of neutral-point and CMV are hot issues in the research of three-level inverters. This paper first introduces the three-level topology of the neutral-point clamped (NPC) inverter. Aiming to eliminate CMV of three-level NPC and balance the voltage of the neutral point simultaneously, a virtual space vector pulse modulation (VSVPWM) strategy is proposed. Virtual voltage vectors of this strategy are composed of 3 medium vectors. The voltage of the neutral point is balanced since the average current of the neutral point is 0. Therefore, the balance index is introduced to redefine virtual voltage vectors, so the voltage of the neutral point can recover quickly when the capacitors’ voltage of the dc-link is imbalanced.

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Fernandez, Markel, Endika Robles, Iker Aretxabaleta, Iñigo Kortabarria, Jon Andreu, and José Luis Martín. "A 3D Reduced Common Mode Voltage PWM Algorithm for a Five-Phase Six-Leg Inverter." Machines 11, no. 5 (May 6, 2023): 532. http://dx.doi.org/10.3390/machines11050532.

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Neutral point voltage control converters (NPVCC) are being considered for AC drive applications, where their additional degree of freedom can be used for different purposes, such as fault tolerance or common mode voltage (CMV) reduction. For every PWM-driven converter, the CMV is an issue that must be considered since it can lead to shaft voltages between rotor and stator windings, generating bearing currents that accelerate bearing degradation, and can also produce a high level of electromagnetic interference (EMI). In light of these considerations, in this paper a three-dimensional reduced common mode voltage PWM (3D RCMV-PWM) technique is proposed which effectively reduces CMV in five-phase six-leg NPVCCs. The mathematical description of both the converter and the modulation technique, in space-vector and carrier-based approaches, is included. Furthermore, the simulation and experimental analysis validate the CMV reduction capability in addition to the good behaviour in terms of the efficiency and harmonic distortion of the proposed RCMV-PWM algorithm.

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Szymański, Jerzy Ryszard, and Marta Żurek-Mortka. "Ground Leakage Current Caused by Common-Mode Voltage of PWM inverter." Journal of Civil Engineering and Transport 1, no. 1 (January 31, 2020): 15–25. http://dx.doi.org/10.24136/tren.2019.002.

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In railway tractive vehicles, three-phase PWM (Pulse Width Modulation) inverters generate parasitic Differential-Mode Voltages (DMV) and Common-Mode Voltages (CMV). Parasitic voltages are a side effect of using the width modulation to shape the phase-to-phase inverter’s voltage. In this article, the authors present a mathematical description of the DM and CM voltages and carry out their spectral analysis. Based on the spectral harmonics analysis, the authors present a method for filtration of harmonics of DM and CM voltages aimed at limiting the capacitance parasitic currents: due to DM voltage – phase-to-phase parasitic current and CM voltage – ground parasitic currents. As the final result of the tests, almost complete elimination of leakage parasitic current form PE shock protection system was achieved.

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Wu, Ming, Zhenhao Song, Zhipeng Lv, Kai Zhou, and Qi Cui. "A Method for the Simultaneous Suppression of DC Capacitor Fluctuations and Common-Mode Voltage in a Five-Level NPC/H Bridge Inverter." Energies 12, no. 5 (February 26, 2019): 779. http://dx.doi.org/10.3390/en12050779.

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To suppress the direct current (DC) capacitor voltage fluctuations and the common-mode voltage (CMV) in a three-phase, five-level, neutral-point-clamped (NPC)/H-bridge inverter, this paper analyzes the influence of all voltage vectors on the neutral point potential of each phase under different pulse mappings in detail with an explanation of the CMV distribution. Then, based on the traditional space vector pulse width modulation (SVPWM) algorithm, a dual-pulse-mapping algorithm is proposed to suppress the DC capacitor fluctuations and the CMV simultaneously. In the algorithm, the reference voltage synthesis selects the voltage vector that has the smallest CMV value as the priority. In addition, the two kinds of pulse mappings that have opposite effects on the neutral point potential are switched to output. At the same time, regulating factors are introduced to adjust the working time of each voltage vector under the two pulse mappings; then, the capacitor voltages can be balanced. Both the simulation and experiment demonstrate the algorithm’s effectiveness.

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Abdelaziz, Fatima, Zin-Eddine Azzouz, and Abdelhafid Omari. "Simple finite-control-set model predictive control method for reducing common mode voltage in a three phase two-level voltage source inverter." International Journal of Power Electronics and Drive Systems (IJPEDS) 13, no. 3 (September 1, 2022): 1904. http://dx.doi.org/10.11591/ijpeds.v13.i3.pp1904-1911.

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The common mode voltage (CMV) causes many issues and negatively affects the performance of the power system in a hybrid electric vehicle HEV. Therefore, this paper suggests a simple method for mitigating the common mode voltage CMV in a two level three phase voltage source inverter VSI with RL load. Hence, the technique chosen for this purpose is based on model predictive control. Otherwise, when compared to the standard method, this simple method can successfully mitigate CMV while also improving harmonic performance by lowering the total harmonic distortion THD. The purpose of this paper is reducing THD and CMV simultaneously utilizing only non-zero vectors. According to simulation results obtained by MATLAB-Simulink, this simple solution reduced CMV to ±𝑉𝑑𝑐 6 and THD from 3.49% to 3.39 % (10 % improvement) compared with the standard method, which mitigates CMV using the cost function.

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Petkovsek, Marko, and Peter Zajec. "Evaluating Common-Mode Voltage Based Trade-Offs in Differential-Ended and Single-Supplied Signal Conditioning Amplifiers." Electronics 10, no. 16 (August 17, 2021): 1982. http://dx.doi.org/10.3390/electronics10161982.

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This paper focuses on a differential voltage measurement in low-voltage automotive devices whose subunits are separated with a low-side safety switch. In contrast to conventional applications with high-side switches, a common-mode voltage (CMV) with negative polarity exists at the input of the signal conditioning circuitry. To overcome the shortage of dedicated integrated circuits capable of withstanding negative CMV, the paper investigates single- and two-stage differential circuits with single-supplied operational amplifiers to find a cost-optimized counterpart. In addition, the proposed procedure tunes the circuit parameters in such a manner to obtain the largest possible full-scale range at the output. Though, such optimization results in very uncommon values for gain and reference voltages. This issue is additionally evaluated for reference voltages that are either cost-effective or more easily accessible to increase the circuit feasibility. Since the impact of resistances on circuits’ behaviour could be diminished to a great extent using high-precision and matched pair resistors, the sensitivity analysis was investigated only for a reference voltage change. Furthermore, a reversed termination of measured voltages results in a simplified reference voltage selection without hindering circuits’ performance, proven by simulation and experimental results.

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14

Park, Chang-Hwan, In-Kyo Seo, Belete Belayneh Negesse, Jong-su Yoon, and Jang-Mok Kim. "A Study on Common Mode Voltage Reduction Strategies According to Modulation Methods in Modular Multilevel Converter." Energies 14, no. 6 (March 14, 2021): 1607. http://dx.doi.org/10.3390/en14061607.

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Low level modular multilevel converter (MMC) is a promising candidate for medium voltage applications such as MVDC (medium voltage DC current) transmission and megawatt machine drives. Unlike high-level MMC using nearest level modulation (NLM), the low-level MMC using the pulse width modulation (PWM) or NLM + PWM is affected by a common mode voltage (CMV) due to a frequent change of a switching state. This CMV causes electromagnetic interference (EMI) noise, common mode current (CMC) and bearing current leading to a reduction in the efficiency and durability of the motor drive system. Therefore, this paper provides a mathematical analysis on how the switching state affects the CMV and proposes three software based CMV reduction algorithms for the low level MMC system. To reflect the characteristic of MMC modulation strategy for upper and lower reference voltage independently, two separate space vectors are used. Based on the analysis, three different CMV reduction algorithms (complete CMV reduction (CCR), DPWM CMV reduction (DCR) and partial CMV reduction (PCR)) are proposed using NLC + PWM modulation strategy. The performance of the proposed CMV reduction algorithms was verified by both simulation and experimental result.

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Rząsa, Janina, and Elżbieta Sztajmec. "Elimination of Common Mode Voltage in the Three-To-Nine-Phase Matrix Converter." Energies 13, no. 3 (February 3, 2020): 631. http://dx.doi.org/10.3390/en13030631.

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A multiphase matrix converter (MC) is a direct AC/AC converter with n-phase input and m-phase output that is required to supply multiphase systems. To synthesize the controllable sinusoidal output voltage and input current with controllable displacement angle, the pulse width modulation (PWM) is implemented. On account of the PWM usage, there is common mode voltage (CMV), which is detrimental and causes lots of failures. This paper investigates the CMV elimination in the three-to-nine-phase MC. The carrier-based space vector modulation (SVM) with Venturini modulation functions is used. The elimination of the CMV is realized by applying rotating voltage space vectors only. The simulation results presented in this study show that the CMV is entirely eliminated and prove the usefulness of the proposed modulation method.

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Goh, Hui Hwang, Xinyi Li, Chee Shen Lim, Dongdong Zhang, Wei Dai, Tonni Agustiono Kurniawan, and Kai Chen Goh. "Common-Mode Voltage Reduction Algorithm for Photovoltaic Grid-Connected Inverters with Virtual-Vector Model Predictive Control." Electronics 10, no. 21 (October 25, 2021): 2607. http://dx.doi.org/10.3390/electronics10212607.

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Model predictive control (MPC) has been proven to offer excellent model-based, highly dynamic control performance in grid converters. The increasingly higher power capacity of a PV inverter has led to the industrial preference of adopting higher DC voltage design at the PV array (e.g., 750–1500 V). With high array voltage, a single stage inverter offers advantages of low component count, simpler topology, and requiring less control tuning effort. However, it is typically entailed with the issue of high common-mode voltage (CMV). This work proposes a virtual-vector model predictive control method equipped with an improved common-mode reduction (CMR) space vector pulse width modulation (SVPWM). The modulation technique essentially subdivides the hexagonal voltage vector space into 18 sub-sectors, that can be split into two groups with different CMV properties. The proposal indirectly increases the DC-bus utilization and extends the overall modulation region with improved CMV. The comparison with the virtual-vector MPC scheme equipped with the conventional SVPWM suggests that the proposed technique can effectively suppress 33.33% of the CMV, and reduce the CMV toggling frequency per fundamental cycle from 6 to either 0 or 2 (depending on which sub-sector group). It is believed that the proposed control technique can help to improve the performance of photovoltaic single-stage inverters.

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Hasanzad, Fardin, Hasan Rastegar, and Mohammad Pichan. "A three-dimensional active zero state PWM for common-mode voltage reduction of a three-phase four-leg voltage-source inverter." World Journal of Engineering 15, no. 5 (October 1, 2018): 592–603. http://dx.doi.org/10.1108/wje-12-2017-0423.

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Purpose This paper aims to investigate the common-mode voltage (CMV) issue of a three-phase four-leg voltage-source inverter. A new space vector modulation method, named as three-dimensional active zero state Pulse-width modulation (PWM) (3-D AZSPWM), is proposed to reduce the CMV level. Design/methodology/approach PWM is a general method to generate the switching signals of the power converters in order to obtain high-quality output voltages. However, the CMV produced by PWM methods has become a serious problem. 3-D AZSPWM is proposed to solve this issue. In 3-D AZSPWM, instead of using zero voltage vectors with high CMV level, appropriate complementary non-zero vectors are introduced to synthesize reference vector. The proposed method is classified into four types of AZSPWM1(a), AZSPWM1(b), AZSPWM2(a) and AZSPWM2(b) based on different complementary vectors chosen for each type. An extend software simulation using MATLAB/Simulink is performed to verify the superior performance of the proposed methods. Findings Compared to other reduced CMV methods, the proposed method not only reduces the CMV but also retains the positive characteristics of the three-dimensional classical space vector PWM (3-D CSVPWM). Originality/value The proposed method does not suffer from linear modulation region limitation and also does not impose additional switching loss. Furthermore, calculated output voltage harmonic distortion factor illuminates acceptable quality of output voltage produced by the proposed method.

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Rząsa, Janina, and Elżbieta Sztajmec. "Elimination of Common Mode Voltage in Three-To-Six-Phase Matrix Converter." Energies 12, no. 9 (May 1, 2019): 1662. http://dx.doi.org/10.3390/en12091662.

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The matrix converter (MC) is the n-phase input and m-phase output power electronic system. To synthesis the controllable sinusoidal output voltage and input current with controllable input displacement angle, the pulse width modulation method (PWM) is used in the MC. During the modulation process a problem of the common mode voltage (CMV) exists. The elimination of the CMV in three-to-six-phase MC by usage of only rotating voltage space vectors is analyzed in the paper. The carrier based implementation of the space vector modulation (SVM) with Venturini modulation functions is applied to the control of the three-to-six-phase MC. Entire elimination of the CMV in three-to-six-phase MC is presented in the paper. The simulation and experiment results confirm utility of the proposed modulation method.

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Liu, Wenjie, Yongheng Yang, Tamas Kerekes, Elizaveta Liivik, Dmitri Vinnikov, and Frede Blaabjerg. "Common-Mode Voltage Analysis and Reduction for the Quasi-Z-Source Inverter with a Split Inductor." Applied Sciences 10, no. 23 (December 4, 2020): 8713. http://dx.doi.org/10.3390/app10238713.

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In transformerless grid-connected photovoltaic (PV) systems, leakage currents should be properly addressed. The voltage fluctuations between the neutral point of the grid and the PV array, i.e., common-mode voltage (CMV), will affect the value of the leakage currents. Therefore, the leakage currents can be attenuated through proper control of the CMV. The CMV depends on the converter topology and the modulation strategy. For the quasi-Z-source inverter (qZSI), the amplitude of the high-frequency components in the CMV increases due to the extra shoot-through (ST) state. The CMV reduction strategies for the conventional voltage source inverter (VSI) should be modified when applied to the qZSI. In this paper, an input-split-inductor qZSI is introduced to reduce the CMV, in which all the CMV reduction strategies for the VSI can be used directly with appropriate ST state insertion. Moreover, the proposed method can be extended to impedance source converters with a similar structure. Simulations and experimental tests demonstrate the effectiveness of the proposed strategy for the qZSI in terms of CMV reduction.

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Do, Duc-Tri. "Quasi Z-Source Neutral-Point-Clamped Inverter Using SVM Technique to Eliminate Common Mode Voltage." Journal of Technical Education Science, no. 78A (August 28, 2023): 100–108. http://dx.doi.org/10.54644/jte.78a.2023.1293.

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In recent year, common mode voltage (CMV) elimination methods are considered to improve the reliability of three-level quasi-switched boost T-type inverter (TL-qSBT2I). The space-vector modulation method (SVM) can control the inverter operation to eliminate the CMV. The proposed method applies medium vectors and zero vector to synthesize the reference vector to eliminate CMV while the output voltage is unchanged compared to SinPWM technique. In order to prevent the active vectors and the output voltage from being affected, the shoot-through vector is inserted inside the zero vector. Accordingly, the proposed method not only maintains the CMV elimination advantage of the SVM technique for TL-qSBT2I but also reduces the inductor current ripple and enhances the voltage gain without any topology modification or adding electrical components. Results from simulations and experiments are used to evaluate the efficiency of the suggested strategy. Additionally, by comparing the proposed scheme with the traditional pulse-width modulation technique, the superiority of the proposed scheme is shown.

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Hwang, Seon-Ik, and Jang-Mok Kim. "Opposite Triangle Carrier with SVPWM for Common-Mode Voltage Reduction in Dual Three Phase Motor Drives." Energies 14, no. 2 (January 6, 2021): 282. http://dx.doi.org/10.3390/en14020282.

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The common-mode voltage (CMV) generated by the switching operation of the pulse width modulation (PWM) inverter leads to bearing failure and electromagnetic interference (EMI) noises. To reduce the CMV, it is necessary to reduce the magnitude of dv/dt and change the frequency of the CMV. In this paper, the range of the CMV is reduced by using opposite triangle carrier for ABC and XYZ winding group, and the change in frequency in the CMV is reduced by equalizing the dwell time of the zero voltage vector on ABC and XYZ winding group of dual three phase motor.

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Lin, Zhiming, Bicheng Lei, Lingwei Wu, and Pan Mei. "Eliminating the Effect of Common-Mode Voltage on an Open-End Winding PMSM Based on Model Predictive Torque Control." Mathematical Problems in Engineering 2021 (June 4, 2021): 1–11. http://dx.doi.org/10.1155/2021/5516290.

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In the open-end winding permanent magnet synchronous motor (OEW-PMSM) with common DC link, the common-mode voltage (CMV) will cause leakage current and zero-sequence current, which will lead to the decrease in the system life and efficiency. To solve this problem, the loop characteristics of leakage current and zero-sequence current were analyzed, and the condition for eliminating the leakage current and the zero-sequence current was deduced. Then, the CMV of the voltage vectors for the OEW-PMSM system was calculated, and the appropriate voltage vectors satisfying the conditions were selected to form the control vector sets. Combined with the model predictive torque control (MPTC), a cost function without the weight factor was proposed. The voltage vector sets were predicted by the cost function. The optimal voltage vectors were selected to control the OEW-PMSM, which can eliminate the leakage current and the zero-sequence current caused by the CMV. The effectiveness of the proposed method was verified by the simulation results.

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Zandzadeh, Mohammad Jafar, Mohsen Saniei, and Reza Kianinezhad. "Space vector modulation with reduced common mode voltage for six-phase drives." COMPEL - The international journal for computation and mathematics in electrical and electronic engineering 39, no. 2 (April 13, 2020): 395–411. http://dx.doi.org/10.1108/compel-09-2019-0347.

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Purpose This paper aims to present a modified space vector pulse width modulation (SVPWM) technique for six-phase induction motor drive based on common-mode voltage (CMV) and current losses which are two important issues affecting drive system behavior and quality. Design/methodology/approach It is shown that the presence of z-component currents and the presence of CMV in six-phase drive system are two major limiting factors in space vector selection. The behavior of several space vector selections in a two-level inverter considering minimum CMV and z-components is investigated. Then, the space vectors in a three-level inverter is analyzed and tried to explore an SVM technique with better behavior. Findings The analyses show that all the problems cannot be solved in a six-phase drive system with two-level inverter despite having 64 space vectors; this study tried to overcome the limitations by exploring space vectors in a three-level inverter. Originality/value The proposed pulse width modulation (PWM) strategy leads to minimum current distortion and undesired current components with zero CMV and modest torque ripple.

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Pham, Khoa Dang, Quan Vinh Nguyen, and Nho-Van Nguyen. "PWM Strategy to Alleviate Common-Mode Voltage with Minimized Output Harmonic Distortion for Five-Level Cascaded H-Bridge Converters." Energies 14, no. 15 (July 24, 2021): 4476. http://dx.doi.org/10.3390/en14154476.

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High-frequency components of common-mode voltage (CMV) induce the shaft voltage and bearing current, which lead to premature failures in motors. In addition, due to non-zero average CMV, the low-frequency components of CMV, particularly the third-order harmonic component, have been reported to cause difficulties in common-mode filter design. Furthermore, the utilization of distant voltage vectors in the pulse-width modulation (PWM) with reduced CMV magnitudes gives rise to high output harmonic distortion compared to PWM ones without CMV reduction. In an attempt to solve the aforementioned issues, this article presents a PWM strategy that features reduced CMV magnitudes, zero average CMV, and improved output harmonic distortion for a five-level cascaded H-bridge (CHB) converter. In addition, the carrier rotation technique based on the phase-leg redundancy of the CHB topology is also combined with the proposed scheme to achieve equal power loss distribution among power switching devices. Both simulation and experimental results confirm that the proposed strategy produces better output harmonic distortion than that of POD-SPWM and APOD-SPWM under the condition of reduced CMV magnitudes, zero average CMV, and equal power loss distribution.

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Aswani Kumar, Eedara, Koritala Chandra Sekhar, and Rayapudi Srinivasa Rao. "Model Predictive Current Control of a Three-Phase T-Type NPC Inverter to Reduce Common Mode Voltage." Journal of Circuits, Systems and Computers 27, no. 02 (September 11, 2017): 1850028. http://dx.doi.org/10.1142/s0218126618500287.

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This paper presents a reduced control set model predictive control (RCSMPC) method for three-phase T-type neutral-point-clamped (NPC) inverter. The whole control set (WCS) consists of all the 27 switching states of T-type NPC inverter. The reduced control set (RCS) with 19 switching states is formed from WCS by excluding the switching states with common mode voltage (CMV) value higher than one-sixth of input DC voltage [Formula: see text]. With RCS, single-objective model predictive current control method can restrict the CMV peak value to [Formula: see text]. To further reduce the CMV below this threshold, a cost function with the weighted sum of two control targets is formulated in the RCSMPC method. The two control targets of RCSMPC method are CMV mitigation and load current control. The weight for CMV is called bias factor. The RCSMPC method is computationally efficient, as the number of switching states is less than that of WCSMPC. To further reduce the computational burden, CMV values corresponding to all the switching states are calculated offline and stored in memory. Robustness of both the methods is investigated with parameter deviations at different bias factors and reference currents. The proposed method is validated using simulation and experimental results and compared with the existing methods.

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Abdelaziz, Fatima, Zin-Eddine Azzouz, and Abdelhafid Omari. "Simple FCS-MPC Method for Reducing Common-Mode Voltage in a Three-Phase Two-Level Voltage Source Inverter." E3S Web of Conferences 353 (2022): 02003. http://dx.doi.org/10.1051/e3sconf/202235302003.

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Common mode voltage (CMV) causes various issues, including a negative impact on the performance of a hybrid electric vehicle’s power system (HEV). Many papers have published methods that mitigate CMV, almost all of which attempt to avoid zero vectors, but this increases total harmonic distortion (THD). This work describes a simple and efficient method for reducing CMV in a two-level three-phase voltage source inverter (VSI) with an RL load. This method uses only active vectors. It replace the zero vector with the two opposite vectors V2 and V5. for T1 and T2 respectively in a one sampling period Ts. A numerical simulation, using Matlab-Simulink. is achieved to assess the effectiveness of the proposed control technique. The obtained results show a reduction in THD value (17% improvement) and a decrease in the peak value of CMV from (${{ + {V_{dc}}} \over 2}$ and ${{ - {V_{dc}}} \over 6}$) to $\pm {{{V_{dc}}} \over 6}$. These results are compared to those obtained by using the traditional predictive control model MPC.

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Liu, Xiao, Qingfan Zhang, and Dianli Hou. "An improved space vector modulation strategy for common-mode voltage reduction in matrix rectifier." Archives of Electrical Engineering 63, no. 1 (March 1, 2014): 93–106. http://dx.doi.org/10.2478/aee-2014-0007.

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Abstract The matrix rectifier modulated by the classical space vector modulation (SVM) strategy generates common-mode voltage (CMV). The high magnitude and high du/dt of the CMV causes serious problems such as motor damage, electromagnetic noise and many others. In this paper, an improved SVM strategy is proposed by replacing the zero vectors with suitable couple of active ones that substantially eliminate the CMV. Theoretical analysis proves that the proposed strategy can reduce the amplitude of the CMV to half of the original value. In addition, the quality of the input and output waveforms is not affected by extra active vectors. Simulation and experimental results demonstrate the feasibility and effectiveness of the proposed strategy are shown

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Fernandez, Markel, Andres Sierra-Gonzalez, Endika Robles, Iñigo Kortabarria, Edorta Ibarra, and Jose Luis Martin. "New Modulation Technique to Mitigate Common Mode Voltage Effects in Star-Connected Five-Phase AC Drives." Energies 13, no. 3 (January 31, 2020): 607. http://dx.doi.org/10.3390/en13030607.

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Star-connected multiphase AC drives are being considered for electromovility applications such as electromechanical actuators (EMA), where high power density and fault tolerance is demanded. As for three-phase systems, common-mode voltage (CMV) is an issue for multiphase drives. CMV leads to shaft voltages between rotor and stator windings, generating bearing currents which accelerate bearing degradation and produce high electromagnetic interferences (EMI). CMV effects can be mitigated by using appropriate modulation techniques. Thus, this work proposes a new Hybrid PWM algorithm that effectively reduces CMV in five-phase AC electric drives, improving their reliability. All the mathematical background required to understand the proposal, i.e., vector transformations, vector sequences and calculation of analytical expressions for duty cycle determination are detailed. Additionally, practical details that simplify the implementation of the proposal in an FPGA are also included. This technique, HAZSL5M5-PWM, extends the linear range of the AZSL5M5-PWM modulation, providing a full linear range. Simulation results obtained in an accurate multiphase EMA model are provided, showing the validity of the proposed modulation approach.

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Dabour, Sherif M., Noha El-hendawy, Ahmed A. Aboushady, Mohamed Emad Farrag, and Essam M. Rashad. "A Comprehensive Review on Common-Mode Voltage of Three-Phase Quasi-Z Source Inverters for Photovoltaic Applications." Energies 16, no. 1 (December 26, 2022): 269. http://dx.doi.org/10.3390/en16010269.

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Inverters with Quasi-Z-Source Networks (QZSN) provide DC-DC boosting and DC-AC conversion in a single stage. It offers reduced cost, complexity, and volume compared with the classical two-stage conversion system, which is composed of a boost converter followed by a Voltage-Source-Inverter (VSI). Further, QZSI provides superior conversion characteristics for single-stage grid-connected photovoltaic transformerless systems. However, the absence of galvanic isolation in these systems makes it possible to allow leakage current through these systems’ parasitic capacitances due to the high-frequency Common-Mode Voltage (CMV) generated by the Pulse Width Modulation (PWM) nature of the inverter output voltages. As a result of this current, critical safety issues may arise with PV systems. Many PWM techniques have been presented in recent years for QZSIs. This paper is intended to provide a comprehensive analysis and review study of the characteristics of most of these PWM techniques in terms of CMV and leakage currents. In this study, closed-form equations have been derived to determine the effective CMV and leakage current analyses for all modulation techniques. Analytical and simulation approaches are used to identify schemes with the lowest CMV and current leakage effects. Moreover, the experimental setup is presented by applying the Simple-Boost Modified Space Vector Modulation (SB-MSVM) technique.

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Dabour, Sherif M., Ahmed A. Aboushady, Mohamed A. Elgenedy, I. A. Gowaid, Mohamed Emad Farrag, Ayman S. Abdel-Khalik, Ahmed M. Massoud, and Shehab Ahmed. "Symmetrical Nine-Phase Drives with a Single Neutral-Point: Common-Mode Voltage Analysis and Reduction." Applied Sciences 12, no. 24 (December 7, 2022): 12553. http://dx.doi.org/10.3390/app122412553.

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Power converters generate switching common mode voltage (CMV) through the pulse width modulation (PWM). Several problems occur in the drive systems due to the generated CMV. These problems can be dangerous to the insulation and bearings of the electric machine windings. In recent years, many modulation methods have been developed to reduce the CMV in multiphase machines. Symmetrical nine-phase machines with single-neutral are considered in this paper. In this case, conventional PWM uses eight active vectors of different magnitudes in combination with two zero states in a switching cycle, and this generates maximum CMV. This paper proposes two PWM schemes to reduce the CMV in such a system. The first scheme is called active zero state (AZS). It replaces the zero vectors with suitable opposite active vectors. The second scheme uses ten large active vectors during switching and is called SVM-10L. Compared with conventional strategies, the AZS reduces the peak CMV by 22.2%, and the SVM-10L reduces the peak CMV by 88.8%. Moreover, this paper presents a carrier-based implementation of the proposed schemes to simplify the implementation. The proposed schemes are assessed using simulations and experimental studies for an induction motor load under different case studies.

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Jeong, Won-Sang, Yoon-Seong Lee, Jung-Hyo Lee, Chang-Hee Lee, and Chung-Yuen Won. "Space Vector Modulation (SVM)-Based Common-Mode Current (CMC) Reduction Method of H8 Inverter for Permanent Magnet Synchronous Motor (PMSM) Drives." Energies 15, no. 1 (December 31, 2021): 266. http://dx.doi.org/10.3390/en15010266.

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This paper proposes a space vector modulation (SVM)-based common-mode (CM) currents reduction method of an H8 inverter for permanent magnet synchronous motor (PMSM) drives. There are power quality issues in the PMSM drive systems, such as current distortions and CM electromagnetic interference (EMI) due to the fast-switching operation of the inverter. These issues are related to CM voltage (CMV) and CM current (CMC). Although several studies have been conducted to reduce the CMV and CMC, some CMV variations and CMCs are still generated in the real implementation. Unlike conventional methods, the proposed method selects the voltage vectors with similar CMV levels and arranges them considering the series-connected switch operation of the H8 inverter in a voltage vector modulation sequence. At a low modulation index (MI), the proposed method completely restricts the CMV variations into six times. At high MI, the proposed method synthesizes the reference voltage vector differently, depending on the position of the reference vector, to reduce both current distortions and CMCs. The validity of the proposed method is verified through simulations and experimental results.

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Im, Jun-Hyuk, Yeol-Kyeong Lee, Jun-Kyu Park, and Jin Hur. "Shaft Voltage Reduction Method Using Carrier Wave Phase Shift in IPMSM." Energies 14, no. 21 (October 21, 2021): 6924. http://dx.doi.org/10.3390/en14216924.

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Common-Mode Voltage (CMV) induces shaft voltage and bearing current due to the electrical interaction with the parasitic capacitance of the motor. CMV, shaft voltage, and bearing current are considered the major causes of bearing fault. Motor fault in a traction system poses a risk of accidents. Therefore, it is necessary to reduce the CMV and the shaft voltage to ensure the reliability of the bearing. However, some existing CMV reduction methods are based on asynchronized space vector pulse width modulation (SVPWM), which will cause unacceptable harmonic distortion at a low switching frequency. Alternatively, some CMV reduction methods based on synchronized SVPWM burden the processor because they require a lot of calculation. In this paper, the method to reduce CMV and shaft voltage is proposed using carrier wave phase shift in SVPWM. CMV is explained in traditional SVPWM, and CMV is reduced by shifting the carrier wave phase of one phase. The simulation model is constructed through MATLAB/SIMULINK and Maxwell 2D/Twin Builder. Considering the proposed method, CMV, shaft voltage, and bearing current are analyzed by an equivalent circuit model. Moreover, the output torque behaviors with different input currents are analyzed through the simulation.

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Baik, Jaehyuk, Sangwon Yun, Dongsik Kim, Chunki Kwon, and Jiyoon Yoo. "Remote-State PWM with Minimum RMS Torque Ripple and Reduced Common-Mode Voltage for Three-Phase VSI-Fed BLAC Motor Drives." Electronics 9, no. 4 (March 30, 2020): 586. http://dx.doi.org/10.3390/electronics9040586.

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A minimum root mean square (RMS) torque ripple-remote-state pulse-width modulation (MTR-RSPWM) technique is proposed for minimizing the RMS torque ripple under reduced common-mode voltage (CMV) condition of three-phase voltage source inverters (VSI)-fed brushless alternating current (BLAC) motor drives. The q-axis current ripple due to an error voltage vector generated between the reference voltage vector and applied voltage vector is analyzed for all pulse patterns with reduced CMV of the RSPWM. From the analysis result, in the MTR-RSPWM, a sector is divided into five zones, and within each zone, pulse patterns with the lowest RMS torque ripple and reduced CMV are employed. To verify the validity of the MTR-RSPWM, theorical analysis, simulation, and experiments are performed, where the MTR-RSPWM is thoroughly compared with RSPWM3 that generates the minimum RMS current ripple. From the analytical, simulation, and experimental results, it is shown that the MTR-RSPWM significantly reduces the RMS torque ripple under a reduced CMV condition at the expense of an increase in the RMS current ripple, compared to the RSPWM3.

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Rząsa, Janina. "An Alternative Carrier-Based Implementation of Space Vector Modulation to Eliminate Common Mode Voltage in a Multilevel Matrix Converter." Electronics 8, no. 2 (February 6, 2019): 190. http://dx.doi.org/10.3390/electronics8020190.

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The main aim of the paper is to find a control method for a multilevel matrix converter (MMC) that enables the elimination of common mode voltage (CMV). The method discussed in the paper is based on a selection of converter configurations and the instantaneous output voltages of MMC represented by rotating space vectors. The choice of appropriate configurations is realized by the use of space vector modulation (SVM), with the application of Venturini modulation functions. A multilevel matrix converter, which utilizes a multilevel structure in a traditional matrix converter (MC), can achieve an improved output voltage waveform quality, compared with the output voltage of MC. The carrier-based implementation of SVM is presented in this paper. The carrier-based implementation of SVM avoids any trigonometric and division operations, which could be required in a general space vector approach to the SVM method. With use of the proposed control method, a part of the high-frequency output voltage distortion components is eliminated. The application of the presented modulation method eliminates the CMV in MMC what is presented in the paper. Additionally, the possibility to control the phase shift between the appropriate input and output phase voltages is obtained by the presented control strategy. The results of the simulation and experiment confirm the utility of the proposed modulation method.

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Zhao, Li, Shoudao Huang, Yuan Gao, and Jian Zheng. "A Common-Mode Voltage Suppression Strategy Based on Double Zero-Sequence Injection PWM for Two-Level Six-Phase VSIs." Energies 15, no. 17 (August 26, 2022): 6242. http://dx.doi.org/10.3390/en15176242.

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A common-mode voltage (CMV) suppression strategy, namely double zero-sequence injection common-mode voltage (DZICMV), is proposed in this paper for an asymmetrical six-phase induction motor fed by two-level dual three-phase voltage source inverters (VSIs). In this strategy, the sinusoidal waveforms injected by double zero-sequence signals are employed as modulation signals, and two opposite triangular waveforms are used as carriers. The fundamental period is divided into 24 sectors. In each sector, the carrier used by the medium amplitude phase is distinct from the carriers used by the other two phases in each set of three-phase windings. Using this method, the zero vectors (000) and (111) in each set of three-phase windings can be eliminated, and the peak values of sub-CMV and total CMV can be reduced from ±Udc/2 to ±Udc/6. The experiment results show that the root mean square (RMS) value of common-mode leakage current in DZICMV can be reduced by 51.83% compared with the double zero-sequence injection PWM (DZIPWM) strategy. It is also found in the other four existing benchmark CMV suppression strategies that the peak values of sub-CMV therein are nearly all ±Udc/2, and only in the low linear modulation region could one of these strategies suppress sub-CMV peak values to ±Udc/6. However, the proposed DZICMV can suppress the sub-CMV peak values to ±Udc/6 in the whole linear modulation range. Moreover, the maximum linear modulation index of the DZICMV is 1.15, which is larger than that of the four benchmark strategies, whose maximum modulation index is 1.

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Wang, Pengye, Zicheng Liu, Dong Jiang, Jie Tian, and Peng Li. "Improved PWM Methods to Reduce the Common Mode Voltage of the Five-Phase Open-Winding Drive Topology." Energies 15, no. 17 (September 1, 2022): 6382. http://dx.doi.org/10.3390/en15176382.

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With the phase angle and shape modifications for carriers, two improved carrier-based pulse width modulation (CPWM) methods with common-mode voltage (CMV) suppression effects for the five-phase open-winding drive topologies are introduced. Theoretical analysis reveals that, by employing reversed triangular carriers for two inverters under the carrier-reversed PWM (CRPWM), CMV contributions of two bridge legs belonging to the same phase can be cancelled, realizing the zero CMV effect. By dynamically employing positive and negative sawtooth carriers for all bridge legs under the carrier-switching PWM (CSPWM), the CMV contribution of each inverter can be reduced, decreasing both the amplitude and step frequency of the CMV. Current qualities and dead-time effects on CMV under the above PWM methods are analyzed. Moreover, performances of two PWM methods are verified by experiments implemented on a five-phase open-winding topology with the induction motor load.

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Mahmoudian, Mehrdad, Maziyar Fakhraei, Edris Pouresmaeil, and Eduardo M. G. Rodrigues. "An Impedance Source Multi-Level Three Phase Inverter with Common Mode Voltage Elimination and Dead Time Compensation." Electronics 9, no. 10 (October 4, 2020): 1639. http://dx.doi.org/10.3390/electronics9101639.

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Currently, most electro-mechanical drive systems that require speed control use pulse-width modulated (PWM) variable frequency drives known as adjustable speed drives (ASD). The high switching speeds of the electronics switches are essential for proper operation of the ASD. Common mode voltage (CMV) has its origin in the PWM switching. The CMV increases the stress on the coils and windings, reduces the life of the bearing and, therefore, has a significant impact on motor life cycle. In this paper, a variant of a PWM-based space vector modulation (SVPWM) switching algorithm is proposed to control both the shoot-through intervals and the dead time of the power switches that could be compensated. The proposed algorithm is implemented on a platform consisting of an impedance source network in the DC side of the topology with the purpose of mitigating the CMV and capability of voltage boosting. Since similar methods have achieved a CMV reduction of 1/6 of the DC link voltage so far, in this paper, while surpassing the disturbing current harmonics, the high efficiency is fully accessible. The presented experimental results verify the effectiveness of the proposed approach by slightly increasing the total harmonic distortion (THD) and reducing the converter losses.

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Zheng, Jian, Mingcheng Lyu, Shengqing Li, Qiwu Luo, and Keyuan Huang. "Common-Mode Reduction SVPWM for Three-Phase Motor Fed by Two-Level Voltage Source Inverter." Energies 13, no. 15 (July 30, 2020): 3884. http://dx.doi.org/10.3390/en13153884.

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Aiming at the problem of large magnitude and high frequency of common-mode voltage (CMV) when space vector pulse width modulation (SVPWM) is used in a three-phase motor fed by a two-level voltage source inverter, a common-mode reduction SVPWM (CMRSVPWM) is studied. In this method, six new sectors are obtained by rotating six sectors of conventional SVPWM by 30°. In odd-numbered sectors, only three non-zero vectors with odd subscripts are used for synthesis, while in even-numbered sectors, only three non-zero vectors with even subscripts are used for synthesis. The actuation durations of three non-zero vectors in each switching period in each sector are given. Simulation and experimental results show that, compared with the conventional SVPWM, the CMV magnitude of CMRSVPWM is reduced by 66.67% and the CMV frequency of CMRSVPWM is reduced from the original switching frequency to the triple fundamental frequency. At the same time, the current, torque and speed of the motor are still good.

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Subramaniam, Umashankar, Sagar Mahajan Bhaskar, Dhafer J.Almakhles, Sanjeevikumar Padmanaban, and Zbigniew Leonowicz. "Investigations on EMI Mitigation Techniques: Intent to Reduce Grid-Tied PV Inverter Common Mode Current and Voltage." Energies 12, no. 17 (September 3, 2019): 3395. http://dx.doi.org/10.3390/en12173395.

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Power inverters produce common mode voltage (CMV) and common mode current (CMC) which cause high-frequency electromagnetic interference (EMI) noise, leakage currents in electrical drives application and grid-connected systems, which consequently drops the efficiency of the system considerably. This CMV can be mitigated by designing suitable EMI filters and/or investigating the effects of different modulation strategies. In this paper, the effect of various modulation techniques over CMV and CMC are investigated for two-level and three-level inverters. It is observed that the modified third harmonic injection method reduced the CMV and CMC in the system by 60%. This modified pulse width modulation (PWM) technique is employed along with EMI chokes which results in reduced distortion of the system.

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AbolqasemiKharanaq, Fatemeh, Amirreza Poorfakhraei, Ali Emadi, and Berker Bilgin. "An Improved Carrier-Based PWM Strategy with Reduced Common-Mode Voltage for a Three-Level NPC Inverter." Electronics 12, no. 5 (February 21, 2023): 1072. http://dx.doi.org/10.3390/electronics12051072.

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Double modulation wave carrier-based pulse width modulation (CBPWM) is a solution for eliminating the deviations of the neutral-point voltage (NPV) in three-level neutral-point clamped inverters. In this paper, a new hybrid CBPWM strategy is proposed that not only eliminates the neutral-point voltage oscillations but also reduces the common-mode voltage (CMV) by half. Furthermore, the harmonic content is also reduced compared with the available reduced CMV modulation by adjusting the modulation waves based on the location of the reference vector in the space vector diagram. An active neutral-point voltage controller is also realized in order to maintain the performance of the modulation strategy under the NPV perturbations. The performance of the proposed algorithm is compared to the available CBPWM-based techniques in the literature. The effectiveness of the proposed method is also verified by experimental results.

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Zhang, Guozheng, Shuo Wang, Chen Li, Xinmin Li, and Xin Gu. "A Space Vector Based Zero Common-Mode Voltage Modulation Method for a Modular Multilevel Converter." World Electric Vehicle Journal 14, no. 2 (February 15, 2023): 53. http://dx.doi.org/10.3390/wevj14020053.

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A modular multilevel converter (MMC) can generate different common-mode voltage (CMV) values due to the high-frequency changing of the switching state under various modulation strategies. The high-frequency dv/dt will produce common-mode current in the equivalent common-mode loop to the ground, which will affect the insulation and shorten the life of the equipment. To eliminate the effect of common-mode voltage on MMC operation, a common-mode voltage elimination strategy (0CMV-SVPWM) is proposed for five-level MMC space vector pulse width modulation (SVPWM) by using the vector that does not generate common-mode voltage as the reference vector in this paper. The proposed strategy is studied and analyzed by the rapid prototype development experimental system based on RT-LAB to verify the feasibility and effectiveness of the proposed strategy.

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Teixeira, Rodrigo De A., Werbet L. A. Silva, Guilherme A. P. De C. A. Pessoa, Joao T. Carvalho Neto, Elmer R. L. Villarreal, Andrés O. Salazar, and Alberto S. Lock. "One Cycle Control of a PWM Rectifier a New Approach." Energies 13, no. 20 (October 21, 2020): 5523. http://dx.doi.org/10.3390/en13205523.

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This paper analyzes a Digital Signal Processor (DSP) based One Cycle Control (OCC) strategy for a Power Factor Corrector (PFC) rectifier with Common-mode Voltage (CMV) immunity. It is proposed a strategy that utilizes an emulated-resistance-controller in closed-loop configuration to set the dc-link voltage to achieve unity power factor (UPF). It is shown that if the PFC can achieve UPF condition and if the phase voltage is only affected by CMV, then phase current is free from CMV, as well as a lead-lag compensator (LLC) to average phase current.

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Lingangouda, R., and Pradeep B. Jyoti. "ANFIS based AZSPWM methods for reduction common mode voltage in asynchronous motor drive." International Journal of Applied Power Engineering (IJAPE) 11, no. 4 (December 1, 2022): 319. http://dx.doi.org/10.11591/ijape.v11.i4.pp319-324.

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<div class="keywords">Space vector pulse width modulation (SVPWM) is a popular technique in the field of variable frequency induction motor drives. It gives better working and good direct current bus utilization in comparison to the sinusoidal PWM (SPWM) method. However, it decreases harmonic fluctuations and generates high common mode voltage (CMV) fluctuations, which results in common mode currents inside the motor. Hence, the performance of the motor may be deteriorated. To reduce the CMV, this paper presents a family of active zero state PWM (AZSPWM) methods using an adaptive neuro-fuzzy interference system (ANFIS). The proposed approach uses a five-layer hybrid learning algorithm for training the network. The training data is obtained from the classical SVPWM method. To analyze the proposed PWM methods, simulation is carried out using MATLAB and evaluated.</div>

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Zhang, Guozheng, Yingjie Su, Zhanqing Zhou, and Qiang Geng. "A Carrier-Based Discontinuous PWM Strategy of NPC Three-Level Inverter for Common-Mode Voltage and Switching Loss Reduction." Electronics 10, no. 23 (December 5, 2021): 3041. http://dx.doi.org/10.3390/electronics10233041.

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For the conventional carrier-based pulse width modulation (CBPWM) strategies of neutral point clamped (NPC) three-level inverters, the higher common-mode voltage (CMV) is a major drawback. However, with CMV suppression strategies, the switching loss is relatively high. In order to solve the above issue, a carrier-based discontinuous PWM (DPWM) strategy for NPC three-level inverter is proposed in this paper. Firstly, the reference voltage is modified by the twice injection of zero-sequence voltage. Switching states of the three-phase are clamped alternatively to reduce both the CMV and the switching loss. Secondly, the carriers are also modified by the phase opposite disposition of the upper and lower carriers. The extra switching at the border of two adjacent regions in the space vector diagram is reduced. Meanwhile, a neutral-point voltage (NPV) control method is also presented. The duty cycle of the switching state that affects the NPV is adjusted to obtain the balance control of the NPV. Still, the switching sequence in each carrier period remains the same. Finally, the feasibility and effectiveness of the proposed DPWM strategy are tested on a rapid control prototype platform based on RT-Lab.

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Ramasamy, Palanisamy, and Vijayakumar Krishnasamy. "Minimization of Common-Mode Voltage of Three-Phase Five-Level NPC Inverter Using 3D Space Vector Modulation." Journal of Circuits, Systems and Computers 29, no. 14 (March 25, 2020): 2050229. http://dx.doi.org/10.1142/s0218126620502291.

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In this paper, a three-dimensional Space Vector Modulation (3D SVM) is implemented for minimization of Common-Mode Voltage (CMV) of five-level Neutral Point Clamped (NPC) inverter. The 3D SVM control includes all merits of 2D SVM and provides better control compared to other PWM strategies. The switching state vectors are selected based on the nearest vector Switching State Vector (NSV); it selects the switching vectors which are having the minimum CMV level. It leads to minimization of the bearing voltage and protection of the drive from the damage; also this system reduces the total harmonic distortion. The switching time is calculated by reference vector identification with large and small subcubes tracking and prisms tracking in 3D cubic region. The CMV level with 3D SVM scheme is compared with other PWM methods. The simulation and hardware results are verified using Matlab Simulink and FPGA processor.

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S, Sujatha, Gunasekari R, Ramya K, and Raghavendra RM. "Mitigation of Common Mode Voltage in Induction Motor Employing Multilevel Inverter." International Journal of Innovative Research in Information Security 09, no. 03 (June 23, 2023): 104–9. http://dx.doi.org/10.26562/ijiris.2023.v0903.12.

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Induction motor (IM) is a usually a constant speed motor. The Basic technique used to control and run the machine in variable speed drive application can be obtained by two level inverters, which can be controlled digitally with the help of microcontroller using sinusoidal pulse width modulation method. Thereby at the star terminal point of the load there is a voltage existed with respect to system ground. Hence it is defined as “common mode voltage”. Due to the common mode voltage, there is an electromagnetic interference that is induced. Thereby it causes lot of disturbance to the communication and electronic equipment’s, which are nearby to the system. The common mode voltage can be reduced with the help of high-level inverter that can be used for example two-level, three-level, four-level inverters etc. In this proposed system we are reducing the common mode voltage by using two level inverter & three level inverter. In this paper, mitigation of CMV is simulated through MATLAB and implemented by hardware setup.

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Wang, Rutian, Xingjun Mu, Zhiqiang Wu, Lihui Zhu, Qiufeng Chen, and Xue Wang. "Carrier-Based PWM Method to Reduce Common-Mode Voltage of Three-to-Five-Phase Indirect Matrix Converter." Mathematical Problems in Engineering 2016 (2016): 1–10. http://dx.doi.org/10.1155/2016/6086497.

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In order to reduce the common-mode voltage (CMV) for three-to-five-phase indirect matrix converter (IMC), the CMV with the conventional modulation strategy is analyzed. A novel carrier-based PWM (CBPWM) method is proposed in this paper. The zero vectors in the inverter stage are assigned to the rectifier stage, equivalently, which are not considered in the inverter stage. The zero vectors are selected appropriately to ensure that the dc-link is connected to an input phase with the minimum absolute value, so that the larger CMV can be avoided. Then, the modulation signals are derived by the duty ratios, which are used to compare with the only one carrier signal and generate the gate pulses of switches. With the proposed method, the CMV is reduced effectively compared with the conventional modulation strategy. This method is analyzed and researched with a simulation model established by Matlab/Simulink. Simulation results are provided in detail to verify the feasibility and validity of the proposed method.

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Jayakumar, Vinoth, Bharatiraja C, Santhakumar C, and Josiah Lange Munda. "Performance Analysis of Five-Phase NPC MLI with Phase Shifting Carrier Pulse Width Modulation." ECS Transactions 107, no. 1 (April 24, 2022): 7581–88. http://dx.doi.org/10.1149/10701.7581ecst.

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The five-phase loads with Multi-Level Inverters (MLI) are preferred by industries in high and medium power applications due to lower switching loss, voltage stress across switches, etc. The controlling of a five-phase motor drive is done by Pulse Width Modulation (PWM) techniques. This paper discusses different multi carrier PWM techniques, such as Level Shifting Carrier (LSC) PWM and Phase Shifting Carrier (PSC) PWM techniques available for controlling the inverter drive. The simulation is carried out for all PWM techniques and load voltage, voltage THD, Common Mode Voltage (CMV), and DC-link voltages are noted and compared among the PWM techniques.

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Bharatiraja, C., J. L. Munda, N. Sriramsai, and T. Sai Navaneesh. "Investigation of the Common Mode Voltage for a Neutral-Point-Clamped Multilevel Inverter Drive and its Innovative Elimination through SVPWM Switching-State Redundancy." International Journal of Power Electronics and Drive Systems (IJPEDS) 7, no. 3 (September 1, 2016): 892. http://dx.doi.org/10.11591/ijpeds.v7.i3.pp892-900.

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The purpose of this paper is to provide a comprehensive Investigations and its control on the common mode Voltage (CMV) of the three-phase three-level neutral-point diode-clamped (NPC) multilevel inverter (MLI). A widespread space-vector pulse width modulation (SVPWM) technique to mitigate the perpetual problem of the NPC-MLI, the CMV, proposed. The proposed scheme is an effectual blend of nearest three vector (NTV) and selected three vector (STV) techniques. This scheme is capable to reduce the CMV without compromise the inverter output voltage and Total harmonics distraction (THD). CMV reduction achieved less than +Vdc/6 using the proposed vector selection procedure. The theoretical Investigations, the MATLAB software based computer simulation and Field Programmable Gate Array (FPGA) supported hardware corroboration have shown the superiority of the proposed technique over the conventional SVPWM schemes.

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Babu, Yaramasu Suri, and Koritala Chandra Sekhar. "Investigation of common mode voltages of single stage boost inverter for five phase induction motor drive." International Journal of Power Electronics and Drive Systems (IJPEDS) 13, no. 3 (September 1, 2022): 1352. http://dx.doi.org/10.11591/ijpeds.v13.i3.pp1352-1364.

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In this manuscript, the single stage boost inverter is proposed to eliminate the common-mode voltage (CMV) and electromagnetic interference (EMI) in the motor drives. The proposed topology has the capability of eliminating the effects of intrinsic CMV without any additional filters, active or passive elements, and modified pulse width modulated (PWM) techniques. This topology is proposed with the rearrangement of filter components from ac side to mid place in such a way that the capacitor constantly clamped to the DC bus, and the inductor is placed at the mid-point of half-bridge module and supply to achieve the high gain. This arrangement is also eliminating the effect of switching natured common-mode voltage, which generally occurs in any conventional PWM inverter. Conventional PWM techniques can be implemented to this topology without any modification in the control strategy. The proposed topology is simulated in a MATLAB Simulink to verify the operation and CM reduction capabilities with the results of experimental prototype. In the manuscript, the proposed topology is compared with the traditional inverters and modulation schemes in terms of the CMV effect elimination to explain its effectiveness.

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Journal articles on the topic 'Common Mode Voltage (CMV)'

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