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Dissertations / Theses on the topic 'Compilers (Computer programs)'

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Published: 4 June 2021

Last updated: 1 August 2024

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1

Biglari-Abhari, Morteza. "Performance improvement through predicated execution in VLIW machines." Title page, contents and abstract only, 2000. http://web4.library.adelaide.edu.au/theses/09PH/09phb593.pdf.

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2

Deighan, John. "VPI PROLOG compiler project report." Master's thesis, This resource online, 1991. http://scholar.lib.vt.edu/theses/available/etd-01262010-020109/.

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3

Park, Eun Jung. "Methodology of dynamic compiler option selection based on static program analysis implementation and evaluation /." Access to citation, abstract and download form provided by ProQuest Information and Learning Company; downloadable PDF file, 74 p, 2007. http://proquest.umi.com/pqdweb?did=1407501141&sid=12&Fmt=2&clientId=8331&RQT=309&VName=PQD.

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4

Walker, Kenneth William. "The implementation of an optimizing compiler for Icon." Diss., The University of Arizona, 1991. http://hdl.handle.net/10150/185599.

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There are many optimizations that can be applied while translating Icon programs. These optimizations and the analyses needed to apply them are of interest for two reasons. First, Icon's unique combination of characteristics requires developing new techniques for implementing them. Second, these optimizations are used in variety of languages and Icon can be used as a medium for extending the state of the art. Many of these optimizations require detailed control of the generated code. Previous production implementations of the Icon programming language have been interpreters. The virtual machin

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5

Calnan, Paul W. "EXTRACT, Extensible Transformation and Compiler Technology." Link to electronic thesis, 2003. http://www.wpi.edu/Pubs/ETD/Available/etd-0429103-152947.

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6

Cardone, Richard Joseph. "Language and compiler support for mixin programming." Access restricted to users with UT Austin EID Full text (PDF) from UMI/Dissertation Abstracts International, 2002. http://wwwlib.umi.com/cr/utexas/fullcit?p3077428.

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7

Jones, Philip E. C. "Common subexpression detection in dataflow programs /." Title page, contents and summary only, 1989. http://web4.library.adelaide.edu.au/theses/09SM/09smj78.pdf.

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8

Müller-Olm, Markus. "Modular compiler verification : a refinement algebraic approach advocating stepwise abstraction /." Berlin [u.a.] : Springer, 1997. http://www.loc.gov/catdir/enhancements/fy0815/97013428-d.html.

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9

Lapinskii, Viktor. "Algorithms for compiler-assisted design space exploration of clustered VLIW ASIP datapaths /." Full text (PDF) from UMI/Dissertation Abstracts International, 2001. http://wwwlib.umi.com/cr/utexas/fullcit?p3008376.

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10

Junaidu, Sahalu B. "A parallel functional language compiler for message-passing multicomputers." Thesis, University of St Andrews, 1998. http://hdl.handle.net/10023/13450.

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The research presented in this thesis is about the design and implementation of Naira, a parallel, parallelising compiler for a rich, purely functional programming language. The source language of the compiler is a subset of Haskell 1.2. The front end of Naira is written entirely in the Haskell subset being compiled. Naira has been successfully parallelised and it is the largest successfully parallelised Haskell program having achieved good absolute speedups on a network of SUN workstations. Having the same basic structure as other production compilers of functional languages, Naira's parallel

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11

Sarcar, Amritam. "Runtime assertion checking for JML on the eclipse platform using AST merging." To access this resource online via ProQuest Dissertations and Theses @ UTEP, 2009. http://0-proquest.umi.com.lib.utep.edu/login?COPT=REJTPTU0YmImSU5UPTAmVkVSPTI=&clientId=2515.

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12

Chan, Robin Isaac Man-Hang. "An Estelle-C compiler for automatic protocol implementation." Thesis, University of British Columbia, 1987. http://hdl.handle.net/2429/26184.

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Over the past few years, much experience has been gained in semi-automatic protocol implementation using an existing Estelle-C compiler developed at the University of British Columbia. However, with the continual evolution of the Estelle language, that compiler is now obsolete. The present study found substantial syntactic and semantic differences between the Estelle language as implemented by the existing compiler and that specified in the latest ISO document to warrant the construction of a new Estelle-C compiler. The result is a new compiler which translates Estelle as defined in the seco

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13

Coleman, Jesse J. "The design, construction, and implementation of an engineering software command processor and macro compiler /." Online version of thesis, 1995. http://hdl.handle.net/1850/12219.

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14

Calnan, III Paul W. "EXTRACT: Extensible Transformation and Compiler Technology." Digital WPI, 2003. https://digitalcommons.wpi.edu/etd-theses/484.

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Code transformation is widely used in programming. Most developers are familiar with using a preprocessor to perform syntactic transformations (symbol substitution and macro expansion). However, it is often necessary to perform more complex transformations using semantic information contained in the source code. In this thesis, we developed EXTRACT; a general-purpose code transformation language. Using EXTRACT, it is possible to specify, in a modular and extensible manner, a variety of transformations on Java code such as insertion, removal, and restructuring. In support of this, we also d

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15

Hopper, Michael A. "A compiler framework for multithreaded parallel systems." Diss., Georgia Institute of Technology, 1997. http://hdl.handle.net/1853/15638.

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16

Liang, Wen. "A compiler optimization framework for Concordia Parallel C." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp01/MQ39488.pdf.

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17

Moon, Hae-Kyung. "Compiler construction for a simple Pascal-like language." Virtual Press, 1994. http://liblink.bsu.edu/uhtbin/catkey/897511.

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In this thesis a compiler called SPASCAL is implemented which translates source programs in a simple Pascal-like language called SPASCAL into target programs in the VAX assembly language. This thesis clearly describes the main aspects of a compiler: lexical analysis and syntactic analysis, including the symbol-table routines and the error-handling routines. This thesis uses regular expressions to define the lexical structure and a context-free grammar to define the syntactic structure of SPASCAL. The compiler is constructed using syntax-directed translation, context-free grammars and a set of

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18

Lu, Jing. "Semi-automatic protocol implementation using an Estelle-C compiler, LAPB and RTS protocols as examples." Thesis, University of British Columbia, 1990. http://hdl.handle.net/2429/29419.

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Formal Description Techniques allow for the use of automated tools during the specification and development of communication protocols. Estelle is a standardized formal description technique developed by ISO to remove ambiguities in the specification of communication protocols and services. The UBC Estelle-C compiler automates the implementation of protocols by producing an executable C implementation directly from its Estelle specification. In this thesis, we investigate the automated protocol implementation methodology using the Estelle-C compiler. First, we describe the improvements mad

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19

Reig, Galilea Fermín Javier. "Compiler architecture using a portable intermediate language." Connect to e-thesis, 2002. http://theses.gla.ac.uk/686/.

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Thesis (Ph.D.) - University of Glasgow, 2002.<br>Ph.D. thesis submitted to the Department of Computing Science, University of Glasgow, 2002. Includes bibliographical references. Print version also available.

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20

Wendt, Alan Lee. "An optimizing code generator generator." Diss., The University of Arizona, 1989. http://hdl.handle.net/10150/184771.

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This dissertation describes a system that constructs efficient, retargetable code generators and optimizers. chop reads nonprocedural descriptions of a computer's instruction set and of a naive code generator for the computer, and it writes an integrated code generator and peephole optimizer for it. The resulting code generators are very efficient because they interpret no tables; they are completely hard-coded. Nor do they build complex data structures to communicate between code generation and optimization phases. Interphase communication is reduced to the point that the code generator's out

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21

Farkas, Alex Miklós. "Program construction and evolution in a persistent integrated programming environment /." Title page, contents and abstract only, 1995. http://web4.library.adelaide.edu.au/theses/09PH/09phf229.pdf.

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22

Cai, Qiong Computer Science &amp Engineering Faculty of Engineering UNSW. "Profile-guided redundancy elimination." Awarded by:University of New South Wales. School of Computer Science and Engineering, 2006. http://handle.unsw.edu.au/1959.4/25156.

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Program optimizations analyze and transform the programs such that better performance results can be achieved. Classical optimizations mainly use the static properties of the programs to analyze program code and make sure that the optimizations work for every possible combination of the program and the input data. This approach is conservative in those cases when the programs show the same runtime behaviors for most of their execution time. On the other hand, profile-guided optimizations use runtime profiling information to discover the aforementioned common behaviors of the programs and explo

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23

Torri, Stephen A. Hamilton John A. "Generic reverse engineering architecture with compiler and compression classification components." Auburn, Ala, 2009. http://hdl.handle.net/10415/1583.

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24

Crowfoot, Norman C. "A visual aid for designing regular expression parsers /." Online version of thesis, 1988. http://hdl.handle.net/1850/10446.

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25

Cook, Philip John. "Incremental compilation in language-based environments /." [St. Lucia, Qld.], 2006. http://www.library.uq.edu.au/pdfserve.php?image=thesisabs/absthe19173.pdf.

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26

Hessaraki, Alireza. "CCC86, a generic 8086 C-language cross compiler plus communication package." Virtual Press, 1987. http://liblink.bsu.edu/uhtbin/catkey/544004.

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The Cross Compiler is an excellent and valuable program development tool. It provides to the user a low level compiled language that allows character (byte), integer (8086 word) and pointer (8086 one word address) manipulation. It also allows recursion, has modern flow and a rich set of operators.The Communication Program which include file transfer utility allows the student to download or upload their C program to a PC. It allows use of the Modem. The file transferring can be done using XON/XOFF or XMODEM. It also supports INS 8250 UART chip, plus 16450 high speed device found in hardware su

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27

McMichael, Lonny D. (Lonny Dean). "A Neural Network Configuration Compiler Based on the Adaptrode Neuronal Model." Thesis, University of North Texas, 1992. https://digital.library.unt.edu/ark:/67531/metadc501018/.

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A useful compiler has been designed that takes a high level neural network specification and constructs a low level configuration file explicitly specifying all network parameters and connections. The neural network model for which this compiler was designed is the adaptrode neuronal model, and the configuration file created can be used by the Adnet simulation engine to perform network experiments. The specification language is very flexible and provides a general framework from which almost any network wiring configuration may be created. While the compiler was created for the specialized ada

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28

Baudendistel, Kurt. "Compiler development for fixed-point processors." Diss., Georgia Institute of Technology, 1992. http://hdl.handle.net/1853/15355.

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29

Mbhambhu, Tsakani Joseph. "A Java bytecode compiler for the 8051 micro-controller." Thesis, Stellenbosch : Stellenbosch University, 2002. http://hdl.handle.net/10019.1/52645.

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Thesis (MScEng)--Stellenbosch University, 2002.<br>ENGLISH ABSTRACT: This report describes the development of a Java Bytecode Compiler (JBC) for the 8051 micro-controller. Bytecodes are found in the class file generated when a Java source file is compiled with the java compiler (javac). On Java platforms, the Java Virtual Machine (JVM) interprets and executes the bytecodes. Currently existing Java platforms do not support programming the 8051 using Java. As an 8-bit micro-controller with only 64 KB of total memory, the 8051's word size and memory is too limited to implement a NM. Moreove

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30

Orgill, Gregory Leavitt. "Java Performance of the Rijndael Encryption Algorithm Across Compilers and Virtual Machines." Diss., CLICK HERE for online access, 2005. http://contentdm.lib.byu.edu/ETD/image/etd681.pdf.

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31

Song, Jun. "Compiling ACE for Distributed-Memory Machines." PDXScholar, 1992. https://pdxscholar.library.pdx.edu/open_access_etds/4568.

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Distributed-memory machines offer a very high level of performance, flexibility and scalability. But the memory organization of this kind of machine determines that processes on different processors must communicate explicitly by sending and receiving messages. As a result, the programmer faces the enormously difficult task of detailed planning of algorithm-irrelevant, low-level communication issues. This level of programming resembles writing assembly programs for a sequential machine. ACE is a message-passing language with abstract communication statements. It was defined by Dr. Jingke Li at

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32

Heller, Richard. "Checkpointing without operating system intervention implementing Griewank's algorithm." Ohio : Ohio University, 1998. http://www.ohiolink.edu/etd/view.cgi?ohiou1176494831.

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33

Shear, Raymond F. "Implementation of a Modula 2 subset compiler supporting a "C" language interface using commonly available UNIX tools /." Online version of thesis, 1989. http://hdl.handle.net/1850/10505.

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34

Muff, Urs C. "Backtracking model languages /." Access author, 2000.

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35

Lerner, Sorin. "Automatically proving the correctness of program analyses and transformations /." Thesis, Connect to this title online; UW restricted, 2006. http://hdl.handle.net/1773/7001.

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36

De, Subrato Kumar. "Design of a retargetable compiler for digital signal processors." Diss., Georgia Institute of Technology, 2002. http://hdl.handle.net/1853/15740.

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37

Burke, Patrick William. "A New Look at Retargetable Compilers." Thesis, University of North Texas, 2014. https://digital.library.unt.edu/ark:/67531/metadc699988/.

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Consumers demand new and innovative personal computing devices every 2 years when their cellular phone service contracts are renewed. Yet, a 2 year development cycle for the concurrent development of both hardware and software is nearly impossible. As more components and features are added to the devices, maintaining this 2 year cycle with current tools will become commensurately harder. This dissertation delves into the feasibility of simplifying the development of such systems by employing heterogeneous systems on a chip in conjunction with a retargetable compiler such as the hybrid computer

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38

Kim, Minjang. "Dynamic program analysis algorithms to assist parallelization." Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/45758.

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All market-leading processor vendors have started to pursue multicore processors as an alternative to high-frequency single-core processors for better energy and power efficiency. This transition to multicore processors no longer provides the free performance gain enabled by increased clock frequency for programmers. Parallelization of existing serial programs has become the most powerful approach to improving application performance. Not surprisingly, parallel programming is still extremely difficult for many programmers mainly because thinking in parallel is simply beyond the human perceptio

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39

Railing, Brian Paul. "Collecting and representing parallel programs with high performance instrumentation." Diss., Georgia Institute of Technology, 2015. http://hdl.handle.net/1853/54431.

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Computer architecture has looming challenges with finding program parallelism, process technology limits, and limited power budget. To navigate these challenges, a deeper understanding of parallel programs is required. I will discuss the task graph representation and how it enables programmers and compiler optimizations to understand and exploit dynamic aspects of the program. I will present Contech, which is a high performance framework for generating dynamic task graphs from arbitrary parallel programs. The Contech framework supports a variety of languages and parallelization libraries, and

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40

Shende, Sameer Suresh. "The role of instrumentation and mapping in performance measurement /." view abstract or download file of text, 2001. http://wwwlib.umi.com/cr/uoregon/fullcit?p3024533.

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Thesis (Ph. D.)--University of Oregon, 2001.<br>Typescript. Includes vita and abstract. Includes bibliographical references (leaves 141-156). Also available for download via the World Wide Web; free to University of Oregon users.

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41

Balasubramaniam, Mahadevan. "Performance analysis and evaluation of dynamic loop scheduling techniques in a competitive runtime environment for distributed memory architectures." Master's thesis, Mississippi State : Mississippi State University, 2003. http://library.msstate.edu/etd/show.asp?etd=etd-04022003-154254.

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42

Porto, João Paulo. "Técnicas e arquitetura para captura de traços e execução especulativa." [s.n.], 2011. http://repositorio.unicamp.br/jspui/handle/REPOSIP/275770.

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Orientador: Guido Costa Souza de Araújo<br>Tese (doutorado) - Universidade Estadual de Campinas, Instituto de Computação<br>Made available in DSpace on 2018-08-17T08:05:03Z (GMT). No. of bitstreams: 1 Porto_JoaoPaulo_D.pdf: 1983380 bytes, checksum: edef40fbafe26ce2d849308b08daf786 (MD5) Previous issue date: 2011<br>Resumo: É sabido que o modelo de desenvolvimento de micro-processadores baseado na extração de Instruction-Level Parallelism (ILP) de código sequencial atingiu seu limite. Encontrar soluções escaláveis e eficientes que permitam a manutenção de inúmeras instruções em execução simul

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43

Baixo, André Oliveira Loureiro do 1986. "Mecanismo para execução especulativa de aplicações paralelizadas por técnicas DOPIPE usando replicação de estágios." [s.n.], 2012. http://repositorio.unicamp.br/jspui/handle/REPOSIP/275691.

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Orientador: Guido Costa Souza de Araújo<br>Dissertação (mestrado) - Universidade Estadual de Campinas, Instituto de Computação<br>Made available in DSpace on 2018-08-21T04:52:37Z (GMT). No. of bitstreams: 1 Baixo_AndreOliveiraLoureirodo_M.pdf: 1756118 bytes, checksum: 00900e9463b55e1800da080419da53c7 (MD5) Previous issue date: 2012<br>Resumo: A utilização máxima dos núcleos de arquiteturas multi-processadas é fundamental para permitir uma utilização completa do paralelismo disponível em processadores modernos. A fim de obter desempenho escalável, técnicas de paralelização requerem um ajuste

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44

Elms, Kim. "Debugging optimised code using function interpretation." Thesis, Queensland University of Technology, 1999.

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45

Lucas, Divino César Soares 1985. "Modeling the performance impact of hot code misprediction in Cross-ISA virtual machines = Modelagem do impacto de erros de predição de código quente no desempenho de máquinas virtuais." [s.n.], 2013. http://repositorio.unicamp.br/jspui/handle/REPOSIP/275628.

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Orientadores: Guido Costa Souza de Araújo, Edson Borin<br>Dissertação (mestrado) - Universidade Estadual de Campinas, Instituto de Computação<br>Made available in DSpace on 2018-08-23T12:28:12Z (GMT). No. of bitstreams: 1 Lucas_DivinoCesarSoares_M.pdf: 1053361 bytes, checksum: e29ab79838532619ba298ddde8ba0f39 (MD5) Previous issue date: 2013<br>Resumo: Máquinas virtuais (MVs) são sistemas que se propõem a eliminar a incompatibilidade entre duas, em geral diferentes, interfaces e dessa forma habilitar a comunicação entre diferentes sistemas. Nesse sentido, atuando como mediadores, uma MV está

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46

Li, Shen Carmen C. Duren Russell Walker. "Evaluating Impulse C and multiple parallelism partitions for a low-cost reconfigurable computing system." Waco, Tex. : Baylor University, 2008. http://hdl.handle.net/2104/5280.

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47

Peters, Arthur. "The Basic Scheme for the Evaluation of Functional Logic Programs." PDXScholar, 2012. https://pdxscholar.library.pdx.edu/open_access_etds/914.

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Functional logic languages provide a powerful programming paradigm combining the features of functional languages and logic languages. However, current implementations of functional logic languages are complex, slow, or both. This thesis presents a scheme, called the Basic Scheme, for compiling and executing functional logic languages based on non-deterministic graph rewriting. This thesis also describes the implementation and optimization of a prototype of the Basic Scheme. The prototype is simple and performs well compared to other current implementations.

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48

Zhuang, Xiaotong. "Compiler Optimizations for Multithreaded Multicore Network Processors." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/11566.

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Network processors are new types of multithreaded multicore processors geared towards achieving both fast processing speed and flexibility of programming. The architecture of network processors considers many special properties for packet processing, including multiple threads, multiple processor cores on the same chip, special functional units, simplified ISA and simplified pipeline, etc. The architectural peculiarities of network processors raise new challenges for compiler design and optimization. Due to very high clocking speeds, the CPU memory gap on such processors is huge, making regis

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49

Restovic, Valderrama Maria Inés. "Compilador ASN.1 e codificador/decodificador para BER." [s.n.], 1992. http://repositorio.unicamp.br/jspui/handle/REPOSIP/259533.

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Orientador: Manuel de Jesus Mendes<br>Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação<br>Made available in DSpace on 2018-08-18T21:31:47Z (GMT). No. of bitstreams: 1 RestovicValderrama_MariaInes_M.pdf: 1435363 bytes, checksum: 073357e2857410d0a58e683b2837ca3e (MD5) Previous issue date: 1992<br>Resumo: Neste trabalho apresenta-se uma ferramenta chamada Compilador ASN.1, cujo objetivo é fornecer uma representação concreta para a sintaxe abstrata ASN.1, de forma que, as especificações das PDU's dos protocolos de aplicação, geralmente

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50

Wu, Xiaoqing. "Component-based language implementation with object-oriented syntax and aspect-oriented semantics." Birmingham, Ala. : University of Alabama at Birmingham, 2007. http://www.mhsl.uab.edu/dt/2007p/wu.pdf.

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Thesis (Ph. D.)--University of Alabama at Birmingham, 2007.<br>Additional advisors: Jeff Gray, Marjan Mernik, Alan Sprague, Murat Tanik. Description based on contents viewed June 25, 2007; title from title screen. Includes bibliographical references (p. 132-138).

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