Dissertations / Theses: 'Complementary Bipolar integrated circuits'

1

Ting, Goodwin. "An integrated BiCMOS driver chip for medium power applications /." Online version of thesis, 1991. http://hdl.handle.net/1850/11291.

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2

Lee, Wai Kit. "Modeling the distributed RC effects of BiCMOS technology at high frequency operations /." View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ECED%202006%20LEE.

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3

Hirschman, Karl D. "Process development of an analog/digital mixed-mode BiCMOS system at RIT /." Online version of thesis, 1992. http://hdl.handle.net/1850/11238.

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4

Guidash, R. Michael. "Development of a modular 2-micron BiCMOS process from an existing 2-micron n-well CMOS process /." Online version of thesis, 1991. http://hdl.handle.net/1850/11234.

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5

La, Pietra Andrew R. "Establishing a bipolar fabrication service for analog circuit realization at the Rochester Institute of Technology /." Online version of thesis, 1991. http://hdl.handle.net/1850/11272.

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6

Long, John R. (John Robert) Carleton University Dissertation Engineering Electrical. "High frequency integrated circuit design in BICMOS for monolithic timing recovery." Ottawa, 1992.

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7

Seth, Sachin. "Using complementary silicon-germanium transistors for design of high-performance rf front-ends." Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/44721.

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The objective of the research presented in this dissertation is to explore the achievable dynamic range limits in high-performance RF front-ends designed using SiGe HBTs, with a focus on complementary (npn + pnp) SiGe technologies. The performance requirements of RF front-ends are high gain, high linearity, low dc power consumption, very low noise figure, and compactness. The research presented in this dissertation shows that all of these requirements can easily be met by using complementary SiGe HBTs. Thus, a strong case is made in favor of using SiGe technologies for designing high dynamic range RF front-ends. The contributions from this research are summarized as follows: 1. The first-ever comparison study and comprehensive analysis of small-signal linearity (IIP3) for npn and pnp SiGe HBTs on SOI. 2. A novel comparison of large-signal robustness of npn and pnp SiGe HBTs for use in high-performance RF front-ends. 3. A systematic and rigorous comparison of SiGe HBT compact models for high-fidelity distortion modeling. 4. The first-ever feasibility study of using weakly-saturated SiGe HBTs for use in severely power constrained RF front-ends. 5. A novel X-band Low Noise Amplifier (LNA) using weakly-saturated SiGe HBTs. 6. Design and comprehensive analysis of RF switches with enhanced large-signal linearity. 7. Development of novel methods to reduce crosstalk noise in mixed-signal circuits and the first-ever analysis of crosstalk noise across temperature. 8. Design of a very high-linearity cellular band quadrature modulator for use in base-station applications using first-generation complementary SiGe HBTs.

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8

Diestelhorst, Ryan Matthew. "The design of SiGe integrated circuit components for extreme environment systems and sensors." Diss., Georgia Institute of Technology, 2013. http://hdl.handle.net/1853/50262.

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A background investigation of the total-dose radiation tolerance of a third generation complementary SiGe:C BiCMOS technology platform was performed. Tolerance was quantified under proton and X-ray radiation sources for both the npn and pnp HBT, as well as for an operational amplifier built with these devices. Furthermore, a technique known as junction isolation radiation hardening was proposed and tested with the goal of improving the SEE sensitivity of the npn by reducing the charge collected by the subcollector in the event of a direct ion strike. Three independent systems were designed, including: 1) a charge amplification channel developed as part of a remote electronics unit for the lunar environment, 2) variable bias circuitry for a self-healing radar receiver, and 3) an ultra-fast x-ray detector for picosecond scale time-domain measurements of evolving chemical reactions. The first two projects capitalized on the wide-temperature performance and radiation tolerance of the SiGe HBT, allowing them to operate under extreme environmental conditions reliably and consistently. The third design makes use of the high-frequency capabilities of the HBT, particularly in emitter-coupled logic (ECL) configurations. Findings concerning the performance of these systems and implications for future research are discussed.

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9

Barthélemy, Hervé. "Conception et application de nouveaux circuits analogiques mettant en oeuvre une boucle translineaire mixte a huit transistors." Paris 11, 1996. http://www.theses.fr/1996PA112234.

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Une nouvelle boucle translineaire mixte composee de huit transistors bipolaires (quatre npn et quatre pnp) est introduite. L'etude des invariances de la structure, a partir de la theorie des graphes, a permis de definir les differentes polarisations utilisables pour celle-ci. Nous en avons aussi deduit la position des miroirs de courant qu'il est possible de connecter sur cette boucle. Une polarisation particuliere parmi celles comprenant deux sources de courant a entierement ete traitee. Les proprietes dynamiques des circuits qui resultent des differentes polarisations sont ensuite analysees. Plusieurs nouveaux circuits deduits des analyses precedentes sont presentes: convoyeur de courant de seconde generation a resistance de sortie negative, convoyeur de courant de seconde generation a haute impedance d'entree, convoyeur de courant de troisieme generation ayant une faible distorsion pour une faible consommation. La boucle permet aussi de synthetiser une resistance flottante dont la valeur est controlee en courant. Les possibilites de realiser des convoyeurs quasi-parfait a partir de convoyeurs deja existants sont ensuite presentees et les limitations correspondantes analysees dans le cas particulier des circuits amplificateurs et differentiateurs. La derniere partie du memoire presente l'etude theorique, la realisation et les resultats de mesure relatifs a un oscillateur sinusoidal controle en courant dont la frequence est reglable entre 20mhz et 90mhz. Cet oscillateur utilise, entre autres, la resistance flottante realisee a partir de la boucle mixte a huit transistors precedente. Cette architecture a en particulier permis de controler l'amplitude du signal sans modifier la frequence. Il comprend aussi un circuit limiteur d'amplitude compose de quatre diodes. Cet oscillateur a ete realise par sgs-thomson en technologie bicmos 2m sous forme de circuit integre

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10

Kenyon, Eleazar Walter. "Low-noise circuitry for extreme environment detection systems implemented in SiGe BiCMOS technology." Thesis, Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/44873.

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This work evaluates two SiGe BiCMOS technology platforms as candidates for implementing extreme environment capable circuitry, with an emphasis on applications requiring high sensitivity and low noise. In Chapter 1, applications requiring extreme environment sensing circuitry are briefly reviewed and the motivation for undertaking this study is outlined. A case is then presented for the use of SiGe BiCMOS technology to meet this need, documenting the benefits of operating SiGe HBTs at cryogenic temperatures. Chapter 1 concludes with a brief description of device radiation effects in bipolar and CMOS devices, and a basic overview of noise in semiconductor devices and electronic components. Chapter 2 further elaborates on a specific application requiring low-noise circuitry capable of operating at cryogenic temperatures and proposes a number of variants of band-gap reference circuits for use in said system. Detailed simulation and theoretical analysis of the proposed circuits are presented and compared with measurements, validating the techniques used in the proposed designs and emphasizing the need for further understanding of device level low-temperature noise phenomena. Chapter 3 evaluates the feasibility of using a SiGe BiCMOS process, whose response to ionizing radiation was previously uncharacterized, for use in unshielded electronic systems needed for exploration of deep space planets or moons, specifically targeting Europa mission requirements. Measured total ionizing dose (TID) responses for both CMOS and bipolar SiGe devices are presented and compared to similar technologies. The mechanisms responsible for device degradation are outlined, and an explanation of unexpected results is proposed. Finally, Chapter 4 summarizes the work presented and understanding provided by this thesis, concluding by outlining future research needed to build upon this study and fully realize SiGe based extreme environment capable precision electronic systems.

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11

Liu, Haitao. "Novel 3-D CMOS and BiCMOS devices for high-density and high-speed ICs /." View Abstract or Full-Text, 2003. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202003%20LIU.

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12

Kargarrazi, Saleh. "High Temperature Bipolar SiC Power Integrated Circuits." Doctoral thesis, KTH, Integrerade komponenter och kretsar, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-201618.

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In the recent decade, integrated electronics in wide bandgap semiconductor technologies such as Gallium Nitride (GaN) and Silicon Carbide (SiC) have been shown to be viable candidates in extreme environments (e.g high-temperature and high radiation). Such electronics have applications in down-hole drilling, automobile-, air- and space- industries. In this thesis, integrated circuits (ICs) in bipolar 4H-SiC for high-temperature power applications are explored. In particular, device modelling, circuit design, layout design, and measurements are discussed for a range of circuits including operational amplifiers, linear voltage regulators, drivers for power switches, and power converters with integrated control. The circuits were demonstrated and tested from 25 °C up to 500 °C. Circuit design in bipolar SiC technology involves challenges such as the fabrication process’ uncertainties and incomplete models of the devices. Furthermore, high temperature modelling of the integrated devices is needed for circuit design and simulation. From the circuit design viewpoint, techniques such as negative-feedback, temperature-insensitive biasing, buffering and Darlington stages, and amplifiers with fewer gain stages, were shown to be useful for high-temperature IC design in bipolar SiC. It is shown that the linear voltage regulator can be improved by using a tailored high-current lateral Darlington power device in the same fabrication process. This results in a high temperature high current power supply solution. Moreover, the drivers can be improved by design in order to provide higher voltage levels and peak currents for the power devices (bipolar and MOSFET based). In addition, a DC-DC converter with fully integrated hysteretic control is designed taking advantage of several sub-circuits such as operational amplifier, Schmitt trigger and driver for the power switch. This study is followed by preliminary experimental results for the converter and controller IC.

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13

Miller, Ira 1943. "A CUSTOM BIPOLAR MICROPROCESSOR SUPPORT INTEGRATED CIRCUIT." Thesis, The University of Arizona, 1986. http://hdl.handle.net/10150/276648.

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14

Hall, S. "An integrated Schottky-collector heterojunction bipolar transistor." Thesis, University of Liverpool, 1987. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.384387.

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15

Lanni, Luigia. "Silicon Carbide Bipolar Integrated Circuits for High Temperature Applications." Licentiate thesis, KTH, Integrerade komponenter och kretsar, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-63804.

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Silicon carbide (SiC) is a semiconductor that provides significant advantages for high-power and high-temperature applications thanks to its wide bandgap, which is several times larger than silicon. The resulting high breakdown field, high thermal conductivity and high intrinsic temperature (well above 600 °C) allow high temperature operation of SiC devices and relaxed cooling requirements. In particular, SiC bipolar junction transistors (BJTs) are suitable for high temperature integrated circuits (ICs), due to the absence of a gate oxide. This work focuses on design, fabrication and characterization of the first 4H-SiC integrated circuits realized at KTH. It deals with basic bipolar ICs suitable for high temperature and low voltage applications. Operation up to 300 °C of low-voltage 4H-SiC NPN bipolar transistors and digital integrated circuits based on emitter coupled logic (ECL) has been demonstrated. In the temperature range 27 - 300 °C stable noise margins of about 1 V have been achieved for a 2-input OR-NOR gate operated on -15 V supply voltage, and an oscillation frequency of about 2 MHz has been observed for a 3-stage ring oscillator. The possibility of realizing PNP transistors and passive devices in the same process technology has also been investigated.
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16

Green, David W. "Behaviour of MOS-bipolar devices for power integrated circuits." Thesis, De Montfort University, 2006. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.496500.

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17

Diesing, Norbert Carleton University Dissertation Engineering Electrical. "ALE - a custom layout methodology for bipolar integrated circuits." Ottawa, 1987.

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18

Mantooth, Homer Alan. "Higher level modeling of analog integrated circuits." Diss., Georgia Institute of Technology, 1990. http://hdl.handle.net/1853/14951.

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19

Li, Xiaoyong. "Low noise design techniques for radio frequency integrated circuits /." Thesis, Connect to this title online; UW restricted, 2004. http://hdl.handle.net/1773/6013.

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20

Carbonero, Jean-Louis. "Développement des méthodes de mesures en hyperfréquences sur tranches de silicium et application à la caractérisation des technologies CMOS et BICMOS sub-microniques." Grenoble INPG, 1996. http://www.theses.fr/1996INPG0051.

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La reduction spectaculaire des dimensions des transistors bipolaires et mosfet en technologies cmos et bicmos s'est accompagnee d'une croissance des densites d'integration et surtout d'une augmentation tout aussi spectaculaire des performances de ces transistors. Des frequences de transition de 20 ghz sont aujourd'hui atteintes pour des technologies silicium sub-microniques en phase industrielle. Ces technologies sont appelees a jouer un role important pour la realisation de circuits integres radiofrequences et hyperfrequences. En raison des performances dynamiques toujours plus grandes de ces transistors, les mesures de parametres s et du facteur de bruit, dans le domaine des hyperfrequences ont ete introduites pour le developpement de ces nouvelles technologies et la construction des modeles de dispositifs passifs et actifs, indispensables a la conception des circuits integres analogiques hyperfrequences. Les methodes de mesures hyperfrequences, realisees a l'aide d'analyseurs vectoriels de reseaux, et de caracterisation du facteur de bruit des transistors sont presentees dans une approche de test industriel. Les etapes de mesure, de calibrage et de correction, specifiquement appliquees a la caracterisation des technologies cmos et bicmos sur tranche de silicium, ont ete automatisees et decrites ainsi que les outils necessaires a cette caracterisation. Les resultats d'extraction des frequences de transition, des frequences maximales d'oscillation et des parametres de modeles des dispositifs actifs tels que les transistors bipolaires et mosfet, mais aussi les resultats de caracterisation d'elements passifs tels que les inductances ou les lignes de transmission sont presentes pour les technologies avancees cmos et bicmos 0,7 et 0,5 um

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21

Hildreth, Scott A. "Statistical SPICE parameter extraction for an N-Well CMOS process /." Online version of thesis, 1995. http://hdl.handle.net/1850/12177.

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22

Kwon, Ohsang. "On high performance multiplier design using dynamic CMOS circuits /." Full text (PDF) from UMI/Dissertation Abstracts International, 2000. http://wwwlib.umi.com/cr/utexas/fullcit?p3004310.

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23

Kanitkar, Hrishikesh. "Subthreshold circuits : design, implementation and application /." Online version of thesis, 2009. http://hdl.handle.net/1850/8926.

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24

Chen, Yonggang Suhling J. C. Jaeger Richard C. "CMOS stress sensor circuits." Auburn, Ala., 2006. http://repo.lib.auburn.edu/2006%20Fall/Dissertations/CHEN_YONGGANG_42.pdf.

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25

Nayeem, Mustayeen B. "Applied mechanical tensile strain effects on silicon bipolar and silicon-germanium heterojunction bipolar devices." Thesis, Available online, Georgia Institute of Technology, 2005, 2005. http://etd.gatech.edu/theses/available/etd-07182005-102447/.

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Thesis (M. S.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2006.
Dr. John D. Cressler, Committee Chair ; John Papapolymerou, Committee Member ; Joy Laskar, Committee Member.

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26

Opperman, Tjaart Adriaan Kruger. "A 5 GHz BiCMOS I/Q VCO with 360° variable phase outputs using the vector sum method." Diss., Pretoria : [s.n.], 2009. http://upetd.up.ac.za/thesis/available/etd-04082009-171225/.

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Thesis (M.Eng.(Microelectronic Engineering))--University of Pretoria, 2009.
Includes summaries in Afrikaans and English. Includes bibliographical references (leaves [74]-78). Mode of access: World Wide Web.

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27

Lu, Yuanlin. "Power and performance optimization of static CMOS circuits with process variation." Auburn, Ala., 2007. http://repo.lib.auburn.edu/07M%20Dissertations/LU_YUANLIN_28.pdf.

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28

Bollinger, S. Wayne. "Hierarchical test generation for CMOS circuits." Diss., This resource online, 1992. http://scholar.lib.vt.edu/theses/available/etd-07282008-134708/.

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29

Woo, Sang Hyun. "Low noise RF CMOS receiver integrated circuits." Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/50127.

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The objective of this research is to design and implement low-noise wideband RFIC components with CMOS technology for the direct-conversion architecture. This research proposes noise reduction techniques to improve the thermal noise and flicker noise contribution of a low noise amplifier (LNA) and a mixer. Of these techniques, the LNA is found to reduce noise, boost gain, and consume a relatively low amount of power without sacrificing the wideband and linearity advantages of a conventional common gate (CG) topology. The research concludes by investigating the proposed mixer topology, which senses and compensates local oscillator (LO) phase mismatches, the dominant cause of flicker noise.

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30

Wolf, Randy L. "Silicon germanium (SiGe) bipolar Dicke radiometer front end receiver chip." Connect to this title online, 2008. http://scholarworks.umass.edu/theses/76/.

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31

Öziş, Hatice Dicle. "Image-reject receiver architectures for radio frequency integrated circuits /." Thesis, Connect to this title online; UW restricted, 2006. http://hdl.handle.net/1773/6052.

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32

Massier, Tobias [Verfasser]. "On the Structural Analysis of CMOS and Bipolar Analog Integrated Circuits / Tobias Massier." Aachen : Shaker, 2010. http://d-nb.info/1081885688/34.

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33

Hedayati, Raheleh. "High-Temperature Analog and Mixed-Signal Integrated Circuits in Bipolar Silicon Carbide Technology." Doctoral thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-213697.

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Silicon carbide (SiC) integrated circuits (ICs) can enable the emergence of robust and reliable systems, including data acquisition and on-site control for extreme environments with high temperature and high radiation such as deep earth drilling, space and aviation, electric and hybrid vehicles, and combustion engines. In particular, SiC ICs provide significant benefit by reducing power dissipation and leakage current at temperatures above 300 °C compared to the Si counterpart. In fact, Si-based ICs have a limited maximum operating temperature which is around 300 °C for silicon on insulator (SOI). Owing to its superior material properties such as wide bandgap, three times larger than Silicon, and low intrinsic carrier concentration, SiC is an excellent candidate for high-temperature applications. In this thesis, analog and mixed-signal circuits have been implemented using SiC bipolar technology, including bandgap references, amplifiers, a master-slave comparator, an 8-bit R-2R ladder-based digital-to-analog converter (DAC), a 4-bit flash analog-to-digital converter (ADC), and a 10-bit successive-approximation-register (SAR) ADC. Spice models were developed at binned temperature points from room temperature to 500 °C, to simulate and predict the circuits’ behavior with temperature variation. The high-temperature performance of the fabricated chips has been investigated and verified over a wide temperature range from 25 °C to 500 °C. A stable gain of 39 dB was measured in the temperature range from 25 °C up to 500 °C for the inverting operational amplifier with ideal closed-loop gain of 40 dB. Although the circuit design in an immature SiC bipolar technology is challenging due to the low current gain of the transistors and lack of complete AC models, various circuit techniques have been applied to mitigate these problems. This thesis details the challenges faced and methods employed for device modeling, integrated circuit design, layout implementation and finally performance verification using on-wafer characterization of the fabricated SiC ICs over a wide temperature range.

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34

Murji, Rizwan Deen M. Jamal. "Low-power CMOS radio frequency integrated circuits for frequency synthesis /." *McMaster only, 2005.

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35

Song, Shiunn Luen Steven 1960. "Characterization and design of the complementary JFET LAMBDA-DIODE SRAM." Thesis, The University of Arizona, 1988. http://hdl.handle.net/10150/276882.

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The LAMBDA-DIODE was invented in integrated-circuit form in 1974. There was a proposal about this device's application in memory circuits at that time. This thesis is to evaluate the circuit performance of the COMPLEMENTARY JFET LAMBDA-DIODE SRAM. It investigates the speed, power consumption and chip area of this circuit compared with the JFET CROSS COUPLED SRAM by using SPICE and breadboard simulation techniques. The results show positive signs of the Λ-DIODE's feasibility for use in VLSI static memory circuits from the chip area aspect if the parasitic capacitance of the JFET device could be minimized to reduce the power delay product.

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36

Yee, Gin Sun. "Dynamic logic design and synthesis using clock-delayed domino /." Thesis, Connect to this title online; UW restricted, 1999. http://hdl.handle.net/1773/6039.

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37

Schnyder, Iwan. "An indium-phosphide double-heterojunction bipolar transistor technology for 80 Gb/s integrated circuits /." Konstanz : Hartung-Gorre, 2005. http://www.loc.gov/catdir/toc/fy0610/2006356171.html.

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38

Deshpande, Sandeep. "A cost quality model for CMOS IC design." Thesis, This resource online, 1994. http://scholar.lib.vt.edu/theses/available/etd-12042009-020251/.

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39

Rubin, Lawrence H. "A parameterized CMOS standard cell library and a full 8-bit grey scale morphological array processor /." Online version of thesis, 1991. http://hdl.handle.net/1850/11250.

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40

Wang, Fan Agrawal Vishwani D. "Soft error rate determination for nanometer CMOS VLSI circuits." Auburn, Ala, 2008. http://hdl.handle.net/10415/1517.

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41

Bethel, Ryan H. "Low Voltage BiCMOS Circuit Topologies for the Design of a 19GHz, 1.2V, 4-Bit Accumulator in Silicon-Germanium." Fogler Library, University of Maine, 2007. http://www.library.umaine.edu/theses/pdf/BethelRH2007.pdf.

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42

Tsui, Hau Yiu. "A 5 GHz integrated low-power CMOS RF front-end IC design /." View abstract or full-text, 2004. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202004%20TSUI.

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43

Rodriguez, Luis. "Design of a Monolithic Bipolar Junction Transistor Amplifier in the Common Emitter with Cascaded Common Collector Configuration." Honors in the Major Thesis, University of Central Florida, 2004. http://digital.library.ucf.edu/cdm/ref/collection/ETH/id/724.

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This item is only available in print in the UCF Libraries. If this is your Honors Thesis, you can help us make it available online for use by researchers around the world by following the instructions on the distribution consent form at http://library.ucf
Bachelors
Engineering and Computer Science
Electrical Engineering

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44

Xuan, Xiangdong. "Analysis and design of reliable mixed-signal CMOS circuits." Diss., Available online, Georgia Institute of Technology, 2004:, 2004. http://etd.gatech.edu/theses/available/etd-08032004-185515/unrestricted/xuan%5Fxiangdong%5F200412%5Fphd.pdf.

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Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2005.
Singh, Adit, Committee Member ; Chatterjee, Abhijit, Committee Chairl May, Gary, Committee Member ; Keezer, David, Committee Member ; Swaminathan, Madhavan, Committee Member. Vita. Includes bibliographical references.

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45

Lee, Myunghee. "A quasi-monolithic optical receiver using a standard digital CMOS technology." Diss., Georgia Institute of Technology, 1996. http://hdl.handle.net/1853/14720.

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46

Gajera, Dipesh. "Process costing of microchip." Morgantown, W. Va. : [West Virginia University Libraries], 2006. https://eidr.wvu.edu/etd/documentdata.eTD?documentid=4726.

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Thesis (M.S.)--West Virginia University, 2006.
Title from document title page. Document formatted into pages; contains vii, 92 p. : ill. (some col.). Includes abstract. Includes bibliographical references (p. 85-91).

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47

Ng, Chik-wai, and 吳植偉. "Design techniques of advanced CMOS building blocks for high-performance power management integrated circuits." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2011. http://hub.hku.hk/bib/B45896926.

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48

Tan, Eugene. "Design, fabrication and characterization of N-channel InGaAsP-InP based inversion channel technology devices (ICT) for optoelectronic integrated circuits (OEIC), double heterojunction optoelectronic switches (DOES), heterojunction field-effect transistors (HFET), bipolar inversion channel field-effect transistors (BICFET) and bipolar inversion channel phototransistors (BICPT)." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape11/PQDD_0006/NQ42767.pdf.

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49

Choi, Kyu-Won. "Hierarchical power optimization for ultra low-power digital systems." Diss., Available online, Georgia Institute of Technology, 2004:, 2003. http://etd.gatech.edu/theses/available/etd-04082004-180111/unrestricted/choi%5Fkyu-won%5F200312%5Fphd.pdf.

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50

Layton, Kent D. "Low-voltage analog CMOS architectures and design methods /." Diss., CLICK HERE for online access, 2007. http://contentdm.lib.byu.edu/ETD/image/etd2141.pdf.

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Dissertations / Theses on the topic 'Complementary Bipolar integrated circuits'

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