Journal articles on the topic 'Computer architecture'

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1

Wang, Yan, and Jun Hui Zheng. "A Well Modularized Computer Network Architecture." Applied Mechanics and Materials 631-632 (September 2014): 902–5. http://dx.doi.org/10.4028/www.scientific.net/amm.631-632.902.

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By analyzing a variety of computer network architectures, we can find that researchers establish different computer network models from their different starting points and get different computer network architectures by different modularization methods. We establish a well modularized non-layered computer network architecture. This paper compares it with the layered architecture and obtains a conclusion that it is superior to the layered architecture. We have developed two framework prototypes of it. In the one of them we develop some application softwares of TCP/IP, including E-mail, FTP, Web and standard IP telephone, which have been tested by the third-party. It could show the accuracy and easily implemented property of this architecture.
2

Singh, Amit Kumar, and Geeta Chhabra Gandhi. "Computer Architecture." International Journal of Smart Security Technologies 7, no. 1 (January 2020): 41–48. http://dx.doi.org/10.4018/ijsst.2020010103.

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It is a well-known fact that the expansion of Internet has given rise to many daily activities which are being done online including financial and personal data transactions which has developed the need of security like never before. It has made people realize that the data on the internet must be secured as many types of attacks are increasing day by day with the advancement of technology. So, here the requirement is to ensure that the services are supplied to a legitimate user rather than bots to prevent service abuse. The present article provides such a security from bots with the help of a standard security mechanism called CAPTCHA. A new cognition-based design of CAPTCHA is produced overcoming the limitation of presently available CAPTCHA. Also, a new architecture for producing these CAPTCHA codes randomly is presented in this article so that the differentiation among a legitimate user and Bots can be made. Thus, the major objective of the article is to present an optimum security mechanism for differentiating among humans and Bots.
3

Chien, Andrew A. "Computer architecture." Communications of the ACM 61, no. 9 (August 22, 2018): 5. http://dx.doi.org/10.1145/3243136.

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4

Tabak, Daniel. "Computer Architecture." Microprocessors and Microsystems 14, no. 10 (December 1990): 676. http://dx.doi.org/10.1016/0141-9331(90)90043-u.

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Mathew, Jincy C. "Review on Architecture of Computer Networks." International Journal of Psychosocial Rehabilitation 24, no. 4 (April 30, 2020): 6997–7001. http://dx.doi.org/10.37200/ijpr/v24i5/pr2020702.

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Odhiambo, M. O., and P. O. Umenne. "NET-COMPUTER: Internet Computer Architecture and its Application in E-Commerce." Engineering, Technology & Applied Science Research 2, no. 6 (December 4, 2012): 302–9. http://dx.doi.org/10.48084/etasr.145.

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Research in Intelligent Agents has yielded interesting results, some of which have been translated into commer­cial ventures. Intelligent Agents are executable software components that represent the user, perform tasks on behalf of the user and when the task terminates, the Agents send the result to the user. Intelligent Agents are best suited for the Internet: a collection of computers connected together in a world-wide computer network. Swarm and HYDRA computer architectures for Agents’ execution were developed at the University of Surrey, UK in the 90s. The objective of the research was to develop a software-based computer architecture on which Agents execution could be explored. The combination of Intelligent Agents and HYDRA computer architecture gave rise to a new computer concept: the NET-Computer in which the comput­ing resources reside on the Internet. The Internet computers form the hardware and software resources, and the user is provided with a simple interface to access the Internet and run user tasks. The Agents autonomously roam the Internet (NET-Computer) executing the tasks. A growing segment of the Internet is E-Commerce for online shopping for products and services. The Internet computing resources provide a marketplace for product suppliers and consumers alike. Consumers are looking for suppliers selling products and services, while suppliers are looking for buyers. Searching the vast amount of information available on the Internet causes a great deal of problems for both consumers and suppliers. Intelligent Agents executing on the NET-Computer can surf through the Internet and select specific information of interest to the user. The simulation results show that Intelligent Agents executing HYDRA computer architecture could be applied in E-Commerce.
7

Kaiser, Marcus. "Brain architecture: a design for natural computation." Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences 365, no. 1861 (September 13, 2007): 3033–45. http://dx.doi.org/10.1098/rsta.2007.0007.

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Fifty years ago, John von Neumann compared the architecture of the brain with that of the computers he invented and which are still in use today. In those days, the organization of computers was based on concepts of brain organization. Here, we give an update on current results on the global organization of neural systems. For neural systems, we outline how the spatial and topological architecture of neuronal and cortical networks facilitates robustness against failures, fast processing and balanced network activation. Finally, we discuss mechanisms of self-organization for such architectures. After all, the organization of the brain might again inspire computer architecture.
8

Dong, Xia, Shou Quan Wang, Xin Zhang, and Xiao Jia Ji. "Software Radar Hardware Architecture Based on General Computer." Advanced Materials Research 846-847 (November 2013): 207–10. http://dx.doi.org/10.4028/www.scientific.net/amr.846-847.207.

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For software radar, different functions are realized by software running on standard hardware platform, which brings to great predominance over traditional radar. In this paper, realizable structure of software radar was analyzed, and hardware platform based on computer was studied. Two hardware architectures, one-computer architecture as well as computer cluster architecture were raised based on computer. The one-computer architecture is available to radars that cubage is restricted, while computer cluster architecture is applied in huge radar with complex computation.
9

Clements, A. "Computer architecture education." Microprocessors and Microsystems 23, no. 5 (October 1999): 255–56. http://dx.doi.org/10.1016/s0141-9331(99)00020-4.

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Clements, A. "Computer architecture education." IEEE Micro 20, no. 3 (May 2000): 10–12. http://dx.doi.org/10.1109/mm.2000.846304.

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11

Bhatt, Dulari, Chirag Patel, Hardik Talsania, Jigar Patel, Rasmika Vaghela, Sharnil Pandya, Kirit Modi, and Hemant Ghayvat. "CNN Variants for Computer Vision: History, Architecture, Application, Challenges and Future Scope." Electronics 10, no. 20 (October 11, 2021): 2470. http://dx.doi.org/10.3390/electronics10202470.

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Computer vision is becoming an increasingly trendy word in the area of image processing. With the emergence of computer vision applications, there is a significant demand to recognize objects automatically. Deep CNN (convolution neural network) has benefited the computer vision community by producing excellent results in video processing, object recognition, picture classification and segmentation, natural language processing, speech recognition, and many other fields. Furthermore, the introduction of large amounts of data and readily available hardware has opened new avenues for CNN study. Several inspirational concepts for the progress of CNN have been investigated, including alternative activation functions, regularization, parameter optimization, and architectural advances. Furthermore, achieving innovations in architecture results in a tremendous enhancement in the capacity of the deep CNN. Significant emphasis has been given to leveraging channel and spatial information, with a depth of architecture and information processing via multi-path. This survey paper focuses mainly on the primary taxonomy and newly released deep CNN architectures, and it divides numerous recent developments in CNN architectures into eight groups. Spatial exploitation, multi-path, depth, breadth, dimension, channel boosting, feature-map exploitation, and attention-based CNN are the eight categories. The main contribution of this manuscript is in comparing various architectural evolutions in CNN by its architectural change, strengths, and weaknesses. Besides, it also includes an explanation of the CNN’s components, the strengths and weaknesses of various CNN variants, research gap or open challenges, CNN applications, and the future research direction.
12

Medvidovic, Nenad, Eric M. Dashofy, and Richard N. Taylor. "The Role of Middleware in Architecture-Based Software Development." International Journal of Software Engineering and Knowledge Engineering 13, no. 04 (August 2003): 367–93. http://dx.doi.org/10.1142/s0218194003001330.

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Software architectures promote development focused on modular functional building blocks (components), their interconnections (configurations), and their interactions (connectors). Since architecture-level components often contain complex functionality, it is reasonable to expect that their interactions will be complex as well. Middleware technologies such as CORBA, COM, and RMI provide a set of predefined services for enabling component composition and interaction. However, the potential role of such services in the implementations of software architectures is not well understood. In practice, middleware can resolve various types of component heterogeneity — across platform and language boundaries, for instance — but also can induce unwanted architectural constraints on application development. We present an approach in which components communicate through architecture-level software connectors that are implemented using middleware. This approach preserves the properties of the architecture-level connectors while leveraging the beneficial capabilities of the underlying middleware. We have implemented this approach in the context of a component- and message-based architectural style called C2 and demonstrated its utility in the context of several diverse applications. We argue that our approach provides a systematic and reasonable way to bridge the gap between architecture-level connectors and implementation-level middleware packages.
13

Jamieson, Peter, Huan Le, Nathan Martin, Tyler McGrew, Yicheng Qian, Eric Schonauer, Alan Ehret, and Michel A. Kinsy. "Computer Engineering Education Experiences with RISC-V Architectures—From Computer Architecture to Microcontrollers." Journal of Low Power Electronics and Applications 12, no. 3 (August 9, 2022): 45. http://dx.doi.org/10.3390/jlpea12030045.

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With the growing popularity of RISC-V and various open-source released RISC-V processors, it is now possible for computer engineers students to explore this simple and relevant architecture, and also, these students can explore and design a microcontroller at a low-level using real tool-flows and implement and test their hardware. In this work, we describe our experiences with undergraduate engineers building RISC-V architectures on an FPGA and then extending their experiences to implement an Arduino-like RISC-V tool-flow and the respective hardware and software to handle input-output ports, interrupts, hardware timers, and communication protocols. The microcontroller is implemented on an FPGA as a Senior Design project to test the viability of such efforts. In this work, we will explain how undergraduates can achieve these experiences including preparation for these projects, the tool-flows they use, the challenges in understanding and extending a RISC-V processor with microcontroller functionality, and a suggestion of how to integrate this learning into an existing curriculum, including a discussion on if we should include these deeper experiences in the Computer Engineering undergraduate curriculum.
14

Schmidt, Anne Marie Due, and Poul Henning Kirkegaard. "From Architectural Acoustics to Acoustical Architecture Using Computer Simulation." Building Acoustics 12, no. 2 (June 2005): 85–98. http://dx.doi.org/10.1260/1351010054037965.

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Architectural acoustics design has in the past been based on simple design rules. However, with a growing complexity in architectural acoustics and the emergence of room acoustic simulation programmes with considerable potential, it is now possible to subjectively analyse and evaluate acoustic properties prior to the actual construction of a building. With the right tools applied, acoustic design can become an integral part of the architectural design process. The aim of this paper is to investigate the field of application that an acoustic simulation programme can have during an architectural acoustic design process and to set up a strategy to develop future programmes. The emphasis is put on the first three out of four phases in the working process of the architect and a case study is carried out in which each phase is represented by typical results – as exemplified with reference to the design of Bagsvaerd Church by Jørn Utzon. The paper discusses the advantages and disadvantages of the programme in each phase compared to the works of architects not using acoustic simulation programmes. The conclusion of the paper points towards the need to apply the acoustic simulation programmes to the first phases in the architectural process and set out a reverse strategy for simulation programmes to do so – from developing acoustics from given spaces to developing spaces from given acoustics.
15

Roorda, Esther, Seyedramin Rasoulinezhad, Philip H. W. Leong, and Steven J. E. Wilton. "FPGA Architecture Exploration for DNN Acceleration." ACM Transactions on Reconfigurable Technology and Systems 15, no. 3 (September 30, 2022): 1–37. http://dx.doi.org/10.1145/3503465.

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Recent years have seen an explosion of machine learning applications implemented on Field-Programmable Gate Arrays (FPGAs) . FPGA vendors and researchers have responded by updating their fabrics to more efficiently implement machine learning accelerators, including innovations such as enhanced Digital Signal Processing (DSP) blocks and hardened systolic arrays. Evaluating architectural proposals is difficult, however, due to the lack of publicly available benchmark circuits. This paper addresses this problem by presenting an open-source benchmark circuit generator that creates realistic DNN-oriented circuits for use in FPGA architecture studies. Unlike previous generators, which create circuits that are agnostic of the underlying FPGA, our circuits explicitly instantiate embedded blocks, allowing for meaningful comparison of recent architectural proposals without the need for a complete inference computer-aided design (CAD) flow. Our circuits are compatible with the VTR CAD suite, allowing for architecture studies that investigate routing congestion and other low-level architectural implications. In addition to addressing the lack of machine learning benchmark circuits, the architecture exploration flow that we propose allows for a more comprehensive evaluation of FPGA architectures than traditional static benchmark suites. We demonstrate this through three case studies which illustrate how realistic benchmark circuits can be generated to target different heterogeneous FPGAs.
16

Ahmad, Othman. "FPGA BASED INDIVIDUAL COMPUTER ARCHITECTURE LABORATORY EXERCISES." Journal of BIMP-EAGA Regional Development 3, no. 1 (December 15, 2017): 23–31. http://dx.doi.org/10.51200/jbimpeagard.v3i1.1026.

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Computer Architecture is the study of digital computers towards designing, building and operating digital computers. Digital computers are vital for the modern living because they are essential in providing the intelligences in devices such as self-driving cars and smartphones. Computer Architecture is a core subject for the Electronic (Computer) Engineering course at the Universiti Malaysia Sabah that is compliant to the requirement of the Washington Accord as accredited by the Engineering Accreditation Council of the Board of Engineers of Malaysia (EAC). An FPGA (Field Programmable Gate Array) based Computer Architecture Laboratory had been developed to support the curriculum of this course. FPGA allows a sustainable implementation of laboratory exercises without resorting to poisonous fabrication of microelectronic devices and installation of integrated circuits. An FPGA is just a configurable and therefore reusable digital design component. Two established organisations promoting computer engineering curriculum, ACM and IEEE, encourages the use of FPGA in digital design in their latest recommendation and together with the EAC, emphasises the grasp of the fundamentals for each student. The laboratory exercises are individual exercises where each student is given a unique assignment. A laboratory manual is provided as a guide and project specification for each student but overall the concept of the laboratory exercise is a student-centred one. Each student is allowed to pace their effort to achieve the sessions of the laboratory exercises starting from session one to session ten. A quantitative analysis of the effectiveness of these laboratory sessions is carried out based on the numbers of students completing the laboratory sessions. These sessions start from an 1:FPGA tutorial to implementations of features of a microprocessor of 2:Immediate Load, 3:Immediate Load to Multiple Registers, 4:Addition, 5:Operation Code, 6:Program Memory, 7:Jump, 8:Conditional Jump, 9:Register to Register and 10:Input-Output. The results of three batches of students show that within the time limits of a one credit hour course, students had managed to complete some aspects of the implementation of a simple microprocessor.
17

AKL, SELIM G. "THREE COUNTEREXAMPLES TO DISPEL THE MYTH OF THE UNIVERSAL COMPUTER." Parallel Processing Letters 16, no. 03 (September 2006): 381–403. http://dx.doi.org/10.1142/s012962640600271x.

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It is shown that the concept of a Universal Computer cannot be realized. Specifically, instances of a computable function [Formula: see text] are exhibited that cannot be computed on any machine [Formula: see text] that is capable of only a finite and fixed number of operations per step. This remains true even if the machine [Formula: see text] is endowed with an infinite memory and the ability to communicate with the outside world while it is attempting to compute [Formula: see text]. It also remains true if, in addition, [Formula: see text] is given an indefinite amount of time to compute [Formula: see text]. This result applies not only to idealized models of computation, such as the Turing Machine and the like, but also to all known general-purpose computers, including existing conventional computers (both sequential and parallel), as well as contemplated unconventional ones such as biological and quantum computers. Even accelerating machines (that is, machines that increase their speed at every step) cannot be universal.
18

Zhang, Xinyu, Vincent C. S. Lee, Jia Rong, Feng Liu, and Haoyu Kong. "Multi-channel convolutional neural network architectures for thyroid cancer detection." PLOS ONE 17, no. 1 (January 21, 2022): e0262128. http://dx.doi.org/10.1371/journal.pone.0262128.

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Early detection of malignant thyroid nodules leading to patient-specific treatments can reduce morbidity and mortality rates. Currently, thyroid specialists use medical images to diagnose then follow the treatment protocols, which have limitations due to unreliable human false-positive diagnostic rates. With the emergence of deep learning, advances in computer-aided diagnosis techniques have yielded promising earlier detection and prediction accuracy; however, clinicians’ adoption is far lacking. The present study adopts Xception neural network as the base structure and designs a practical framework, which comprises three adaptable multi-channel architectures that were positively evaluated using real-world data sets. The proposed architectures outperform existing statistical and machine learning techniques and reached a diagnostic accuracy rate of 0.989 with ultrasound images and 0.975 with computed tomography scans through the single input dual-channel architecture. Moreover, the patient-specific design was implemented for thyroid cancer detection and has obtained an accuracy of 0.95 for double inputs dual-channel architecture and 0.94 for four-channel architecture. Our evaluation suggests that ultrasound images and computed tomography (CT) scans yield comparable diagnostic results through computer-aided diagnosis applications. With ultrasound images obtained slightly higher results, CT, on the other hand, can achieve the patient-specific diagnostic design. Besides, with the proposed framework, clinicians can select the best fitting architecture when making decisions regarding a thyroid cancer diagnosis. The proposed framework also incorporates interpretable results as evidence, which potentially improves clinicians’ trust and hence their adoption of the computer-aided diagnosis techniques proposed with increased efficiency and accuracy.
19

Driker, Benjamin. "Disbursed control computer architecture." ACM SIGARCH Computer Architecture News 27, no. 3 (June 1999): 24–31. http://dx.doi.org/10.1145/333680.333695.

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Ma, K. "Review: Computer Systems Architecture." Computer Bulletin 46, no. 5 (September 1, 2004): 31. http://dx.doi.org/10.1093/combul/46.5.31-a.

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Wulf, Wm A. "The WM computer architecture." ACM SIGARCH Computer Architecture News 16, no. 1 (March 1988): 70–84. http://dx.doi.org/10.1145/44571.44577.

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Torrellas, Josep. "Extreme-scale computer architecture." National Science Review 3, no. 1 (January 6, 2016): 19–23. http://dx.doi.org/10.1093/nsr/nwv085.

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Dorsey, Julie, and Leonard McMillan. "Computer graphics and architecture." ACM SIGGRAPH Computer Graphics 32, no. 1 (February 1998): 45–48. http://dx.doi.org/10.1145/279389.279449.

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Pancratov, Cosmin, Jacob M. Kurzer, Kelly A. Shaw, and Matthew L. Trawick. "Why Computer Architecture Matters." Computing in Science & Engineering 10, no. 3 (May 2008): 59–63. http://dx.doi.org/10.1109/mcse.2008.87.

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Cragon, Harvey G. "Computer Architecture and Implementation." Measurement Science and Technology 12, no. 10 (September 12, 2001): 1744–45. http://dx.doi.org/10.1088/0957-0233/12/10/704.

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Ibbett, R. N. "Computer architecture visualisation techniques." Microprocessors and Microsystems 23, no. 5 (October 1999): 291–300. http://dx.doi.org/10.1016/s0141-9331(99)00024-1.

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Karafyllidis, Ioannis G. "Cellular quantum computer architecture." Physics Letters A 320, no. 1 (December 2003): 35–38. http://dx.doi.org/10.1016/j.physleta.2003.11.001.

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28

Bhuyan, Laxmi N. "High-performance computer architecture." Future Generation Computer Systems 11, no. 6 (October 1995): 501–2. http://dx.doi.org/10.1016/0167-739x(95)00020-s.

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Kammerer-Luka, G. "Architecture — related computer art." Visual Computer 2, no. 3 (July 1986): 187–88. http://dx.doi.org/10.1007/bf01900337.

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Hunt, Ray. "Computer architecture and communications." Computer Communications 11, no. 6 (December 1988): 331. http://dx.doi.org/10.1016/0140-3664(88)90048-5.

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Markettos, A. T., R. N. M. Watson, S. W. Moore, P. Sewell, and P. G. Neumann. "Through computer architecture, darkly." Communications of the ACM 62, no. 6 (May 21, 2019): 25–27. http://dx.doi.org/10.1145/3325284.

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Stojcev, M. "Computer Organization and Architecture." Microelectronics Journal 31, no. 5 (May 2000): 375–76. http://dx.doi.org/10.1016/s0026-2692(99)00155-x.

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Clements, Alan. "High-performance computer architecture." Microprocessors and Microsystems 13, no. 1 (January 1989): 63. http://dx.doi.org/10.1016/0141-9331(89)90038-0.

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Clements, Alan. "Computer architecture and design." Microprocessors and Microsystems 14, no. 1 (January 1990): 62. http://dx.doi.org/10.1016/0141-9331(90)90017-p.

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Sorin, Daniel J. "Fault Tolerant Computer Architecture." Synthesis Lectures on Computer Architecture 4, no. 1 (January 2009): 1–104. http://dx.doi.org/10.2200/s00192ed1v01y200904cac005.

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Konyavsky, Valery A., and Gennady V. Ross. "COMPUTER WITH CHANGEABLE ARCHITECTURE." Journal of Mechanical Engineering Research and Developments 42, no. 3 (March 28, 2019): 19–23. http://dx.doi.org/10.26480/jmerd.03.2019.19.23.

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Anderson, Noel W. "Amorphous computer system architecture." ACM SIGARCH Computer Architecture News 18, no. 1 (March 1990): 51. http://dx.doi.org/10.1145/379126.379133.

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Schoeberl, Martin. "Time-Predictable Computer Architecture." EURASIP Journal on Embedded Systems 2009 (2009): 1–17. http://dx.doi.org/10.1155/2009/758480.

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Ibbett, Roland N., J. C. Diaz y Carballo, and D. A. W. Dolman. "Computer architecture simulation models." ACM SIGCSE Bulletin 38, no. 3 (September 26, 2006): 353. http://dx.doi.org/10.1145/1140123.1140263.

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Mirmotahari, Omid, Christian Holmboe, and Jens Kaasbøll. "Difficulties learning computer architecture." ACM SIGCSE Bulletin 35, no. 3 (September 2003): 247. http://dx.doi.org/10.1145/961290.961606.

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Hill, Mark D. "21st century computer architecture." ACM SIGPLAN Notices 49, no. 8 (November 26, 2014): 1–2. http://dx.doi.org/10.1145/2692916.2558890.

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G.W.A.D. "Computer architecture and design." Microelectronics Reliability 30, no. 1 (January 1990): 182–83. http://dx.doi.org/10.1016/0026-2714(90)90027-k.

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Tsuchiya, Mas. "Computer hardware/software architecture." Microprocessors and Microsystems 11, no. 4 (May 1987): 236. http://dx.doi.org/10.1016/0141-9331(87)90383-8.

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Yang, Chia-Lin. "Understanding Computer Architecture Sustainability." Computer 56, no. 9 (September 2023): 4–5. http://dx.doi.org/10.1109/mc.2023.3290271.

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PAHL, CLAUS, YAOLING ZHU, and VERONICA GACITUA-DECAR. "A TEMPLATE-DRIVEN APPROACH FOR MAINTAINABLE SERVICE-ORIENTED INFORMATION SYSTEMS INTEGRATION." International Journal of Software Engineering and Knowledge Engineering 19, no. 07 (November 2009): 889–912. http://dx.doi.org/10.1142/s0218194009004465.

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Service-oriented architecture (SOA) is currently the predominant software integration framework. Web services provide the predominant platform for SOA. SOA as an integration architecture solution supports a range of application scenarios. We present a solution for the integration of business information systems based on SOA and Web services. We discuss maintainability requirements in relation to information-specific integration and architecture aspects. A template-based approach based on modular and declarative transformation rules and architectural styles and patterns defines our solution to the maintainability problem of integration architectures.
46

Verma, Neena. "Insecurity in architecture." Architectural Research Quarterly 18, no. 2 (June 2014): 106–9. http://dx.doi.org/10.1017/s1359135514000414.

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‘I myself do not believe in explaining anything’, wrote Shel Silverstein. It seems that architecture is always looking to explain itself. Definitions of architecture seem almost common knowledge; ask a bartender, biologist, computer scientist, economist, legislator, birdwatcher, quilter or scientist, each of whom analogises their field with respect to architecture. And several within the profession can themselves define architecture's limits quite elegantly. Most recently Steven Holl defined architecture as consisting simply of abstract, use, space and idea. However, seeking a rationale or explanation for architecture – its role in society, its impact, its value – remains an open debate. This debate has consumed the field, in academia and practice, for centuries. It suggests a dire insecurity.Shifts in architecture's self-perception and self-explanation often relate to formal styles. Any text on architectural history covers these styles, from Neolithic to contemporary, including accompanying sub-movements such as, for the early modern category, Expressionist architecture, Art Deco, and the so-called ‘International Style’. Each style is often imagined a product of, or reaction to, a preceding style, and much the same can be said of accompanying trends in the explanation of architecture. This essay, and its underlying argument, is itself a reaction to the current state of affairs.
47

Pelc, Mariusz, and Dawid Galus. "Adaptation Architecture for Self-Healing Computer Systems." International Journal of Software Engineering and Knowledge Engineering 27, no. 05 (June 2017): 791–815. http://dx.doi.org/10.1142/s0218194017500292.

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Nowadays, information/data security and availability are of utmost importance. However, due to the fact that security is a process rather than a state, there is an increasing demand for technologies or architectural solutions that would allow a computer system to adjust its level of security in response to changes in its environmental/network characteristics. In this paper, an architecture for a self-managing adaptive router/firewall has been proposed to facilitate an intelligent and real-time self-protection of a computer system. We also show how the proposed architecture might be used to control other system mechanisms or resources (for example, RAM).
48

Reid, R. J. "Computer-aided engineering for computer architecture laboratories." IEEE Transactions on Education 34, no. 1 (1991): 56–61. http://dx.doi.org/10.1109/13.79882.

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49

Kulau, Ulf, Juergen Herpel, Ran Qedar, Patrick Rosenthal, Joachim Krieger, Friedrich Schoen, and Ivan Masar. "Towards modular and scalable on-board computer architecture." it - Information Technology 63, no. 4 (July 2, 2021): 185–97. http://dx.doi.org/10.1515/itit-2020-0037.

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Abstract:
Abstract The demand for satellites and space systems with ever-increasing avionics requirements is constantly growing, whether in the field of satellite communications or earth observation. Traditional architectures for Data Handling Systems (DHS) on satellites are reaching their limits in terms of flexibility, interoperability and reusability, while slowing down the innovation cycle due to costly qualification. With regard to commercial and industrial solutions, it is evident that ‘plug and play’-like systems based on open standards can overcome the above-mentioned disadvantages. For this reason, this paper describes how open standards could affect the architecture of future satellite DHSs. In particular it shows an transition path from the traditional federated architecture to a centralized but modular architecture based on adapted industrial standards.
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Mihelič, Jurij, and Uroš Čibej. "EXPERIMENTAL COMPARISON OF MATRIX ALGORITHMS FOR DATAFLOW COMPUTER ARCHITECTURE." Acta Electrotechnica et Informatica 18, no. 3 (September 27, 2018): 47–56. http://dx.doi.org/10.15546/aeei-2018-0025.

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