Relevant bibliographies by topics / Computer language verification

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  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers

Academic literature on the topic 'Computer language verification'

Author: Grafiati
Published: 4 June 2021
Last updated: 15 February 2022

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Journal articles on the topic "Computer language verification"

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Dold, Axel, Friedrich von Henke, and Wolfgang Goerigk. "A Completely Verified Realistic Bootstrap Compiler." International Journal of Foundations of Computer Science 14, no. 04 (2003): 659–80. http://dx.doi.org/10.1142/s0129054103001947.

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This paper reports on a large verification effort in constructing an initial fully trusted bootstrap compiler executable for a realistic system programming language and real target processor. The construction and verification process comprises three tasks: the verification of the compiling specification (a relation between abstract source and target programs) with respect to the language semantics and a realistic correctness criterion. This proof has been completely mechanized using the PVS verification system and is one of the largest case-studies in formal verification we are aware of. Secon
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Sulzmann, Martin, and Răzvan Voicu. "Language-Based Program Verification via Expressive Types." Electronic Notes in Theoretical Computer Science 174, no. 7 (2007): 129–47. http://dx.doi.org/10.1016/j.entcs.2006.10.041.

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Adamovic, Sasa, Vladislav Miskovic, Milan Milosavljevic, Marko Sarac, and Mladen Veinovic. "Automated language‐independent authorship verification (for Indo‐European languages)." Journal of the Association for Information Science and Technology 70, no. 8 (2019): 858–71. http://dx.doi.org/10.1002/asi.24163.

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BOSSE, TIBOR, CATHOLIJN M. JONKER, LOURENS VAN DER MEIJ, ALEXEI SHARPANSKYKH, and JAN TREUR. "SPECIFICATION AND VERIFICATION OF DYNAMICS IN AGENT MODELS." International Journal of Cooperative Information Systems 18, no. 01 (2009): 167–93. http://dx.doi.org/10.1142/s0218843009001987.

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Within many domains, among which biological, cognitive, and social areas, multiple interacting processes occur among agents with dynamics that are hard to handle. This paper presents the predicate logical Temporal Trace Language (TTL) for the formal specification and analysis of dynamic properties of agents and multi-agent systems. This language supports the specification of both qualitative and quantitative aspects, and therefore subsumes specification languages based on differential equations and qualitative, logical approaches. A software environment has been developed for TTL, which suppor
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Giorgetti, A., J. Groslambert, J. Julliand, and O. Kouchnarenko. "Verification of class liveness properties with Java modelling language." IET Software 2, no. 6 (2008): 500. http://dx.doi.org/10.1049/iet-sen:20080008.

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Liquori, Luigi, Furio Honsell, and Rekha Redamalla. "A Language for Verification and Manipulation of Web Documents." Electronic Notes in Theoretical Computer Science 157, no. 2 (2006): 67–78. http://dx.doi.org/10.1016/j.entcs.2005.12.046.

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Tsai, Jeffrey J. P., A. P. Sistla, Avinash Sahay, and Ray Paul. "Incremental Verification of Architecture Specification Language for Real-Time Systems." International Journal of Software Engineering and Knowledge Engineering 08, no. 03 (1998): 347–60. http://dx.doi.org/10.1142/s0218194098000194.

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The concept of software architecture has recently emerged as a new way to improve our ability to effectively construct large scale software systems. However, there is no formal architecture specification language available to model and analyze temporal properties of complex real-time systems. In this paper, an object-oriented logic-based architecture specification language for real-time systems is discussed. Representation of the temporal properties and timing constraints, and their integration with the language to model real-time concurrent systems is given. Architecture based specification l
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Zamani, Bahman, and Greg Butler. "Pattern Language Verification in Model Driven Design." Information Sciences 237 (July 2013): 343–55. http://dx.doi.org/10.1016/j.ins.2013.02.038.

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Lorenzen, Florian, and Sebastian Erdweg. "Modular and automated type-soundness verification for language extensions." ACM SIGPLAN Notices 48, no. 9 (2013): 331–42. http://dx.doi.org/10.1145/2544174.2500596.

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Wang, Peng, Santiago Cuellar, and Adam Chlipala. "Compiler verification meets cross-language linking via data abstraction." ACM SIGPLAN Notices 49, no. 10 (2014): 675–90. http://dx.doi.org/10.1145/2714064.2660201.

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Dissertations / Theses on the topic "Computer language verification"

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Swart, Riaan. "A language to support verification of embedded software." Thesis, Stellenbosch : Stellenbosch University, 2004. http://hdl.handle.net/10019.1/49823.

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Thesis (MSc)--University of Stellenbosch, 2004.<br>ENGLISH ABSTRACT: Embedded computer systems form part of larger systems such as aircraft or chemical processing facilities. Although testing and debugging of such systems are difficult, reliability is often essential. Development of embedded software can be simplified by an environment that limits opportunities for making errors and provides facilities for detection of errors. We implemented a language and compiler that can serve as basis for such an experimental environment. Both are designed to make verification of implementations feas
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Pappalardo, Giuseppe. "Specification and verification issues in a process language." Thesis, University of Newcastle Upon Tyne, 1996. http://hdl.handle.net/10443/2016.

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While specification formalisms for reactive concurrent systems are now reasonably well-understood theoretically, they have not yet entered common, widespread design practice. This motivates the attempt made in this work to enhance the applicability of an important and popular formal framework: the CSP language, endowed with a failure-based denotational semantics and a logic for describing failures of processes. The identification of behaviour with a set of failures is supported by a convincing intuitive reason: processes with different failures can be distinguished by easily realizable experim
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Yessenov, Kuat T. "A lightweight specification language for bounded program verification." Thesis, Massachusetts Institute of Technology, 2009. http://hdl.handle.net/1721.1/53184.

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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.<br>Cataloged from PDF version of thesis.<br>Includes bibliographical references (p. 63-64).<br>This thesis presents a new light-weight specification language called JForge Specification Language (JFSL) for object-oriented languages such as Java. The language is amenable to bounded verification analysis by a tool called JForge that interprets JFSL specifications, fully integrates with a mainstream development environment, and assists programmers in examining counter example trace
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Wilson, Thomas. "The Omnibus language and integrated verification approach." Thesis, University of Stirling, 2007. http://hdl.handle.net/1893/260.

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This thesis describes the Omnibus language and its supporting framework of tools. Omnibus is an object-oriented language which is superficially similar to the Java programming language but uses value semantics for objects and incorporates a behavioural interface specification language. Specifications are defined in terms of a subset of the query functions of the classes for which a frame-condition logic is provided. The language is well suited to the specification of modelling types and can also be used to write implementations. An overview of the language is presented and then specific aspect
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Zaccai, Diego Sebastian. "A Balanced Verification Effort for the Java Language." The Ohio State University, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=osu1461243619.

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Veselinov, Roman Nikolov. "Formalization and verification of rewriting-based security polices." Worcester, Mass. : Worcester Polytechnic Institute, 2008. http://www.wpi.edu/Pubs/ETD/Available/etd-043008-165615/.

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Yao, Huan 1976. "Utterance verification in large vocabulary spoken language understanding system." Thesis, Massachusetts Institute of Technology, 1998. http://hdl.handle.net/1721.1/47633.

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Hummelgren, Lars. "A contract language for modular specification and verification of temporal properties." Thesis, KTH, Skolan för elektroteknik och datavetenskap (EECS), 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-280457.

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Deductive software verification is used to prove correctness of programs with respect to contracts. Contracts are commonly expressed on procedures of a program using Hoare logic. Such contracts consist of a precondition, specifying a condition that must hold before the procedure is executed, and a postcondition which specifies what is guaranteed in return. A contract can be considered an agreement between the user of a procedure and its developer. It is important that the process of verifying that the procedures of a program satisfy their respective contracts is scalable. Scalability can be ac
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Ardeishar, Raghu. "Automatic verification of VHDL models." Thesis, This resource online, 1990. http://scholar.lib.vt.edu/theses/available/etd-03032009-040338/.

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Barrett, Geoff. "The semantics and implementation of occam." Thesis, University of Oxford, 1988. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.329014.

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Books on the topic "Computer language verification"

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The E hardware verification language. Kluwer Academic Publishers, 2004.

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Spear, Chris. System Verilog for Verification: A Guide to Learning the Testbench Language Features. 2nd ed. Springer Science+Business Media, LLC, 2008.

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Spear, Chris. SystemVerilog for Verification: A Guide to Learning the Testbench Language Features. 3rd ed. Springer US, 2012.

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Richard, Lai. Communication protocol specification and verification. Kluwer Academic, 1998.

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IEEE Computer Society. Design Automation Standards Committee. IEEE standard for SystemVerilog--unified hardware design, specification, and verification language. 2nd ed. Institute of Electrical and Electronics Engineers, 2010.

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Verilog digital system design: RT level synthesis, testbench, and verification. 2nd ed. McGraw-Hill, 2006.

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Step-by-step functional verification with SystemVerilog and OVM. Hansen Brown Publishing, 2008.

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Robinson, David. Aspect-oriented programming with the e verification language: A pragmatic guide for testbench developers. Amsterdam ; Boston, 2007.

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Berglund, Tim. Building and testing with Gradle. O'Reilly Media, 2011.

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Sánchez, Arantza Díaz de Ilarraza. Verificación de programas y metodología de la programación. Servicio Editorial, Universidad del Pais Vasco, 1990.

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Book chapters on the topic "Computer language verification"

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Yavuz-Kahveci, Tuba, Constantinos Bartzis, and Tevfik Bultan. "Action Language Verifier, Extended." In Computer Aided Verification. Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11513988_40.

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Chen, Xiaohong, Zhengyao Lin, Minh-Thai Trinh, and Grigore Roşu. "Towards a Trustworthy Semantics-Based Language Framework via Proof Generation." In Computer Aided Verification. Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-81688-9_23.

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AbstractWe pursue the vision of an ideal language framework, where programming language designers only need to define the formal syntax and semantics of their languages, and all language tools are automatically generated by the framework. Due to the complexity of such a language framework, it is a big challenge to ensure its trustworthiness and to establish the correctness of the autogenerated language tools. In this paper, we propose an innovative approach based on proof generation. The key idea is to generate proof objects as correctness certificates for each individual task that the language tools conduct, on a case-by-case basis, and use a trustworthy proof checker to check the proof objects. This way, we avoid formally verifying the entire framework, which is practically impossible, and thus can make the language framework both practical and trustworthy. As a first step, we formalize program execution as mathematical proofs and generate their complete proof objects. The experimental result shows that the performance of our proof object generation and proof checking is very promising.
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Kiefer, Stefan, Andrzej S. Murawski, Joël Ouaknine, Björn Wachter, and James Worrell. "Language Equivalence for Probabilistic Automata." In Computer Aided Verification. Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-22110-1_42.

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Hojati, Ramin, Herve Touati, Robert P. Kurshan, and Robert K. Brayton. "Efficient ω-regular language containment." In Computer Aided Verification. Springer Berlin Heidelberg, 1993. http://dx.doi.org/10.1007/3-540-56496-9_31.

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Balarin, Felice, and Alberto L. Sangiovanni-Vincentelli. "An iterative approach to language containment." In Computer Aided Verification. Springer Berlin Heidelberg, 1993. http://dx.doi.org/10.1007/3-540-56922-7_4.

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Hojati, Ramin, Robert Mueller-Thuns, and Robert K. Brayton. "Improving language containment using fairness graphs." In Computer Aided Verification. Springer Berlin Heidelberg, 1994. http://dx.doi.org/10.1007/3-540-58179-0_70.

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Dill, David L., Alan J. Hu, and Howard Wong-Toi. "Checking for language inclusion using simulation preorders." In Computer Aided Verification. Springer Berlin Heidelberg, 1992. http://dx.doi.org/10.1007/3-540-55179-4_25.

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Santolucito, Mark, Ennan Zhai, and Ruzica Piskac. "Probabilistic Automated Language Learning for Configuration Files." In Computer Aided Verification. Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-41540-6_5.

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Eilers, Marco, Severin Meier, and Peter Müller. "Product Programs in the Wild: Retrofitting Program Verifiers to Check Information Flow Security." In Computer Aided Verification. Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-81685-8_34.

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AbstractMost existing program verifiers check trace properties such as functional correctness, but do not support the verification of hyperproperties, in particular, information flow security. In principle, product programs allow one to reduce the verification of hyperproperties to trace properties and, thus, apply standard verifiers to check them; in practice, product constructions are usually defined only for simple programming languages without features like dynamic method binding or concurrency and, consequently, cannot be directly applied to verify information flow security in a full-fledged language. However, many existing verifiers encode programs from source languages into simple intermediate verification languages, which opens up the possibility of constructing a product program on the intermediate language level, reusing the existing encoding and drastically reducing the effort required to develop new verification tools for information flow security. In this paper, we explore the potential of this approach along three dimensions: (1) Soundness: We show that the combination of an encoding and a product construction that are individually sound can still be unsound, and identify a novel condition on the encoding that ensures overall soundness. (2) Concurrency: We show how sequential product programs on the intermediate language level can be used to verify information flow security of concurrent source programs. (3) Performance: We implement a product construction in Nagini, a Python verifier built upon the Viper intermediate language, and evaluate it on a number of challenging examples. We show that the resulting tool offers acceptable performance, while matching or surpassing existing tools in its combination of language feature support and expressiveness.
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Rakamarić, Zvonimir, and Michael Emmi. "SMACK: Decoupling Source Language Details from Verifier Implementations." In Computer Aided Verification. Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-08867-9_7.

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Conference papers on the topic "Computer language verification"

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Wu, Xian, and Peide Qian. "A verification for PDAC model by policy language." In 2012 7th International Conference on Computer Science & Education (ICCSE 2012). IEEE, 2012. http://dx.doi.org/10.1109/iccse.2012.6295293.

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Berry, G., M. Kishinevsky, and S. Singh. "System level design and verification using a synchronous language." In ICCAD-2003. International Conference on Computer Aided Design. IEEE, 2003. http://dx.doi.org/10.1109/iccad.2003.159720.

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Krishnamurthy, Rahul, and Michael S. Hsiao. "Transforming Natural Language Specifications to Logical Forms for Hardware Verification." In 2020 IEEE 38th International Conference on Computer Design (ICCD). IEEE, 2020. http://dx.doi.org/10.1109/iccd50377.2020.00072.

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Jaiswal, Mayoore, Frank Liu, Anupama Jagannathan, et al. "Video-Text Compliance: Activity Verification Based on Natural Language Instructions." In 2019 IEEE/CVF International Conference on Computer Vision Workshop (ICCVW). IEEE, 2019. http://dx.doi.org/10.1109/iccvw.2019.00188.

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Bouzoualegh, Ahcene, Dominique Marcadet, Frédéric Boulanger, and Christophe Jacquet. "An Architecture Description Language for Verification in Component-Based Software." In 2008 32nd Annual IEEE International Computer Software and Applications Conference. IEEE, 2008. http://dx.doi.org/10.1109/compsac.2008.107.

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Zafrulla, Zahoor, Helene Brashear, Harley Hamilton, and Thad Starner. "A novel approach to American Sign Language (ASL) phrase verification using reversed signing." In 2010 IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops (CVPR Workshops). IEEE, 2010. http://dx.doi.org/10.1109/cvprw.2010.5543268.

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REKHIS, Slim, and Noureddine BOUDRIGA. "A formal logic-based language and an automated verification tool for computer forensic investigation." In the 2005 ACM symposium. ACM Press, 2005. http://dx.doi.org/10.1145/1066677.1066745.

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Divekar, Ameya, and Joshua D. Summers. "Logical Connectives for a CAD Query Language: Algorithms and Verification." In ASME 2004 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. ASMEDC, 2004. http://dx.doi.org/10.1115/detc2004-57787.

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Design engineers create models of design artifacts with commercial Computer Aided Design (CAD) solid modeling systems. These systems stop short of providing support for querying and retrieving data from within the CAD data files. The design exemplar has been proposed as an approach to developing a CAD query language based upon an analysis of the design exemplar components, vocabulary, and extensions to support logical connectives. The implementation of the required extensions is offered in this paper. Algorithms are developed to implement the NOT and OR logical connectives. These algorithms ar
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Tian, Qingyuan. "The Information Optimizing Model of Language and Its Verification by Mandarin Phonetic Statistics." In 2011 International Conference on Information Technology, Computer Engineering and Management Sciences (ICM). IEEE, 2011. http://dx.doi.org/10.1109/icm.2011.40.

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Yang Liu, Junyong Liu, Hui Gong, Li Zhang, Xin Zhu, and Hao Tian. "An extendable markup language based intelligent electrical consumption information verification and self-error-recovery system." In 2013 International Conference on Mechatronic Sciences, Electric Engineering and Computer (MEC). IEEE, 2013. http://dx.doi.org/10.1109/mec.2013.6885571.

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