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1

Swart, Riaan. "A language to support verification of embedded software." Thesis, Stellenbosch : Stellenbosch University, 2004. http://hdl.handle.net/10019.1/49823.

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Thesis (MSc)--University of Stellenbosch, 2004.<br>ENGLISH ABSTRACT: Embedded computer systems form part of larger systems such as aircraft or chemical processing facilities. Although testing and debugging of such systems are difficult, reliability is often essential. Development of embedded software can be simplified by an environment that limits opportunities for making errors and provides facilities for detection of errors. We implemented a language and compiler that can serve as basis for such an experimental environment. Both are designed to make verification of implementations feas
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2

Pappalardo, Giuseppe. "Specification and verification issues in a process language." Thesis, University of Newcastle Upon Tyne, 1996. http://hdl.handle.net/10443/2016.

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While specification formalisms for reactive concurrent systems are now reasonably well-understood theoretically, they have not yet entered common, widespread design practice. This motivates the attempt made in this work to enhance the applicability of an important and popular formal framework: the CSP language, endowed with a failure-based denotational semantics and a logic for describing failures of processes. The identification of behaviour with a set of failures is supported by a convincing intuitive reason: processes with different failures can be distinguished by easily realizable experim
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Yessenov, Kuat T. "A lightweight specification language for bounded program verification." Thesis, Massachusetts Institute of Technology, 2009. http://hdl.handle.net/1721.1/53184.

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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.<br>Cataloged from PDF version of thesis.<br>Includes bibliographical references (p. 63-64).<br>This thesis presents a new light-weight specification language called JForge Specification Language (JFSL) for object-oriented languages such as Java. The language is amenable to bounded verification analysis by a tool called JForge that interprets JFSL specifications, fully integrates with a mainstream development environment, and assists programmers in examining counter example trace
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4

Wilson, Thomas. "The Omnibus language and integrated verification approach." Thesis, University of Stirling, 2007. http://hdl.handle.net/1893/260.

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This thesis describes the Omnibus language and its supporting framework of tools. Omnibus is an object-oriented language which is superficially similar to the Java programming language but uses value semantics for objects and incorporates a behavioural interface specification language. Specifications are defined in terms of a subset of the query functions of the classes for which a frame-condition logic is provided. The language is well suited to the specification of modelling types and can also be used to write implementations. An overview of the language is presented and then specific aspect
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Zaccai, Diego Sebastian. "A Balanced Verification Effort for the Java Language." The Ohio State University, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=osu1461243619.

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6

Veselinov, Roman Nikolov. "Formalization and verification of rewriting-based security polices." Worcester, Mass. : Worcester Polytechnic Institute, 2008. http://www.wpi.edu/Pubs/ETD/Available/etd-043008-165615/.

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7

Yao, Huan 1976. "Utterance verification in large vocabulary spoken language understanding system." Thesis, Massachusetts Institute of Technology, 1998. http://hdl.handle.net/1721.1/47633.

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8

Hummelgren, Lars. "A contract language for modular specification and verification of temporal properties." Thesis, KTH, Skolan för elektroteknik och datavetenskap (EECS), 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-280457.

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Deductive software verification is used to prove correctness of programs with respect to contracts. Contracts are commonly expressed on procedures of a program using Hoare logic. Such contracts consist of a precondition, specifying a condition that must hold before the procedure is executed, and a postcondition which specifies what is guaranteed in return. A contract can be considered an agreement between the user of a procedure and its developer. It is important that the process of verifying that the procedures of a program satisfy their respective contracts is scalable. Scalability can be ac
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Ardeishar, Raghu. "Automatic verification of VHDL models." Thesis, This resource online, 1990. http://scholar.lib.vt.edu/theses/available/etd-03032009-040338/.

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Barrett, Geoff. "The semantics and implementation of occam." Thesis, University of Oxford, 1988. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.329014.

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11

Gustavsson, Camilla, Linda Strindlund, and Emma Wiknertz. "Verification, Validation and Evaluation of the Virtual Human Markup Language (VHML)." Thesis, Linköping University, Department of Electrical Engineering, 2002. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1137.

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<p>Human communication is inherently multimodal. The information conveyed through body language, facial expression, gaze, intonation, speaking style etc. are all important components of everyday communication. An issue within computer science concerns how to provide multimodal agent based systems. Those are systems that interact with users through several channels. These systems can include Virtual Humans. A Virtual Human might for example be a complete creature, i.e. a creature with a whole body including head, arms, legs etc. but it might also be a creature with only a head, a Talking Head.
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Edelman, Joseph R. "Machine Code Verification Using The Bogor Framework." Diss., CLICK HERE for online access, 2008. http://contentdm.lib.byu.edu/ETD/image/etd2396.pdf.

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13

Neal, Stephen. "A language for the dynamic verification of design patterns in distributed computing." Thesis, University of Kent, 2001. https://kar.kent.ac.uk/13532/.

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14

Dailey, David M. "Integration of VHDL simulation and test verification into a Process Model Graph design environment." Thesis, This resource online, 1994. http://scholar.lib.vt.edu/theses/available/etd-11242009-020247/.

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15

Luken, Jackson. "QED: A Fact Verification and Evidence Support System." The Ohio State University, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=osu1555074124008897.

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16

Pamplin, Jason Andrew. "Formal Object Interaction Language: Modeling and Verification of Sequential and Concurrent Object-Oriented Software." unrestricted, 2007. http://etd.gsu.edu/theses/available/etd-04222007-205349/.

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Thesis (Ph. D.)--Georgia State University, 2007.<br>Title from file title page. Ying Zhu, committee chair; Xiaolin Hu, Geoffrey Hubona, Roy Johnson, Rajshekhar Sunderraman, committee members. Electronic text (216 p. : ill. (some col.)) : digital, PDF file. Description based on contents viewed Nov. 29, 2007. Includes bibliographical references (p. 209-216).
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Yin, Pei. "Segmental discriminative analysis for American Sign Language recognition and verification." Diss., Georgia Institute of Technology, 2010. http://hdl.handle.net/1853/33939.

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This dissertation presents segmental discriminative analysis techniques for American Sign Language (ASL) recognition and verification. ASL recognition is a sequence classification problem. One of the most successful techniques for recognizing ASL is the hidden Markov model (HMM) and its variants. This dissertation addresses two problems in sign recognition by HMMs. The first is discriminative feature selection for temporally-correlated data. Temporal correlation in sequences often causes difficulties in feature selection. To mitigate this problem, this dissertation proposes segmentally-boosted
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Abid, Nouha. "Verification of real time properties in fiacre language." Phd thesis, INSA de Toulouse, 2012. http://tel.archives-ouvertes.fr/tel-00782554.

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19

Crutchfield, David Allen. "VERIFICATION AND DEBUG TECHNIQUES FOR INTEGRATED CIRCUIT DESIGNS." UKnowledge, 2009. http://uknowledge.uky.edu/gradschool_theses/631.

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Verification and debug of integrated circuits for embedded applications has grown in importance as the complexity in function has increased dramatically over time. Various modeling and debugging techniques have been developed to overcome the overwhelming challenge. This thesis attempts to address verification and debug methods by presenting an accurate C model at the bit and algorithm level coupled with an implemented Hardware Description Language (HDL). Key concepts such as common signal and variable naming conventions are incorporated as well as a stepping function within the implemented HDL
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Ulu, Cemil. "Specification And Verification Of Confidentiality In Software Architectures." Phd thesis, METU, 2004. http://etd.lib.metu.edu.tr/upload/12604809/index.pdf.

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This dissertation addresses the confidentiality aspect of the information security problem from the viewpoint of the software architecture. It presents a new approach to secure system design in which the desired security properties, in particular, confidentiality, of the system are proven to hold at the architectural level. The architecture description language Wright is extended so that confidentiality authorizations can be specified. An architectural description in Wright/c, the extended language, assigns clearance to the ports of the components and treats security labels as a part of data t
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Ubah, Ifeanyi. "A Language-Recognition Approach to Unit Testing Message-Passing Systems." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-215655.

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This thesis addresses the problem of unit testing components in message-passing systems. A message-passing system is one that comprises components communicating with each other solely via the exchange of messages. Testing aids developers in detecting and fixing potential errors and with unit testing in particular, the focus is on independently verifying the correctness of single components, such as functions and methods, in a system whose behavior is well understood. With the aid of unit testing frameworks such as those of the xUnit family, this process can not only be automated and done itera
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Tuch, Harvey Computer Science &amp Engineering Faculty of Engineering UNSW. "Formal memory models for verifying C systems code." Publisher:University of New South Wales. Computer Science & Engineering, 2008. http://handle.unsw.edu.au/1959.4/41233.

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Systems code is almost universally written in the C programming language or a variant. C has a very low level of type and memory abstraction and formal reasoning about C systems code requires a memory model that is able to capture the semantics of C pointers and types. At the same time, proof-based verification demands abstraction, in particular from the aliasing and frame problems. In this thesis, we study the mechanisation of a series of models, from semantic to separation logic, for achieving this abstraction when performing interactive theorem-prover based verification of C systems code i
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Jedryszek, Jakub. "A model-driven development and verification approach for medical devices." Thesis, Kansas State University, 2014. http://hdl.handle.net/2097/18222.

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Master of Science<br>Department of Computing and Information Sciences<br>John Hatcliff<br>Medical devices are safety-critical systems whose failure may put human life in danger. They are becoming more advanced and thus more complex. This leads to bigger and more complicated code-bases that are hard to maintain and verify. Model-driven development provides high-level and abstract description of the system in the form of models that omit details, which are not relevant during the design phase. This allows for certain types of verification and hazard analysis to be performed on the models. These
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Neumann, Stefan, and Holger Giese. "Scalable compatibility for embedded real-time components via language progressive timed automata." Universität Potsdam, 2013. http://opus.kobv.de/ubp/volltexte/2013/6385/.

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The proper composition of independently developed components of an embedded real- time system is complicated due to the fact that besides the functional behavior also the non-functional properties and in particular the timing have to be compatible. Nowadays related compatibility problems have to be addressed in a cumbersome integration and configuration phase at the end of the development process, that in the worst case may fail. Therefore, a number of formal approaches have been developed, which try to guide the upfront decomposition of the embedded real-time system into components such that
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Thiagarajan, Hariharan. "Dependence analysis for inferring information flow properties in Spark ADA programs." Thesis, Kansas State University, 2011. http://hdl.handle.net/2097/13187.

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Master of Science<br>Department of Computing and Information Sciences<br>John Hatcliff<br>With the increase in development of safety and security critical systems, it is important to have more sophisticated methods for engineering such systems. It can be difficult to understand and verify critical properties of these systems because of their ever growing size and complexity. Even a small error in a complex system may result in casualty or significant monetary loss. Consequently, there is a rise in the demand for scalable and accurate techniques to enable faster development and verification of
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Carman, Benjamin Andrew. "Translating LaTeX to Coq: A Recurrent Neural Network Approach to Formalizing Natural Language Proofs." Ohio University Honors Tutorial College / OhioLINK, 2021. http://rave.ohiolink.edu/etdc/view?acc_num=ouhonors161919616626269.

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27

Decker, Gero. "Design and analysis of process choreographies." Phd thesis, Universität Potsdam, 2009. http://opus.kobv.de/ubp/volltexte/2010/4076/.

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With the rise of electronic integration between organizations, the need for a precise specification of interaction behavior increases. Information systems, replacing interaction previously carried out by humans via phone, faxes and emails, require a precise specification for handling all possible situations. Such interaction behavior is described in process choreographies. Choreographies enumerate the roles involved, the allowed interactions, the message contents and the behavioral dependencies between interactions. Choreographies serve as interaction contract and are the starting point for ad
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Istoan, Paul. "Methodology for the derivation of product behaviour in a Software Product Line." Phd thesis, Université Rennes 1, 2013. http://tel.archives-ouvertes.fr/tel-00925479.

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The major problem addressed in this thesis is the definition of a new SPLE methodology that covers both phases of the SPLE process and focuses on the derivation of behavioral models of SPL products. In Chapter 2 three research areas scope context of this thesis: Software Product Lines, Business Processes, and Model-Driven Engineering. Throughout Chapter 3, we propose a new SPLE methodology that focuses on the derivation of product behavior. We first describe the main flow of the methodology, and then detail the individual steps. In chapter 4 we propose a new domain specific language called CBP
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Kaplan, Simon Mark. "Specification and verification of context conditions for programming languages." Doctoral thesis, University of Cape Town, 1986. http://hdl.handle.net/11427/15898.

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Bibliography: p. 204-211.<br>Context conditions - also called static semantics - are the constraints on computer programs that cannot be reasonably expressed by a context-free grammar, but that can be statically checked without considering the execution properties - semantics - of the program. Such conditions tend to be arbitrary and complex. This thesis presents a new specification formalism called CFF/AML. This formalism is · designed to be both useful for the specification of programming languages to an environment generator and also simple to use. The driving insight behind CFF/AML is that
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Zhou, Yichao. "Lip password-based speaker verification system with unknown language alphabet." HKBU Institutional Repository, 2018. https://repository.hkbu.edu.hk/etd_oa/562.

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The traditional security systems that verify the identity of users based on password usually face the risk of leaking the password contents. To solve this problem, biometrics such as the face, iris, and fingerprint, begin to be widely used in verifying the identity of people. However, these biometrics cannot be changed if the database is hacked. What's more, verification systems based on the traditional biometrics might be cheated by fake fingerprint or the photo.;Liu and Cheung (Liu and Cheung 2014) have recently initiated the concept of lip password, which is composed of a password embedded
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Gerber, Erick D. B. "A model checker for the LF system." Thesis, Stellenbosch : Stellenbosch University, 2007. http://hdl.handle.net/10019.1/19597.

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Thesis (MSc)--University of Stellenbosch, 2007.<br>ENGLISH ABSTRACT: Computer aided veri cation techniques, such as model checking, can be used to improve the reliability of software. Model checking is an algorithmic approach to illustrate the correctness of temporal logic speci cations in the formal description of hardware and software systems. In contrast to traditional testing tools, model checking relies on an exhaustive search of all the possible con gurations that these systems may exhibit. Traditionally model checking is applied to abstract or high level designs of software. Howeve
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Pasupuleti, Venkata Sai Manoj. "Probabilistic approaches for verification of unlikely inserted errors in Hardware Description Languages." The Ohio State University, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=osu1452182260.

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Matthews, John Robert. "Algebraic specification and verification of processor microarchitectures /." Full text open access at:, 2000. http://content.ohsu.edu/u?/etd,212.

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Bronish, Derek. "Abstraction as the Key to Programming, with Issues for Software Verification in Functional Languages." The Ohio State University, 2012. http://rave.ohiolink.edu/etdc/view?acc_num=osu1338317549.

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Nilsson, Daniel. "System for firmware verification." Thesis, University of Kalmar, School of Communication and Design, 2009. http://urn.kb.se/resolve?urn=urn:nbn:se:hik:diva-2372.

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<p>Software verification is an important part of software development and themost practical way to do this today is through dynamic testing. This reportexplains concepts connected to verification and testing and also presents thetesting-framework Trassel developed during the writing of this report.Constructing domain specific languages and tools by using an existinglanguage as a starting ground can be a good strategy for solving certainproblems, this was tried with Trassel where the description-language forwriting test-cases was written as a DSL using Python as the host-language.</p>
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36

Might, Matthew Brendon. "Environment Analysis of Higher-Order Languages." Diss., Georgia Institute of Technology, 2007. http://hdl.handle.net/1853/16289.

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Any analysis of higher-order languages must grapple with the tri-facetted nature of lambda. In one construct, the fundamental control, environment and data structures of a language meet and intertwine. With the control facet tamed nearly two decades ago, this work brings the environment facet to heel, defining the environment problem and developing its solution: environment analysis. Environment analysis allows a compiler to reason about the equivalence of environments, i.e., name-to-value mappings, that arise during a program's execution. In this dissertation, two different techniques-abstrac
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Huffman, Brian Charles. "HOLCF '11: A Definitional Domain Theory for Verifying Functional Programs." PDXScholar, 2011. https://pdxscholar.library.pdx.edu/open_access_etds/113.

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HOLCF is an interactive theorem proving system that uses the mathematics of domain theory to reason about programs written in functional programming languages. This thesis introduces HOLCF '11, a thoroughly revised and extended version of HOLCF that advances the state of the art in program verification: HOLCF '11 can reason about many program definitions that are beyond the scope of other formal proof tools, while providing a high degree of proof automation. The soundness of the system is ensured by adhering to a definitional approach: New constants and types are defined in terms of previous c
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Schwoon, Stefan. "Efficient verification of sequential and concurrent systems." Habilitation à diriger des recherches, École normale supérieure de Cachan - ENS Cachan, 2013. http://tel.archives-ouvertes.fr/tel-00927066.

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Formal methods provide means for rigorously specifying the desired behaviour of a hardware or software system, making a precise model of its actual behaviour, and then verifying whether that actual behaviour corresponds to the specification.<br><br> My habiliation thesis reports on various contributions to this realm, where my main interest has been on algorithmic aspects. This is motivated by the observation that asymptotic worst-case complexity, often used to characterize the difficulty of algorithmic problems, is only loosely related to the difficulty encountered in solving those problems i
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Stainer, Amélie. "Contribution à la vérification d'automates temporisés : déterminisation, vérification quantitative et accessibilité dans les réseaux d'automates." Thesis, Rennes 1, 2013. http://www.theses.fr/2013REN1S167/document.

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Cette thèse porte sur la vérification des automates temporisés, un modèle bien établi pour les systèmes temps-réels. La thèse est constituée de trois parties. La première est dédiée à la déterminisation des automates temporisés, problème qui n'a pas de solution en général. Nous proposons une méthode approchée (sur-approximation, sous-approximation, mélange des deux) fondée sur la construction d'un jeu de sûreté. Cette méthode améliore les approches existantes en combinant leurs avantages respectifs. Nous appliquons ensuite cette méthode de déterminisation à la génération automatique de tests d
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Yang, Zhenkun. "Scalable Equivalence Checking for Behavioral Synthesis." PDXScholar, 2015. https://pdxscholar.library.pdx.edu/open_access_etds/2461.

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Behavioral synthesis is the process of compiling an Electronic System Level (ESL) design to a register-transfer level (RTL) implementation. ESL specifications define the design functionality at a high level of abstraction (e.g., with C/C++ or SystemC), and thus provide a promising approach to address the exacting demands to develop feature-rich, optimized, and complex hardware systems within aggressive time-to-market schedules. Behavioral synthesis entails application of complex and error-prone transformations during the compilation process. Therefore, the adoption of behavioral synthesis high
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Vroon, Daron. "Automatically Proving the Termination of Functional Programs." Diss., Georgia Institute of Technology, 2007. http://hdl.handle.net/1853/19734.

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Establishing the termination of programs is a fundamental problem in the field of software verification. For transformational programs, termination is used to extend partial correctness to total correctness. For reactive systems, termination reasoning is used to establish liveness properties. In the context of theorem proving, termination is used to establish the consistency of definitional axioms and to automate proofs by induction. Of course, termination is an undecidable problem, as Turing himself proved. However, the question remains: how automatic can a general termination analysis be in
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Atzemoglou, George Philip. "Higher-order semantics for quantum programming languages with classical control." Thesis, University of Oxford, 2012. http://ora.ox.ac.uk/objects/uuid:9fdc4a26-cce3-48ed-bbab-d54c4917688f.

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This thesis studies the categorical formalisation of quantum computing, through the prism of type theory, in a three-tier process. The first stage of our investigation involves the creation of the dagger lambda calculus, a lambda calculus for dagger compact categories. Our second contribution lifts the expressive power of the dagger lambda calculus, to that of a quantum programming language, by adding classical control in the form of complementary classical structures and dualisers. Finally, our third contribution demonstrates how our lambda calculus can be applied to various well known proble
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King, Christopher T. "An axiomatic semantics for functional reactive programming." Worcester, Mass. : Worcester Polytechnic Institute, 2008. http://www.wpi.edu/Pubs/ETD/Available/etd-042908-133033/.

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Hugot, Vincent. "Tree automata, approximations, and constraints for verification : Tree (Not quite) regular model-checking." Phd thesis, Université de Franche-Comté, 2013. http://tel.archives-ouvertes.fr/tel-00909608.

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Tree automata, and their applications to verification from the common thread of this thesis In the first part, we definie a complete model-cheking framework.[...] The second part focus on an important aspect of the automata involved: constraints.[...] Finaly, we also study the very different variety of tree-walking automata which have tight connections with navigational languages on semi-structured documents.
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Khatchadourian, Raffi Takvor. "Techniques for Automated Software Evolution." The Ohio State University, 2011. http://rave.ohiolink.edu/etdc/view?acc_num=osu1304885155.

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Rodríguez, César. "Verification based on unfoldings of Petri nets with read arcs." Phd thesis, École normale supérieure de Cachan - ENS Cachan, 2013. http://tel.archives-ouvertes.fr/tel-00927064.

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Humans make mistakes, especially when faced to complex tasks, such as the construction of modern hardware or software. This thesis focuses on machine-assisted techniques to guarantee that computers behave correctly. Modern computer systems are large and complex. Automated formal verification stands as an alternative to testing or simulation to ensuring their reliability. It essentially proposes to employ computers to exhaustively check the system behavior. Unfortunately, automated verification suffers from the state-space explosion problem: even relatively small systems can reach a huge number
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Ngô, Van Chan. "Formal verification of a synchronous data-flow compiler : from Signal to C." Phd thesis, Université Rennes 1, 2014. http://tel.archives-ouvertes.fr/tel-01067477.

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Synchronous languages such as Signal, Lustre and Esterel are dedicated to designing safety-critical systems. Their compilers are large and complicated programs that may be incorrect in some contexts, which might produce silently bad compiled code when compiling source programs. The bad compiled code can invalidate the safety properties that are guaranteed on the source programs by applying formal methods. Adopting the translation validation approach, this thesis aims at formally proving the correctness of the highly optimizing and industrial Signal compiler. The correctness proof represents bo
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Vassiliev, Pavel. "Développement et réalisation d'un simulateur de machines à états abstraits temps-réel et model-checking de formules d'une logique des prédicats temporisée du premier ordre." Phd thesis, Université Paris-Est, 2008. http://tel.archives-ouvertes.fr/tel-00462013.

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Dans cette thèse nous proposons un modèle temporel dans le cadre des machines à états abstraits (ASM). Une extension du langage de spécification ASM est développé qui correspond à ce modéle temporel pour le temps continu. L'extension du langage avec des constructions de temps permet de diminuer la taille de la spécification et donc de réduire la probabilité d'erreurs. La sémantique de l'extension du langage ASM est fournie et prend en compte les définitions des fonctions externes, les valeurs des délais et les choix de résolution des non-déterminismes. Un sous-système de vérification des propr
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Jacquemard, Florent. "Modèles d'automates d'arbres étendus pour la vérification de systèmes infinis." Habilitation à diriger des recherches, École normale supérieure de Cachan - ENS Cachan, 2011. http://tel.archives-ouvertes.fr/tel-00643595.

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Ce document présente l'étude de plusieurs modèles de machines à états finis qui étendent tous le même formalisme: les automates d'arbres classiques, et leur application dans différentes tâches telles que l'analyse statique de programmes ou de systèmes, la typage, la vérification de la cohérence de spécifications, le model checking... Les arbres sont une structure naturelle de données, très répandue en informatique, par exemple pour la représentation des structures de données hiérarchiques ou imbriquées, pour des algorithmes spécifiques (arbres binaires de recherche, algorithmes distribués), co
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Tesson, Julien. "Environnement pour le développement et la preuve de correction systèmatiques de programmes parallèles fonctionnels." Phd thesis, Université d'Orléans, 2011. http://tel.archives-ouvertes.fr/tel-00660554.

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Concevoir et implanter des programmes parallèles est une tâche complexe, sujette aux erreurs. La vérification des programmes parallèles est également plus difficile que celle des programmes séquentiels. Pour permettre le développement et la preuve de correction de programmes parallèles, nous proposons de combiner le langage parallèle fonctionnel quasi-synchrone BSML, les squelettes algorithmiques - qui sont des fonctions d'ordre supérieur sur des structures de données réparties offrant une abstraction du parallélisme - et l'assistant de preuve Coq, dont le langage de spécification est suffisam
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