Relevant bibliographies by topics / Computers / Computer Architecture

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'Computers / Computer Architecture'

Author: Grafiati
Published: 4 June 2021
Last updated: 1 August 2024

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Journal articles on the topic "Computers / Computer Architecture"

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Kaiser, Marcus. "Brain architecture: a design for natural computation." Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences 365, no. 1861 (September 13, 2007): 3033–45. http://dx.doi.org/10.1098/rsta.2007.0007.

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Fifty years ago, John von Neumann compared the architecture of the brain with that of the computers he invented and which are still in use today. In those days, the organization of computers was based on concepts of brain organization. Here, we give an update on current results on the global organization of neural systems. For neural systems, we outline how the spatial and topological architecture of neuronal and cortical networks facilitates robustness against failures, fast processing and balanced network activation. Finally, we discuss mechanisms of self-organization for such architectures. After all, the organization of the brain might again inspire computer architecture.
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Odhiambo, M. O., and P. O. Umenne. "NET-COMPUTER: Internet Computer Architecture and its Application in E-Commerce." Engineering, Technology & Applied Science Research 2, no. 6 (December 4, 2012): 302–9. http://dx.doi.org/10.48084/etasr.145.

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Research in Intelligent Agents has yielded interesting results, some of which have been translated into commer­cial ventures. Intelligent Agents are executable software components that represent the user, perform tasks on behalf of the user and when the task terminates, the Agents send the result to the user. Intelligent Agents are best suited for the Internet: a collection of computers connected together in a world-wide computer network. Swarm and HYDRA computer architectures for Agents’ execution were developed at the University of Surrey, UK in the 90s. The objective of the research was to develop a software-based computer architecture on which Agents execution could be explored. The combination of Intelligent Agents and HYDRA computer architecture gave rise to a new computer concept: the NET-Computer in which the comput­ing resources reside on the Internet. The Internet computers form the hardware and software resources, and the user is provided with a simple interface to access the Internet and run user tasks. The Agents autonomously roam the Internet (NET-Computer) executing the tasks. A growing segment of the Internet is E-Commerce for online shopping for products and services. The Internet computing resources provide a marketplace for product suppliers and consumers alike. Consumers are looking for suppliers selling products and services, while suppliers are looking for buyers. Searching the vast amount of information available on the Internet causes a great deal of problems for both consumers and suppliers. Intelligent Agents executing on the NET-Computer can surf through the Internet and select specific information of interest to the user. The simulation results show that Intelligent Agents executing HYDRA computer architecture could be applied in E-Commerce.
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ROSKA, TAMÁS. "COMPUTATIONAL AND COMPUTER COMPLEXITY OF ANALOGIC CELLULAR WAVE COMPUTERS." Journal of Circuits, Systems and Computers 12, no. 04 (August 2003): 539–62. http://dx.doi.org/10.1142/s0218126603001021.

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The CNN Universal Machine is generalized as the latest step in computational architectures: a Universal Machine on Flows. Computational complexity and computer complexity issues are studied in different architectural settings. Three mathematical machines are considered: the universal machine on integers (UMZ), the universal machine on reals (UMR) and the universal machine on flows (UMF). The three machines induce different kinds of computational difficulties: combinatorial, algebraic, and dynamic, respectively. After a broader overview on computational complexity issues, it is shown, following the reasoning related the UMR, that in many cases the size is not the most important parameter related to computational complexity. Emerging new computing and computer architectures as well as their physical implementation suggest a new look on computational and computer complexities. The new analog-and-logic (analogic) cellular array computer paradigm, based on the CNN Universal Machine, and its physical implementation in CMOS and optical technologies, proves experimentally the relevance of the role of accuracy and problem parameter in computational complexity. We introduce also the rigorous definition of computational complexity for UMF and prove an NP class of problems. It is also shown that choosing the spatial temporal elementary instructions, as well as taking into account the area and power dissipation, these choices inherently influence computational complexity and computer complexity, respectively. Comments related to relevance to biology of the UMF are presented in relation to complexity theory. It is shown that algorithms using spatial-temporal continuous elementary instructions (α-recursive functions) represent not only a new world in computing, but also, a more general type of logic inference.
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Dannenberg, Roger B., Nicolas E. Gold, Dawen Liang, and Guangyu Xia. "Methods and Prospects for Human–Computer Performance of Popular Music." Computer Music Journal 38, no. 2 (June 2014): 36–50. http://dx.doi.org/10.1162/comj_a_00238.

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Computers are often used in performance of popular music, but most often in very restricted ways, such as keyboard synthesizers where musicians are in complete control, or pre-recorded or sequenced music where musicians follow the computer's drums or click track. An interesting and yet little-explored possibility is the computer as highly autonomous performer of popular music, capable of joining a mixed ensemble of computers and humans. Considering the skills and functional requirements of musicians leads to a number of predictions about future human–computer music performance (HCMP) systems for popular music. We describe a general architecture for such systems and describe some early implementations and our experience with them.
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AKL, SELIM G. "THREE COUNTEREXAMPLES TO DISPEL THE MYTH OF THE UNIVERSAL COMPUTER." Parallel Processing Letters 16, no. 03 (September 2006): 381–403. http://dx.doi.org/10.1142/s012962640600271x.

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It is shown that the concept of a Universal Computer cannot be realized. Specifically, instances of a computable function [Formula: see text] are exhibited that cannot be computed on any machine [Formula: see text] that is capable of only a finite and fixed number of operations per step. This remains true even if the machine [Formula: see text] is endowed with an infinite memory and the ability to communicate with the outside world while it is attempting to compute [Formula: see text]. It also remains true if, in addition, [Formula: see text] is given an indefinite amount of time to compute [Formula: see text]. This result applies not only to idealized models of computation, such as the Turing Machine and the like, but also to all known general-purpose computers, including existing conventional computers (both sequential and parallel), as well as contemplated unconventional ones such as biological and quantum computers. Even accelerating machines (that is, machines that increase their speed at every step) cannot be universal.
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Ahmad, Othman. "FPGA BASED INDIVIDUAL COMPUTER ARCHITECTURE LABORATORY EXERCISES." Journal of BIMP-EAGA Regional Development 3, no. 1 (December 15, 2017): 23–31. http://dx.doi.org/10.51200/jbimpeagard.v3i1.1026.

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Computer Architecture is the study of digital computers towards designing, building and operating digital computers. Digital computers are vital for the modern living because they are essential in providing the intelligences in devices such as self-driving cars and smartphones. Computer Architecture is a core subject for the Electronic (Computer) Engineering course at the Universiti Malaysia Sabah that is compliant to the requirement of the Washington Accord as accredited by the Engineering Accreditation Council of the Board of Engineers of Malaysia (EAC). An FPGA (Field Programmable Gate Array) based Computer Architecture Laboratory had been developed to support the curriculum of this course. FPGA allows a sustainable implementation of laboratory exercises without resorting to poisonous fabrication of microelectronic devices and installation of integrated circuits. An FPGA is just a configurable and therefore reusable digital design component. Two established organisations promoting computer engineering curriculum, ACM and IEEE, encourages the use of FPGA in digital design in their latest recommendation and together with the EAC, emphasises the grasp of the fundamentals for each student. The laboratory exercises are individual exercises where each student is given a unique assignment. A laboratory manual is provided as a guide and project specification for each student but overall the concept of the laboratory exercise is a student-centred one. Each student is allowed to pace their effort to achieve the sessions of the laboratory exercises starting from session one to session ten. A quantitative analysis of the effectiveness of these laboratory sessions is carried out based on the numbers of students completing the laboratory sessions. These sessions start from an 1:FPGA tutorial to implementations of features of a microprocessor of 2:Immediate Load, 3:Immediate Load to Multiple Registers, 4:Addition, 5:Operation Code, 6:Program Memory, 7:Jump, 8:Conditional Jump, 9:Register to Register and 10:Input-Output. The results of three batches of students show that within the time limits of a one credit hour course, students had managed to complete some aspects of the implementation of a simple microprocessor.
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Kołata, Joanna, and Piotr Zierke. "The Decline of Architects: Can a Computer Design Fine Architecture without Human Input?" Buildings 11, no. 8 (August 6, 2021): 338. http://dx.doi.org/10.3390/buildings11080338.

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Architects are required to have knowledge of current legislation, ergonomics, and the latest technical solutions. In addition, the design process necessitates an appreciation of the quality of the space and a high degree of creativity. However, it is a profession that has undergone significant changes in recent years due to the pressure exerted by the development of information technology. The designs generated by computer algorithms are becoming such a serious part of designers’ work that some are beginning to question whether they are more the work of computers than humans. There are also increasing suggestions that software development will eventually lead to a situation where humans in the profession will become redundant. This review article aims to present the currently used, implemented, and planned computer technologies employed in the design and consider how they affect and will affect the work of architects in the future. It includes opinions of a wide range of experts on the possibility of computer algorithms replacing architects. The ultimate goal of the article is an attempt to answer the question: will computers eliminate the human factor in the design of the future? It also considers the artificial intelligence or communication skills that computer algorithms would require to achieve this goal. The answers to these questions will contribute not only to determining the future of architecture but will also indicate the current condition of the profession. They will also help us to understand the technologies that are making computers capable of increasingly replacing human professions. Despite differing opinions on the possibility of computer algorithms replacing architects, the conclusions indicate that, currently, computers do not have capabilities and skills to achieve this goal. The speed of technological development, especially such technologies as artificial superintelligence, artificial brains, or quantum computers allows us to predict that the replacement of the architect by machines will be unrealistic in coming decades.
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Choi, Yongseok, Eunji Lim, Jaekwon Shin, and Cheol-Hoon Lee. "MemBox: Shared Memory Device for Memory-Centric Computing Applicable to Deep Learning Problems." Electronics 10, no. 21 (November 8, 2021): 2720. http://dx.doi.org/10.3390/electronics10212720.

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Large-scale computational problems that need to be addressed in modern computers, such as deep learning or big data analysis, cannot be solved in a single computer, but can be solved with distributed computer systems. Since most distributed computing systems, consisting of a large number of networked computers, should propagate their computational results to each other, they can suffer the problem of an increasing overhead, resulting in lower computational efficiencies. To solve these problems, we proposed an architecture of a distributed system that used a shared memory that is simultaneously accessible by multiple computers. Our architecture aimed to be implemented in FPGA or ASIC. Using an FPGA board that implemented our architecture, we configured the actual distributed system and showed the feasibility of our system. We compared the results of the deep learning application test using our architecture with that using Google Tensorflow’s parameter server mechanism. We showed improvements in our architecture beyond Google Tensorflow’s parameter server mechanism and we determined the future direction of research by deriving the expected problems.
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A.V., Chistyakov. "On improving the efficiency of mathematical modeling of the problem of stability of construction." Artificial Intelligence 25, no. 3 (October 10, 2020): 27–36. http://dx.doi.org/10.15407/jai2020.03.027.

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Algorithmic software for mathematical modeling of structural stability is considered, which is reduced to solving a partial generalized eigenvalues problem of sparse matrices, with automatic parallelization of calculations on modern parallel computers with graphics processors. Peculiarities of realization of parallel algorithms for different structures of sparse matrices are presented. The times of solving the problem of stability of composite materialsusing a three-dimensional model of "finite size fibers" on computers of different architectures are given. In mathematical modeling of physical and technical processes in many cases there is a need to solve problems of algebraic problem of eigenvalues (APVZ) with sparse matrices of large volumes. In particular, such problems arise in the analysis of the strength of structures in civil and industrial construction, aircraft construction, electric welding, etc. The solving to these problems is to determine the eigenvalues and eigenvectors of sparse matrices of different structure. The efficiency of solving these problems largely depends on the effectiveness of mathematical modeling of the problem as a whole. Continuous growth of task parameters, calculation of more complete models of objects and processes on computers require an increase in computer productivity. High-performance computing requirements are far ahead of traditional parallel computing, even with multicore processors. High-performance computing requirements are far ahead of traditional parallel computing, even with multicore processors. Today, this problem is solved by using powerful supercomputers of hybrid architecture, such as computers with multicore processors (CPUs) and graphics processors (GPUs), which combine MIMD and SIMD architectures. But the potential of high-performance computers can be used to the fullest only with algorithmic software that takes into account both the properties of the task and the features of the hybrid architecture. Complicating the architecture of modern high-performance supercomputers of hybrid architecture, which are actively used for mathematical modeling (increasing the number of computer processors and cores, different types of computer memory, different programming technologies, etc.) means a significant complication of efficient use of these resources in creating parallel algorithms and programs. here are problems with the creation of algorithmic software with automatic execution of stages of work, which are associated with the efficient use of computing resources, ways to store and process sparse matrices, analysis of the reliability of computer results. This makes it possible to significantly increase the efficiency of mathematical modeling of practical problems on modern high-performance computers, as well as free users from the problems of parallelization of complex problems. he developed algorithmic software automatically implements all stages of parallel computing and processing of sparse matrices on a hybrid computer. It was used at the Institute of Mechanics named after S.P. Tymoshenko NAS of Ukraine in modeling the strength problems of composite material. A significant improvement in the time characteristics of mathematical modeling was obtained. Problems of mathematical modeling of the properties of composite materials has an important role in designing the processes of deformation and destruction of products in various subject areas. Algorithmic software for mathematical modeling of structural stability is considered, which is reduced to solving a partial generalized problem of eigen values of sparse matrices of different structure of large orders, with automatic parallelization of calculations on modern parallel computers with graphics processors. The main methodological principles and features of implementation of parallel algorithms for different structures of sparse matrices are presented, which ensure effective implementation of multilevel parallelism of a hybrid system and reduce data exchange time during the computational process. As an example of these approaches, a hybrid algorithm of the iteration method in subspace for tape and block-diagonal matrices with a frame for computers of hybrid architecture is given. Peculiarities of data decomposition for matrices of profile structure at realization of parallel algorithms are considered. The proposed approach provides automatic determination of the required topology of the hybrid computer and the optimal amount of resources for the organization of an efficient computational process. The results of testing the developed algorithmic software for problems from the collection of the University of Florida, as well as the times of solving the problem of stability of composite materials using a three-dimensional model of "finite size fibers" on computers of different architectures. The results show a significant improvement in the time characteristics of solving problems.
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Falcone, Alberto, Alfredo Garro, Marat S. Mukhametzhanov, and Yaroslav D. Sergeyev. "Representation of grossone-based arithmetic in simulink for scientific computing." Soft Computing 24, no. 23 (August 3, 2020): 17525–39. http://dx.doi.org/10.1007/s00500-020-05221-y.

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AbstractNumerical computing is a key part of the traditional computer architecture. Almost all traditional computers implement the IEEE 754-1985 binary floating point standard to represent and work with numbers. The architectural limitations of traditional computers make impossible to work with infinite and infinitesimal quantities numerically. This paper is dedicated to the Infinity Computer, a new kind of a supercomputer that allows one to perform numerical computations with finite, infinite, and infinitesimal numbers. The already available software simulator of the Infinity Computer is used in different research domains for solving important real-world problems, where precision represents a key aspect. However, the software simulator is not suitable for solving problems in control theory and dynamics, where visual programming tools like Simulink are used frequently. In this context, the paper presents an innovative solution that allows one to use the Infinity Computer arithmetic within the Simulink environment. It is shown that the proposed solution is user-friendly, general purpose, and domain independent.
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Dissertations / Theses on the topic "Computers / Computer Architecture"

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Umeh, Njideka Adaku. "Security architecture methodology for large net-centric systems." Diss., Rolla, Mo. : University of Missouri-Rolla, 2007. http://scholarsmine.mst.edu/thesis/Umeh_09007dcc8049b3f0.pdf.

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Thesis (M.S.)--University of Missouri--Rolla, 2007.
Vita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed December 6, 2007) Includes bibliographical references (p. 60-63).
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Palmer, Joseph McRae. "The Hybrid Architecture Parallel Fast Fourier Transform (HAPFFT) /." Diss., CLICK HERE for online access, 2005. http://contentdm.lib.byu.edu/ETD/image/etd855.pdf.

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Schmid, Stefan. "A component-based active router architecture." Thesis, Lancaster University, 2003. http://eprints.lancs.ac.uk/12227/.

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Kerbyson, Darren James. "A multiple-SIMD architecture for image and tracking analysis." Thesis, University of Warwick, 1992. http://wrap.warwick.ac.uk/80185/.

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The computational requirements for real-time image based applications are such as to warrant the use of a parallel architecture. Commonly used parallel architectures conform to the classifications of Single Instruction Multiple Data (SIMD), or Multiple Instruction Multiple Data (MIMD). Each class of architecture has its advantages and dis-advantages. For example, SIMD architectures can be used on data-parallel problems, such as the processing of an image. Whereas MIMD architectures are more flexible and better suited to general purpose computing. Both types of processing are typically required for the analysis of the contents of an image. This thesis describes a novel massively parallel heterogeneous architecture, implemented as the Warwick Pyramid Machine. Both SIMD and MIMD processor types are combined within this architecture. Furthermore, the SIMD array is partitioned, into smaller SIMD sub-arrays, forming a Multiple-SIMD array. Thus, local data parallel, global data parallel, and control parallel processing are supported. After describing the present options available in the design of massively parallel machines and the nature of the image analysis problem, the architecture of the Warwick Pyramid Machine is described in some detail. The performance of this architecture is then analysed, both in terms of peak available computational power and in terms of representative applications in image analysis and numerical computation. Two tracking applications are also analysed to show the performance of this architecture. In addition, they illustrate the possible partitioning of applications between the SIMD and MIMD processor arrays. Load-balancing techniques are then described which have the potential to increase the utilisation of the Warwick Pyramid Machine at run-time. These include mapping techniques for image regions across the Multiple-SIMD arrays, and for the compression of sparse data. It is envisaged that these techniques may be found useful in other parallel systems.
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Ferng, Ming-Jehn 1958. "PERFORMANCE OF HIERARCHICALLY FLEXIBLE ADAPTIVE COMPUTER ARCHITECTURE APPLIED TO SORTING PROBLEMS." Thesis, The University of Arizona, 1987. http://hdl.handle.net/10150/276457.

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In this thesis existing models of adaptive computer architecture were modified to adapt actual sorting problems to "divide 'n' conquer" (DQ) coordinator type configuration in which the children processors were expanded from three to four. Two hire/fire strategies, one using packets waiting in queue and the other using the average turn around time, were applied to maintain the hierarchical tree structure. More than 1200 simulation runs were analyzed and compared, finding that the first strategy was best at fast packet arrival rate and the second strategy was best at slow packets arrival rate. Comparing the hire/fire signal generation policies, the "fc-root" was best and the "root-fp" was worst. While comparing the effect of variable weighting factors in processors, using smaller weighting factor in either "partitioner" for the first strategy or "f-computer" for the second strategy may improve the system performance. (Abstract shortened with permission of author.)
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Johnson, James. "Quantitative analysis of plant root system architecture." Thesis, University of Nottingham, 2018. http://eprints.nottingham.ac.uk/55601/.

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The root system of a plant is responsible for supplying it with essential nutrients. The plant's ability to explore the surrounding soil is largely determined by its root system architecture (RSA), which varies with both genetic and environmental conditions. X-ray micro computed tomography (µCT) is a powerful tool allowing the non-invasive study of the root system architecture of plants grown in natural soil environments, providing both 3D descriptions of root architecture and the ability to make multiple measurements over a period of time. Once volumetric µCT data is acquired, the root system must first be segmented from the surrounding soil environment and then described. Automated and semi-automated software tools can be used to extract roots from µCT images, but current methods for the recovery of RSA traits from the resulting volumetric descriptions are somewhat limited. This thesis presents a novel tool (RooTh) which, given a segmented µCT image, skeletonises the root system and quantifies global and local root traits with minimal user interaction. The computationally inexpensive method used takes advantage of curve-fitting and active contours to find the optimal skeleton and thus evaluate root traits objectively. A small-scale experiment was conducted to validate and compare root traits extracted using the method presented here alongside other 2D imaging tools. The results show a good degree of correlation between the two methods.
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Vaudin, John. "A unified programming system for a multi-paradigm parallel architecture." Thesis, University of Warwick, 1991. http://wrap.warwick.ac.uk/108849/.

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Real time image understanding and image generation require very large amounts of computing power. A possible way to meet these requirements is to make use of the power available from parallel computing systems. However parallel machines exhibit performance which is highly dependent on the algorithms being executed. Both image understanding and image generation involve the use of a wide variety of algorithms. A parallel machine suited to some of these algorithms may be unsuited to others. This thesis describes a novel heterogeneous parallel architecture optimised for image based applications. It achieves its performance by combining two different forms of parallel architecture, namely fine grain SIMD and course grain MIMD, into a single architecture. In this way it is possible to match the most appropriate computing resource to each algorithm in a given application. As important as the architecture itself is a method for programming it. This thesis describes a novel multi-paradigm programming language based on C++, which allows programs which make use of both control and data parallelism to be expressed in a single coherent framework, based on object oriented programming. To demonstrate the utility of both the architecture and the programming system, two applications, one from the field of image understanding the other image generation are examined. These applications combine some novel algorithms with other novel implementation approaches to provide the most effective mapping onto this architecture.
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Moadeli, Mahmoud. "Quarc : an architecture for efficient on-chip communication." Thesis, University of Glasgow, 2010. http://theses.gla.ac.uk/1991/.

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The exponential downscaling of the feature size has enforced a paradigm shift from computation-based design to communication-based design in system on chip development. Buses, the traditional communication architecture in systems on chip, are incapable of addressing the increasing bandwidth requirements of future large systems. Networks on chip have emerged as an interconnection architecture offering unique solutions to the technological and design issues related to communication in future systems on chip. The transition from buses as a shared medium to networks on chip as a segmented medium has given rise to new challenges in system on chip realm. By leveraging the shared nature of the communication medium, buses have been highly efficient in delivering multicast communication. The segmented nature of networks, however, inhibits the multicast messages to be delivered as efficiently by networks on chip. Relying on extensive research on multicast communication in parallel computers, several network on chip architectures have offered mechanisms to perform the operation, while conforming to resource constraints of the network on chip paradigm. Multicast communication in majority of these networks on chip is implemented by establishing a connection between source and all multicast destinations before the message transmission commences. Establishing the connections incurs an overhead and, therefore, is not desirable; in particular in latency sensitive services such as cache coherence. To address high performance multicast communication, this research presents Quarc, a novel network on chip architecture. The Quarc architecture targets an area-efficient, low power, high performance implementation. The thesis covers a detailed representation of the building blocks of the architecture, including topology, router and network interface. The cost and performance comparison of the Quarc architecture against other network on chip architectures reveals that the Quarc architecture is a highly efficient architecture. Moreover, the thesis introduces novel performance models of complex traffic patterns, including multicast and quality of service-aware communication.
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Rafaeli, Sandro. "Architecture and protocols for decentralised group key management." Thesis, Lancaster University, 2003. http://eprints.lancs.ac.uk/12293/.

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Namuye, Silvester. "An architecture for flexible multimedia group management services." Thesis, Lancaster University, 1996. http://eprints.lancs.ac.uk/42451/.

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Multimedia systems applications have become major research interests in both computing and telecommunications industries. In some literature, multimedia is defined as "mant media" where media is derived from medium, and a medium is a means of transporting information. It is generally accepted that multimedia does enhance communication for individuals and among interacting groups of humans. Applications such as video conferencing, distance learning, and medical imaging, gain advantage in the use of multimedia applications. However, while it is recognised that future systems should provide multimedia functionality, many issues are being raised about how best to support multimedia communication. This is because multimedia requires new communications infrastructures to enable integration of various media types as well as to manipulate and control the individual media. There is also the need to support the spatial and temporal requirements of continuous media, and to support group based applications. Thus the requirements of multimedia applications are diverse; this thesis focuses on multimedia group management services. A number of architectures have been advanced on the management strategies for multimedia communications. A review of these architectures shows that they have been either application specific, or too restrictive for group based applications. This thesis presents an architecture for connection management for distributed multimedia group applications. The architecture is intended to encourage a uniform appearance to all group applications to assist in their collective management, whilst being sufficiently flexible to cope with all likely multicast mechanisms upon which such applications may be based. The concept of a media channel is introduced as the application-independent appearance of an instance of a single applications such as a video-on-demand service, or a video conferencing application. A media channel is the basic unit of management in a group user-agent and therefore is used as a basis for the management of multiple applications. The main aspects of the media channel model considered in the thesis have been substantially implemented and the performance accessed as suitable for a reasonable number of multimedia applications.
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Books on the topic "Computers / Computer Architecture"

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Mano, M. Morris. Computer system architecture. 3rd ed. London: Prentice-Hall, 1993.

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Frank, Woodhams, ed. Computers: From logic to architecture. London: Van Nostrand Reinhold, 1990.

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East, Ian. Computer architecture and organization. London: Pitman Publishing, 1990.

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Haugdahl, J. Scott. Inside SAA: IBM's strategic architecture. Minneapolis, Minn: Architecture Technology Corp., 1987.

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1954-, Leonard Timothy E., and Bhandarkar Dileep P, eds. VAX architecture reference manual. Bedford, Mass: DECbooks, 1987.

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Veljko, Milutinović, ed. High-level language computer architecture. [Rockville, Md.]: Computer Science Press, 1989.

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P, Hayes John. Computer architecture and organization. 3rd ed. Boston: WCB/McGraw-Hill, 1998.

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Abd-El-Barr, Mostafa. Fundamentals of Computer Organization and Architecture. New York: John Wiley & Sons, Ltd., 2005.

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Abd-El-Barr, Mostafa. Advanced Computer Architecture and Parallel Processing. New York: John Wiley & Sons, Ltd., 2005.

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Scott, John. IBM: Systems Applications Architecture. New York: Prentice Hall, 1999.

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Book chapters on the topic "Computers / Computer Architecture"

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Chalk, B. S. "Reduced Instruction Set Computers." In Computer Organisation and Architecture, 156–80. London: Macmillan Education UK, 1996. http://dx.doi.org/10.1007/978-1-349-13871-5_9.

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Chalk, B. S., A. T. Carter, and R. W. Hind. "Reduced instruction set computers." In Computer Organisation and Architecture, 177–87. London: Macmillan Education UK, 2004. http://dx.doi.org/10.1007/978-0-230-00060-5_10.

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Lee, Ruby B. "Processor Architecture for Trustworthy Computers." In Advances in Computer Systems Architecture, 1–2. Berlin, Heidelberg: Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11572961_1.

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Li, GuoJie. "Make Computers Cheaper and Simpler." In Advances in Computer Systems Architecture, 373. Berlin, Heidelberg: Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-30102-8_31.

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Nakamura, Tadao. "Toward Architecting and Designing Novel Computers." In Advances in Computer Systems Architecture, 8–13. Berlin, Heidelberg: Springer Berlin Heidelberg, 2003. http://dx.doi.org/10.1007/978-3-540-39864-6_2.

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Ray, Sayak. "Verification and Its Role in Design of Modern Computers." In Handbook of Computer Architecture, 1–12. Singapore: Springer Nature Singapore, 2023. http://dx.doi.org/10.1007/978-981-15-6401-7_33-1.

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Rojas, Raúl. "The Z1: Architecture and Algorithms of Zuse’s First Computer." In Konrad Zuse's Early Computers, 39–79. Cham: Springer Nature Switzerland, 2023. http://dx.doi.org/10.1007/978-3-031-39876-6_3.

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Bozkus, Zeki, Alok Choudhary, Tomasz Haupt, Geoffrey Fox, and Sanjay Ranka. "Compiling HPF for Distributed Memory MIMD Computers." In The Interaction of Compilation Technology and Computer Architecture, 191–221. Boston, MA: Springer US, 1994. http://dx.doi.org/10.1007/978-1-4615-2684-1_8.

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Amenyo, John-Thones. "Mesoscopic computer engineering: Automating DNA-based molecular computing via traditional practices of parallel computer architecture design." In DNA Based Computers II, 133–50. Providence, Rhode Island: American Mathematical Society, 1998. http://dx.doi.org/10.1090/dimacs/044/11.

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Philippsen, Michael, Thomas M. Warschko, Walter F. Tichy, Christian G. Herter, Ernst A. Heinz, and Paul Lukowicz. "Project Triton: Towards Improved Programmability of Parallel Computers." In The Interaction of Compilation Technology and Computer Architecture, 249–81. Boston, MA: Springer US, 1994. http://dx.doi.org/10.1007/978-1-4615-2684-1_10.

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Conference papers on the topic "Computers / Computer Architecture"

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Santos, Juan M., Martin Llamas, Maria Jose Moure, and Alfonso Lago. "Computer Architecture Lab: A bridge between electronics and computers." In 2012 Tecnolog as Aplicadas a la Ense anza de la Electr nica (Technologies Applied to Electronics Teaching) (TAEE). IEEE, 2012. http://dx.doi.org/10.1109/taee.2012.6235403.

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Tomari, Hisanobu, and Kei Hiraki. "Keeping old computers alive for deeper understanding of computer architecture." In ISCA '15: The 42nd Annual International Symposium on Computer Architecture. New York, NY, USA: ACM, 2015. http://dx.doi.org/10.1145/2795122.2795127.

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"Session TP7a: Computer architecture." In 2017 51st Asilomar Conference on Signals, Systems, and Computers. IEEE, 2017. http://dx.doi.org/10.1109/acssc.2017.8335569.

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"Session MP8a4: Computer architecture II." In 2017 51st Asilomar Conference on Signals, Systems, and Computers. IEEE, 2017. http://dx.doi.org/10.1109/acssc.2017.8335383.

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Banerjee, Pallab, Kamal Kishore, Kanika Thakur, Biresh Kumar, and Probal Banerjee. "Comparative Performance Analysis of Computer System Architecture and Implementation of Quantum Computers for Increasing the Effeciency of Computer System." In 2023 11th International Conference on Intelligent Systems and Embedded Design (ISED). IEEE, 2023. http://dx.doi.org/10.1109/ised59382.2023.10444582.

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Kreger-Stickles, Lucas, and Mark Oskin. "Microcoded Architectures for Ion-Tap Quantum Computers." In 2008 35th International Symposium on Computer Architecture (ISCA). IEEE, 2008. http://dx.doi.org/10.1109/isca.2008.28.

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Chen, Tianshi, Yunji Chen, Qi Guo, Olivier Temam, Yue Wu, and Weiwu Hu. "Statistical performance comparisons of computers." In 2012 IEEE 18th International Symposium on High Performance Computer Architecture (HPCA). IEEE, 2012. http://dx.doi.org/10.1109/hpca.2012.6169043.

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Huang, Ziqiang, Andrew D. Hilton, and Benjamin C. Lee. "Decoupling Loads for Nano-Instruction Set Computers." In 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA). IEEE, 2016. http://dx.doi.org/10.1109/isca.2016.43.

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McKinney, Evan, Mingkang Xia, Chao Zhou, Pinlei Lu, Michael Hatridge, and Alex K. Jones. "Co-Designed Architectures for Modular Superconducting Quantum Computers." In 2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA). IEEE, 2023. http://dx.doi.org/10.1109/hpca56546.2023.10071036.

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Cramer, David, Uma Jayaram, and Sankar Jayaram. "A Collaborative Architecture for Multiple Computer Aided Engineering Applications." In ASME 2002 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. ASMEDC, 2002. http://dx.doi.org/10.1115/detc2002/cie-34498.

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In this paper, we describe the need, design, and implementation of a Collaborative Architecture. The Collaboration Architecture addresses the need for multiple Computer Aided Engineering applications to exchange data packets directly with each other in an effort to decrease the design cycle time. This architecture incorporates three components in its design, a server, a controller, and multiple members. The members generate and use the data packets. The server maintains and distributes the data packets between the members. The controller component determines which CAE users are generating or using which data sets. The member component has been implemented with three subcomponents, a pusher application, a receiver application, and the CAE application which uses / generates the data packets. For the local member communication, the Collaborative Architecture uses shared memory. For inter-component communication, the architecture uses CORBA. Finally, this paper describes the implementation of two Computer Aided Applications, Dv/Mockup and an Immersive Virtual Design Environment.
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Reports on the topic "Computers / Computer Architecture"

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Tkachuk, Viktoriia V., Vadym P. Shchokin, and Vitaliy V. Tron. The Model of Use of Mobile Information and Communication Technologies in Learning Computer Sciences to Future Professionals in Engineering Pedagogy. [б. в.], November 2018. http://dx.doi.org/10.31812/123456789/2668.

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Research goal: the research is aimed at developing a model of use of mobile ICT in learning Computer Sciences to future professionals in Engineering Pedagogy. Object of research is the model of use of mobile ICT in learning Computer Sciences to future professionals in Engineering Pedagogy. Results of the research: the developed model of use of mobile ICT as tools of learning Computer Sciences to future professionals in Engineering Pedagogy is based on the competency-based, person-centered and systemic approaches considering principles of vocational education, general didactic principles, principles of Computer Science learning, and principles of mobile learning. It also takes into account current conditions and trends of mobile ICT development. The model comprises four blocks: the purpose-oriented block, the content-technological block, the diagnostic block and the result-oriented block. According to the model, the learning content of Computer Sciences consists of 5 main units: 1) Fundamentals of Computer Science; 2) Architecture of Modern Computers; 3) Fundamentals of Algorithmization and Programming; 4) Software of Computing Systems; 5) Computer Technologies in the Professional Activity of Engineer-pedagogues.
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Dongarra, J., and I. Duff. Advanced architecture computers. Office of Scientific and Technical Information (OSTI), September 1989. http://dx.doi.org/10.2172/5702408.

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Tsidylo, Ivan M., Hryhoriy V. Tereshchuk, Serhiy V. Kozibroda, Svitlana V. Kravets, Tetiana O. Savchyn, Iryna M. Naumuk, and Darja A. Kassim. Methodology of designing computer ontology of subject discipline by future teachers-engineers. [б. в.], September 2019. http://dx.doi.org/10.31812/123456789/3249.

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The article deals with the problem of the methodology of designing computer ontology of the subject discipline by the future teachers-engineers in the field of computer technologies. The scheme of ontology of the subject discipline is presented in which the set of concepts of the future computer ontology and the set of relations between them are represented. The main criteria of the choice of systems of computer ontologies for designing computer ontology of the subject discipline: software architecture and tools development; interoperability; intuitive interface are established. The selection of techniques for designing ontologies using computer ontology systems is carried out. The algorithm of designing computer ontology of the subject discipline by the future teachers-engineers in the field of computer technologies is proposed.
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Levy, Saul Y., J. S. Hall, and Miles J. Murdocca. Architecture for Optical Digital Computers. Fort Belvoir, VA: Defense Technical Information Center, August 1987. http://dx.doi.org/10.21236/ada195477.

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Wulf, William A., and Anita K. Jones. A High Performance Computer Architecture for Embedded And/Or Multi-Computer Applications. Fort Belvoir, VA: Defense Technical Information Center, September 1990. http://dx.doi.org/10.21236/ada226478.

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Forber, Richard, and Uzi Efron. Optoelectronic Computer Architecture Development for Image Reconstruction. Fort Belvoir, VA: Defense Technical Information Center, October 1996. http://dx.doi.org/10.21236/ada329541.

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Johannes, James D., Andrew Fanning, Kyle Hoover, Tim Lewis, and Marsha Robinson. Computer Network Security and Directory Services Architecture. Fort Belvoir, VA: Defense Technical Information Center, March 2000. http://dx.doi.org/10.21236/ada392366.

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Murdocca, Miles, Apostolos Gerasoulis, and Saul Levy. Novel Optical Computer Architecture Utilizing Reconfigurable Interconnects. Fort Belvoir, VA: Defense Technical Information Center, October 1991. http://dx.doi.org/10.21236/ada244057.

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Van Arsdall, P. Integrated computer control system architectural overview. Office of Scientific and Technical Information (OSTI), June 1997. http://dx.doi.org/10.2172/575338.

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Pattichis, Marios S. Reconfigurable Parallel Computer Architectures for Space Applications. Fort Belvoir, VA: Defense Technical Information Center, August 2012. http://dx.doi.org/10.21236/ada565041.

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