Academic literature on the topic 'Configurable Logic Blocks (CLB)'
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Journal articles on the topic "Configurable Logic Blocks (CLB)"
Zhang, Jun Bin, Jin Yan Cai, and Dan Yang Li. "A Novel Fault Orientation Technique of FPGA Configurable Logic Blocks Based on Improved Shift Register." Applied Mechanics and Materials 347-350 (August 2013): 1602–6. http://dx.doi.org/10.4028/www.scientific.net/amm.347-350.1602.
Full textZia, Razia, Muzaffar Rao, Arshad Aziz, and Pervez Akhtar. "Efficient Utilization of FPGA Using LUT-6 Architecture." Applied Mechanics and Materials 241-244 (December 2012): 2548–54. http://dx.doi.org/10.4028/www.scientific.net/amm.241-244.2548.
Full textGHOSH, BAHNIMAN, J. SIVA CHANDRA, and AKSHAYKUMAR SALIMATH. "DESIGN OF A MULTI-LAYERED QCA CONFIGURABLE LOGIC BLOCK FOR FPGAs." Journal of Circuits, Systems and Computers 23, no. 06 (2014): 1450089. http://dx.doi.org/10.1142/s0218126614500893.
Full textRajesh, A., Basha SK Jameer, Xavier Francis, and Babu S. Hari. "A BIST Methodology to test CLB Resources on an SRAM-Based FPGA using Complementary Gates Configuration." International Journal of Innovative Technology and Exploring Engineering (IJITEE) 9, no. 12 (2020): 217–20. https://doi.org/10.35940/ijitee.L7985.1091220.
Full textKim, Kyungah, Duc M. Tran, and Joon-Young Choi. "Implementation of EnDat Interface Master Using Configurable Logic Block in MCU." Electronics 13, no. 6 (2024): 1101. http://dx.doi.org/10.3390/electronics13061101.
Full textWang, Guo Hua, and Jing Lin Sun. "BIST-Based Method for Diagnosing Multiple Faulty CLBs in FPGAs." Applied Mechanics and Materials 643 (September 2014): 243–48. http://dx.doi.org/10.4028/www.scientific.net/amm.643.243.
Full textLiu, Hanyu, and Ali Akoglu. "Timing-Driven Nonuniform Depopulation-Based Clustering." International Journal of Reconfigurable Computing 2010 (2010): 1–11. http://dx.doi.org/10.1155/2010/158602.
Full textM., Siva Kumar, Sanjeeva Rayudu T.C., Rafi Vempalle, and Rajesh M. "A HW/SW Co-Verification Method for ASK using FPGA Test." Journal of VLSI Design and its Advancement 6, no. 2 (2023): 41–50. https://doi.org/10.5281/zenodo.8313916.
Full textYang, Wu, Milad Tanavardi Nasab, and Himanshu Thapliyal. "Energy Efficient CLB Design Based on Adiabatic Logic for IoT Applications." Electronics 13, no. 7 (2024): 1309. http://dx.doi.org/10.3390/electronics13071309.
Full textRan, Y., and M. Marek-Sadowska. "Designing via-configurable logic blocks for regular fabric." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 14, no. 1 (2006): 1–14. http://dx.doi.org/10.1109/tvlsi.2005.863196.
Full textDissertations / Theses on the topic "Configurable Logic Blocks (CLB)"
Erxleben, Fredo. "Graphical Support for the Design and Evaluation of Configurable Logic Blocks." Thesis, Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2016. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-175486.
Full textModi, Harmish Rajeshkumar. "In-System Testing of Configurable Logic Blocks in Xilinx 7-Series FPGAs." Thesis, Virginia Tech, 2015. http://hdl.handle.net/10919/55123.
Full textErxleben, Fredo. "Graphical Support for the Design and Evaluation of Configurable Logic Blocks." Thesis, 2015. https://tud.qucosa.de/id/qucosa%3A28833.
Full textGhani, A., Chan H. See, Hassan S. O. Migdadi, Rameez Asif, Raed A. Abd-Alhameed, and James M. Noras. "Reconfigurable neurons - making the most of configurable logic blocks (CLBs)." 2015. http://hdl.handle.net/10454/9152.
Full textLiang, Fang-jia, and 梁芳嘉. "Design and implementation of Configurable Self-timed Logic Blocks." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/40469447266170277626.
Full textBook chapters on the topic "Configurable Logic Blocks (CLB)"
Baradaran, Nastaran, Joonseok Park, and Pedro C. Diniz. "Data Reuse in Configurable Architectures with RAM Blocks." In Field Programmable Logic and Application. Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-30117-2_141.
Full textKubica, Marcin, Adam Opara, and Dariusz Kania. "Ability of the Configuration of Configurable Logic Blocks." In Lecture Notes in Electrical Engineering. Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-60488-2_10.
Full textCapmany, José, and Daniel Pérez. "Field Programmable Photonic Gate Arrays." In Programmable Integrated Photonics. Oxford University Press, 2020. http://dx.doi.org/10.1093/oso/9780198844402.003.0009.
Full textChandarana, Peyton, Mohammed Elbtity, Ronald F. DeMara, and Ramtin Zand. "MRAM-Based FPGAs: A Survey." In Computer Memory and Data Storage [Working Title]. IntechOpen, 2022. http://dx.doi.org/10.5772/intechopen.108212.
Full textKularatna, Nihal. "Configurable Logic Blocks for Digital Systems Design." In Electronic Circuit Design. CRC Press, 2017. http://dx.doi.org/10.1201/9781420007909-6.
Full textBiglari-Abhari, Morteza. "Configurable Logic Blocks for Digital Systems Design." In Electronic Circuit Design. CRC Press, 2008. http://dx.doi.org/10.1201/9781420007909.ch6.
Full textHauptfeld, Leonhard, Andrea Rappelsberger, and Klaus-Peter Adlassnig. "Infection Control Through Clinical Pipelines Built with Arden Syntax MLM Building Blocks." In dHealth 2024. IOS Press, 2024. http://dx.doi.org/10.3233/shti240032.
Full textZhang Lin, Slaets Peter, and Bruyninckx Herman. "An FPGA Based Architecture for Concurrent System Design Applied to Human-robot Interaction Applications." In Advances in Transdisciplinary Engineering. IOS Press, 2014. https://doi.org/10.3233/978-1-61499-440-4-555.
Full textVéstias, Mário Pereira. "Field-Programmable Gate Array." In Encyclopedia of Information Science and Technology, Fifth Edition. IGI Global, 2021. http://dx.doi.org/10.4018/978-1-7998-3479-3.ch020.
Full textConference papers on the topic "Configurable Logic Blocks (CLB)"
Wu, Jun, Yong-Bin Kim, and Minsu Choi. "Configurable logic block (CLB) design for Asynchronous Nanowire Crossbar system." In 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, 2012. http://dx.doi.org/10.1109/mwscas.2012.6291984.
Full textSunny, Abann, S. Aiswariya, A. J. Rose, Jerrin Joseph, Mangal Jolly, and Vinod Pangracious. "Design & implementation of configurable logic block (CLB) using SET based QCA technology." In 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology (ICSICT). IEEE, 2012. http://dx.doi.org/10.1109/icsict.2012.6467735.
Full textSunny, Abann, S. Aiswariya, A. J. Rose, Jerrin Joseph, Mangal Jolly, and Vinod Pangracious. "Design & implementation of configurable logic block (CLB) using SET based QCA technology." In 2012 Annual IEEE India Conference (INDICON). IEEE, 2012. http://dx.doi.org/10.1109/indcon.2012.6420603.
Full textGhani, Arfan, Chan H. See, Hassan Migdadi, Rameez Asif, Raed A. A. Abd-Alhameed, and James M. Noras. "Reconfigurable neurons - making the most of configurable logic blocks (CLBs)." In 2015 Internet Technologies and Applications (ITA). IEEE, 2015. http://dx.doi.org/10.1109/itecha.2015.7317451.
Full textRamana Kumari, J. L. V., V. Kranthi Kumar, M. Abhignya, and P. Shiva Rama Krishna. "Design and Performance Analysis of Configurable Logic Block (CLB) for FPGA using Various Circuit Topologies." In 2024 3rd International Conference for Innovation in Technology (INOCON). IEEE, 2024. http://dx.doi.org/10.1109/inocon60754.2024.10511683.
Full textCota, Érika, Luigi Carro, Felipe Pinto, Ricardo Reis, and Marcelo Lubaszewski. "Resource-and-time-aware test strategy for configurable quaternary logic blocks." In the 22nd Annual Symposium. ACM Press, 2009. http://dx.doi.org/10.1145/1601896.1601922.
Full textDutton, Bradley F., and Charles E. Stroud. "Built-In Self-Test of configurable logic blocks in Virtex-5 FPGAs." In 2009 41st Southeastern Symposium on System Theory (SSST). IEEE, 2009. http://dx.doi.org/10.1109/ssst.2009.4806778.
Full textFu, Wen-Hui, Jun Jiang, Xi Qin, Ting Yi, and Zhi-Liang Hong. "A Reconfigurable Analog Processor Based on FPAA with Coarse-Grained, Heterogeneous Configurable Analog Blocks." In 2010 International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2010. http://dx.doi.org/10.1109/fpl.2010.50.
Full textLahrach, Farid, Abderrazek Abdaoui, Abderrahim Doumar, and Eric Chatelet. "A novel SRAM-based FPGA architecture for defect and fault tolerance of configurable logic blocks." In 2010 IEEE 13th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). IEEE, 2010. http://dx.doi.org/10.1109/ddecs.2010.5491763.
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