Log in

Relevant bibliographies by topics / Current mode Flash ADC / Dissertations / Theses

To see the other types of publications on this topic, follow the link: Current mode Flash ADC.

Dissertations / Theses on the topic 'Current mode Flash ADC'

Author: Grafiati

Published: 4 June 2021

Last updated: 8 February 2022

Create a spot-on reference in APA, MLA, Chicago, Harvard, and other styles

Select a source type:

Consult the top 17 dissertations / theses for your research on the topic 'Current mode Flash ADC.'

Next to every source in the list of references, there is an 'Add to bibliography' button. Press on it, and we will generate automatically the bibliographic reference to the chosen work in the citation style you need: APA, MLA, Harvard, Chicago, Vancouver, etc.

You can also download the full text of the academic publication as pdf and read online its abstract whenever available in the metadata.

Browse dissertations / theses on a wide variety of disciplines and organise your bibliography correctly.

1

Figueiredo, Michael. "Reference-free high-speed cmos pipeline analog-to-digital converters." Doctoral thesis, Faculdade de Ciências e Tecnologia, 2012. http://hdl.handle.net/10362/8776.

Full text

Abstract:

Submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Electrical and Computer Engineering of the Faculdade de Ciências e Tecnologia of Universidade Nova de Lisboa<br>More and more signal processing is being transferred to the digital domain to profit from the technological enhancement of digital circuits. Where technology scaling enhances the capabilities of digital circuits, it degrades the performance of analog circuits. However, it is important to note that the impact that technology scaling has on digital circuits is becoming smaller and smaller, wh

APA, Harvard, Vancouver, ISO, and other styles

2

Baskaran, Balakumaar, and Hari Shankar Elumalai. "High-Speed Hybrid Current mode Sigma-Delta Modulator." Thesis, Linköpings universitet, Elektroniksystem, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-80060.

Full text

Abstract:

The majority of signals, that need to be processed, are analog, which are continuous and can take an infinite number of values at any time instant. Precision of the analog signals are limited due to influence of distortion which leads to the use of digital signals for better performance and cost. Analog to Digital Converter (ADC), converts the continuous time signal to the discrete time signal. Most A/D converters are classified into two categories according to their sampling technique: nyquist rate ADC and oversampled ADC. The nyquist rate ADC operates at the sample frequency equal to twice t

APA, Harvard, Vancouver, ISO, and other styles

3

Eilertsen, Bård Egil. "Current-Mode SAR-ADC In 180nm CMOS Technology." Thesis, Norges teknisk-naturvitenskapelige universitet, Institutt for elektronikk og telekommunikasjon, 2012. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-18820.

Full text

Abstract:

This thesis presents a fully differential 9-bit current-mode successive approximation (SAR) ADC. The circuit is designed in 0.18 um technology with 1.8 V supply voltage and has a current draw on 472 uA. The ADC has a sampling frequency on 50 MHz and has a maximum ENOB on 8.42 bit. Because of non-linearity will ENOB be input frequency dependent and degrade to 6.87 bit.The design is based on conventional current-mode SAR ADC operation, but with a new comparator design and time interleaving. Time interleaving is used to increase the sampling frequency 10 times.The circuit needs a high degree of m

APA, Harvard, Vancouver, ISO, and other styles

4

Agarwal, Anuj. "Low-power current-mode ADC for CMOS sensor IC." Texas A&M University, 2005. http://hdl.handle.net/1969.1/2706.

Full text

Abstract:

A low-energy current-mode algorithmic pipelined ADC targeted for use in distributed sensor networks is presented. The individual nodes combine sensing, computation and communications into an extremely small volume. The nodes operate with very low duty cycle due to limited energy. Ideally these sensor networks will be massive in size and dense in order to promote redundancy. In addition the networks will be collectively intelligent and adaptive. To achieve these goals, distributed sensor networks will require very small,inexpensive nodes that run for long periods of time on very little energy.

APA, Harvard, Vancouver, ISO, and other styles

5

Haaheim, Bård. "A sub-1µW, 16kHz Current-Mode SAR-ADC for Neural Spike Recording." Thesis, Norges teknisk-naturvitenskapelige universitet, Institutt for elektronikk og telekommunikasjon, 2011. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-14371.

Full text

Abstract:

This thesis presents an ultra-low-power 8-bit asynchronous current-modesuccessive approximation (SAR) ADC for single channel neuron spike recording.The novel design exploits current mode operating in weak inversion forhigh power efficiency and is designed to operate at a 1.8V supply. The ADC isrunning at a 16kHz sampling frequency using under 1uW of power, thoughis adjustable using the featured calibration registers. A finished layout ispresented, occupying less than 0.078mm2. Linear operation through mismatchand process variations is obtained using a current calibration circuitconnected to bo

APA, Harvard, Vancouver, ISO, and other styles

6

Shahzad, Khurram. "Low-power 8-bit Pipelined ADC with current mode Multiplying Digital-to-Analog Converter (MDAC)." Thesis, Linköping University, Department of Electrical Engineering, 2009. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-20314.

Full text

Abstract:

<p>In order to convert the analog information in the digital domain, pipelined analog-to-digital converter (ADC) offers an optimum balance of resolution, speed, power consumption, size and design effort.</p><p>In this thesis work we design and optimize a 8-bit pipelined ADC for low-power. The ADC has stage resolution of 1.5-bit and employ current mode multiplying analog-to-digital converter (MDAC). The main focus is to design and optimize the MDAC. Based on the analysis of "On current mode circuits" discussed in chapter 2, we design and optimize the MDAC circuit for the best possible effective

APA, Harvard, Vancouver, ISO, and other styles

7

Elkafrawy, Abdelrahman [Verfasser]. "Concept and design of a high speed current mode based SAR ADC / Abdelrahman Elkafrawy." Ulm : Universität Ulm, 2016. http://d-nb.info/1108434592/34.

Full text

APA, Harvard, Vancouver, ISO, and other styles

8

Silva, Alexandre Herculano Mendes. "Pipelined analog-to-digital conversion using current-mode reference shifting." Master's thesis, Faculdade de Ciências e Tecnologia, 2012. http://hdl.handle.net/10362/8265.

Full text

Abstract:

Dissertação para obtenção do grau de Mestre em Engenharia Electrotécnica e de Computadores<br>Pipeline Analog-to-digital converters (ADCs) are the most popular architecture for high-speed medium-to-high resolution applications. A fundamental, but often unreferenced building block of pipeline ADCs are the reference voltage circuits. They are required to maintain a stable reference with low output impedance to drive large internal switched capacitor loads quickly. Achieving this usually leads to a scheme that consumes a large portion of the overall power and area. A review of the literature sho

APA, Harvard, Vancouver, ISO, and other styles

9

Zatloukal, Tomáš. "Platforma pro ladění spínaných zdrojů." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2020. http://www.nusl.cz/ntk/nusl-433291.

Full text

Abstract:

The following work deals with a design of power supply testbench with design of their replaceable modules and circuits for their measurement. The final product should be used for faster design and tuning of switching power supplies. In this essay, there is detailed description of switching power supplies, analysis of support circuits and calculations for design. Based on theoretical background and selected parameters, a connection concept will be created. This concept will be validated by a device that will consist of main board, changeable modules and measurement circuits.

APA, Harvard, Vancouver, ISO, and other styles

10

Zeman, Pavel. "Návrh a realizace pěti-úrovňového kvantovacího obvodu." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2010. http://www.nusl.cz/ntk/nusl-218776.

Full text

Abstract:

The work deals with design and realisation of the five-levels high-speed quantizer using switched-current technique (SI). The main aim is to use an advantage of switched-current technique like potential of the high-speed operation and to minimize disadvantages at all. Flash structure of the quantizer is used to ensure high-speed operation. It is supposed that the quantizer will be part of greater integrated systems such as higher-order delta-sigma modulators. Simulations are performed in CADENCE simulation tool using AMIS CMOS 0,7 µm technologic process.

APA, Harvard, Vancouver, ISO, and other styles

11

Sundar, Arun. "A 3-Bit Current Mode Quantizer for Continuous Time Delta Sigma Analog-to-Digital Converters." Thesis, 2011. http://hdl.handle.net/1969.1/ETD-TAMU-2011-12-10515.

Full text

Abstract:

The summing amplifier and the quantizer form two of the most critical blocks in a continuous time delta sigma (CT ΔΣ) analog-to-digital converter (ADC). Most of the conventional CT ΔΣ ADC designs incorporate a voltage summing amplifier and a voltage-mode quantizer. The high gain-bandwidth (GBW) requirement of the voltage summing amplifier increases the overall power consumption of the CT ΔΣ ADC. In this work, a novel method of performing the operations of summing and quantization is proposed. A current-mode summing stage is proposed in the place of a voltage summing amplifier. The summed sign

APA, Harvard, Vancouver, ISO, and other styles

12

Maleki, Mohammad. "Current-mode flash analog-to-digital converter." Thesis, 1992. http://hdl.handle.net/1957/37347.

Full text

Abstract:

This thesis describes the development of a flash analog-to-digital converter based on current-mode technique. The advantages of current -mode technique are higher speed, smaller chip area, and simple division of reference current based on current mirror. A current-mode comparator is designed consisting of a cascode current mirror and a current sense amplifier used as a latch. The new method allows effective and simple high-speed A/D conversion where the input is a current signal and the output of the latch is a digital voltage signal. A four-bit flash analog-to-digital converter, using current

APA, Harvard, Vancouver, ISO, and other styles

13

WANG, GUO-LONG, and 王國隆. "A new current-mode flash analog-to-digital converter." Thesis, 1991. http://ndltd.ncl.edu.tw/handle/27257510409184859270.

Full text

APA, Harvard, Vancouver, ISO, and other styles

14

Liang, Funian, and 梁甫年. "A New 1.8V Current Mode Sense Amplifier for Flash Memories." Thesis, 2001. http://ndltd.ncl.edu.tw/handle/11022565876664374739.

Full text

Abstract:

碩士<br>國立中興大學<br>電機工程學系<br>89<br>ABSTRACT In many applications, such as portable MP3 players, cellular phones, digital cameras, and other hand-held equipments, flash memories have been widely used as a media for mass storage of audio and video information. Similar to other memories, there is a growing demand for high-density, low-cost and low-power memory cells. Recently, the multilevel cell technique introduced by Intel Corp. realizing high capacity and low-cost flash memories, draw many people’s attention. In this work, we present a novel current mode sense amplifier for

APA, Harvard, Vancouver, ISO, and other styles

15

Chen, Chein-Zhi, and 陳建志. "High-Speed Current-Mode Level-Identifying Circuits for Multilevel Flash Memories." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/13527092314121903036.

Full text

Abstract:

碩士<br>國立中興大學<br>電機工程學系<br>88<br>Abstract In recent years, several types of Flash memories have been proposed to enhance the density. Non-volatile memories storing more than one bit per cell are the attractive solution for semiconductor mass storage due to higher storage density without shrinking the memory cell. Therefore, the cost per bit and density can be reduced. To achieve n-bit-per cell storage, the number of distinguishable threshold levels in a cell should be m=2n. Hence, more complicated sensing architectures with short sensing time and high resolution are requir

APA, Harvard, Vancouver, ISO, and other styles

16

Chen, Chien-Shen, and 陳建盛. "Design and Implementation of a Pseudo-Flash Current-Mode Analog to Digital Converter." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/q45m5w.

Full text

Abstract:

碩士<br>國立臺北科技大學<br>電腦與通訊研究所<br>95<br>There are many different structures existed due to analog to digital converter using different sampling methods. The Flash Analog to Digital Converter (FLASH ADC) is the parallel structure used for low resolution which can provide better sampling performance. Using series of structure of Pipe-Lined ADC would increase higher resolution (more than 6-bits) and reduce the number of comparator and power consumption which was suitable for medium speed application. Sigma-delta modulator (SDM) became another modulation method to provide the high resolution for low s

APA, Harvard, Vancouver, ISO, and other styles

17

Javed, Gaggatur Syed. "Integrated Interfaces for Sensing Applications." Thesis, 2016. http://hdl.handle.net/2005/2914.

Full text

Abstract:

Sensor interfaces are needed to communicate the measured real-world analog values to the base¬band digital processor. They are dominated by the presence of high accuracy, high resolution analog to digital converters (ADC) in the backend. On most occasions, sensing is limited to small range measurements and low-modulation sensors where the complete dynamic range of ADC is not utilized. Designing a subsystem that integrates the sensor and the interface circuit and that works with a low resolution ADC requiring a small die-area is a challenge. In this work, we present a CMOS based area eﬃcient, i

APA, Harvard, Vancouver, ISO, and other styles

We offer discounts on all premium plans for authors whose works are included in thematic literature selections. Contact us to get a unique promo code!