Relevant bibliographies by topics / DAC circuit

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'DAC circuit'

Author: Grafiati
Published: 5 June 2025
Last updated: 1 August 2025

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Journal articles on the topic "DAC circuit"

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Matthew Khoo Kah Wen, Nabihah Ahmad, Yuzman Yusoff, and Hasmayadi Abdul Majid. "A Hybrid CMOS Digital-to-Analogue Converters Design for High Resolution SAR ADC." Journal of Advanced Research in Applied Sciences and Engineering Technology 32, no. 3 (2023): 121–38. http://dx.doi.org/10.37934/araset.32.3.121138.

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The paper describes the design and implementation of a 14-bit differential Digital-to-Analogue Converter (DAC) based on the Silterra 0.18µm Complementary Metal-Oxide-Semiconductor (CMOS) process to be established in a Successive Approximation Register (SAR) Analogue-to-Digital Converter (ADC) for the purpose of high-resolution, high accuracy and low power applications. The proposed differential DAC aims to eliminate the issue of stringent matching requirements imposed on high-resolution DACs while leveraging both linearity performance and power consumption parameters at a balanced point. The o
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Journal, IJSREM. "Design and Analysis of Op-Amp based 3-Bit R – 2R,4-Bit R–2R & 8-Bit R–2R ladder Digital to Analog Converter using NI-Multisim 14.3." INTERANTIONAL JOURNAL OF SCIENTIFIC RESEARCH IN ENGINEERING AND MANAGEMENT 08, no. 02 (2024): 1–13. http://dx.doi.org/10.55041/ijsrem28594.

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Using repetitive arrangements of precision resistor networks in a ladder-like shape, an R-2R Ladder is a quick and low-cost approach to do digital-to-analog conversion. Different resistor levels, an operational amplifier (LM741), and single pole double throw switches were the major building blocks for both circuits. MULTISIM software was used to build both circuits so that the circuit could be tested for its ideal use. The inclusion of both circuits in a real circuit helps with identifying and contrasting each's strengths and drawbacks. Using repetitive arrangements of precision resistor netwo
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Shen, Xiao Feng, Rong Bin Hu, and Xi Chen. "A Novel R-2R Current-Mode DAC Used for Digital-Calibrated ADC." Advanced Materials Research 753-755 (August 2013): 2479–82. http://dx.doi.org/10.4028/www.scientific.net/amr.753-755.2479.

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In this paper, a kind of novel DAC architecture is proposed. Compared to the traditional DAC architecture, the proposed is a multistage one. In order to improve precision, we use a kind of feedback bias circuit, which can minimize the effect of the base currents. A 16-bit DAC transistor-level circuit is implemented in 0.18um SiGe process. The simulation results show that the DAC using the proposed architecture has higher resolution, and better static and dynamic performances than the traditional one.
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Lakshmi Bhavani, G., Patan Muzafar, T. Usha Rani та ін. "A 1.2v ΔΣ ADC Modulator Using 4-bit SAR Quantizer for Biomedical Applications by using 65nm CMOS Technology". MATEC Web of Conferences 392 (2024): 01060. http://dx.doi.org/10.1051/matecconf/202439201060.

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This research focuses on enhancing Sigma-Delta ADC modulators for biomedical applications by leveraging the working principle of Successive Approximation ADC circuits. The proposed modulator includes a comparator, DAC, successive approximation register, and control circuit. The operational process begins with the sample and holds circuit-initiating conversions by sampling the input signal, and then compared with the DAC output. Using a 4-bit example, the successive approximation register refines the DAC output through iterative bit adjustments until the closest digital code approximation to th
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Wu, Zhang Yu, Xian Wang, Ye Hui Wu, and Long Cheng Que. "An N-Bit DAC with Adjustable Precision and Range." Advanced Materials Research 846-847 (November 2013): 822–25. http://dx.doi.org/10.4028/www.scientific.net/amr.846-847.822.

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Now some special circuits need higher precision in relatively fixed range. While the precision of a common digital-to-analog converter (DAC) is equidistant, which means the higher the precision is, the greater the number of bits. The increase of number of bits will slow down the speed of converter. This architecture we present here aims at finding a way of solving the problem. It uses M bits of the N-bit DAC to adjust precision by changing the current of the voltage division circuit, which alters the range of the DAC to a certain extent.
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Tian, Y., P. Yang, Q. Wang, et al. "Development of an on-chip configurable DAC module for monolithic active pixel sensor." Journal of Instrumentation 17, no. 03 (2022): C03006. http://dx.doi.org/10.1088/1748-0221/17/03/c03006.

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Abstract This paper describes an on-chip configurable Digital to Analog Converter (DAC) module for monolithic active pixel sensor. The DAC module consists of four 10-bit voltage DACs, seven 8-bit current DACs, a bandgap circuit, and a configure interface. The voltage DAC is implemented with an R-2R resistor ladder network, and each LSB corresponds to 3 mV. The current DAC is in the current-steering type with a thermometer code. Each LSB of the current DAC corresponds to 10 nA. The bandgap circuit provides a stable, temperature-independent reference voltage of 1.25 V to the DACs. All the DACs c
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Рембеза, S. Rembeza, Кононов, and V. Kononov. "Sectional digital-to-analog converter for designing CMOS pipelined-CGT-ADC while minimizing switched capacitors." Modeling of systems and processes 6, no. 3 (2014): 32–34. http://dx.doi.org/10.12737/2387.

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The formulated optimal requirements sectional bezkontaktni DAC. Considered are the main technological and frequency limitations sovovych DAC with low power consumption. Suggested 4-bit binary-weighted Zogby differential DAC architecture analogue circuit.
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Hashemifar, Seyed Mohammad. "Design of a Single-Core Digital-to-Analog Converter with Ultra-Wideband and Low Power Consumption for CUWB-IR Applications." Tehnički glasnik 16, no. 3 (2022): 311–14. http://dx.doi.org/10.31803/tg-20220405104325.

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Data converters are intermediate circuits used to connect between two analog and digital ranges. Data converters are not only used for converting audio into a microphone or speaker, but also for converting audio into a camera or display, transferring information to a computer or digital signal processor. At these times, the need for data converters is not invested in every aspect of life. Digital to analog converters is a leading part of these converters, which are widely used in most audio and video circuits. In this thesis, we have proposed a 4-bit 1GS/s DAC for CUWB-IR usage. To enhance the
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Widodo, Arif. "Optimasi Linieritas Rangkaian R-2R Ladder DAC Menggunakan Algoritma Genetika." INAJEEE : Indonesian Journal of Electrical and Eletronics Engineering 1, no. 1 (2018): 7. http://dx.doi.org/10.26740/inajeee.v1n1.p7-11.

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Abstrak - rangkaian R-2R ladder digital-to-analog converter (DAC) adalah rangkaian elektronika sederhanayang dapat dibuat dengan dua nilai resistor serta banyak digunakan untuk proses konversi nilai digital keanalog secara langsung. Pemilihan nilai serta penempatan resistor pada rangkaian ini sangat berpengaruhpada linieritas sinyal hasil konversi. Penelitian ini bertujuan untuk memberikan solusi dalam merancangrangkaian R-2R ladder DAC dengan linieritas yang medekati optimal menggunakan komponen resistor yangada di pasaran. Dengan bantuan algoritma genetika, komponen resistor yang ada dapat d
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Li, Weng Yuan, and Teng Xiao Jiang. "A 4-Bit 5 GS/s Current Steering DAC Integrated Circuit." Applied Mechanics and Materials 513-517 (February 2014): 4555–58. http://dx.doi.org/10.4028/www.scientific.net/amm.513-517.4555.

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In order to satisfy the higher and higher transmission rate and broadband requirement of modern communication, a 4-bit 5 GS/s digital-to-analog converter (DAC) integrated circuit is presented. The DAC circuit is based on current steering architecture and segmented with a 4 bit unary. The circuit is designed and analyzed in TSMC 0.18 μm CMOS technology. The chip size is 0.675 mm 0.525 mm. Simulation results show that the maximum integral nonlinearity (INL) is 0.15 LSB. The DAC can achieve a spurious-free dynamic range (SFDR) of 22.76 dB under a clock frequency of 5 GHz with an input signal freq
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Dissertations / Theses on the topic "DAC circuit"

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Savory, Daniel Chase. "Power Side-Channel DAC Implementations for Xilinx FPGAs." BYU ScholarsArchive, 2014. https://scholarsarchive.byu.edu/etd/4038.

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This thesis presents a novel power side-channel DAC (PS-DAC) which is constructed from user-controllable short circuits in FPGAs and which manipulate overall system power through dynamic power dissipation. Alternately, similar PS-DACs are created using shift-register primitives(SRL16E) which manipulate system power through switching logic, for means of comparison with short-circuit-based PS-DACs. PS-DACs are created of various sizes using both short-circuit-based and shift-register-based methods. These PS-DACs are characterized in terms of output linearity,monotonicity, and frequency distortio
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Viklund, Jonas. "Developing of an ultra low noise bolometer biasing circuit." Thesis, Uppsala universitet, Fasta tillståndets elektronik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-296698.

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Noise in electronic circuits can sometimes cause problems. It is especially problematic in for example high sensitive sensors and high end audio and video equipment. In audio and video equipment the noise will make its way into the sound and picture reducing the overall quality. Sensors that are constructed to sense extremely small changes can only pick up changes larger than the noise floor of the circuit. By lowering the noise, sensors can achieve higher accuracy.  This thesis presents an ultra low noise solution of the biasing circuitry to the bolometer used in one of FLIR Systems high end
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Gibson, David, N. B. Penrose, Michael Doerr, and Gary Borgen. "HSTSS-DAC CUSTOM INTEGRATED CIRCUITS FOR SUBMINIATURE PCM TELEMETRY AND SIGNAL CONDITIONING." International Foundation for Telemetering, 1999. http://hdl.handle.net/10150/608711.

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International Telemetering Conference Proceedings / October 25-28, 1999 / Riviera Hotel and Convention Center, Las Vegas, Nevada<br>To meet specific test and evaluation requirements, the Hardened Subminiature Telemetry and Sensor Systems (HSTSS) program is addressing the miniaturization and ‘G’ hardening of telemetry components. Two custom Integrated Circuits (ICs) are in development to support the design of miniature Pulse Code Modulation (PCM) systems with up to 128 analog input channels. This paper describes the design and development of the custom IC chips of the HSTSS Data Acquisition Chi
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Gaddam, Ravi Shankar. "A 10-Bit Dual Plate Sampling Capacitive DAC with Auto-Zero On-Chip Reference Voltage Generation." University of Akron / OhioLINK, 2012. http://rave.ohiolink.edu/etdc/view?acc_num=akron1349294825.

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Hedayati, Raheleh. "High-Temperature Analog and Mixed-Signal Integrated Circuits in Bipolar Silicon Carbide Technology." Doctoral thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-213697.

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Silicon carbide (SiC) integrated circuits (ICs) can enable the emergence of robust and reliable systems, including data acquisition and on-site control for extreme environments with high temperature and high radiation such as deep earth drilling, space and aviation, electric and hybrid vehicles, and combustion engines. In particular, SiC ICs provide significant benefit by reducing power dissipation and leakage current at temperatures above 300 °C compared to the Si counterpart. In fact, Si-based ICs have a limited maximum operating temperature which is around 300 °C for silicon on insulator (S
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Costa, Neto Alvaro. "Ambiente virtual de apoio ao ensino com ênfase na teoria das inteligências múltiplas e sua aplicação em sistemas digitais /." São José do Rio Preto : [s.n.], 2009. http://hdl.handle.net/11449/98634.

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Orientador: Norian Marranghello<br>Banca: Maria Eliza Brefere Arnoni<br>Banca: Luiz Carlos Begosso<br>Resumo: O ensino é de vital importância para a evolução de uma sociedade. Metodologias e ferramentas de ensino visam otimizar e facilitar o aprendizado de forma que o processo de aprendizagem seja eficiente. Descreve-se nesta dissertação um ambiente de apoio ao ensino - chamado Classroom - com ênfase na Teoria das Inteligências Múltiplas cujo objetivo é fornecer ferramentas e guias para a criação de aulas virtuais, facilitando a composição e exposição de complementos para aulas presenciais. Al
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Chereches, Nelu Cristian. "Contribution à l'optimisation de circuits thermoconvectifs." Reims, 2006. http://theses.univ-reims.fr/exl-doc/GED00000236.pdf.

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L'écoulement du fluide ainsi que le transfert de chaleur par convection mixte sont analysés dans le circuit thermoconvectif à plusieurs canaux de refroidissement d'un transformateur électrique de puissance triphasé en colonnes immergé dans un bain d'huile minérale à l'intérieur d'une cuve. Les objectifs de ce travail sont l'optimisation du transfert de chaleur et la limitation de la température du point chaud tout en assurant une bonne compréhension des phénomènes thermiques et dynamiques mis en jeu à l'intérieur du transformateur électrique. Dans un premier temps, différentes configurations g
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Chereches, Nelu Cristian Taranu Nicolae Padet Jacques. "Contribution à l'optimisation de circuits thermoconvectifs." Reims : S.C.D. de l'Université, 2006. http://scdurca.univ-reims.fr/exl-doc/GED00000236.pdf.

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Costa, Neto Alvaro [UNESP]. "Ambiente virtual de apoio ao ensino com ênfase na teoria das inteligências múltiplas e sua aplicação em sistemas digitais." Universidade Estadual Paulista (UNESP), 2009. http://hdl.handle.net/11449/98634.

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Made available in DSpace on 2014-06-11T19:29:39Z (GMT). No. of bitstreams: 0 Previous issue date: 2009-08-21Bitstream added on 2014-06-13T20:19:44Z : No. of bitstreams: 1 costaneto_a_me_sjrp.pdf: 316929 bytes, checksum: 812a1d9aaa7c2c0a64b9a5ae34eed517 (MD5)<br>O ensino é de vital importância para a evolução de uma sociedade. Metodologias e ferramentas de ensino visam otimizar e facilitar o aprendizado de forma que o processo de aprendizagem seja eficiente. Descreve-se nesta dissertação um ambiente de apoio ao ensino – chamado Classroom – com ênfase na Teoria das Inteligências Múltiplas cujo
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Silva, Silvana Cristina da 1980. "Circuito espacial produtivo das confecções e exploração do trabalho na metrópole de São Paulo = os dois circuitos da economia urbana nos bairros da Brás e Bom Retiro (SP) = Clothing productive spatial circuit and exploration of work in the Metropolis of São Paulo : the two circuits of the urban economy in Brás and Bom Retiro neighborhoods (SP)." [s.n.], 2012. http://repositorio.unicamp.br/jspui/handle/REPOSIP/286985.

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Orientador: Márcio Antonio Cataia<br>Tese (doutorado) - Universidade Estadual de Campinas, Instituto de Geociências<br>Made available in DSpace on 2018-08-20T04:57:12Z (GMT). No. of bitstreams: 1 Silva_SilvanaCristinada_D.pdf: 10172934 bytes, checksum: 381439e32862da2706aff46b4dbb5c41 (MD5) Previous issue date: 2012<br>Resumo: Em período recente, houve uma reorganização do circuito espacial de produção do vestuário em escala planetária. No Brasil, as etapas da produção, distribuição, comércio e consumo passaram por transformações significativas. No entanto, a cidade de São Paulo, apesar de p
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Books on the topic "DAC circuit"

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Asia and South Pacific Design Automation Conference (2004 Yokohama-shi, Japan). ASP-DAC 2004: Proceedings of the ASP-DAC 2004 Asia and South Pacific Design Automation Conference, 2004 : January 27-January 30, 2004, Pacifico Yokohama, Yokohama, Japan. IEEE, 2004.

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Asia, and South Pacific Design Automation Conference (4th 1999 Wan Chai Hong Kong China). Proceedings of the ASP-DAC'99: Asia and South Pacific Design Automation Conference, 1999 : January 18-21, 1999, Wanchai, Hong Kong. The Institute of Electrical and Electronics Engineers, Inc., 1999.

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China) Asia and South Pacific Design Automation Conference (2005 Shanghai. Proceedings of the ASP-DAC 2005: Asia and South Pacific Design Automation Conference, 2005 : January 18-21, 2005, Hotel Equatorial, Shanghai, China. IEEE, 2005.

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European Design Automation Conference (1994 Grenoble, France). Euro-DAC '94 with Euro-VHDL '94: Proceedings, September 19-23, 1994, Grenoble, France. IEEE Computer Society Press, 1994.

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Asia and South Pacific Design Automation Conference (1997 Chiba-shi, Japan). Proceedings of the ASP-DAC '97, Asia and South Pacific Design Automation Conference 1997, January 28-31, 1997, Makuhari Messe, Nippon Convention Center, Chiba, Japan. Institute of Electrical and Electronics Engineers, 1996.

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Asia and South Pacific Design Automation Conference (19th 2014 Singapore). 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC 2014): Singapore, 20-23 January 2014. IEEE, 2014.

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Japan) Asia and South Pacific Design Automation Conference (18th 2013 Yokohama-shi. 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013): Yokohama, Japan, 22-25 January 2013. IEEE, 2013.

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Asia and South Pacific Design Automation Conference (2000 Yokohama-shi, Japan). Proceedings of the ASP-DAC 2000: Asia and South Pacific Design Automation Conference, 2000 : January 25-28, 2000, Yokohama, Japan. Institute of Electrical and Electronics Engineers, 2000.

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European Design Automation Conference (1996 Geneva, Switzerland). Euro-DAC '96, European Design Automation Conference with Euro-VHDL '96 and Exhibition: Proceedings, Geneva, Switzerland, September 16-20, 1996. IEEE Computer Society Press, 1996.

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European, Design Automation Conference (1995 Brighton England). Euro-DAC '95, European Design Automation Conference with Euro-VHDL: Proceedings, Brighton, Great Britain, September 18-22, 1995. IEEE Computer Society Press, 1995.

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Book chapters on the topic "DAC circuit"

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Radulov, Georgi, Patrick Quinn, Hans Hegt, and Arthur van Roermund. "DAC Correction and Flexibility, Classification, New Methods and Designs." In Analog Circuit Design. Springer Netherlands, 2009. http://dx.doi.org/10.1007/978-90-481-3083-2_5.

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Vital, J., A. Marques, P. Azevedo, and J. Franca. "Design Considerations for a Retargetable 12b 200MHz CMOS Current-Steering DAC." In Analog Circuit Design. Springer US, 2003. http://dx.doi.org/10.1007/0-306-47950-8_8.

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Bult, K., C. H. Lin, F. van der Goes, et al. "A 12b 2.9 GS/s DAC with IM3<–60 dBc Beyond 1 GHz in 65 nm CMOS." In Analog Circuit Design. Springer Netherlands, 2011. http://dx.doi.org/10.1007/978-94-007-1926-2_6.

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Karmakar, Supriya. "Performance in Sub-25-nm Range: Circuit Model, Ternary Logic Gates and ADC/DAC." In Novel Three-state Quantum Dot Gate Field Effect Transistor. Springer India, 2013. http://dx.doi.org/10.1007/978-81-322-1635-3_8.

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Verhaevert, Jo. "D.C. Circuits." In Fundamental Electrical and Electronic Principles, 4th ed. Routledge, 2023. http://dx.doi.org/10.1201/9781003308294-2.

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Baschirotto, Andrea, Vittorio Colonna, and Gabriele Gandolfi. "OVERSAMPLED DACs." In Analog Circuit Design. Springer Netherlands, 2011. http://dx.doi.org/10.1007/978-94-007-0391-9_12.

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Bird, John. "d.c. circuit theory." In Bird's Electrical Circuit Theory and Technology, 7th ed. Routledge, 2021. http://dx.doi.org/10.1201/9781003130338-18.

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Bird, John. "d.c. circuit theory." In Bird's Electrical and Electronic Principles and Technology, 7th ed. Routledge, 2021. http://dx.doi.org/10.1201/9781003130406-18.

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Bird, John. "d.c. machines." In Bird's Electrical Circuit Theory and Technology, 7th ed. Routledge, 2021. http://dx.doi.org/10.1201/9781003130338-27.

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Bird, John. "d.c. transients." In Bird's Electrical Circuit Theory and Technology, 7th ed. Routledge, 2021. http://dx.doi.org/10.1201/9781003130338-22.

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Conference papers on the topic "DAC circuit"

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H K, Adithya, Aishwarya Kulkarni, Archana B, Chandana K T, and Pushpa Mala S. "Exploring Memristor Integrated R-2R DAC: A Study in Circuit Optimization and Performance." In 2024 IEEE North Karnataka Subsection Flagship International Conference (NKCon). IEEE, 2024. https://doi.org/10.1109/nkcon62728.2024.10775070.

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Tsukiji, Nobukazu, Eito Minami, Lengkhang Nengvang, et al. "Bit-Serial DAC With Positive and Negative Polarity Output Using Switched Capacitor Circuit." In 2024 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS). IEEE, 2024. https://doi.org/10.1109/ispacs62486.2024.10868614.

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Tschanz, J., K. Bowman, and V. De. "Variation-tolerant circuits: circuit solutions and techniques." In 2005 42nd Design Automation Conference. IEEE, 2005. http://dx.doi.org/10.1109/dac.2005.193915.

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Bittner, Kai, H. G. Brachtendorf, Wim Schoenmaker, and Pascal Reynier. "Coupled circuit/EM simulation for radio frequency circuits." In DAC '17: The 54th Annual Design Automation Conference 2017. ACM, 2017. http://dx.doi.org/10.1145/3061639.3062219.

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Sun, Kae-oh, and Daniel van der Weide. "DAC design method based on microwave circuit principles." In 2006 IEEE MTT-S International Microwave Symposium Digest. IEEE, 2006. http://dx.doi.org/10.1109/mwsym.2006.249619.

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Scott, W. S., and J. K. Ousterhout. "Magic's Circuit Extractor." In 22nd ACM/IEEE Design Automation Conference. IEEE, 1985. http://dx.doi.org/10.1109/dac.1985.1585954.

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Yiwan Wong. "Hierarchical Circuit Verification." In 22nd ACM/IEEE Design Automation Conference. IEEE, 1985. http://dx.doi.org/10.1109/dac.1985.1586018.

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Watanabe, T., T. Masuishi, T. Nishiyama, and N. Horie. "Knowledge-Based Optimal IIL Circuit Generator from Conventional Logic Circuit Descriptions." In 23rd ACM/IEEE Design Automation Conference. IEEE, 1986. http://dx.doi.org/10.1109/dac.1986.1586150.

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Xiaoliang Bai, C. Visweswariah, P. N. Strenski, and D. J. Hathaway. "Uncertainty-aware circuit optimization." In Proceedings of 39th Design Automation Conference. IEEE, 2002. http://dx.doi.org/10.1109/dac.2002.1012594.

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Qi, Min, Quan Sun, Dong-hai Qiao, and An-qiang Guo. "DAC-Controlled Soft-Start Circuit for AC/DC Converters." In 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT). IEEE, 2018. http://dx.doi.org/10.1109/icsict.2018.8564974.

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Reports on the topic "DAC circuit"

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Collins, Deborah L. The Quitam Relator: A Modern Day Goldilocks Searching for the Just Right Circuit. Defense Technical Information Center, 2000. http://dx.doi.org/10.21236/ada381008.

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2da Bienal Interamericana de Video Arte del Centro Cultural del BID. Inter-American Development Bank, 2005. http://dx.doi.org/10.18235/0006115.

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Después de su presentación en Washington, D.C., la bienal comenzó el circuito itinerante en junio de 2005, en el Istituto Italo-Latino Americano (IILA) en Roma. Luego viajará a varios países que forman parte de un circuito de más de 13 países incluyendo Rusia, terminando en el XXII Festival de Cine de Santafé de Bogotá, Colombia www.bogocine.com/xxii/. Las instituciones del circuito incluyen: Espacio Fundación Telefónica, Buenos Aires, Argentina; Fundação Cultural de Curitiba, Curitiba, Brasil; 15 Videobrasil Internacional Electronic Art Festival, São Paulo, Brasil; Cine a la Calle, Cinemateca
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