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1
Galvis, Jorge Alberto. "Low-power flip-flop using internal clock gating and adaptive body bias." [Tampa, Fla] : University of South Florida, 2006. http://purl.fcla.edu/usf/dc/et/SFE0001465.
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Taylor, Eileen Zalkin. "The effects of in-group bias and decision aids on auditors' evidence evaluation." [Tampa, Fla] : University of South Florida, 2006. http://purl.fcla.edu/usf/dc/et/SFE0001572.
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Sherman, Pattie Beth. "Trauma-based priming and attentional bias to smoking cues : a Stroop task study." [Tampa, Fla.] : University of South Florida, 2007. http://purl.fcla.edu/usf/dc/et/SFE0002071.
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Rendina-Gobioff, Gianna. "Detecting publication bias in random effects meta-analysis : an empirical comparison of statistical methods." [Tampa, Fla] : University of South Florida, 2006. http://purl.fcla.edu/usf/dc/et/SFE0001494.
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Isumbingabo, Emma Francoise. "Evaluation and mitigation of the undesired effect of DC bias on inverter power transformer." Master's thesis, University of Cape Town, 2009. http://hdl.handle.net/11427/5202.
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Inverters have traditionally been used mostly in standalone systems (non-grid connected), Uninterruptible Power Supplies (UPS) and, more recently, in distributed generated systems (DGs). DG systems are based on grid connected inverters and are increasingly being connected to utility grids to convert renewable energy sources to the utility grids. Such sources are likely to have a significant impact in the future in meeting the electricity demands of industry and domestic consumption. Common DGs utilize DC power sources such as fuel cells, batteries, photovoltaic (solar) power, and wind power. Most of power supplies in domestic and industries are AC power consumers and, for this reason, the DC power has to be converted to meet the requirement. Two main causes of DC current in inverter power transformer are: 1) Non-linearity and asymmetry in its switching mechanism which may result in undesired DC current at its input. This DC current introduced into an inverter transformer results in the transformer's magnetic flux distortion and in some cases magnetic saturation. This, in turn, results in asymmetrical primary currents in the transformer (inverter side). This is due to the non linear characteristics of the transformer magnetic flux. 2) The same effects can be produced by the connection of asymmetrical loads (e.g. asymmetrical rectifier) to the inverter output. The result in both cases is an asymmetrical magnetic flux in the transformer. This is manifested as even and odd current harmonics as well as an increase in the reactive power requirement from the inverter. vi To remedy this situation, it is, therefore, necessary to incorporate into the inverter's control system a mechanism of cancelling the DC magnetic motive force (mmf) that causes the magnetic flux distortion. This Thesis presents a method of introducing a DC voltage component in the inverter's voltage output so as to inject the necessary DC current into the primary side of the inverter's transformer so as to cancel the total DC mmf that the transformer is subjected to ( supply and load side). This project consists of three main parts namely: Modeling, Simulation and Laboratory Experiment. Activities undertaken under Modeling and Simulation were as follows: Determining the effects of DC current on a power transformer. Investigating the likely occurrence of saturation of the power transformer incorporated in inverter systems. Mitigating the effects that can be caused by the presence of a DC component in the windings of a power transformer. After understanding the literature on the subject of interest, MATLAB SIMULINK and MATLAB m-files were used to simulate the behavior of the power transformer under three situations : The transformer under linear load. The transformer subjected to asymmetrical loading. The inverter system that has a power transformer on its output were designed in MATLAB and used to simulate the situation for each case. To validate the theory and simulation results, experimental work was carried out as follows: vii Investigation of the effects that DC (current) injection can have on a 6 kVA power transformer. Investigation of the performance of a 6 kVA power transformer under linear loading. Investigation of the performance of a 6 kVA power transformer under non-linear loads. Investigation of the likely occurrence of DC offset in inverter system. Mitigation of the effect of DC bias on power transformer using extra windings. Mitigation of the effects of DC offset in power inverter transformer by using the second harmonic content of the primary current as a feedback signal. Results obtained showed a successful implementation of the proposed method. However limitations of the controller performances were experienced and will require future work. It was concluded that a total removal of the undesired effects of DC bias is achievable and that total removal of DC offset in power inverter transformer is possible if the limitations of the controller are overcome.
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Smith, Lance Santoro. "The effects of homophobia, legislation, and local policies on heterosexual pupil services professionals' likelihood of incorporating gay affirming behaviors in their professional work with sexual minority youths in public schools." [Tampa, Fla.] : University of South Florida, 2007. http://purl.fcla.edu/usf/dc/et/SFE0002156.
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Baguley, Craig. "An investigation into the core losses of Mn-Zn ferrite materials under DC bias conditions." Thesis, University of Auckland, 2011. http://hdl.handle.net/2292/7156.
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The range of products in modern society which are dependent on electronic power supplies is extensive. A non-exhaustive list of examples includes: computers, battery chargers, lighting systems, televisions, automobiles, DVD players, and mobile phones. As new technologies emerge and new products become available consumer demand for power driven equipment can be expected grow. Concurrently, environmental protection agencies are advocating that demand be constrained in order to limit power consumption and, thus, carbon emissions. The conflicting interests of consumers and environmental protection agencies can be at least partially reconciled through improving power supply efficiency levels and, consequently, research in this area has assumed great importance. A significant contribution to the total energy losses of power supplies are made by its magnetic components, which consist essentially of an electrically conductive coil wound around a soft magnetic core that is often excited under a dc bias condition, as both ac and dc magnetic fields are applied. Although the material commonly used to implement the core is Mn-Zn ferrite, its physical loss mechanisms under dc bias conditions are not well understood. Therefore, there is a need for an investigation in this area. This Thesis aims to fulfill this need by presenting the results of an investigation into the losses of Mn-Zn ferrite cores under dc bias conditions. With the use of a laser vibrometer, experimental results are presented showing that the amplitude of the magnetostrictive vibration of a Mn-Zn ferrite core increases with dc bias levels. This increase is shown to be general in the sense that it occurs at frequencies distant from, as well as close to, the natural resonant frequency of the core. Using an accurate core loss measurement circuit it is also shown that core losses increase significantly with dc bias, and it is proposed that a correlation between magnetostrictive vibration and core losses exists. In addition, an unusual phenomenon caused by the interactions between the mechanical and magnetic states of a Mn-Zn ferrite core is reported. During this phenomenon figure-eight shaped B-H loops can be induced, as a negative core loss occurs during a portion of a magnetic excitation cycle. The experimental evidence related to the figure-eight shaped B-H loops, as well as the correlation between core losses and magnetostictive vibration, is supported by theory proposed in this Thesis, and results generated by a model of the magnetization process under dc bias conditions.
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Yanover, Tovah. "Perceptions of Weight Status: The Effects of Target Features (Fat/Muscularity Level, Gender, Ethnicity) and Rater Features (Ethnicity and Gender)." [Tampa, Fla] : University of South Florida, 2009. http://purl.fcla.edu/usf/dc/et/SFE0003029.
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Borrill, Leslie David. "Duality derived topological model of single phase four limb transformers for GIC and DC bias studies." Doctoral thesis, University of Cape Town, 2017. http://hdl.handle.net/11427/27429.
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Geomagnetic disturbances brought about by solar activity cause geo-electric fields in the Earth that drive geomagnetically induced currents through the earthed neutrals of transformers and through power transmission networks. The flow of these currents causes the magnetic cores of transformers to half-wave saturate. Saturated transformers pose problems for power system operators since they can cause harmonics, transformer heating, mal-operation of protection relays, generator heating and vibration, and consume a large reactive power that can cause voltage collapse. Network studies of slow transient phenomena such as transformer half-wave saturation require appropriate models with parameters that represent the transformer transient state aptly. In this thesis a novel duality derived reversible model is developed of a single phase four limb transformer. The test transformers' non-step lap butt type core joints are shown to be problematic and the model is developed further to include the core joints. Due to the irregular core stacking method joint parameter determination is at best an approximation and the model is reduced to a duality compliant equivalent pi model for accuracy reasons. The pi model parameters and saturation characteristics are determined through laboratory testing and a complete pi model is presented. An understanding of a single phase transformer's physical behavior to slow transients is undertaken through the use of appropriately developed test circuits. Search coils are used extensively to understand the transformer core's behaviour through flux mapping of the core and stray flux in the surrounding air space when the transformer saturates. Three phase testing is included using a three phase bank of test transformers. The electrical measurements of waveforms are analysed and fast Fourier transforms carried out to obtain the harmonic components. The effect on a motor load of the distortion caused by transformer half-wave saturation is determined. A novel method of determining the effective core joint area of the problematic non-step lap butt type core joints is developed and a joint utilization factor is proposed that can be used in the absence of transformer manufacturer design information about this joint type in other transformer models.
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Himes, Susan. "Fat commentary and fat humor presented in visual media : a content analysis." [Tampa, Fla] : University of South Florida, 2005. http://purl.fcla.edu/usf/dc/et/SFE0001407.
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Hendricks, Peter Schuyler. "The early time course of smoking withdrawal symptoms." [Tampa, Fla] : University of South Florida, 2006. http://purl.fcla.edu/usf/dc/et/SFE0001663.
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Hart, Timothy C. "Respondent fatigue in self-report victim surveys : examining a source of nonsampling error from three perspectives." [Tampa, Fla] : University of South Florida, 2006. http://purl.fcla.edu/usf/dc/et/SFE0001456.
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Chandaver, Nahush. "Organizational Form of Disease Management Programs: A Transaction Cost Analysis." [Tampa, Fla.] : University of South Florida, 2007. http://purl.fcla.edu/usf/dc/et/SFE0002314.
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Frey, Natalie A. "Surface and interface magnetism in nanostructures and thin films." [Tampa, Fla] : University of South Florida, 2008. http://purl.fcla.edu/usf/dc/et/SFE0002434.
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Jones, Peggy K. "A comparability analysis of the National Nurse Aide Assessment Program." [Tampa, Fla] : University of South Florida, 2006. http://purl.fcla.edu/usf/dc/et/SFE0001752.
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Napier, Diane E. "Do DIBELS Nonsense Word Fluency Scores Predict SAT-10 Reading Scores in First Grade? A Comparison of Boys and Girls in Reading First Schools." [Tampa, Fla.] : University of South Florida, 2008. http://purl.fcla.edu/usf/dc/et/SFE0002320.
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17
Mu, Mingkai. "High Frequency Magnetic Core Loss Study." Diss., Virginia Tech, 2013. http://hdl.handle.net/10919/19296.
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The core used to build power inductors and transformers are soft magnetic materials. When there is alternating external field, the magnetic moments rotate and consume energy, which is the core loss. The core loss depends on the AC flux frequency, amplitude, waveform, DC bias and temperature. These dependences are nonlinear and difficult to predict. How to measure, model and analyze the core loss is a challenge for decades. <br />In this dissertation, two new core loss measurement methods are introduced first. These two methods use the reactive cancellation concept to reduce the sensitivity to phase discrepancy, which will destroy the accuracy in classic two-winding method for high frequency high quality factor sample measurements. By using the new measurement techniques the accuracy can be improved by several orders. The first is for sinusoidal waveforms, and the second is for non-sinusoidal wave. The new methods enable high frequency core loss characterization capability, which will help scientists and engineers on material research and inductor/transformer design. Measurement examples, considerations and error analysis are demonstrated and discussed in detail. <br />With the measurement techniques, the core loss under rectangular AC voltage and DC bias current are investigated. A new core loss model named rectangular extension Steinmetz equation (RESE) is proposed based on the measurement results. The new model is shown to be more accurate than the existing core loss models. Several commercially available MnZn ferrites are characterized and modeled. <br />Other than conventional MnZn ferrite materials, three commercial LTCC ferrite materials are characterized for integrated power supply applications. Based on characterized properties of these LTCCs, a group of new LTCC ferrites are fabricated and tested. The new LTCC is fabricated by laminating commercial LTCC tapes and co-firing. The new LTCC is demonstrated to have over 50% more inductance over the commercial LTCC materials. This work indicates that the power electronics engineers should work with material engineers to get the optimum material for a given application. <br />In the last part, the core loss of the partially saturated lateral flux planar inductor is analyzed. The challenge of the analysis is the complexity of the distribution of bias field and flux density in a highly biased planar inductor. Each point in the core is working at different excitation and bias condition, and the core loss density is very non-uniform. The proposed method combines the characterization tested in previous chapters and the commercial finite element tool. Experiments verified that the calculation errors are within about 10%.<br />In conclusion, the research in this dissertation proposed a complete solution to measure, model and analyze the high frequency core loss. This solution will not only facilitate fundamental research on physics understanding and material innovation, but also development of power electronics and RF applications. <br /><br>Ph. D.
18
Disserand, Anthony. "Nouvelle architecture d’amplificateur de puissance fonctionnant en commutation." Thesis, Limoges, 2017. http://www.theses.fr/2017LIMO0107/document.
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L’essor et l’évolution des systèmes de télécommunication sont liés inéluctablement à la montée en fréquence et à l’augmentation des bandes passantes des futurs systèmes d’une part, et à une place sans cesse croissante prise par l’électronique numérique dans les chaînes d’émission/réception d’autre part. Concernant ce deuxième aspect, la génération de puissance RF avant émission est encore à ce jour implémentée de façon analogique, mais la gestion énergétique des amplificateurs de puissance RF est de plus en plus assistée numériquement. L’apparition du ‘numérique’ dans le domaine de la puissance RF se traduit par la mise en œuvre de systèmes électroniques fonctionnant en commutation : modulateurs de polarisation pour l’envelope tracking, convertisseurs numérique-analogique de puissance (Power-DAC) ou amplificateurs en commutation à fort rendement (classe S ou D). C’est dans ce contexte que s’inscrivent ces travaux de thèse : deux dispositifs de commutation originaux à base de transistors GaN HEMT sont présentés, analysés et réalisés en technologie MMIC. Ces cellules de commutation élémentaires permettent, jusqu’à des fréquences de quelques centaines de MHz, de commuter des tensions jusqu’à 50V, avec des puissances de l’ordre de 100W, ceci avec un rendement énergétique supérieur à 80%. Ces cellules de commutation sont ensuite utilisées dans diverses applications : deux types de modulateurs de polarisation destinés à l’envelope tracking ainsi que deux architectures d’amplificateurs classe D (demi-pont et pont en H) sont étudiés et les résultats expérimentaux permettent de valider ces différentes topologies<br>Telecommunication systems development is linked to working frequency and bandwidths increasement of future systems on one hand, and the growing place taken by digital electronics in the transmission chains on the other hand. Concerning the second point, the RF power generation in emitters is still implemented in an analog way, but the energy management of the RF power amplifiers is more and more assisted by numeric devices. The appearance of the 'digital technology' in the field of RF power is characterized by the implementation of high speed switching electronic systems like bias modulators for envelope tracking, power digital to analog converters (Power-DAC) or switching mode RF amplifiers (Classe S or D). This thesis work fits in this context, it describes two original switching devices based on GaN HEMT transistors. These elementary switching cells are realized in MMIC technology, they allow switching frequencies up to few hundreds MHz, with voltages reaching 50V, powers about 100W and energy efficiency greater than 80%. These switching cells are then used in various applications: two kinds of bias modulators for envelope tracking system as well as two architectures of class D amplifiers (half-bridge and full-bridge) are analyzed and validated by experimental results
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Abdullah, Mohd. "GaAs/AlAs ASPAT diodes for millimetre and sub-millimetre wave applications." Thesis, University of Manchester, 2018. https://www.research.manchester.ac.uk/portal/en/theses/gaasalas-aspat-diodes-for-millimetre-and-submillimetre-wave-applications(89581b9e-edc9-4eb6-9392-e466a0f8de81).html.
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The Asymmetric Spacer layer Tunnel (ASPAT) diode is a new diode invented in the early 90s as an alternative to the Schottky barrier diode (SBD) technology for microwave detector applications due to its highly stable temperature characteristics. The ASPAT features a strong non-linear I-V characteristic as a result of tunnelling through a thin barrier, which enables RF detection at zero bias from microwaves up to submillimetre wave frequencies. In this work, two heavily doped GaAs contact layer on top and bottom layers adjacent to lightly doped GaAs intermediate layers, enclose undoped GaAs spacers with different lengths sandwiching an undoped AlAs layer that acts as a tunnel barrier. The ultimate ambition of this work was to develop a MMIC detector as well as a frequency source based on optimized ASPAT diodes for millimetre wave (100GHz) applications. The effect of material parameter and dimensions on the ASPAT source performances was described using an empirical model for the first time. Since this is a new device, keys challenges in this work were to improve DC and RF characteristic as well as to develop a repeatable, reproducible, and ultimately manufacturable fabrication process flow. This was investigated using two approaches namely air-bridge and dielectric-bridge fabrication process flows. Through this work, it was found that the GaAs/AlAs heterostructures ASPAT diode are more amenable to the dielectric-bridge technique as large-scale fabrication of mesa area up to 4Ã4Âμm2 with device yields exceeding 80% routinely produced. The fabrication of the ASPAT using i-line optical lithography which has the capability to reduce emitter area to 4Ã4Âμm2 to lower down the device capacitance for millimetre wave application has been made feasible in this work. The former challenge was extensively studied through materials and structural characterisations by a SILVACO physical modelling and confirmed by comparison with experimental data. The I-V characteristic of the fabricated ASPAT demonstrated outstanding scalability, demonstrating robust processing. A fair comparison has been made between ASPAT and SBD fabricated in-house; indicating ASPAT is extremely stable to the temperature. The RF characterisations were carried out with the aid of Keysight ADS software. The DC characteristic from fabricated GaAs/AlAs ASPAT diodes were absorbed into an ADS simulation tool and utilized to demonstrate the performance of MMIC 100GHz detector as well as 20GHz/40GHz signal generators. Zero bias ASPAT with mesa area of 4Ã4Âμm2 with video resistance of 90KΩ, junction capacitance of 23fF and curvature coefficient of 23V-1 has demonstrated detector voltage sensitivity above 2000V/W, while the signal source conversion loss and conversion efficiency are 28dB and 0.3% respectively. An estimate noise equivalent power (NEP) for this particular device is 18.8pW/Hz1/2.
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Boateng, Stephen Omary Mohammad A. "Photophysical properties of pyrene, 2, 7 diazapyrene and 1, 3-bis ([beta] naphthyl) propane." [Denton, Tex.] : University of North Texas, 2007. http://digital.library.unt.edu/permalink/meta-dc-3999.
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Varga, N. "STRUCTURAL OPTIMIZATION OF MONO AND MULTIVALENT GLYCOMIMETIC MANNOSE BASED DC-SIGN LIGANDS." Doctoral thesis, Università degli Studi di Milano, 2012. http://hdl.handle.net/2434/203242.
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HIV infection is pandemic in humans and is responsible for millions of deaths every year. The discovery of new cellular targets that can be used to prevent the infection process represents a new opportunity for developing more effective antiviral drugs. In this work, dendritic cell-specific ICAM-3 grabbing non-integrin (DC-SIGN), a lectin expressed at the surface of immature dendritic cells and involved in the initial stages of HIV infection, is described as a promising therapeutic target. The project is being developed within the European research Network CARMUSYS (http://www.carmusys.iiq.csic.es). Herein we show a synthetic work focused on modifications of a dimannoside mimic previously reported by our laboratory. In the first approach the esters are replaced with two identical amide groups and a small focused library of compounds was prepared. In the second modification, the hydroxyl group in position 6 of the mannose residue is replaced with different substitiuents (i.e. by an amine group.) resulting in a small library of glycomimetics.
The activities of the prepared molecules towards both DC-SIGN and Langherin were determined using surface plasmon resonance (SPR) technique. It was found that the majority of prepared ligands and are better and more selective DC-SIGN inhibitors then the parent molecule.
Further, synthesis of rigid, water soluble spacers – molecular rods is described which were connected to dendrimeric scaffolds bearing the prepared monovalent ligands mentioned above
The prepared multivalent structures were tested by SPR technique. Multivalency showed significant improvement of the DC-SIGN inhibition in comparison with the corresponding monovalent ligands.
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Sutorý, Tomáš. "NOVÉ PRINCIPY CHARAKTERIZACE HRADLOVÝCH KAPACIT PRO SIGMA-DELTA MODULÁTORY." Doctoral thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2009. http://www.nusl.cz/ntk/nusl-233499.
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This thesis deals with the utilization of new principles of characterization of gate capacitances for sigma-delta modulators. Sigma-delta modulators are the integral part of sigma-delta analog-to-digital converters. The proposed new method is characterized by high resolution and modest requirements for laboratory equipment. It allows characterizing capacitances whose values are within the range which is used in sigma-delta modulators. The thesis contains description of the new method, the analysis of measurement accuracy and experimental results.
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Chen, Bo-Rung, and 陳柏榮. "Asymmetrical Full-Bridge Converters without DC Bias." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/2smn84.
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碩士<br>國立臺灣科技大學<br>電機工程系<br>103<br>A conventional full-bridge converter has been widely used for high input-voltage high-power applications. Several control schemes have been applied to full bridge converter, such as symmetrical control, phase shift control, and asymmetrical control.
Employing symmetrical control, full-bridge (FB) has been used for a long time. It suffers from large switching losses due to its hard-switching operation. It will impact the conversion efficiency and limit power density.
To improve the efficiency, asymmetrical full-bridge (AFB) converter was successfully proposed instead in the last decades. Because it can achieve ZVS operation, the switching turn-on losses are significantly reduced. However, a DC bias occurs resulting in adding a gap on the transformer.
To achieve ZVS, an alternative AFB converter without DC bias is proposed in this thesis. It will be investigated and discussed in Chapter 2.
However, the proposed converter has pulsating input currents resulting in the generation of high di/dt noise, which is one of the noise sources of the electromagnetic interference (EMI) problem. Consequently, large filter components are required to attenuate the noise level within the threshold value. To reduce the pulsating input-current ripple, a low-input current-ripple reduction (RR-AFB) converter without DC bias is also proposed in Chapter 3.
To demonstrate the feasibility of the operational principle, circuit analysis and the experiments of the presented converters with 300~400 V input voltage range, 12 V/30 A/ 360 W output, 100 kHz switching frequency, are built to verify theoretical analysis.
Index Terms: full-bridge converter, asymmetrical control scheme, current ripple reduction, zero voltage switching (ZVS)
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Chang, Chin-Lung, and 張金龍. "The Development and Application of DC Bias Circuit Teaching Box." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/4764v9.
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Chuang, Ping-Yuan, and 莊秉原. "DC Analysis of PD SOI NMOS Device Considering Back Gate Bias Effect." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/24844092545629566579.
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碩士<br>國立臺灣大學<br>電子工程學研究所<br>101<br>The thesis reports DC analysis of PD SOI NMOS device considering back gate bias effect. Due to the buried oxide structure, the back gate bias effect of the PD SOI CMOS devices may be quite different from the devices with no back-gate bias. Chapter 1 gives a brief introduction about SOI CMOS devices and the scaling trends, including the comparison of the difference between the PD SOI and the FD SOI CMOS devices. Chapter 2 describes current conduction mechanism and equivalent circuit of the PD SOI NMOS device in saturation region considering the positive back gate bias effect. Chapter 3 discusses some relative effect of the PD SOI NMOS device in saturation region considering the back gate bias effect. Chapter 4 is conclusion and future work.
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Lin, Jia-He, and 林家禾. "Influence of Frequency and DC Bias on Magnetoimpedance Behaviors in Perpendicular Tunnel Junctions." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/92569836809841297243.
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碩士<br>國立中正大學<br>物理學系暨研究所<br>102<br>We investigated the frequency (100 – 106 Hz) and bias voltage ( -500mv– 500mv) dependent impedance of perpendicular magnetized magnetic tunnel junctions (MTJ) CoFeB/MgO/CoFeB with MgO thickness = 1.1, 1.3, and 1.5 nm, respectively. Although the impedance spectroscopy of MTJs haven been thoroughly studied in the literature, the present work is the first one focused on the MTJs with strong perpendicular magnetic anisotropy. The impedance at parallel and antiparallel states is interpreted by a Rp-Cp parallel circuit model. The tunnel magnetoresistance (TMR), over 50%, showed weak dependence at low frequency but decreases as the frequency reaches the relaxation frequency (~ RC) of 50 kHz. An associated negative tunnel magnetoresistance (TMC) is accompanied with the same relaxation process. A large dielectric constant (~ 200) is observed and this large dielectric constant is interpreted by leaky capacitance. The results of the bias dependence showed suppression on both TMR and TMC. In addition, the coercivity of magnetic state also exhibits a strong dependence on the bias voltage. The characteristic curves of Rp(V) and Cp(V), including the perpendicular anisotropy effect, will be discussed
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Wu, Tse Hsyan, and 吳則賢. "The effect of dc-bias on the processing a-C:H by RF PECVD." Thesis, 1996. http://ndltd.ncl.edu.tw/handle/84459793137957902488.
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SHIH-WEI, TSENG, and 曾士瑋. "Input Current Ripple Reduction Asymmetrical Full-Bridge Converter without DC Bias with Digital Control." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/cpej8c.
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碩士<br>國立臺灣科技大學<br>電機工程系<br>104<br>A conventional full-bridge (FB) converter has been widely used for high input-voltage high-power applications. Several control schemes have been applied to full bridge converter, such as symmetrical control, phase shift control, and asymmetrical control.
Employing symmetrical control, full-bridge has been used for a long time. It suffers from large switching losses due to its hard-switching operation. It will impact the conversion efficiency and limit power density.
To improve the efficiency, asymmetrical full-bridge (AFB) converter was successfully proposed instead in the last decades. Because it can achieve ZVS operation, the switching turn-on losses are significantly reduced. However, a DC bias occurs resulting in adding a gap on the transformer.
However, the AFB converter has high pulsating input currents resulting in the generation of high di/dt noise, which is one of the noise sources of the electromagnetic interference (EMI) problem. Consequently, large filter components are required to attenuate the noise level within the threshold value. To reduce the pulsating input-current ripple, a low-input current-ripple reduction (RR-AFB) converter without DC bias is also proposed in Chapter 2.
To demonstrate the feasibility of the operational principle, circuit analysis and the experiments of the presented converters with 300~400 V input voltage range, 24V/ 15A/ output, 100 kHz switching frequency, are built to verify theoretical analysis.
To achieve ZVS for all load range of RR-AFB needed to vary dead time with different load. The operating through analog controller cannot vary the dead time with different load, while the digital controller could. The design and implementations of the digital control for the DC-DC converters have been achieved by using the digital signal processors (DSP).
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Lin, Chih-yung, and 林志勇. "Influence of Frequency and DC Bias on Magnetoimpedance Behaviors in Double-MgO Magnetic Tunnel Junctions." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/84759070545178297486.
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碩士<br>國立中正大學<br>物理所<br>96<br>Magnetic tunnel junction (MTJ) with MgO barrier has shown high magnetoresistnace over 500% at room temperature which implies application potential in magnetic random access memory and logic circuits. New configuration of MTJ with dual-MgO barriers has been suggested recently for efficiently reducing signal to noise ratio.
In this thesis, the Dual-MgO and Single-MgO magnetic tunnel junctions (DMTJ and SMTJ) were deposited on Si/SiO2 wafer using magnetron sputtering system, and patterned into 2.5×2.5 μm2 circular junctions for DC and AC magnetotransport measurements. The AC transport measurements are carried out as a function of frequency (100 Hz – 4 MHz), magnetic field (100 Oe to -300 Oe), and dc bias (-1 V to 1 V).
The magnetic parallel and antiparallel states are clearly determined in both magnetization vs. magnetic field (M-H) curves and resistance vs. magnetic field (R-H) curves. The MR ratios are 105% and 101% in DMTJ and SMTJ, respectively. The current vs. voltage (I-V) curves of both MTJs show strong nonlinear effect and the V1/2 (the voltage that magnetoresistance drops to 1/2 of its maximum) of DMTJ becomes 0.95V which is 30% higher than the V1/2 of SMTJ.
The major results of the AC magneto-impedance measurement of DMTJ are summarized as follows: (1) Magnetoimpedance (MI), measured at magnetic parallel (P) and antiparallel (AP) states, shows relaxation processes and the characteristic relaxation frequencies (fr) are 125 and 255 kHz, respectively. The real part of MI at low frequency shows similar behavior as the dc results that magnetoimpedance is ~ 100% However, at the frequency above the average of fr (~195 kHz), the magnetoimpedance becomes negative because the relaxation process of AP state is shorter than P state and cross to each other at this frequency. (2) The nonlinear effect of MI is observed but with asymmetry in positive and negative DC bias. The crossing frequency (fc), caused by different relaxation of parallel and antiparallel state of real-part impedances, moves toward high frequency over 40 kHz. (3) Magnetocapacitance (MC) effect is estimated ~9% at 10 kHz. This result is slightly higher than the previous report on AlO insulating barrier MTJ. (4) V1/2 in MC versus DC bias is 1.6 V which is higher than V1/2 in MR (~0.95V) versus DC bias.
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Wang, Yi-Hang, and 汪逸涵. "Tribological and drilling performance of DLC films with changed DC power frequency and substrate bias voltage." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/94825563531028923246.
Full textAbstract:
碩士<br>國立成功大學<br>機械工程學系碩博士班<br>97<br>The main purpose of this study is to research the tribological properties and cutting performance of a-C:H coatings prepared by sputtering graphite and Zirconium targets with unbalanced magnetron sputtering system.
It contains two stages of research in the study. We focus the influence of DC power frequency on the properties of coatings in first stage. We change the bias voltage of substrate to get various substrate bias voltage of coatings in second stage.
In first stage, We change the frequency of DC power to get various frequency films structure for a-C:H coatings. We confer in what kind of parameter had the best tribological performance and use SRV to study the resistant abrasion of films. The films cross-section and wear surface analysis be used by SEM and EDS. Through the research of the first stage we know that the hardness of the coatings decrease and the adhesion of the coatings increase with the 70KHz. After SRV tribological test we verify that the coating prepared under the 70KHz has highest wear resistance and adherent properties.
We got coatings with substrate bias voltage range from 42 to 62 in second three stage. Through the study we can know that low substrate bias voltage contributes to the adhesion of the coatings and the coatings have the lower friction coefficient and higher wear resistance. Then we will be use Raman Spectroscopy observed the variety of sp3/sp2 bond proportion of films structure and G、D peak position deflection to compare the result of resistance wear test.
Finally, we would obtain the best DC power frequency for apply cutting tool and PCB drilling needle as the same as SRV test results that DC power frequency for 70KHz better than other value. The suitable DC power frequency and low substrate bias voltage promote the tool life and wear resistance properties.
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Jhao-LingWu and 吳昭陵. "Copper-rich phase segregation effects on the magnetic properties and DC-bias-superposition characteristic of NiCuZn ferrites." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/75799557544576012670.
Full textAbstract:
碩士<br>國立成功大學<br>資源工程學系<br>102<br>In this study, the NiCuZn ferrites with the chemical compositions of Ni0.42Cu0.13+XZn0.45Fe2-XO4；x=0, 0.01, 0.02, 0.04, 0.07, 0.1 were prepared using conventional solid-state reaction. The effects of different cooling rates and different chemical compositions of the NiCuZn ferriteson the microstructure, magnetic properties and DC superposition characteristics were investigated. The results showed that the increase of the cooling rate or CuO content in the NiCuZn ferrites led to the precipitation of copper-rich phase at the grain boundaries. The liquid phase resulted from the melting of copper-rich phase during the sintering promoted the liquid phase densification and hence lowering the maximum densification rate temperature.The non-magnetic copper-rich secondary phase at the grain boundaries reduced the effective magnetic field applied on the ferrite grain, and hence enhancing the DC superposition characteristics at low magnetic field. A NiCuZn ferrite with superior initial permeability and DC superposition characteristic can be obtained by changing the cooling rates and CuO content to adjust the non-magnetic copper-rich precipitate thickness at the grain boundaries.
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Zhuang, Bo-Yao, and 莊博堯. "A Study on the Abnormal Threshold Voltage Variation for the P-type LTPS TFTs under DC Bias Stress." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/04890598736355500064.
Full textAbstract:
碩士<br>國立中興大學<br>光電工程研究所<br>102<br>Abstract
In this study, we find that for the p-type LTPS TFTs (low-temperature polycrystalline silicon thin film transistors) stressed under specific DC (direct current) bias conditions, which the gate stress voltage Vg is about half of the drain stress voltage Vd, the abnormal turn around phenomenon of threshold voltage would occur. If the gate stress voltage Vg is too small (in our study, Vg is smaller than 12 V), even the bias Vg being about half of the bias Vd, there is no abnormal turn around phenomenon. We also find that the abnormal phenomenon occurs early if we increase the magnitude of Vg or Vd.
In order to interpret the abnormal phenomenon, we propose a model to explain the three degradation stages of threshold voltage. In the stage one, gate oxide traps the holes near the source region due to the high electric field between the gate and source electrodes, which causes |Vth| increased. In the stage two, electron-hole pairs are generated by impact ionization in the depletion region near drain electrode, so the gate oxide would trap electrons near the drain region due to the high electric field between the gate and drain electrodes, which causes |Vth| decreased. In the stage three, the huge trap states generated in the channel region dominate the degradation mechanism, which causes |Vth| increased again.
According to others measurement data, such as C-V measurement and trap state density calculation, the proposed model can be verified correctly. And this model can explain successfully not only the threshold voltage degradation phenomenon but also the variation of threshold voltage with different stress conditions.
Finally, we also do the similar stress conditions under AC signals for the p-type LTPS TFTs. Although we don’t further investigate their degradation mechanisms, the similar abnormal turn around phenomenon of threshold voltage also occurs.
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Lee, Kuo-hsing, and 李國興. "The Dielectric Behaviour with Applied DC Bias of Y-Doped Ba1- xSrxTiO3 and Ba1-xSrxTiO3/Silicon Rubber Composite." Thesis, 1996. http://ndltd.ncl.edu.tw/handle/97522953832497301530.
Full textAbstract:
碩士<br>國立交通大學<br>電子研究所<br>84<br>The dielectric behaviour with applied DC bias of Y-doped Ba1-
xSrxTiO3Ceramic and Ba1-xSrxTiO3/Silicon rubber has been
analyzed in the theme. Doping Y into Ba1-xSrxTiO3 ceramic
results in an improvement of dielectric constant change
percentage with applied DC bias. Thedielectric tunability which
is defined as the change percentage of thedielectric constant
for Ba1-xSrxTiO3 ceramic with applied DC bias in theparaelectric
state. Selecting of 0.1% Y-dopant concentration enhance the
dielectric tunability. Specific Sr/Ba molar fraction decides
the CurieTemperature. A composite mixing Ba0.8Sr0.2TiO3 powder
with different amount of silicon rubber polymer was fabricated.
Studying the dielectric behaviourof this elastic composite, a
tremendous reduction of dielectric constantsuggests that these
two phases are mixed in series connectivity. Theother case of
parallel connectivity is also fabricated by corresponding
thepolymer around the bulk sample. In this case, the dielectric
tunability isenhanced comparing to that of series case.
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Hsu, Liang-Tsun, and 許良村. "The Effects of Learning Guidance and Practice on DC Bias Analysis of Transistor Circuit through Web-based Learning." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/70313978059305736352.
Full text
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Syu, Shu-Wei, and 許書維. "Study on the Degradation and Recovery of Low Temperature Poly-Si Thin Film Transistors under DC and AC Bias Stress." Thesis, 2019. http://ndltd.ncl.edu.tw/cgi-bin/gs32/gsweb.cgi/login?o=dnclcdr&s=id=%22107NCHU5441042%22.&searchmode=basic.
Full textAbstract:
碩士<br>國立中興大學<br>電機工程學系所<br>107<br>The low-temperature polysilicon thin-film transistors have high carrier mobility and driving current, and have the ability to integrate the driving circuits onto the substrate, achieving high brightness, reducing panel manufacturing cost and increasing reliability, so they have been extensively applied in the display products. The main mechanisms causing the degradation of the low-temperature polysilicon thin-film transistors are: hot carrier effect and self-heating effect. The device structure used in this paper is a symmetric low-temperature polysilicon thin-film transistors with LDD. And this study is focused on the degradation and recovery of the transistors under the application of DC bias and AC bias stresses.
In the first part, we apply a small positive DC voltage, approximately the threshold voltage plus 1 V, to the gate terminal and simultaneously apply a large positive DC voltage to the drain terminal of the thin-film transistors with three different LDD lengths. After the stressing, the same resting time is added. When a large positive voltage is applied to the drain terminal, it will cause the transistors operated in the saturation region, so that the channel is clamped. The carriers will be accelerating by a big transverse electric field when they drift to the drain terminal from the source one. The energy of the free carriers is enhanced, which will attack the channel and the interface between the gate dielectric and the channel near the drain terminal. Therefore, the extra defect states and the electron hole pair are generated. These carriers with high energy are called hot carriers because their energy is higher than those at the thermal equilibrium. The main reason for the device’s degradation is that the hot carriers attack the end of the channel and the interface between the channel and gate dielectric near the drain terminal. The defect states and electron-hole pairs will generate, and some of the carriers with enough energy to overcome the energy barrier of gate dielectric will be trapped by the defects in it. The hot carrier effect causes the degradation of the electrical properties of the device, including the decrease of ON-state current and carrier mobility and the increase of OFF-state current. However, the amount of degradation is dependent on the LDD length of the transistors. As the LDD length is shorter, the amount of degradation also increases significantly. And the device shows a recovery phenomenon during the rest period after electrical stress. We propose a model to explain the degradation and recovery mechanisms of the devices.
The difference in the amount of degradation will cause the different recovery ratio. In order to investigate the difference in recovery rate after the electrical stress, a piecewise measurement was adopted during the rest period to observe the change of drain current in the recovery process. After the end of the applied electrical stress, the gate and drain terminals are not applied with any voltages, and the electron-hole pairs generated in the channel near the drain terminal will recombine, and the defect states generated by the hot carrier impact slightly reduce, which causes the recovery phenomenon of the degraded transistors.
In the first part of the experiments, we tried to verify the proposed degradation and recovery models by the sampling current, capacitance-voltage measurement, and forward reverse current-voltage measurement without changing the component architecture.
In the second part, we apply a small positive AC voltage to the gate terminal and a large DC voltage to the drain terminal at the same time. This mode of electrical stressing test is closer to the real operating mode of the transistors. From the experimental data, we found that the AC stresses applying on the gate show no significant difference in the degradation of the transistors under different frequency of AC signals. But the recovery ratio tends to gradually increase as the frequency of AC signals increasing.
In the third part, a small positive DC voltage is applied to the gate terminal, and a large AC voltage is applied to the drain one at the same time. From the experimental data, we found that with the increase of AC signal frequency, the degradation ratio of the transistors decreased, but the recovery ratio increased due to the reduction of the effective stress time in one period. The forward reverse current-voltage measurement was used to confirm the main damage area and the degradation and recovery mechanisms.
In the fourth part, a small positive AC voltage is applied to the gate terminal, and a large AC voltage is applied to the drain one at the same time. As compared to the results of the 2nd and 3rd parts, the recovery ratio of the dual AC stress is smaller than that of only AC stress on the drain, but larger than that of only AC stress on the gate.
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Chang, Te-Jen, and 張德仁. "The Effects of Temperature and DC Bias on the RF Performances of On-chip Spiral Inductors in the Automatic Test System." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/35844704576216648308.
Full textAbstract:
碩士<br>國立高雄第一科技大學<br>電腦與通訊工程所<br>97<br>This dissertation discusses the performance of RF Spiral Inductors under different temperature and DC bias in the Automatic Test System. First, we use automatic RF measurement system to measure the effect of the quality factor (Q), with different line width and radius from 12” Wafer Prober. Second, silicon process is the main process due to the advantage of low cost and high stability. When inductor is placed on low resistance Si-substrate, the characterization is affected due to different loss. We will discuss effect of the metal line and substrate under different temperature and bias on the characterization analysis of the RF inductor. Third, we suggest some improve methods on the automatic test system. By ICCAP control software, we can judge if the probe is over the usable range in the automatic test system, to reach the high precise and efficient test in the RF automatic test system.
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"Modeling and Simulation Tools for Aging Effects in Scaled CMOS Design." Doctoral diss., 2014. http://hdl.handle.net/2286/R.I.27569.
Full textAbstract:
abstract: The aging process due to Bias Temperature Instability (both NBTI and PBTI) and Channel Hot Carrier (CHC) is a key limiting factor of circuit lifetime in CMOS design. Threshold voltage shift due to BTI is a strong function of stress voltage and temperature complicating stress and recovery prediction. This poses a unique challenge for long-term aging prediction for wide range of stress patterns. Traditional approaches usually resort to an average stress waveform to simplify the lifetime prediction. They are efficient, but fail to capture circuit operation, especially under dynamic voltage scaling (DVS) or in analog/mixed signal designs where the stress waveform is much more random. This work presents a suite of modelling solutions for BTI that enable aging simulation under all possible stress conditions. Key features of this work are compact models to predict BTI aging based on Reaction-Diffusion theory when the stress voltage is varying. The results to both reaction-diffusion (RD) and trapping-detrapping (TD) mechanisms are presented to cover underlying physics. Silicon validation of these models is performed at 28nm, 45nm and 65nm technology nodes, at both device and circuit levels. Efficient simulation leveraging the BTI models under DVS and random input waveform is applied to both digital and analog representative circuits such as ring oscillators and LNA. Both physical mechanisms are combined into a unified model which improves prediction accuracy at 45nm and 65nm nodes. Critical failure condition is also illustrated based on NBTI and PBTI at 28nm. A comprehensive picture for duty cycle shift is shown. DC stress under clock gating schemes results in monotonic shift in duty cycle which an AC stress causes duty cycle to converge close to 50% value. Proposed work provides a general and comprehensive solution to aging analysis under random stress patterns under BTI.
Channel hot carrier (CHC) is another dominant degradation mechanism which affects analog and mixed signal circuits (AMS) as transistor operates continuously in saturation condition. New model is proposed to account for e-e scattering in advanced technology nodes due to high gate electric field. The model is validated with 28nm and 65nm thick oxide data for different stress voltages. It demonstrates shift in worst case CHC condition to Vgs=Vds from Vgs=0.5Vds. A novel iteration based aging simulation framework for AMS designs is proposed which eliminates limitation for conventional reliability tools. This approach helps us identify a unique positive feedback mechanism termed as Bias Runaway. Bias runaway, is rapid increase of the bias voltage in AMS circuits which occurs when the feedback between the bias current and the effect of channel hot carrier turns into positive. The degradation of CHC is a gradual process but under specific circumstances, the degradation rate can be dramatically accelerated. Such a catastrophic phenomenon is highly sensitive to the initial operation condition, as well as transistor gate length. Based on 65nm silicon data, our work investigates the critical condition that triggers bias runaway, and the impact of gate length tuning. We develop new compact models as well as the simulation methodology for circuit diagnosis, and propose design solutions and the trade-offs to avoid bias runaway, which is vitally important to reliable AMS designs.<br>Dissertation/Thesis<br>Doctoral Dissertation Electrical Engineering 2014
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Chen, Chih-Hao, and 陳智浩. "A Study of Power Amplifier Distortion due to DC Bias Perturbation and a Push-Pull Design of CMOS Class-E Power Amplifier Using Power Combining." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/chgf36.
Full textAbstract:
碩士<br>國立中山大學<br>電機工程學系研究所<br>97<br>Abstract：
This thesis studies the memory effect due to bias perturbation on digital predistortion technique, and employs multi-tone continuous wave signal and digital modulation signals with different bandwidth to discuss the performance of digital predistortion technique. Memory effect makes a great impact on the digital predistortion technique, and bias perturbation is one of the major causes. Lowering the bias perturbation can improve the effectiveness of digital predistortion technique. Another focus of this thesis is to design a Class E power amplifier in 0.18 μm CMOS process. The power amplifier uses cascode structure to alleviate the breakdown voltage problem and employs power combining technique to achieve impedance transformation on chip for the purpose of increasing the output power and efficiency.
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Liu, Han-Chun. "Polarization Rotation Study of Microwave Induced Magnetoresistance Oscillations in the GaAs/AlGaAs 2D System." 2016. http://scholarworks.gsu.edu/phy_astr_diss/90.
Full textAbstract:
Previous studies have demonstrated the sensitivity of the amplitude of the microwave radiation-induced magnetoresistance oscillations to the microwave polarization. These studies have also shown that there exists a phase shift in the linear polarization angle dependence. But the physical origin of this phase shift is still unclear. Therefore, the first part of this dissertation analyzes the phase shift by averaging over other small contributions, when those contributions are smaller than experimental uncertainties. The analysis indicates nontrivial frequency dependence of the phase shift. The second part of the dissertation continues the study of the phase shift and the results suggest that the specimen exhibits only one preferred radiation orientation for different Hall-bar sections. The third part of the dissertation summarizes our study of the Hall and longitudinal resistance oscillations induced by microwave frequency and dc bias at low filling factors. Here, the phase of these resistance oscillations depends on the contact pair on the device, and the period of oscillations appears to be inversely proportional to radiation frequency.