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Dissertations / Theses on the topic 'DC-link capacitor'

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1

Khatre, Manas. "Reduced DC-link capacitor drives for more-electric aircraft applications." Thesis, University of Newcastle Upon Tyne, 2009. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.531753.

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2

Chunkag, Viboon. "Three-phase power-factor correction using single-switch and parallel connected switching converters." Thesis, University of Bath, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.336239.

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3

Orfanoudakis, G. I. "Analysis and reduction of dc-link capacitor voltage/current stress in three-level PWM converters." Thesis, University of Southampton, 2012. https://eprints.soton.ac.uk/352195/.

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Power electronic converters are in the heart of modern renewable energy and motor drive systems. This Thesis focuses on the converter dc-link capacitor (bank), which is a costly component and a common source of failures. The Thesis is divided into two parts. The first part examines the voltage and current stress induced on dc-link capacitors by the three most common converter topologies: The conventional two-level converter, the Neutral-Point-Clamped (NPC) three-level converter, and the Cascaded H-Bridge (CHB) three-level converter. The expressions derived for the rms capacitor current and its
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4

Sun, Jing. "New leading/trailing edge modulation strategies for two-stage AC/DC PFC adapters to reduce DC-link capacitor ripple current." Thesis, Texas A&M University, 2003. http://hdl.handle.net/1969.1/5801.

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AC/DC adapters mostly employ two-stage topology: Power Factor Correction (PFC) pre-regulation stage followed by an isolated DC/DC converter stage. Low power AC/DC adapters require a small size to be competitive. Among their components, the bulk DC-link capacitor is one of the largest because it should keep the output voltage with low ripple. Also, the size of this capacitor is penalized due to the universal line voltage application. Synchronization through employing leading edge modulation for the first PFC stage and trailing edge modulation for the second DC/DC converter stage can significant
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5

Sysoeva, Viktoriia. "Hidden Markov Model-Supported Machine Learning for Condition Monitoring of DC-Link Capacitors." Miami University / OhioLINK, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=miami1595978044573618.

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6

Kim, Jong Wan. "Back to Back Active Power Filter for Multi-Generator Power Architecture with Reduced dc-link Capacitor." Diss., Virginia Tech, 2020. http://hdl.handle.net/10919/96638.

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Multi-pulse converters have been widely used for a multi-megawatt scale power generating system to comply with harmonic regulations. Among all types of multi-pulse converters, a 12-pulse converter is the most widely used due to the simple structure, which consists of a delta-delta and a delta-wye phase-shift transformer pair and it effectively mitigates undesirable harmonics from the nonlinear load. In the early 2000s, a shunt type passive front-end for a shipboard power system was proposed. By shunting the two gensets with 30° phase angle difference, a single phase-shift transformer effecti
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7

Šandera, Tomáš. "Třífázový střídač pro napájení vysokootáčkového asynchronního motoru." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2017. http://www.nusl.cz/ntk/nusl-318175.

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The master’s thesis deals with design and realization of three-phase inverter for experimental high speed asynchronous motor with a mechanical power of 6 kW. The thesis deals with the design of the individual components of the DC link. The thesis describes the selection of suitable capacitors in the DC link. There is also a complete simulation of the inverter in the Matlab Simulink program. Part of the thesis is also the design and realization of printed circuit boards of this inverter.
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8

Nami, Alireza. "A new multilevel converter configuration for high power and high quality applications." Thesis, Queensland University of Technology, 2010. https://eprints.qut.edu.au/33216/1/Alireza_Nami_Thesis.pdf.

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The Queensland University of Technology (QUT) allows the presentation of theses for the Degree of Doctor of Philosophy in the format of published or submitted papers, where such papers have been published, accepted or submitted during the period of candidature. This thesis is composed of ten published /submitted papers and book chapters of which nine have been published and one is under review. This project is financially supported by an Australian Research Council (ARC) Discovery Grant with the aim of investigating multilevel topologies for high quality and high power applications, with speci
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9

Ashaibi, Ahmed Ali Ahmed. "Auxiliary circuits used to charge, discharge and balance the dc-link capacitors of the diode-clamped five level inverter." Thesis, University of Strathclyde, 2008. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.501839.

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Switch mode auxiliary circuits have been used to balance the de-link capacitor voltages of a diode-clamped five-level inverter. The use of the smps has been extended to charge- lip and discharge the four de-link capacitors. Complete diode-clamped five-level inverter operation has been implemented from inverter start-up, to link charge-up, to balanced pwm operation, to de-link discharge, and shut-down. The diode-clamped smps is used to charge and boost the two lower de-link capacitors simultaneously. Auxiliary circuit and boost converter duty cycles are used to control the de-link charge-up and
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10

Krug, Dietmar. "Vergleichende Untersuchungen von Mehrpunkt-Schaltungstopologien mit zentralem Gleichspannungszwischenkreis für Mittelspannungsanwendungen." Doctoral thesis, Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2017. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-216245.

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Die vorliegende Arbeit befasst sich mit einem detaillierten Vergleich von Mehrpunkt-Schaltungstopologien mit zentralem Gleichspannungszwischenkreis für den Einsatz in Mittelspannungsanwendungen. Im Rahmen dieser Untersuchungen wird die 3-Level Neutral Point Clamped Spannungswechselrichter Schaltungstopologie (3L-NPC VSC) sowohl mit Multilevel Flying Capacitor (FLC) als auch mit Multilevel Stacked Multicell (SMC) Schaltungstopologien verglichen, wobei unter Verwendung von aktuell verfügbaren IGBT-Modulen Stromrichterausgangsspannungen von 2.3 kV, 4.16 kV und 6.6 kV betrachtet werden. Neben der
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11

Su, Hsin-Ping, and 蘇心平. "A Multi-carrier PWM for AC-DC-AC Converter Without DC Link Electrolytic Capacitor." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/70517992308602431561.

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碩士<br>中華大學<br>電機工程學系碩士班<br>102<br>Abstract This study proposes a multi-carrier pulse width modulation (PWM) for AC-DC-AC converter without DC link electrolytic capacitor. The AC-DC-AC converter consists of an AC-DC active front-end converter, a DC-AC voltage source inverter, and a 20uF ceramic capacitor in DC link. The DC bus voltage controller with load compensator is utilized to maintain the voltage of the DC link capacitor at designed value. Furthermore, the multi-carrier PWM is utilized to reduce the common-mode voltage (CMV) of AC-DC active front-end converter and DC-AC inverter. The simu
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12

Gopalakrishnan, K. S. "Study On DC-Link Capacitor Current In A Three-Level Neutral-Point Clamped Inverter." Thesis, 2013. https://etd.iisc.ac.in/handle/2005/2628.

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Three-level diode-clamped inverter is being widely used these days. Extensive research has been carried out on pulse width modulation (PWM) strategies for a three-level inverter. The most widely used PWM strategies are sine-triangle pulse width modulation (SPWM) and centered space vector pulse width modulation (CSVPWM). The influence of these PWM strategies on the DC-link capacitor current and voltage ripple is studied in this thesis. The sizing of the DC capacitor depends on value of the maximum RMS current flowing through it. In this work, an analytical expression for capacitor RMS current
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13

Gopalakrishnan, K. S. "Study On DC-Link Capacitor Current In A Three-Level Neutral-Point Clamped Inverter." Thesis, 2013. http://etd.iisc.ernet.in/handle/2005/2628.

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Three-level diode-clamped inverter is being widely used these days. Extensive research has been carried out on pulse width modulation (PWM) strategies for a three-level inverter. The most widely used PWM strategies are sine-triangle pulse width modulation (SPWM) and centered space vector pulse width modulation (CSVPWM). The influence of these PWM strategies on the DC-link capacitor current and voltage ripple is studied in this thesis. The sizing of the DC capacitor depends on value of the maximum RMS current flowing through it. In this work, an analytical expression for capacitor RMS current
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14

Pappu, Roshan Kumar. "Studies on Single DC Link Fed Multilevel Inverter Topologies by Cascading Flying Capacitor and Floating Capacitor Fed H-Bridges." Thesis, 2014. http://etd.iisc.ac.in/handle/2005/3189.

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Use of multilevel inverters are inevitable in medium and high voltage drives. This is due to the fact that the multilevel inverters can produce voltages in smaller steps which will reduce the harmonic content and result in more sinusoidal voltages and currents as compared to voltages and currents from two-level inverters. Due to the device limitations, use of two-level inverters is not possible in medium and high voltage drive applications. Though multiple devices can be connected both in series and parallel to achieve two-level operation, the output voltages still suffer from high harmonic con
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15

Pappu, Roshan Kumar. "Studies on Single DC Link Fed Multilevel Inverter Topologies by Cascading Flying Capacitor and Floating Capacitor Fed H-Bridges." Thesis, 2014. http://hdl.handle.net/2005/3189.

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Use of multilevel inverters are inevitable in medium and high voltage drives. This is due to the fact that the multilevel inverters can produce voltages in smaller steps which will reduce the harmonic content and result in more sinusoidal voltages and currents as compared to voltages and currents from two-level inverters. Due to the device limitations, use of two-level inverters is not possible in medium and high voltage drive applications. Though multiple devices can be connected both in series and parallel to achieve two-level operation, the output voltages still suffer from high harmonic con
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16

Yang, Zhi-Sheng, and 楊智勝. "Implementation of a PMSM Drive System Using Small Film DC-Link Capacitor Based Inverter." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/9f2mjj.

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碩士<br>國立臺灣科技大學<br>電機工程系<br>106<br>The thesis investigates a small film DC-Link capacitor based inverter driving a permanent magnet synchronous motor. Two control methods, including a d-q current control method and a positive torque region control method, are proposed to realize the small film DC-link capacitor based inverter drive system. The input source power factor is effectively increased. In addition, the adjustable speed range is extended. Finally, a damping compensation control is used to reduce the input current harmonics. A predictive speed controller and a predictive current controll
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17

Luo, Zhixiang. "A multi-featured single-phase utility interface with reduced DC link capacitor for distributed power sources." Thesis, 2004. http://spectrum.library.concordia.ca/8397/1/MR04385.pdf.

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The traditional, regulated electric power systems are based on large power generation plants located far from load centers. In a deregulated market, however, small and environmentally friendly power plants using wind power, photovoltaic cells, fuel cells and micro-turbines can be installed through a given distribution system. This concept of distributed generation tends to reduce the cost of electricity and to reduce or postpone major investments in the transmission system. Many of these small power plants are typically consumer owned and are connected to the utility grid by means of single-p
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18

Yi-JenHung and 洪乙任. "Improvement of Current Harmonic Distortion on the basis of Small DC-Link Capacitor Motor Drive System." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/7pvfej.

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19

Tao, Jen-Hao, and 陶人豪. "Sensorless Control of PMSM Drives for High Power Factor with Small DC-link Capacitor in Applications to Centrifugal Load." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/5sy2x4.

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碩士<br>國立交通大學<br>電控工程研究所<br>105<br>The purpose of this thesis is to not only develop the digital controller in application to a three-phase PM synchronous motor dirver with small dc-link capacitor for high power factor but also analysis its performance. For the motor drive system fed by single-phase ac source, large DC-link capacitor is uesd to be adopted for voltage regulation between diode rectifier and 3-phase inverter. In this thesis, the capacitance is reduced to less than 1% of the capacitance in the conventional drives. The traditional electrolytic capacitor can be replaced by smaller fi
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20

Mondal, Gopal. "Reduced Switch Count Multi-Level Inverter Structures With Common Mode Voltage Elimination And DC-Link Capacitor Voltage Balancing For IM Drives." Thesis, 2008. https://etd.iisc.ac.in/handle/2005/804.

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Multilevel inverter technology has emerged recently as a very important alternative in the area of high-power medium-voltage energy control. Voltage operation above semiconductor device limits, lower common mode voltages, near sinusoidal outputs together with small dv/dt’s, are some of the characteristics that have made this power converters popular for industry and modern research. However, the existing solutions suffer from some inherent drawbacks like common mode voltage problem, DC-link capacitor voltage fluctuation etc. Cascaded multi-level inverter with open-end winding induction motor s
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21

Mondal, Gopal. "Reduced Switch Count Multi-Level Inverter Structures With Common Mode Voltage Elimination And DC-Link Capacitor Voltage Balancing For IM Drives." Thesis, 2008. http://hdl.handle.net/2005/804.

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Multilevel inverter technology has emerged recently as a very important alternative in the area of high-power medium-voltage energy control. Voltage operation above semiconductor device limits, lower common mode voltages, near sinusoidal outputs together with small dv/dt’s, are some of the characteristics that have made this power converters popular for industry and modern research. However, the existing solutions suffer from some inherent drawbacks like common mode voltage problem, DC-link capacitor voltage fluctuation etc. Cascaded multi-level inverter with open-end winding induction motor s
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22

Banavath, Satish Naik. "A New Class of Single DC-link Fed Multilevel Inverter Topologies for Grid Connected Photovoltaic Systems with Reduced Component Count and Inherent Capacitor Balancing." Thesis, 2017. http://etd.iisc.ac.in/handle/2005/4203.

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Grid integration of photovoltaic (PV) energy sources has been mostly governed by conventional two-level voltage source inverters. These topologies have significant switching power losses, dV/dt stress and THD level at lower switching frequencies. The above issues can be solved by introducing more voltage levels through multilevel converters. Conventional multilevel converters have many issues like neutral point voltage drift in neutral point clamped (NPC) topology, floating capacitor charge balance in flying capacitor (FC) topology and large number of isolated DC sources in cascaded half bridg
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23

Pramanick, Sumit Kumar. "Switched Capacitive Filtering Scheme for Harmonic Suppression in Variable Speed AC Drives." Thesis, 2016. http://etd.iisc.ac.in/handle/2005/3735.

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For low and medium power applications, conventional two-level inverters are widely used in industrial applications including electric vehicle drives, traction drives, distributed generation, power management and grid connected renewable energy systems. To filter out the harmonic currents from the load, passive line filters are used. These filters are designed to pass the fundamental phase current and suppress higher harmonic currents, making the filters bulky. To get a nearly sinusoidal current waveform, these two level inverters are switched at high frequency to shift the harmonic components
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24

Pramanick, Sumit Kumar. "Switched Capacitive Filtering Scheme for Harmonic Suppression in Variable Speed AC Drives." Thesis, 2016. http://etd.iisc.ernet.in/2005/3735.

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For low and medium power applications, conventional two-level inverters are widely used in industrial applications including electric vehicle drives, traction drives, distributed generation, power management and grid connected renewable energy systems. To filter out the harmonic currents from the load, passive line filters are used. These filters are designed to pass the fundamental phase current and suppress higher harmonic currents, making the filters bulky. To get a nearly sinusoidal current waveform, these two level inverters are switched at high frequency to shift the harmonic components
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25

Repplinger, Scott. "High frequency series resonant DC link power converter with single link inductor and resonant line capacitors." 1992. http://catalog.hathitrust.org/api/volumes/oclc/32449662.html.

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Thesis (M.S.)--University of Wisconsin--Madison, 1992.<br>Typescript. eContent provider-neutral record in process. Description based on print version record. Includes bibliographical references (leaves 97-99).
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26

Debnath, Tutan. "Investigations on Voltage Control of Stacked DC-link Series Capacitors with a Nine-Level Inverter for an Induction Motor Load." Thesis, 2023. https://etd.iisc.ac.in/handle/2005/6076.

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Multilevel Inverters offer several advantages over two-level inverters in applications involving medium voltage and high power levels. A variety of applications are now available for MLI technology, ranging from variable speed drives to high voltage DC (HVDC) applications, power factor correction, and renewable energy sources. The advantages of MLI include the use of devices with low voltage ratings, low switching losses, minimal electromagnetic interference, and low dV/dt stress for the solid state devices. Further, as the number of MLI increases, it o ers a nearly sinusoidal stepped p
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27

Krug, Dietmar. "Vergleichende Untersuchungen von Mehrpunkt-Schaltungstopologien mit zentralem Gleichspannungszwischenkreis für Mittelspannungsanwendungen." Doctoral thesis, 2015. https://tud.qucosa.de/id/qucosa%3A30069.

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Die vorliegende Arbeit befasst sich mit einem detaillierten Vergleich von Mehrpunkt-Schaltungstopologien mit zentralem Gleichspannungszwischenkreis für den Einsatz in Mittelspannungsanwendungen. Im Rahmen dieser Untersuchungen wird die 3-Level Neutral Point Clamped Spannungswechselrichter Schaltungstopologie (3L-NPC VSC) sowohl mit Multilevel Flying Capacitor (FLC) als auch mit Multilevel Stacked Multicell (SMC) Schaltungstopologien verglichen, wobei unter Verwendung von aktuell verfügbaren IGBT-Modulen Stromrichterausgangsspannungen von 2.3 kV, 4.16 kV und 6.6 kV betrachtet werden. Neben de
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