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Journal articles on the topic 'Deblocking filter'

Author: Grafiati

Published: 4 June 2021

Last updated: 5 February 2022

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1

Norkin, Andrey, Gisle Bjontegaard, Arild Fuldseth, Matthias Narroschke, Masaru Ikeda, Kenneth Andersson, Minhua Zhou, and Geert Van der Auwera. "HEVC Deblocking Filter." IEEE Transactions on Circuits and Systems for Video Technology 22, no. 12 (December 2012): 1746–54. http://dx.doi.org/10.1109/tcsvt.2012.2223053.

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2

List, P., A. Joch, J. Lainema, G. Bjontegaard, and M. Karczewicz. "Adaptive deblocking filter." IEEE Transactions on Circuits and Systems for Video Technology 13, no. 7 (July 2003): 614–19. http://dx.doi.org/10.1109/tcsvt.2003.815175.

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3

Jia, Tao. "Multi-Standards Deblocking Filter Based SIMD Technology." Advanced Materials Research 791-793 (September 2013): 1501–5. http://dx.doi.org/10.4028/www.scientific.net/amr.791-793.1501.

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Due to real-time video decoding requirements, hardware accelerators for video deblocking filtering has gradually become a research hotspot in recent years. Compared with the traditional deblocking filter hardware accelerators which support only single video coding standard, this paper implemented a deblocking filter structure, which filtering algorithm can be configured to support multiple video coding standards; Using SIMD technology to make filtering data fully parallel computing. This structure is a multi-standard deblocking filter accelerator, supports H264, AVS, VP8 to, RealVideo, four kinds of video coding standards. The clock frequency is 200MHz, and it can be used for real-time filtering of multi-standard HD video processing. Deblocking Filter Algorithm

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4

Wang, Jin Tao, Yong Quan Lu, Chu Qiu, Peng Dong Gao, Jie Fu, and Wen Hua Yu. "Research on Setting Parameter of Deblocking Filter for H.264." Applied Mechanics and Materials 20-23 (January 2010): 70–75. http://dx.doi.org/10.4028/www.scientific.net/amm.20-23.70.

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The emerging coding standard H.264 is mainly intended for video transmission in many areas. Considering the peculiarity of blocking artifacts which results from block based transform using DCT (discrete cosine transform ) that is most popular method for video coding. These blocking which is due to deficiency of correlation between blocks has much troublesome impact at low bit rate encoding. In this paper, we analyzed the performance of common deblocking filter within H.264 standard, investigated the principle of parameter setting for deblocking filter in an open source code(x264). The outputs of deblocking filter depend on the boundary strength parameter “BS” and the gradient of image samples across the boundary [1]. Usually the filter parameters αc and β were specified a default value zero during x264 running, but in fact selecting different values have a significant effect in the view of image quality. The two statistical parameters of Gray Level co-occurrence Matrix (GLCM), energy and entropy, were used to evaluate the texture of each video picture, and then specify appropriate values for the filter parameters αc and β. We may appraise the effect of deblocking in terms of calculating Mean Squared Difference of Slope (MSDS) for each video frame. In the end of this paper, the experimental results show that our approach, comparing with existing deblocking techniques, is one of the significant methods for reducing blocking artifacts.

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5

Yang, Jungyoup. "Adaptive deblocking filter for intrablocks." Optical Engineering 49, no. 12 (December 1, 2010): 120502. http://dx.doi.org/10.1117/1.3523479.

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6

Norkin, Andrey, Gisle Bjontegaard, Arild Fuldseth, Matthias Narroschke, Masaru Ikeda, Kenneth Andersson, Minhua Zhou, and Geert Van der Auwera. "Corrections to “HEVC Deblocking Filter”." IEEE Transactions on Circuits and Systems for Video Technology 23, no. 12 (December 2013): 2141. http://dx.doi.org/10.1109/tcsvt.2013.2276171.

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7

Nandhagopal, N., S. Navaneethan, and C. Arul Murugan. "The reordered deblocking filter and SAO architecture for HEVC system." International Journal of Engineering & Technology 7, no. 2.8 (March 19, 2018): 617. http://dx.doi.org/10.14419/ijet.v7i2.8.10544.

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High Efficiency Video Coding (HEVC) used in broad band and wireless applications employs two in-loop filters to remove the blurring artifacts, blocking artifacts and ringing artifacts. The standard h.264/AVC deblocking filter which requires more memory initially filters the horizontal borders, followed by the vertical borders. The results of vertical borders filtering are utilized in the horizontal filtering process and the obtained results are further stored in temporary memory. The proposed system comprises of a reordering filter to reduce the order of the filter and a SAO to modify the decoded samples to a new offset value inorder to perform robust encryption mechanism. Hence reorder filter reduces the memory needed for this filtering process. In HEVC, SAO is an in-loop filter and located next to deblocking filter. The idea of SAO is to compensate renovated samples by adding an offset to each pixel, so that the distortion between renovated picture and original one can be reduced. Implementation of proposed simulation work is done by Verilog HDL and implemented using Virtex 6 FPGA to compute the power and hardware requirements in terms of LUT and slice registers.

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8

Correa, Guilherme, Luciano Agostini, and Luis A. da Silva Cruz. "Sample-Level Filtering Order for High-Throughput and Memory-Aware H.264 Deblocking Filter." ISRN Signal Processing 2012 (May 31, 2012): 1–6. http://dx.doi.org/10.5402/2012/805346.

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This paper presents a new sample-level filtering order for the Deblocking Filter process of the H.264/AVC video coding standard to be used instead of the traditional block-level order presented in previous works. This processing order allows a better exploration of the parallelism in the filtering process by reducing data dependencies in comparison to other works. The proposed sample-level order allows four parallel and independent samples filtering simultaneously, completing one complete macroblock filtering in fewer cycles and requiring less memory space than the related works. The proposed filtering order can be applied to the Deblocking Filter presented in a conventional H.264/AVC encoder or decoder and to the H.264/SVC interlayer Deblocking Filter. When compared to the original H.264/AVC filter and to the best related work found in the literature, the proposed scheme achieves a reduction of 72% and 25% in the number of clock cycles and a memory usage decrease of 75% and 43%, respectively.

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9

Wang, Gang, He Xin Chen, and Mian Shu Chen. "Research on the Algorithm of Adaptive Loop Filter Based on Flexible Quadtree." Applied Mechanics and Materials 423-426 (September 2013): 2491–95. http://dx.doi.org/10.4028/www.scientific.net/amm.423-426.2491.

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The algorithm of adaptive loop filter based on flexible quad tree (Q-ALF) is put forward targeting the problem that deblocking loop filter used by H.264/AVC cant further improve video coding quality. This algorithm, through the original image and the image after deblocking filter, works out wiener filter and selects a wiener filter with optimal size by taking the SAD of the image after Wiener filtering and the original image as RDO cost and based on RDO model, then uses this filter to filtrate the area that needs filtration. Simulation result shows that Q-ALF algorithm can improve the PSNR of the reconstructed image and decrease bit rate; meanwhile, Q-ALF algorithm can better eliminate blocking effect, improving the subjective performance of the reconstructed image.

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10

Palau, Roberta De Carvalho Nobre, Jones Goebel, Daniel Palomino, Guilherme Correa, Marcelo Porto, and Luciano Agostini. "Real-Time and Low-Power HEVC Deblocking Filter Architecture Targeting 8K UHD @ 60fps Videos." Journal of Integrated Circuits and Systems 15, no. 1 (May 26, 2020): 1–9. http://dx.doi.org/10.29292/jics.v15i1.59.

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This paper presents a low-power and high-throughput Deblocking Filter (DBF) hardware architecture for the High Efficiency Video Coding (HEVC) standard. The architecture implements the three HEVC deblocking filtering modes, namely: (i) normal filter, (ii) strong filter and (iii) chroma filter. The designed DBF architecture is able to process 64 samples per clock cycle, considering luminance and chrominance components. The architecture was described in VHDL and synthesized targeting the CMOS standard-cell TSMC 40nm library. The power results were reached with real input samples extracted from the HEVC reference software. Synthesis results show that the DBF design, when running at 124.4MHz, can reach a throughput of 60 frames per second (fps) for a 7680×4320 (8K UHD) video resolution. At this frequency, the DBF design presented a low power dissipation of 4.73mW. The presented DBF hardware surpasses all related works in terms of throughput and power dissipation and is the unique solution able to real-time processing of 8K UHD videos at 60 frames per second.

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11

Parlak, Mustafa, and Ilker Hamzaoglu. "Low power H.264 deblocking filter hardware implementations." IEEE Transactions on Consumer Electronics 54, no. 2 (May 2008): 808–16. http://dx.doi.org/10.1109/tce.2008.4560164.

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12

CHU, Y. C. "High Performance Adaptive Deblocking Filter for H.264." IEICE Transactions on Information and Systems E89-D, no. 1 (January 1, 2006): 367–71. http://dx.doi.org/10.1093/ietisy/e89-d.1.367.

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13

Cervero, T., A. Otero, S. López, E. de la Torre, G. M. Callicó, T. Riesgo, and R. Sarmiento. "A scalable H.264/AVC deblocking filter architecture." Journal of Real-Time Image Processing 12, no. 1 (June 28, 2013): 81–105. http://dx.doi.org/10.1007/s11554-013-0359-9.

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14

Peesapati, Rangababu, Sonketa Das, Swamy Baldev, and Shaik Rafi Ahamed. "Design of streaming deblocking filter for HEVC decoder." IEEE Transactions on Consumer Electronics 63, no. 3 (August 2017): 1–9. http://dx.doi.org/10.1109/tce.2017.014949.

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15

Wang, Ci, Jun Zhou, and Shu Liu. "Adaptive non-local means filter for image deblocking." Signal Processing: Image Communication 28, no. 5 (May 2013): 522–30. http://dx.doi.org/10.1016/j.image.2013.01.006.

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16

Lee, Junghyun, and Jechang Jeong. "Performance Comparison of Weak Filtering in HEVC and VVC." Electronics 9, no. 6 (June 9, 2020): 960. http://dx.doi.org/10.3390/electronics9060960.

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This study describes the need to improve the weak filtering method for the in-loop filter process used identically in versatile video coding (VVC) and high efficiency video coding (HEVC). The weak filtering process used by VVC has been adopted and maintained since Draft Four during H.265/advanced video coding (AVC) standardization. Because the encoding process in the video codec utilizes block structural units, deblocking filters are essential. However, as many of the deblocking filters require a complex calculation process, it is necessary to ensure that they have a reasonable effect. This study evaluated the performance of the weak filtering portion of the VVC and confirmed that it is not functioning effectively, unlike its performance in the HEVC. The method of excluding the whole of weak filtering from VVC, which is a non-weak filtering method, should be considered in VVC standardization. In experimental result in this study, the non-weak filtering method brings 0.40 Y-Bjontegaard-Delta Bit-Rate (BDBR) gain over VVC Test Model (VTM) 6.0.

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17

Hsu, Chun-Lung, and Yu-Sheng Huang. "A Fast-Deblocking Boundary-strength Based Architecture Design of Deblocking Filter in H.264/AVC Applications." Journal of Signal Processing Systems 52, no. 3 (November 20, 2007): 211–29. http://dx.doi.org/10.1007/s11265-007-0149-3.

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18

LIU, Hu, Zhao-min SUN, and Qi-mei CHEN. "Algorithm of H.264 fast deblocking filter on CUDA." Journal of Computer Applications 30, no. 12 (January 5, 2011): 3252–54. http://dx.doi.org/10.3724/sp.j.1087.2010.03252.

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19

Li, Jian, Fei Qiao, Rong Luo, and Hua-zhong Yang. "A SRAM-less Deblocking Filter in H.264/AVC." Journal of Electronics & Information Technology 30, no. 8 (March 29, 2011): 2012–16. http://dx.doi.org/10.3724/sp.j.1146.2006.02095.

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20

Dinh, Khanh Quoc, Hiuk Jae Shim, and Byeungwoo Jeon. "Reliability-Based Deblocking Filter for Wyner-Ziv Video Coding." IEIE Transactions on Smart Processing and Computing 5, no. 2 (April 30, 2016): 129–42. http://dx.doi.org/10.5573/ieiespc.2016.5.2.129.

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21

Yan, Chenggang, Yongdong Zhang, Feng Dai, Xi Wang, Liang Li, and Qionghai Dai. "Parallel deblocking filter for HEVC on many‐core processor." Electronics Letters 50, no. 5 (February 2014): 367–68. http://dx.doi.org/10.1049/el.2013.3235.

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22

Kim, Hyunjun, and Jongwoo Bae. "Memory Allocation-based VLSI Design for HEVC Deblocking Filter." Transactions of The Korean Institute of Electrical Engineers 69, no. 11 (November 30, 2020): 1755–60. http://dx.doi.org/10.5370/kiee.2020.69.11.1755.

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23

Adibelli, Yusuf, Mustafa Parlak, and Ilker Hamzaoglu. "Energy reduction techniques for H.264 deblocking filter hardware." IEEE Transactions on Consumer Electronics 57, no. 3 (August 2011): 1399–407. http://dx.doi.org/10.1109/tce.2011.6018900.

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24

Shen-Chuan Tai, Yen-Yu Chen, and Shin-Feng Sheu. "Deblocking filter for low bit rate MPEG-4 video." IEEE Transactions on Circuits and Systems for Video Technology 15, no. 6 (June 2005): 733–41. http://dx.doi.org/10.1109/tcsvt.2005.848314.

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25

Yeh, C. H., S. J. F. Jiang, T. F. Ku, M. J. Chen, and J. A. Jhu. "Post-processing deblocking filter algorithm for various video decoders." IET Image Processing 6, no. 5 (2012): 534. http://dx.doi.org/10.1049/iet-ipr.2010.0545.

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26

Ayadi, Lella Aicha, Taheni Dammak, Hassen Loukil, Mohamed Ali Benayed, and Nouri Masmoudi. "A Novel Deblocking Filter Architecture for H.264/AVC." Journal of Signal Processing Systems 89, no. 2 (October 28, 2016): 281–92. http://dx.doi.org/10.1007/s11265-016-1194-6.

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27

Paul, Anand. "High Performance Adaptive Deblocking Filter for H.264/AVC." IETE Technical Review 30, no. 2 (2013): 157. http://dx.doi.org/10.4103/0256-4602.110555.

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28

You-wen, Huang. "An efficient hardware implementation for deblocking filter of AVS decoder." Procedia Environmental Sciences 11 (2011): 505–10. http://dx.doi.org/10.1016/j.proenv.2011.12.080.

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29

Martins, R., F. Pereira, C. Brites, and J. Ascenso. "Adaptive deblocking filter for transform domain Wyner–Ziv video coding." IET Image Processing 3, no. 6 (December 1, 2009): 315–28. http://dx.doi.org/10.1049/iet-ipr.2008.0201.

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30

Chen, Chung-Ming, and Chung-Ho Chen. "Configurable VLSI Architecture for Deblocking Filter in H.264/AVC." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16, no. 8 (August 2008): 1072–82. http://dx.doi.org/10.1109/tvlsi.2008.2000516.

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31

Lee, J., and J. Jeong. "Deblocking performance analysis of weak filter on versatile video coding." Electronics Letters 56, no. 6 (March 2020): 289–90. http://dx.doi.org/10.1049/el.2019.3760.

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32

Shen, Weiwei, Yibo Fan, Yufeng Bai, Leilei Huang, Qing Shang, Cong Liu, and Xiaoyang Zeng. "A Combined Deblocking Filter and SAO Hardware Architecture for HEVC." IEEE Transactions on Multimedia 18, no. 6 (June 2016): 1022–33. http://dx.doi.org/10.1109/tmm.2016.2532606.

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33

Sivanantham, S., and C. Prayline Rajabai. "Analysis of hardware implementations of deblocking filter for video codecs." International Journal of Materials and Product Technology 60, no. 2/3/4 (2020): 214. http://dx.doi.org/10.1504/ijmpt.2020.10032371.

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34

Rajabai, C. Prayline, and S. Sivanantham. "Analysis of hardware implementations of deblocking filter for video codecs." International Journal of Materials and Product Technology 60, no. 2/3/4 (2020): 214. http://dx.doi.org/10.1504/ijmpt.2020.110110.

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35

Shin, Seungho, Youngjoon Chai, and Taeyong Kim. "Fast deblocking filter for stereoscopic video coding in mobile broadcasting." IEEE Transactions on Consumer Electronics 57, no. 2 (May 2011): 811–16. http://dx.doi.org/10.1109/tce.2011.5955226.

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36

Tsu-Ming Liu, Wen-Ping Lee, and Chen-Yi Lee. "An In/Post-Loop Deblocking Filter With Hybrid Filtering Schedule." IEEE Transactions on Circuits and Systems for Video Technology 17, no. 7 (July 2007): 937–43. http://dx.doi.org/10.1109/tcsvt.2007.897467.

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37

Citro, R., M. Guerrero, Jae-Beom Lee, and M. Pantoja. "Programmable Deblocking Filter Architecture for a VC-1 Video Decoder." IEEE Transactions on Circuits and Systems for Video Technology 19, no. 8 (August 2009): 1227–33. http://dx.doi.org/10.1109/tcsvt.2009.2022699.

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38

Kthiri, M., B. Le Gal, P. Kadionik, and A. Ben Atitallah. "A Very High Throughput Deblocking Filter for H.264/AVC." Journal of Signal Processing Systems 73, no. 2 (April 26, 2013): 189–99. http://dx.doi.org/10.1007/s11265-013-0744-4.

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39

Baldev, Swamy, Kiran Kumar Anumandla, and Rangababu Peesapati. "Scalable Wavefront Parallel Streaming Deblocking Filter Hardware for HEVC Decoder." IEEE Transactions on Consumer Electronics 66, no. 1 (February 2020): 41–50. http://dx.doi.org/10.1109/tce.2019.2960565.

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40

Shen, Sha, Weiwei Shen, Yibo Fan, and Xiaoyang Zeng. "A pipelined VLSI architecture for Sample Adaptive Offset (SAO) filter and deblocking filter of HEVC." IEICE Electronics Express 10, no. 11 (2013): 20130272. http://dx.doi.org/10.1587/elex.10.20130272.

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41

Park, Jaeha, and Kwangki Ryoo. "Hardware Design of High Performance HEVC Deblocking Filter for UHD Videos." Journal of the Korea Institute of Information and Communication Engineering 19, no. 1 (January 31, 2015): 178–84. http://dx.doi.org/10.6109/jkiice.2015.19.1.178.

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42

Song, Sehyun, and Kichul Kim. "Implementation of H.264/AVC Deblocking Filter on 1-D CGRA." Journal of IKEEE 17, no. 4 (December 30, 2013): 418–27. http://dx.doi.org/10.7471/ikeee.2013.17.4.418.

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43

CHEN, Zhi-de, Wan-ming LIAO, Liang-hao WANG, Ming ZHANG, and Wei ZHENG. "A performance optimized architecture of deblocking filter for H.264/AVC." Journal of China Universities of Posts and Telecommunications 14 (October 2007): 84–104. http://dx.doi.org/10.1016/s1005-8885(08)60018-7.

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44

YANG, Kun, Chun ZHANG, and Zhi-hua WANG. "Design of adaptive deblocking filter for H.264/AVC decoder SOC." Journal of China Universities of Posts and Telecommunications 16, no. 1 (February 2009): 91–110. http://dx.doi.org/10.1016/s1005-8885(08)60185-5.

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45

Zheng, Xiaodong, Wei Zhu, Shaoyong Yu, and Jinpeng Wu. "Hardware Architecture Design for High-Performance H.264/AVC Deblocking Filter." Sensors and Materials 31, no. 3 (March 29, 2019): 905. http://dx.doi.org/10.18494/sam.2019.2163.

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46

Yang, Zhigang, Wen Gao, Yan Liu, and Debin Zhao. "Deeply pipelined DSP solution to deblocking filter for H.264/AVC." IEEE Transactions on Consumer Electronics 52, no. 4 (November 2006): 1267–74. http://dx.doi.org/10.1109/tce.2006.273144.

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47

Ozcan, Erdem, Yusuf Adibelli, and Ilker Hamzaoglu. "A high performance deblocking filter hardware for high efficiency video coding." IEEE Transactions on Consumer Electronics 59, no. 3 (August 2013): 714–20. http://dx.doi.org/10.1109/tce.2013.6626260.

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48

CHEN, C. M., and C. H. CHEN. "An Efficient Pipeline Architecture for Deblocking Filter in H.264/AVC." IEICE Transactions on Information and Systems E90-D, no. 1 (January 1, 2007): 99–107. http://dx.doi.org/10.1093/ietisy/e90-1.1.99.

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49

MIN, K. Y., and J. W. CHONG. "A Performance Optimized Architecture of Deblocking Filter in H.264/AVC." IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E91-A, no. 4 (April 1, 2008): 1038–43. http://dx.doi.org/10.1093/ietfec/e91-a.4.1038.

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50

CHANG, Y. W., and Y. Y. CHEN. "Design of a Deblocking Filter for Both Objective and Subjective Metrics." IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E91-A, no. 8 (August 1, 2008): 2038–40. http://dx.doi.org/10.1093/ietfec/e91-a.8.2038.

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