Relevant bibliographies by topics / Design of CMOS integrated circuits

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  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
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Academic literature on the topic 'Design of CMOS integrated circuits'

Author: Grafiati
Published: 4 June 2021
Last updated: 11 February 2022

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Journal articles on the topic "Design of CMOS integrated circuits"

1

Guang, Yang, Bin Yu, and Huang Hai. "Design of a High Performance CMOS Bandgap Voltage Reference." Advanced Materials Research 981 (July 2014): 90–93. http://dx.doi.org/10.4028/www.scientific.net/amr.981.90.

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Bandgap voltage reference, to provide a temperature and power supply insensitive output voltage, is a very important module in the analog integrated circuits and mixed-signal integrated circuits. In this paper, a high performance CMOS bandgap with low-power consumption has been designed. It can get the PTAT (Proportional to absolute temperature) current, and then get the reference voltage. Based on 0.35μm CMOS process, using HSPICE 2008 software for circuit simulation, the results showed that , when the temperature changes from -40 to 80 °C, the proposed circuit’s reference voltage achieve to
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WANG, WEIZHI, and DONGMING JIN. "CMOS DESIGN OF ANALOG FUZZY SYSTEM." Journal of Circuits, Systems and Computers 14, no. 06 (2005): 1101–12. http://dx.doi.org/10.1142/s0218126605002830.

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This paper proposes several improved CMOS analog integrated circuits for fuzzy inference system as the general modules, including voltage-mode implementations of minimization circuit, programmable Gaussian-like membership function circuit, and centroid algorithm normalization circuit without using division. A two-input/one-output fuzzy system composed of these circuits is implemented and testified as a nonlinear function approximator. HSPICE simulation results show that the proposed circuits provide characteristics of high operation capacity, simple inference, low power dissipation, and high p
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Rakús, Matej, Viera Stopjaková, and Daniel Arbet. "Design techniques for low-voltage analog integrated circuits." Journal of Electrical Engineering 68, no. 4 (2017): 245–55. http://dx.doi.org/10.1515/jee-2017-0036.

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AbstractIn this paper, a review and analysis of different design techniques for (ultra) low-voltage integrated circuits (IC) are performed. This analysis shows that the most suitable design methods for low-voltage analog IC design in a standard CMOS process include techniques using bulk-driven MOS transistors, dynamic threshold MOS transistors and MOS transistors operating in weak or moderate inversion regions. The main advantage of such techniques is that there is no need for any modification of standard CMOS structure or process. Basic circuit building blocks like differential amplifiers or
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ALARCÓN, EDUARD, GERARD VILLAR, and ALBERTO POVEDA. "CMOS INTEGRATED CIRCUIT CONTROLLERS FOR SWITCHING POWER CONVERTERS." Journal of Circuits, Systems and Computers 13, no. 04 (2004): 789–811. http://dx.doi.org/10.1142/s0218126604001714.

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Two case examples of high-speed CMOS microelectronic implementations of high-performance controllers for switching power converters are presented. The design and implementation of a current-programmed controller and a general-purpose feedforward one-cycle controller are described. The integrated circuit controllers attain high-performance by means of using current-mode analog signal processing, hence allowing high switching frequencies that extend the operation margin compared to previous designs. Global layout-extracted transistor-level simulation results for 0.8 μm and 0.35 μm standard CMOS
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Holmes, Jim, A. Matthew Francis, Ian Getreu, Matthew Barlow, Affan Abbasi, and H. Alan Mantooth. "Extended High-Temperature Operation of Silicon Carbide CMOS Circuits for Venus Surface Application." Journal of Microelectronics and Electronic Packaging 13, no. 4 (2016): 143–54. http://dx.doi.org/10.4071/imaps.527.

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In the last decade, significant effort has been expended toward the development of reliable, high-temperature integrated circuits. Designs based on a variety of active semiconductor devices including junction field-effect transistors and metal-oxide-semiconductor (MOS) field-effect transistors have been pursued and demonstrated. More recently, advances in low-power complementary MOS (CMOS) devices have enabled the development of highly integrated digital, analog, and mixed-signal integrated circuits. The results of elevated temperature testing (as high as 500°C) of several building block circu
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de Sousa, J. J. H. T., F. M. Goncalves, and J. P. Teixeira. "Physical design of testable CMOS digital integrated circuits." IEEE Journal of Solid-State Circuits 26, no. 7 (1991): 1064–72. http://dx.doi.org/10.1109/4.92027.

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Elmezayen, Mohamed R., Wei Hu, Amr M. Maghraby, Islam T. Abougindia, and Suat U. Ay. "Accurate Analysis and Design of Integrated Single Input Schmitt Trigger Circuits." Journal of Low Power Electronics and Applications 10, no. 3 (2020): 21. http://dx.doi.org/10.3390/jlpea10030021.

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Schmitt trigger (ST) circuits are widely used integrated circuit (IC) blocks with hysteretic input/output (I/O) characteristics. Like the I/O characteristics of a living neuron, STs reject noise and provide stability to systems that they are deployed in. Indeed, single-input/single-output (SISO) STs are likely candidates to be the core unit element in artificial neural networks (ANNs) due not only to their similar I/O characteristics but also to their low power consumption and small silicon footprints. This paper presents an accurate and detailed analysis and design of six widely used compleme
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Camplani, Alessandra, Seyedruhollah Shojaii, Hitesh Shrimali, Alberto Stabile, and Valentino Liberali. "CMOS IC radiation hardening by design." Facta universitatis - series: Electronics and Energetics 27, no. 2 (2014): 251–58. http://dx.doi.org/10.2298/fuee1402251c.

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Design techniques for radiation hardening of integrated circuits in commercial CMOS technologies are presented. Circuits designed with the proposed approaches are more tolerant to both total dose and to single event effects. The main drawback of the techniques for radiation hardening by design is the increase of silicon area, compared with a conventional design.
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Tarim, T. B., and M. Ismail. "Robust design of low power CMOS analogue integrated circuits." IEE Proceedings - Circuits, Devices and Systems 148, no. 4 (2001): 197. http://dx.doi.org/10.1049/ip-cds:20010340.

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Shoucair, F. "Design Consideration in High Temperature Analog CMOS Integrated Circuits." IEEE Transactions on Components, Hybrids, and Manufacturing Technology 9, no. 3 (1986): 242–51. http://dx.doi.org/10.1109/tchmt.1986.1136646.

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Dissertations / Theses on the topic "Design of CMOS integrated circuits"

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Ramirez, Ortiz Rolando Carleton University Dissertation Engineering Electronics. "Circuit design rules for mixed static and dynamics CMOS logic circuits." Ottawa, 1999.

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Fayed, Ayman Adel. "Adaptive techniques for analog and mixed signal integrated circuits." Connect to this title online, 2004. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=osu1097519730.

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Thesis (Ph. D.)--Ohio State University, 2004.<br>Title from first page of PDF file. Document formatted into pages; contains xix, 232 p.; also includes graphics (some col.). Includes bibliographical references (p. 222-230).
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Kwon, Ohsang. "On high performance multiplier design using dynamic CMOS circuits /." Full text (PDF) from UMI/Dissertation Abstracts International, 2000. http://wwwlib.umi.com/cr/utexas/fullcit?p3004310.

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Deshpande, Sandeep. "A cost quality model for CMOS IC design." Thesis, This resource online, 1994. http://scholar.lib.vt.edu/theses/available/etd-12042009-020251/.

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Larson, Bruce C. (Bruce Carl). "Design considerations for minimizing noise in micropower CMOS integrated circuits." Thesis, Massachusetts Institute of Technology, 1996. http://hdl.handle.net/1721.1/40228.

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Massingham, John William. "A design technique for mixed ECL and CMOS circuitry." Thesis, University of Aberdeen, 1994. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.241357.

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In this thesis, the principles of mixing ECL and CMOS technologies have been investigated with the intention of increasing the operating speed of synchronous systems. To achieve this, the design will be primarily CMOS based with the critical path implemented in ECL to reduce the delay and hence improve the execution time. Logic conversion circuitry between the two technologies has been designed, with the CMOS-ECL conversion circuit being a simple enhancement of the basic ECL current switch and ECL-CMOS translation being achieved with 0.5ns using a "double inverter circuit". To reduce the power
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Xuan, Xiangdong. "Analysis and design of reliable mixed-signal CMOS circuits." Diss., Available online, Georgia Institute of Technology, 2004:, 2004. http://etd.gatech.edu/theses/available/etd-08032004-185515/unrestricted/xuan%5Fxiangdong%5F200412%5Fphd.pdf.

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Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2005.<br>Singh, Adit, Committee Member ; Chatterjee, Abhijit, Committee Chairl May, Gary, Committee Member ; Keezer, David, Committee Member ; Swaminathan, Madhavan, Committee Member. Vita. Includes bibliographical references.
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Zhu, Yongdong. "Parasitic-aware design and layout for RF CMOS analogue integrated circuits." Thesis, University of Essex, 2007. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.442535.

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Leite, Bernardo. "Design and modeling of mm-wave integrated transformers in CMOS and BiCMOS technologies." Phd thesis, Université Sciences et Technologies - Bordeaux I, 2011. http://tel.archives-ouvertes.fr/tel-00667744.

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Les systèmes de communication sans fil en fréquences millimétriques ont gagné considérablement en importance au cours des dernières années. Des applications comme les réseaux WLAN et WPAN à 60 GHz, le radar automobile autour de 80 GHz ou l'imagerie à 94 GHz sont apparues, demandant un effort conséquent pour la conception des circuits intégrés émetteurs et récepteurs sur silicium. Dans ce contexte, les transformateurs intégrés sont particulièrement intéressants. Ils peuvent réaliser des fonctions comme l'adaptation d'impédance, la conversion du mode asymétrique au différentiel et la combinaison
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Ross, Kyle Gene. "Distributed amplifier circuit design using a commercial CMOS process technology." Thesis, Montana State University, 2006. http://etd.lib.montana.edu/etd/2006/ross/RossK0806.pdf.

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Books on the topic "Design of CMOS integrated circuits"

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Design of analog CMOS integrated circuits. McGraw-Hill, 2001.

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Yusuf, Leblebici, ed. CMOS digital integrated circuits: Analysis and design. 2nd ed. McGraw-Hill, 1998.

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Kang, Sung-Mo. CMOS digital integrated circuits: Analysis and design. 2nd ed. McGraw-Hill, 1999.

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Yusuf, Leblebici, ed. CMOS digital integrated circuits: Analysis and design. 3rd ed. McGraw-Hill, 2003.

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Kang, Sung-Mo. CMOS digital integrated circuits: Analysis and design. McGraw-Hill, 1996.

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R, Holberg Douglas, ed. CMOS analog circuit design. 3rd ed. Oxford University Press, USA, 2011.

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CMOS logic circuit design. Kluwer Academic Publishers, 1999.

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Uyemura, John P. CMOS logic circuit design. Kluwer Academic Publishers, 1999.

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The design of CMOS radio-frequency integrated circuits. 2nd ed. Cambridge University Press, 2004.

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The design of CMOS radio-frequency integrated circuits. Cambridge University Press, 1998.

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Book chapters on the topic "Design of CMOS integrated circuits"

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Morant, M. J. "CMOS Circuits for Full-custom and Analogue ICs." In Integrated Circuit Design and Technology. Springer US, 1990. http://dx.doi.org/10.1007/978-1-4899-7198-2_10.

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Moreno, M., S. A. Bota, R. Holgado, A. Herms, and J. Calderer. "Layout Optimization of CMOS Phototransistors." In Mixed Design of Integrated Circuits and Systems. Springer US, 1998. http://dx.doi.org/10.1007/978-1-4615-5651-0_13.

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Kuta, Stanisław, Witold Machowski, and Robert Wydmański. "CMOS Current Conveyor Design and Macromodel." In Mixed Design of Integrated Circuits and Systems. Springer US, 1998. http://dx.doi.org/10.1007/978-1-4615-5651-0_4.

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Juan-Chico, Jorge, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, Antonio J. Acosta, and Manuel Valencia. "Degradation Delay Model Extension to CMOS Gates." In Integrated Circuit Design. Springer Berlin Heidelberg, 2000. http://dx.doi.org/10.1007/3-540-45373-3_15.

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Rezzoug, M., P. Maurine, and D. Auvergne. "Second Generation Delay Model for Submicron CMOS Process." In Integrated Circuit Design. Springer Berlin Heidelberg, 2000. http://dx.doi.org/10.1007/3-540-45373-3_16.

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Larsson, Patrik. "di/dt Noise in CMOS Integrated Circuits." In Analog Design Issues in Digital VLSI Circuits and Systems. Springer US, 1997. http://dx.doi.org/10.1007/978-1-4615-6101-9_10.

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Hosticka, Bedrich J. "Integrated Sensor Systems in CMOS Technology." In Analog Circuit Design. Springer US, 1997. http://dx.doi.org/10.1007/978-1-4757-2602-2_11.

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Maurine, P., M. Rezzoug, and D. Auvergne. "Internal Power Dissipation Modeling and Minimization for Submicronic CMOS Design." In Integrated Circuit Design. Springer Berlin Heidelberg, 2000. http://dx.doi.org/10.1007/3-540-45373-3_13.

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Svelto, Francesco, Enrico Sacchi, Francesco Gatta, Danilo Manstretta, and Rinaldo Castello. "CMOS Low-Noise Amplifier Design." In Low-Power Design Techniques and CAD Tools for Analog and RF Integrated Circuits. Springer US, 2001. http://dx.doi.org/10.1007/0-306-48089-1_11.

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De Muer, Bram, and Michiel Steyaert. "Fully Integrated CMOS Frequency Synthesizers for Wireless Communications." In Analog Circuit Design. Springer US, 2000. http://dx.doi.org/10.1007/978-1-4757-3198-9_14.

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Conference papers on the topic "Design of CMOS integrated circuits"

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Jespers, Paul L. "A Design Methodology for Analogue CMOS Circuits." In 2005 18th Symposium on Integrated Circuits and Systems Design. IEEE, 2005. http://dx.doi.org/10.1109/sbcci.2005.4286817.

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Ionescu, A. M., M. J. Declercq, S. Mahapatra, K. Banerjee, and J. Gautier. "Few electron devices: towards hybrid CMOS-SET integrated circuits." In Proceedings of 39th Design Automation Conference. IEEE, 2002. http://dx.doi.org/10.1109/dac.2002.1012600.

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Boeck, Georg. "Design of RF-CMOS integrated circuits for wireless communication." In 2007 SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference. IEEE, 2007. http://dx.doi.org/10.1109/imoc.2007.4404202.

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Boeck, Georg. "Design of RF-CMOS integrated circuits for wireless communications." In 2008 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS). IEEE, 2008. http://dx.doi.org/10.1109/comcas.2008.4562799.

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Boeck, Georg. "Design of RF-CMOS Integrated Circuits for Wireless Communications." In 2007 IEEE International Workshop on Radio-Frequency Integration Technology. IEEE, 2007. http://dx.doi.org/10.1109/rfit.2007.4443953.

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Boeck, Georg. ""Design of RF-CMOS Integrated Circuits for Wireless Communications"." In 2007 IEEE International Workshop on Radio-Frequency Integration Technology. IEEE, 2007. http://dx.doi.org/10.1109/rfit.2007.4444020.

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Boeck, Georg. "Design of RF-CMOS integrated circuits for wireless communications." In 2008 National Radio Science conference (NRSC). IEEE, 2008. http://dx.doi.org/10.1109/nrsc.2008.4542304.

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Ker, Ming-Dou, and Tang-Kui Tseng. "Novel ESD Protection Design for Nanoscale CMOS Integrated Circuits." In 2003 International Conference on Solid State Devices and Materials. The Japan Society of Applied Physics, 2003. http://dx.doi.org/10.7567/ssdm.2003.p2-8.

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Qian, Xinyuan, Hang Yu, Bo Zhao, Shoushun Chen, and Kay Soon Low. "Design of a radiation tolerant CMOS image sensor." In 2011 International Symposium on Integrated Circuits (ISIC). IEEE, 2011. http://dx.doi.org/10.1109/isicir.2011.6131984.

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Loke, Alvin L. S., C. K. Lee, and B. Mike Leary. "Nanoscale CMOS Implications on Analog/Mixed-Signal Design." In 2019 IEEE Custom Integrated Circuits Conference (CICC). IEEE, 2019. http://dx.doi.org/10.1109/cicc.2019.8780267.

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Reports on the topic "Design of CMOS integrated circuits"

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Resnick, Douglas, and Konstantin Likharev. Hybrid CMOS/Nanodevice Integrated Circuits Design and Fabrication. Defense Technical Information Center, 2008. http://dx.doi.org/10.21236/ada487894.

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Chang, Young-hoon, and Jon T. Butler. The Design of Current Mode CMOS Multiple-Valued Circuits. Defense Technical Information Center, 1991. http://dx.doi.org/10.21236/ada608087.

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Onneweer, Siep, Hans Kerkhoff, and Jon Butler. Structural Computer-Aided Design of Current-Mode CMOS Logic Circuits. Defense Technical Information Center, 1988. http://dx.doi.org/10.21236/ada608071.

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Martin, Alain J., Mika Nystroem, and Catherine G. Wong. Design Tools for Integrated Asynchronous Electronic Circuits. Defense Technical Information Center, 2003. http://dx.doi.org/10.21236/ada417138.

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Ahmed, Mohammad. Early Layout Design Exploration in TSV-based 3D Integrated Circuits. Portland State University Library, 2000. http://dx.doi.org/10.15760/etd.5509.

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Nain, Rajeev. Floorplan Design and Yield Enhancement of 3-D Integrated Circuits. Portland State University Library, 2000. http://dx.doi.org/10.15760/etd.2804.

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Mahalik, Subrat. Automating Variation and Repeater Analysis in Physical Design of Integrated Circuits. Portland State University Library, 2000. http://dx.doi.org/10.15760/etd.6440.

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Wu, Pan. The Design of High-Frequency Continuous-Time Integrated Analog Signal Processing Circuits. Portland State University Library, 2000. http://dx.doi.org/10.15760/etd.1161.

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Ku, Walter H. Computer Aided Design of Monolithic Microwave and Millimeter Wave Integrated Circuits and Subsystems. Defense Technical Information Center, 1989. http://dx.doi.org/10.21236/ada213656.

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Ku, Walter H. Computer Aided Design of Monolithic Microwave and Millimeter Wave Integrated Circuits and Subsystems. Defense Technical Information Center, 1987. http://dx.doi.org/10.21236/ada191593.

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