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Relevant bibliographies by topics / Digital electronics / Dissertations / Theses

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Dissertations / Theses on the topic 'Digital electronics'

Author: Grafiati

Published: 4 June 2021

Last updated: 25 July 2025

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1

Ong, Winston E. S. "Commercial off the shelf direct digital synthesizers for digital array radar." Thesis, Monterey California. Naval Postgraduate School, 2005. http://hdl.handle.net/10945/1752.

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Up until the 1980s, conventional radar systems consisted primarily of analog circuits, which are costly to build and compatible only to a narrow band of operations. Modern digital technology offers increasing capabilities at a lower cost making it attractive for modern radar application. The Direct Digital Synthesizer (DDS) is one such example of digital technology that is now routinely found in newer radar system designs. The DDS characteristics that most attract radar-system designers are precision frequency tuning, phase offset control, and linear "chirp" capability. This study discusses th

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2

Baillie, Douglas Alexander. "Free-space optical interconnection of digital electronics." Thesis, Heriot-Watt University, 1996. http://hdl.handle.net/10399/724.

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3

Wu, Yang 1974. "Monolithic nyquist rate analog to digital converter with digital calibration." Thesis, McGill University, 2002. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=29549.

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Nyquist rate analog to digital converter have always been an essential component in complex systems ranging from digital oscilloscope, radar, to modern telecommunication equipments. The fast-paced development in these complex systems has necessitated methods to improve resolution and power consumption of the analog to digital converters. The aim of this thesis is to offer one such method. The method involves the application of a digital DC reference source. The digital reference source will be proposed and used to remove mismatch, reduce comparator offset, thus improving the resolution of both

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4

Sah, Puja. "Implementing Digital Logic Design Concepts Using Paper Electronics." Thesis, University of North Texas, 2018. https://digital.library.unt.edu/ark:/67531/metadc1157633/.

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This thesis presents the implementation of some of the basic concepts of digital logic design in a fun and creative way with the help of paper electronics. This involves circuit building on paper using conductive tape or conductive ink and circuit components as electronics craft materials. Paper electronics toolkit called circuit sticker microcontroller which is deployed by a company named Chibitronics and AT89C51 microcontroller were used for the computational functioning of the circuits built on paper. This can be used to teach the fundamentals of digital logic design to the students in thei

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5

Dahlgren, Linnea, and Gavin Nejsum. "Digital Applications for Laboratory Sessions in Electronics Courses." Thesis, Malmö universitet, Institutionen för datavetenskap och medieteknik (DVMT), 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:mau:diva-44320.

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In 2020 the need to have electronics laboratory sessions digitally arose because of the COVID-19 pandemic. Even though it was a pandemic the new engineering students came to the university to perform their laboratory sessions. As a result, it was realized that there was a lack of knowledge in selecting a suitable application for the laboratory sessions. This thesis aims to research what applications that are available and suitable for digital electronics laboratory sessions. There are two main types of digital programs, simulators and remote laboratories. Although, in this thesis, only simulat

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6

Bhadra, Jayanta. "Abstraction techniques for verification of digital designs." Access restricted to users with UT Austin EID Full text (PDF) from UMI/Dissertation Abstracts International, 2001. http://wwwlib.umi.com/cr/utexas/fullcit?p3024993.

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7

Fenton, David. "Digital noise cancellation for xDSL." Thesis, University of Ottawa (Canada), 1999. http://hdl.handle.net/10393/8533.

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Digital subscriber line (DSL) modems operate in frequency bands which coincide with many significant radio-frequency interference sources, particularly commercial AM radio. In these bands, the balance of most twisted-pair cables is low enough to allow substantial interference to transfer to differential mode, disrupting the transmitted information signal. To compensate for this handicap, xDSL receivers will require a front-end circuit which uses the common-mode signal as a reference to cancel out as much differential interference as possible. Unfortunately, design of such a canceller is compli

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8

Zheng, Dong. "RST invariant digital image watermarking." Thesis, University of Ottawa (Canada), 2003. http://hdl.handle.net/10393/26554.

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Digital image watermarking has been proposed as a method to ensure the copyright protection and credibility of images by means of embedding a known piece of digital data into host images. To be useful, a good watermarking scheme should be robust against all known attacks to a certain degree based on requirements. In this thesis, we propose a novel digital image watermarking scheme that is invariant to rotation, scaling, and translation (RST). We embed watermark in the log-polar mapping (LPM) of the Fourier magnitude spectrum of original image, and use the phase correlation between the LPM of t

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9

Pasca, Isabela Mona. "Neural network digital hardware implementation." Thesis, University of Ottawa (Canada), 2007. http://hdl.handle.net/10393/27902.

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This thesis presents a digital hardware implementation of an artificial neuron with learning ability using the QuartusII 5.1sp1 web edition software on Altera's University Program Development Board (UP2). The learning method implemented is neither backpropagation nor conjugate gradient, but the weight simultaneous perturbation. By combining this method with a pulse density system and using a Field Programmable Gate Array, an interesting artificial neuron hardware architecture is obtained. Finally, two applications of the neuron implementation are presented: an analog function and a digital fun

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10

Corrin, Emlyn Peter. "Development of digital readout electronics for the CMS tracker." Thesis, Imperial College London, 2003. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.401285.

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11

Rivers, Mark G. "Object-oriented data management for digital electronics CAD systems." Thesis, University of Liverpool, 1994. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.386801.

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12

Celanovic, Ivan. "A Distributed Digital Control Architecture for Power Electronics Systems." Thesis, Virginia Tech, 2000. http://hdl.handle.net/10919/34998.

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This thesis proposes a novel approach to power electronics system design that is based on the open-architecture distributed digital controller and modular power electronics building blocks (PEBBs). The proposed distributed digital controller partitions the controller in three levels of control authority. The power stage controller, designated as hardware manager, is responsible for low-level hardware oriented tasks; the high level controller, designated as applications manager, performs higher-level application-oriented tasks; and the system level controller handles system control and monitor

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13

Andersson, Peter. "Överföring av digital video via FireWire." Thesis, Linköping University, Department of Electrical Engineering, 2002. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1009.

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<p>Transmission of digital signals is today more frequently used than transmission of analog signals. One reason for this is that a digital signal is less sensitive to noise than an analog, another reason is that almost all signals today are handled in a digital format. This thesis describes the development of a system that receives digital video signals through FireWire. The standard for FireWire, which is a high performance serial bus, is under development. Today the standard of the bus supports transmission of data with a speed of up to 400 Mbit/s. In the future FireWire is supposed to tran

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14

Lee, Sae Hun. "A unified approach to optimal multiprocessor implementations from non-parallel algorithm specifications." Diss., Georgia Institute of Technology, 1986. http://hdl.handle.net/1853/16745.

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15

Landernäs, Krister. "Implementation of digital-serial LDI/LDD allpass filters." Doctoral thesis, Mälardalen University, Department of Computer Science and Electronics, 2006. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-155.

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<p>In this thesis, digit-serial implementation of recursive digital filters is considered. The theories presented can be applied to any recursive digital filter, and in this thesis we study the lossless discrete integrator (LDI) allpass filter. A brief introduction regarding suppression of limit cycles at finite wordlength conditions is given, and an extended stability region, where the second-order LDI allpass filter is free from quantization limit cycles, is presented.</p><p>The realization of digit-serial processing elements, i.e., digit-serial adders and multipliers, is studied. A new digi

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16

Wang, Sha. "Video quality measurement using digital watermarking." Thesis, University of Ottawa (Canada), 2005. http://hdl.handle.net/10393/27076.

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A 3-level DWT (Discrete Wavelet Transform) based objective video quality measurement method is proposed based on semi-fragile digital watermarking. The watermark is embedded into the luminance components of the Intra frames of an MPEG-2 video stream, which can be treated as images. The degradation of the watermark is used to estimate the degradation of the cover work. A quantization method is used to embed the watermark. In the watermark embedding process, 10 quantization parameters are assigned to the 10 DWT decomposed blocks which are obtained by applying 3-level DWT to the target image. And

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17

Hawrysh, Evan M. (Evan Mark). "Digital architectures for analog signal generation." Thesis, McGill University, 1996. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=24058.

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Analog and mixed-signal testing is far more complex than its digital equivalent. This thesis will identify the analog test requirements through an extensive analysis of integrated circuit testing, possible error sources, and the different levels of test hierarchy. The results will show that analog testing requires spectrally pure, high-quality predictable test signals. These signals are most robust when reproduced through digital techniques such as direct digital frequency synthesis. Delta-sigma ($ Delta Sigma$) modulation is perhaps the most versatile technique, as it can precisely encode arb

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18

Shenoy, Sandeep P. (Sandeep Pundalika). "Switching activity in CMOS digital circuits." Thesis, McGill University, 1996. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=24071.

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In (48, 47) a pattern-independent method to estimate the switching activity of a CMOS circuit was presented. The technique relies on the use of abstract waveforms, described down to the level of individual transitions, which are propagated through the circuit. In order to improve the switching activity estimate so obtained, case analysis is undertaken on nodes with large fanout.<br>The objective of this thesis is to develop and implement a method to further improve upon the switching activity estimate through consideration of reconvergent fanout regions in the circuit. The idea is to impose fu

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19

Greenwood, Rob. "Semantic analysis for system level design automation." Thesis, This resource online, 1992. http://scholar.lib.vt.edu/theses/available/etd-10062009-020216/.

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20

Leung, Lap-Fai. "Reducing energy consumption of single and multiple processors core systems using dynamic voltage scheduling /." View Abstract or Full-Text, 2003. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202003%20LEUNGL.

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Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2003.<br>Includes bibliographical references (leaves 59-61). Also available in electronic version. Access restricted to campus users.

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21

Mayyass, Khaled A. "Gradient adaptive digital filtering: Problems and solutions." Thesis, University of Ottawa (Canada), 1995. http://hdl.handle.net/10393/9498.

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The LMS adaptive algorithm has always been attractive to researchers in the field of adaptive signal processing due to its inherent conceptual and implementational simplicity. Unfortunately, this elegant simplicity is undermined by problems associated with the direct use of the LMS algorithm. One of the main disadvantages of the LMS is its relatively slow convergence. We deal with this problem for FIR adaptive filters by proposing two algorithms based on different approaches. The first algorithm relies on the time-varying step size approach. The step size of the algorithm is adjusted according

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22

Shen, Shumin. "A floating-point analog-to-digital converter." Thesis, University of Ottawa (Canada), 2004. http://hdl.handle.net/10393/26772.

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This thesis studies the floating-point analog-to-digital converter (FP-ADC). The first attempt is to analyze the parallel architecture of the floating-point converter, which is our research base. The characteristics and specifications of the floating-point AID converter are described. Simulations of the parallel architecture of the floating-point A/D converter were conceived, run and presented here to support the theoretically derived FP-ADC transfer characteristics. After analyzing the parallel architecture of the floating-point A/D converter, the following work is to provide a way of minimiz

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23

Chan, Na-Han. "Rapid current analysis for CMOS digital circuits." Thesis, McGill University, 1994. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=26380.

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A versatile and efficient computer-aided analysis tool, CUREST, has been developed for the analysis of supply currents in CMOS digital circuits. It is based on Nabavi-Lishi's semi-analytical model for computing the current and delay in a CMOS logic gate which, when compared to HSPICE running the level-3 MOSFET model, is more than three orders of magnitude faster, and accurate to within 10%. CUREST is built on top of the timing analyser TAMIA and, in particular, uses its circuit parser and its data structure to store the circuit topology and primary input pattern.<br>Extension tests on benchmar

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24

Thomas, Bruce Allen. "New aspects of digital color image enhancement." Diss., The University of Arizona, 1999. http://hdl.handle.net/10150/289128.

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The spatial and chromatic dimensions of digital color image information exhibit unique interrelationships that invite new, color-image-specific, processing strategies. A quantitative exploration of these interrelationships is performed. The resulting data reveals key traits that lead to two new methods of color image enhancement. The first is a method of color image contrast enhancement that exploits the existence of high-pass spatial energy in certain chromatic color components. We present a new, spatially adaptive approach that acknowledges the spatially varying nature of cross-component cor

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25

Sopeña, i. Martínez Pol. "Laser-induced forward transfer for printed electronics applications." Doctoral thesis, Universitat de Barcelona, 2020. http://hdl.handle.net/10803/670919.

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Printed electronics appeared in the 1980s as a cost-effective alternative to silicon-based electronics. Employing the techniques from the graphics industry, such as rotogravure or screen printing, it was possible to print metals, ceramics, and polymers on a wide variety of materials, including flexible and organic substrates. However, these techniques became not adequate when customization or short runs were considered since the production costs of the components and devices substantially increased. To overcome these issues, direct-write techniques, such as inkjet printing, allowed depositing

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26

Syed, Arsalan Jawed. "Analog-to-Digital Converter Design for Non-Uniform Quantization." Thesis, Linköping University, Department of Electrical Engineering, 2004. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2654.

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<p>The thesis demonstrates a low-cost, low-bandwidth and low-resolution Analog-to- Digital Converter(ADC) in 0.35 um CMOS Process. A second-order Sigma-Delta modulator is used as the basis of the A/D Converter. A Semi-Uniform quantizer is used with the modulator to take advantage of input distributions that are dominated by smaller-amplitude signals e.g. Audio, Voice and Image-sensor signals. A Single-bit feedback topology is used with a multi-bit quantizer in the modulator. This topology avoids the use of a multi-bit DAC in the feedback loop – hence the system does not need to use digital cor

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27

Walls, Kirsty. "Nanophotonic filters for digital imaging." Thesis, University of Glasgow, 2013. http://theses.gla.ac.uk/4514/.

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There has been an increasing demand for low cost, portable CMOS image sensors because of increased integration, and new applications in the automotive, mobile communication and medical industries, amongst others. Colour reproduction remains imperfect in conventional digital image sensors, due to the limitations of the dye-based filters. Further improvement is required if the full potential of digital imaging is to be realised. In alternative systems, where accurate colour reproduction is a priority, existing equipment is too bulky for anything but specialist use. In this work both these issues

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28

He, Wei. "Adaptive-rate digital speech transmission." Thesis, University of Warwick, 1993. http://wrap.warwick.ac.uk/104723/.

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29

McEwan, Alistair. "Direct digital synthesis by analogue interpolation." Thesis, University of Oxford, 2004. http://ora.ox.ac.uk/objects/uuid:3def187d-5172-463c-9498-55898782f663.

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An improvement in efficiency of direct digital frequency synthesis (DDFS) systems is demanded for low power frequency synthesis in wireless communications. Concurrently a reduction in cost is important for disposable, low resolution frequency synthesis in biomedical instrumentation systems. To meet both these needs a new ROM-less architecture is presented here that uses less than half the circuit area of previous state of the art systems and improves the efficiency by operating at up to a tenth of the power consumption. The main contribution presented in this thesis is a novel, efficient metho

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30

Rossi, Michel. "Iterative least squares algorithms for digital filter design." Thesis, University of Ottawa (Canada), 1996. http://hdl.handle.net/10393/10099.

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In this thesis, we propose new algorithms to simplify and improve the design of IIR digital filters and M-band cosine modulated filter banks. These algorithms are based on the Iterative Least Squares (ILS) approach. We first review the various Iterative Reweighted Least Squares (IRLS) methods used to design Chebyshev and $L\sb{p}$ linear phase FIR filters. Then we focus on the ILS design of IIR filters and filter banks. For the design of Chebyshev IIR filters in the log magnitude sense, we propose a Remez-type IRLS algorithm. This novel approach accelerates significantly Kobayashi's and Lim's

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31

Liu, Yan. "Rotation, scaling and translation invariant digital image watermarking." Thesis, University of Ottawa (Canada), 2004. http://hdl.handle.net/10393/26699.

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Many digital image watermarking schemes have been proposed and are robust to common signal processing, such as compression and filtering. Geometric distortions, such as rotation, scaling, and translation (RST), are considered the most challenging attacks. This thesis is on RST invariant digital image watermarking. In this thesis, we introduce the fundamental theories and techniques necessary for RST invariant digital image watermarking, and briefly review the existing RST invariant image watermarking schemes. Then, we propose an image rectification scheme for RST invariant digital image waterm

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32

Debski, Michal. "Self-calibrating floating-point analog-to-digital converter." Thesis, University of Ottawa (Canada), 2005. http://hdl.handle.net/10393/26884.

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The Floating-Point Analog-to-Digital Converter (FPADC) is an extended version of the Fixed-Point ADC. It is designed to deal with a broader dynamic range of signals while exhibiting a smaller relative quantization error. The traditional implementation of the FPADC is characterized by a high relative precision, but it requires high-precision high-speed components in order to achieve that. The high precision of the high-speed components comes at a greater cost. This constraint limits the availability of FPADCs to high-priced designs. The thesis addresses a low-speed and a low-cost calibration ap

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33

Qi, Huiyan. "Human visual system based adaptive digital image watermarking." Thesis, University of Ottawa (Canada), 2006. http://hdl.handle.net/10393/27287.

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It is known that the fidelity of the image is inversely proportional to the robustness of the watermark. Therefore, there should be the trade off between fidelity for robustness and vise versa. Based on the new spatial masking we explored in this thesis, a new adaptive digital image watermarking method is proposed. It keeps the invisibility of the watermark and maintains its robustness at the same time. The new spatial masking is built according to the image features such as flat areas with big brightness or darkness, edges, and regions with high activities. With the same watermarking energy,

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34

Pishdad, Bardia. "Nyquist-rate analog-to-digital conversion with calibration." Thesis, McGill University, 2002. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=29544.

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Analog-to-Digital Converter (ADC) microcircuits are required to meet stringent accuracy specifications in spite of their analog components' inherent nonidealities as well as the accuracy limitations due to fabrication technology. In this thesis, a 3-step Nyquist rate ADC is presented which makes use of bitstream processing to calibrate the digital-to-analog converter (DAC) and the residue amplifier, while using the same hardware to calibrate the sub-ADC. The system is designed to provide programmability and calibrate undesired circuit characteristics such as offset, gain error, and nonlinearit

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35

Leung, Christopher. "Distributed resource allocation algorithms for digital subscriber lines." Thesis, McGill University, 2011. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=103633.

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The Digital Subscriber Line (DSL) environment is characterized by highly frequency-selective attenuation and by potentially large crosstalk between users. DSL resource allocation algorithms allow for an efficient use of the DSL network by managing the crosstalk-induced interference while also taking the frequency-selectivity into account. Previous resource allocation algorithms were based on worst-case situations. The more recent Dynamic Spectrum Management (DSM) resource allocation algorithms are able to constantly adapt to the channel characteristics. At one end of the DSM algorithms, there

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Gaiotti, Serge. "Worst-case delay estimation of digital MOS circuits." Thesis, McGill University, 1992. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=60690.

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This thesis presents accurate and efficient transistor-level delay modeling techniques for the worst-case delay estimation of digital MOS circuits. A number of timing analysis tools already rely on transistor-level delay models which use relaxation-based electrical simulation techniques to accurately model the propagation delay of MOS logic gates. For worst-case delay estimation, efficient application of relaxation-based electrical simulation techniques can be performed by using multiple-transition delay modeling methods and by minimizing the number of node equations to be solved. The worst-ca

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37

Krantz, Emil. "Design of a Digital Down Converter for LTE in an FPGA." Thesis, University of Gävle, Faculty of Engineering and Sustainable Development, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:hig:diva-6879.

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<p>In thesis a Digital Down Converter (DDC) for Long Term Evolution (LTE) signals is designed. The DDC shall be implemented in hardware in a Field Programmable Gate Array (FPGA). For an FPGA the desired operating speed is high. The purpose of this thesis is therefore to determine if it is possible to design such a system.</p><p> The proposed DDC design consists of an efficient quadrature demodulator and a data rate decimation system. The decimation system consists of a Cascaded Integrator Comb (CIC) filter and a compensating Finite Impulse Response (FIR) filer. It is shown how the CIC and FIR

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38

Karlsson, Magnus. "Direktsamplande digital transciever." Thesis, Linköping University, Department of Science and Technology, 2002. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1658.

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<p>Master thesis work at ITN (Department of Science and Technology) in the areas of A/D-construction and RF-circuit design. Major goal of project were to research suitable possibilities for implementations of direct conversion in transceivers operating in the 160MHz band, theoretic study followed by development of components in the construction environment Cadence. Suitable A/D- converter and other important parts were selected at the end of the theoretic study. Subsampling technique was applied to make A/D sample requirements more realistic to achieve. Besides lowering requirements on A/D-con

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Matoglu, Erdem. "Statistical design, analysis, and diagnosis of digital systems and embedded RF circuits." Diss., Available online, Georgia Institute of Technology, 2004:, 2003. http://etd.gatech.edu/theses/available/etd-06072004-131249/unrestricted/matoglu%5Ferdem%5F200405%5Fphd.pdf.

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Nader, Charles. "Enhancing Radio Frequency System Performance by Digital Signal Processing." Licentiate thesis, University of Gävle, Department of Electronics, Mathematics and Natural Sciences, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:hig:diva-7312.

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<p>In this thesis measurement systems for the purpose of characterization of radio frequency power amplifiers are studied. Methods to increase the speed, accuracy, bandwidth, as well as to reduce the sampling requirements and testing cost are presented. A method intended for signal shaping with respect to peak to-average ratio reduction and its effects-improvements on the radio frequency front-end performance is investigated.</p><p>A time domain measurement system intended for fast and accurate measurements and characterization of radio frequency power amplifiers is discussed. An automated, fa

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41

Vongurai, Rawin. "Development of digital filtering techniques in three-dimensional TLM models." Thesis, University of Nottingham, 2013. http://eprints.nottingham.ac.uk/13651/.

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Digital filtering (DF) techniques are receiving significant interest, because they can represent fine features such as vias, thin-panels and thin-wires in full-field solutions of electromagnetic problems with significant savings in computational costs. However, a limitation of this technique is that DF can only represent a fine feature as a plane or as an internal boundary. In other words, an internal boundary can represent the electromagnetic properties of a fine feature in one dimension or two directions. The DF technique is usually involved with time domain solvers such as the Finite-differ

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42

Cervantes, Jonathan A. "Health prognosis of electronics via power profiling." To access this resource online via ProQuest Dissertations and Theses @ UTEP, 2009. http://0-proquest.umi.com.lib.utep.edu/login?COPT=REJTPTU0YmImSU5UPTAmVkVSPTI=&clientId=2515.

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43

Wenzel, Robert Joseph. "Multigigahertz digital test system electronics and high frequency data path modeling." Diss., Georgia Institute of Technology, 1997. http://hdl.handle.net/1853/13334.

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44

Bakolo, Rodwell S. "Design and implementation of a RSFQ superconductive digital electronics cell library." Thesis, Stellenbosch : Stellenbosch University, 2011. http://hdl.handle.net/10019.1/17936.

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Thesis (MScEng)--Stellenbosch University, 2011.<br>ENGLISH ABSTRACT: Rapid Single Flux Quantum (RSFQ) cells are key in the design of complex and applicable RSFQ electronic circuits. These cells are low-level circuit elements that are used repeatedly to build larger, applicable RSFQ circuitry. Making these cells simple to layout and manufacture, but reliable for extensive use demands a careful development process for RSFQ cells. Cell functionality is verified through simulations, thereafter the cell is laid out in special software packages. Inductance of on-chip superconductor structures

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Wong, Si Seng. "Design of analog-to-digital converters with binary search algorithm and digital calibration techniques." Thesis, University of Macau, 2011. http://umaclib3.umac.mo/record=b2493310.

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46

Noël, Gaétan. "Identification of moving objects in colour digital video sequences." Thesis, University of Ottawa (Canada), 2002. http://hdl.handle.net/10393/6136.

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In the past decade, there has been a tremendous increase in the use of digital video through computer systems. However, in many applications, the video size and frame rate suffer from the fact that enormous amounts of bandwidth and storage space are still required by digital video. Nevertheless, home and industry level computers have become powerful enough to decompress and display good quality video through the use of specialized hardware such as video capture boards and video display cards without using up all CPU cycles: we now have the ability to process video in real-time. Research on vid

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Taillefer, Christopher. "Analog-to-digital conversion via time-mode signal processing." Thesis, McGill University, 2008. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=18669.

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Conventional voltage-mode analog-to-digital converters use voltage amplifiers, voltage comparators, and switch capacitor networks to perform their signal processing. When compared to digital circuitry, these analog circuit blocks consume significant power, occupy large silicon areas, and operate at relatively slow data processing speeds. A signal processing methodology is proposed that performs analog-to-digital conversion on voltage signals while implementing all the circuits in a digital CMOS logic style. This methodology, called time-mode signal processing, uses time-difference variables as

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Sukhon, Mohammad. "Double-sampled digital-feedforward second-order delta-sigma modulator." Thesis, McGill University, 2009. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=32527.

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A 12-bit 2.8-MHz delta sigma modulator intended for ADSL applications is presented in this thesis. The design process evolved over two stages, namely, a system-level design stage followed by a circuit-level design stage. During the first phase of the design, the systemlevel parameters are selected and analog-circuit specifications are derived. The circuitlevel stage involved the design of analog circuitry such as operational amplifiers capable of meeting the system-level specifications. The circuit design

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49

Noriega, Leonardo Antonio. "The colorimetric segmentation of textured digital images." Thesis, Southampton Solent University, 1998. http://ssudl.solent.ac.uk/2444/.

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This study approaches the problem of colour image segmentation as a pattern recognition task. This leads to the problem being broken down into two component parts: feature extraction and classification algorithms. Measures to enable the objective assessment of segmentation algorithms are considered. In keeping with this pattern-recognition based philosophy, the issue of texture is approached by a consideration of features, follwed by experimentation based on classification. Techniques based on Gabor filters and fractal dimension are compared. Also colour is considered in terms of its features,

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50

Yogi, Nitin Agrawal Vishwani D. "Spectral methods for testing of digital circuits." Auburn, Ala, 2009. http://hdl.handle.net/10415/1750.

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