Relevant bibliographies by topics / Digital logic design / Dissertations / Theses
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Dissertations / Theses on the topic 'Digital logic design'

Author: Grafiati
Published: 4 June 2021
Last updated: 16 February 2022

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1

Nguyen, Loc Bao. "Logic design using programmable logic devices." PDXScholar, 1988. https://pdxscholar.library.pdx.edu/open_access_etds/4103.

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The Programmable Logic Devices, PLO, have caused a major impact in logic design of digital systems in this decade. For instance, a twenty pin PLO device can replace from three hundreds to six hundreds Transistor Transistor Logic gates, which people have designed with since the 60s. Therefore, by using PLD devices, designers can squeeze more features, reduce chip counts, reduce power consumption, and enhance the reliability of the digital systems. This thesis covers the most important aspects of logic design using PLD devices. They are Logic Minimization and State Assignment. In addition, the t
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2

Xia, Yinshui. "Low power design techniques for digital logic circuits." Thesis, Edinburgh Napier University, 2003. http://researchrepository.napier.ac.uk/Output/6887.

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With the rapid increase in the density and the size of chips and systems, area and power dissipation become critical concern in Very Large Scale Integrated (VLSI) circuit design. Low power design techniques are essential for today's VLSI industry. The history of symbolic logic and some typical techniques for finite state machine (FSM) logic synthesis are reviewed. The state assignment is used to optimize area and power dissipation for FSMs. Two cost functions, targeting area and power, are presented. The Genetic Algorithm (GA) is used to search for a good state assignment to minimize the cost
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3

Sah, Puja. "Implementing Digital Logic Design Concepts Using Paper Electronics." Thesis, University of North Texas, 2018. https://digital.library.unt.edu/ark:/67531/metadc1157633/.

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This thesis presents the implementation of some of the basic concepts of digital logic design in a fun and creative way with the help of paper electronics. This involves circuit building on paper using conductive tape or conductive ink and circuit components as electronics craft materials. Paper electronics toolkit called circuit sticker microcontroller which is deployed by a company named Chibitronics and AT89C51 microcontroller were used for the computational functioning of the circuits built on paper. This can be used to teach the fundamentals of digital logic design to the students in thei
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4

Liu, Tai-hung. "Logic synthesis for high-performance digital circuits /." Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.

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5

Inampudi, Sivateja. "Teaching Fundamentals of Digital Logic Design and VLSI Design Using Computational Textiles." Thesis, University of North Texas, 2014. https://digital.library.unt.edu/ark:/67531/metadc699874/.

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This thesis presents teaching fundamentals of digital logic design and VLSI design for freshmen and even for high school students using e-textiles. This easily grabs attention of students as it is creative and interesting. Using e-textiles to project these concepts would be easily understood by students at young age. This involves stitching electronic circuits on a fabric using basic components like LEDs, push buttons and so on. The functioning of these circuits is programmed in Lilypad Arduino. By using this method, students get exposed to basic electronic concepts at early stage which eventu
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6

Hacker, Charles Hilton, and n/a. "WinLogiLab - A Computer-Based Teaching Suite for Digital Logic Design." Griffith University. School of Engineering, 2001. http://www4.gu.edu.au:8080/adt-root/public/adt-QGU20050915.172404.

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This thesis presents an interactive computerised teaching suite developed for the design of combinatorial and sequential logic circuits. This suite fills a perceived gap in the currently available computer-based teaching software for digital logic design. Several existing digital logic educational software are available, however these existing programs were found to be unsuitable for our use in providing alternative mode subject delivery. This prompted the development of a Microsoft Windows TM tutorial suite, called WinLogiLab. WinLogiLab comprises of a set of tutorials that uses student provi
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7

Herbert, J. M. J. "Application of formal methods to digital system design." Thesis, University of Cambridge, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.233985.

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8

Bortolon, Felipe Todeschini. "Static noise margin analysis for CMOS logic cells in near-threshold." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2018. http://hdl.handle.net/10183/178664.

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Os avanços na tecnologia de semicondutores possibilitou que se fabricasse dispositivos com atividade de chaveamento mais rápida e com maior capacidade de integração de transistores. Estes avanços, todavia, impuseram novos empecilhos relacionados com a dissipação de potência e energia. Além disso, a crescente demanda por dispositivos portáteis levaram à uma mudança no paradigma de projeto de circuitos para que se priorize energia ao invés de desempenho. Este cenário motivou à reduzir a tensão de alimentação com qual os dispositivos operam para um regime próximo ou abaixo da tensão de limiar, co
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9

Battina, Brahmasree. "An Interactive Framework for Teaching Fundamentals of Digital Logic Design and VLSI Design." Thesis, University of North Texas, 2014. https://digital.library.unt.edu/ark:/67531/metadc799495/.

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Integrated Circuits (ICs) have a broad range of applications in healthcare, military, consumer electronics etc. The acronym VLSI stands for Very Large Scale Integration and is a process of making ICs by placing millions of transistors on a single chip. Because of advancements in VLSI design technologies, ICs are getting smaller, faster in speed and more efficient, making personal devices handy, and with more features. In this thesis work an interactive framework is designed in which the fundamental concepts of digital logic design and VLSI design such as logic gates, MOS transistors, combinati
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10

Ström, Marcus. "System Design of RF Receiver and Digital Implementation of Control Logic." Thesis, Linköping University, Department of Science and Technology, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1848.

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<p>This report is the outcome of a thesis work done at Linköpings University, campus Norrköping. The thesis work was part of the development of a RF transceiver chip for implantable medical applications. The development was done in cooperation with Zarlink Semiconductor AB, located in Järfälla, Stockholm.</p><p>The transceiver is divided into three main blocks, which are the wakeup block, the MAC block and the RF block. The wakeup block is always operating and is awaiting a wakeup request in the 2,45GHz ISM-band. The RF-block is operating in the 400MHz ISM-band and is powered up after wakeup T
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11

Niewenhuis, Benjamin T. "A Logic Test Chip for Optimal Test and Diagnosis." Research Showcase @ CMU, 2018. http://repository.cmu.edu/dissertations/1176.

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The benefits of the continued progress in integrated circuit manufacturing have been numerous, most notably in the explosion of computing power in devices ranging from cell phones to cars. Key to this success has been strategies to identify, manage, and mitigate yield loss. One such strategy is the use of test structures to identify sources of yield loss early in the development of a new manufacturing process. However, the aggressive scaling of feature dimensions, the integration of new materials, and the increase in structural complexity in modern technologies has challenged the capabilities
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12

Roumeliotis, Emmanuel. "Multi-processor logic simulation at the chip level." Diss., Virginia Polytechnic Institute and State University, 1986. http://hdl.handle.net/10919/71180.

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This dissertation presents the design and development of a multi-processor logic simulator. After an introduction to parallel processing, the concept of distributed simulation is described as well as the possibility of deadlock in a distributed system. It is proven that the proposed system does not deadlock. Next, the modeling techniques are discussed along with the timing mechanisms used for logic simulation. A new approach, namely process oriented simulation is studied in depth. It is shown that modeling for this kind of simulation is more efficient regarding modeling ease, computer memory a
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13

Lammert, Adam Crawford. "Searching for Better Logic Circuits: Using Artificial Intelligence Techniques to Automate Digital Design." NCSU, 2006. http://www.lib.ncsu.edu/theses/available/etd-06072006-140938/.

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LAMMERT, ADAM CRAWFORD. Searching for Better Logic Circuits: Using Artificial Intelligence Techniques to Automate Digital Design. (Under the direction of Dr. Edward Willmore Davis Jr.) Logic circuits are at the core of modern computing. The process of designing circuits which are efficient is thus of critical importance. Usually, logic circuits are designed by human beings who have a specific repertoire of conventional design techniques. These techniques limit the solutions that may be considered during the design process in both form and quality. The limits guide designers through the immense
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14

劉俊強 and Chun-keung Lau. "Design, simulation and implementation of digital controlled power converters using fuzzy logic approach." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2000. http://hub.hku.hk/bib/B3122460X.

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15

Elliot, Ralph. "Some issues in the design of digital circuits using Occam and temperal logic." Thesis, University of East Anglia, 1990. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.253629.

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Lau, Chun-keung. "Design, simulation and implementation of digital controlled power converters using fuzzy logic approach." Hong Kong : University of Hong Kong, 2000. http://sunzi.lib.hku.hk/hkuto/record.jsp?B22277754.

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17

Ramirez, Ortiz Rolando Carleton University Dissertation Engineering Electronics. "Circuit design rules for mixed static and dynamics CMOS logic circuits." Ottawa, 1999.

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18

Hassoune, Ilham. "Design and optimization of digital circuits for low power and security applications." Université catholique de Louvain, 2006. http://edoc.bib.ucl.ac.be:81/ETD-db/collection/available/BelnUcetd-06292006-113241/.

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Since integration technology is approaching the nanoelectronics range, some practical limits are being reached. Leakage power is increasing more and more with the continuous scaling, and design of clock distribution systems needs to be reconsidered as it becomes difficult to deal with performance and power consumption specifications while keeping a correct synchronisation in modern multi-GHz systems. The ongoing technology trend will become difficult to maintain unless dedicated library cells, new logic styles and circuit methods are emerging to prevent the drawbacks of future nanoscale circui
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19

Bhavnagarwala, Azeez Jenúddin. "Voltage scaling constraints for static CMOS logic and memory cirucits." Diss., Georgia Institute of Technology, 2001. http://hdl.handle.net/1853/15401.

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20

Diril, Abdulkadir Utku. "Circuit Level Techniques for Power and Reliability Optimization of CMOS Logic." Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/6929.

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Technology scaling trends lead to shrinking of the individual elements like transistors and wires in digital systems. The main driving force behind this is cutting the cost of the systems while the systems are filled with extra functionalities. This is the reason why a 3 GHz Intel processor now is priced less than what a 50MHz processor was priced 10 years ago. As in most cases, this comes with a price. This price is the complex design process and problems that stem from the reduction in physical dimensions. As the transistors became smaller in size and the systems became faster, issues like
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21

Schafer, Ingo. "An effective cube comparison method for discrete spectral transformations of logic functions." PDXScholar, 1990. https://pdxscholar.library.pdx.edu/open_access_etds/4147.

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Spectral methods have been used for many applications in digital logic design, digital signal processing and telecommunications. In digital logic design they are implemented for testing of logical networks, multiplexer-based logic synthesis, signal processing, image processing and pattern analysis. New developments of more efficient algorithms for spectral transformations (Rademacher-Walsh, Generalized Reed-Muller, Adding, Arithmetic, multiple-valued Walsh and multiple-valued Generalized Reed- Muller) their implementation and applications will be described.
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22

Chakrapani, Lakshmi Narasimhan. "Probabilistic boolean logic, arithmetic and architectures." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/26706.

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Thesis (Ph.D)--Computing, Georgia Institute of Technology, 2009.<br>Committee Chair: Palem, Krishna V.; Committee Member: Lim, Sung Kyu; Committee Member: Loh, Gabriel H.; Committee Member: Mudge, Trevor; Committee Member: Yalamanchili, Sudhakar. Part of the SMARTech Electronic Thesis and Dissertation Collection.
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23

Dal, Bem Vinícius. "CMOS digital integrated circuit design faced to NBTI and other nanometric effects." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2010. http://hdl.handle.net/10183/37180.

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Esta dissertação explora os desafios agravados pela miniaturização da tecnologia na fabricação e projeto de circuitos integrados digitais. Os efeitos físicos do regime nanométrico reduzem o rendimento da produção e encurtam a vida útil dos dispositivos, restringindo a utilidade dos padrões de projeto convencionais e ameaçando a evolução da tecnologia CMOS como um todo. Nesta dissertação é exposta uma consistente revisão bibliográfica dos principais efeitos físicos parasitas presentes no regime nanométrico. Como o NBTI tem recebido destaque na literatura relacionada à confiabilidade de circuito
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24

Mozaffari, Mojaveri Seyed Nima. "DESIGN AND TEST OF DIGITAL CIRCUITS AND SYSTEMS USING CMOS AND EMERGING RESISTIVE DEVICES." OpenSIUC, 2018. https://opensiuc.lib.siu.edu/dissertations/1526.

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The memristor is an emerging nano-device. Low power operation, high density, scalability, non-volatility, and compatibility with CMOS Technology have made it a promising technology for memory, Boolean implementation, computing, and logic systems. This dissertation focuses on testing and design of such applications. In particular, we investigate on testing of memristor-based memories, design of memristive implementation of Boolean functions, and reliability and design of neuromorphic computing such as neural network. In addition, we show how to modify threshold logic gates to implement more fun
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25

Figueiró, Thiago Rosa. "Multiple objective technology independent logic synthesis for multiple output functions through AIG functional composition." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2010. http://hdl.handle.net/10183/27663.

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O emprego de ferramentas de automação de projetos de circuitos integrados permitiu que projetos complexos atingissem time-to-market e custos de produção factíveis. Neste contexto, o processo de síntese lógica é uma etapa fundamental no fluxo de projeto. O passo independente de tecnologia (parte do processo de síntese lógica, que é realizada sem considerar características físicas) é tradicionalmente realizado sobre equações. O desenvolvimento de novos algoritmos de otimização multi-nível recentemente migrou para o emprego de And-Inverter Graphs (AIGs). O número de nodos e a altura de um grafo a
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26

Sutton, Akil Khamisi. "Hardness assurance testing and radiation hardening by design techniques for silicon-germanium heterojunction bipolar transistors and digital logic circuits." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/29778.

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Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009.<br>Committee Chair: Cressler, John; Committee Member: Deo, Chaitanya; Committee Member: Doolittle, Alan; Committee Member: Keezer, David; Committee Member: May, Gary; Committee Member: Papapolymerou, John. Part of the SMARTech Electronic Thesis and Dissertation Collection.
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27

Bavaresco, Simone. "On-silicon testbench for validation of soft logic cell libraries." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2008. http://hdl.handle.net/10183/14907.

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Projeto baseado em células-padrão é a abordagem mais aplicada no mercado de ASIC atualmente. Essa abordagem de projeto consiste no reuso de bibliotecas de células pré-customizadas para gerar sistemas digitais mais complexos. Portanto a eficiência de um projeto ASIC está relacionado com a biblioteca em uso. A utilização de portas lógicas CMOS geradas automaticamente no fluxo de projeto de circuito integrado baseado em células-padrão representa uma perspectiva atraente para melhorar a qualidade de projeto ASIC. Essas células geradas por software são os elementos-chave dessa nova abordagem de map
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28

Lee, Chris Y. "Full Custom VLSI Design of On-Line Stability Checkers." DigitalCommons@CalPoly, 2011. https://digitalcommons.calpoly.edu/theses/607.

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A stability checker is a clocked storage element, much like a flip-flop, which detects unstable and late signals in the pipeline of a digital system. The On-line stability checker operates concurrently with its associated circuit-under-test (CUT). This thesis describes the full custom very-large-scale integration (VLSI) design and testing process of On-Line Stability Checkers. The goals of this thesis are to construct and test Stability Checker designs, and to create a design template for future class projects in the EE 431 Computer-Aided Design (CAD) of VLSI Devices course at Cal Poly. A meth
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29

Haji, Mohammad Ali Sabbagh Shabnam. "Digital Interactive Games for Assessment: A Study of the Effectiveness of a Digital Game as a Measure of Students' Understanding of Boolean Logic." Master's thesis, University of Central Florida, 2014. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/6284.

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Digital games have been used mostly for entertainment but recently researchers have started to use digital games in other areas such as education and training. Researchers have shown that digital games can provide a compelling, creative, and collaborative environment for learning. However, the popularity of computers and the Internet brings this question to mind: Are the assessment methods falling behind and remaining traditional? Will the traditional methods of learning and knowledge assessment be sufficient for this new generation who are starving for new technology? This study investigates
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30

Ho, Philip. "Investigation of Solution Space of Trees and DAGs for Realization of Combinational Logic in AT 6000 series FPGAs." PDXScholar, 1993. https://pdxscholar.library.pdx.edu/open_access_etds/4586.

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Various tree and Directed Acyclic Graph structures have been used for representation and manipulation of switching functions. Among these structures the Binary Decision DiagramJilave been the most widely used in logic synthesis. A BDD is a binary tree graph that represents the recursive execution of Shannon's expansion. A FDD is a directed function graph that represents the recursive execution of Reed Muller expansion. A family of decision diagrams for representation of Boolean function is introduced in this thesis. This family of Kronecker Functional Decision Diagrams (KFDD) includes the Bina
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31

Heim, Marcus Edwin Allan. "ANALYSIS OF MOS CURRENT MODE LOGIC (MCML) AND IMPLEMENTATION OF MCML STANDARD CELL LIBRARY FOR LOW-NOISE DIGITAL CIRCUIT DESIGN." DigitalCommons@CalPoly, 2015. https://digitalcommons.calpoly.edu/theses/1422.

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MOS current mode logic (MCML) offers low noise digital circuits that reduce noise that can cripple analog components in mixed-signal integrated circuits, when compared to CMOS digital circuits. An MCML standard cell library was developed for the Cadence Virtuoso Integrated Circuit (IC) design software that gives IC designers the ability to design complex, low noise digital circuits for use in mixed-signal and noise sensitive systems at a high level of abstraction, allowing them to get superior products to market faster than competitors. The MCML standard cell library developed and presented he
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32

Butzen, Paulo Francisco. "Aging aware design techniques and CMOS gate degradation estimative." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2012. http://hdl.handle.net/10183/61868.

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O advento da utilização de circuitos integrados pela sociedade se deu por dois motivos. O primeiro consiste na miniaturização das dimensões dos dispositivos integrados. Essa miniaturização permitiu a construção de dispositivos menores, mais rápidos e que consomem menos frequência. O outro fator é a utilização da metodologia baseada em biblioteca de células. Esta metodologia permite o projeto de um circuito eficiente em um curto espaço de tempo. Com a redução dos dispositivos, novos fatores que eram desconsiderados no fluxo automático passaram a ter importância. Dentre eles podemos citar o cons
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33

Nagaraj, Varun. "Emergent Learning in Digital Product Teams." Case Western Reserve University School of Graduate Studies / OhioLINK, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=case1553980113426569.

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34

Wan, Wei. "A New Approach to the Decomposition of Incompletely Specified Functions Based on Graph Coloring and Local Transformation and Its Application to FPGA Mapping." PDXScholar, 1992. https://pdxscholar.library.pdx.edu/open_access_etds/4698.

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The thesis presents a new approach to the decomposition of incompletely specified functions and its application to FPGA (Field Programmable Gate Array) mapping. Five methods: Variable Partitioning, Graph Coloring, Bond Set Encoding, CLB Reusing and Local Transformation are developed in order to efficiently perform decomposition and FPGA (Lookup-Table based FPGA) mapping. 1) Variable Partitioning is a high quality hemistic method used to find the "best" partitions, avoiding the very time consuming testing of all possible decomposition charts, which is impractical when there are many input varia
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Abbas, Ghulam. "Analysis, modelling, design and implementation of fast-response digital controllers for high-frequency low-power switching converters." Thesis, Lyon, INSA, 2012. http://www.theses.fr/2012ISAL0055.

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L'objectif de la thèse est de concevoir des compensateurs discrets qui permettent de compenser les non-linéarités introduites par les différents éléments dans la boucle de commande numérique, tout en maintenant des performances dynamiques élevées, des temps de développement rapide, et une structure reconfigurable. Ces compensateurs discrets doivent également avoir des temps de réponse rapide, avoir une déviation de la tension minimale et avoir, pour un étage de puissance donné, un temps de récupération rapide de la tension. Ces performances peuvent être atteintes par des compensateurs discrets
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36

Wijaya, Shierly. "Fixed-point realisation of erbium doped fibre amplifer control algorithms on FPGA." University of Western Australia. School of Electrical, Electronic and Computer Engineering, 2009. http://theses.library.uwa.edu.au/adt-WU2009.0132.

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The realisation of signal processing algorithms in fixed-point offers substantial performance advantages over floating-point realisations. However, it is widely acknowledged that the task of realising algorithms in fixed-point is a challenging one with limited tool support. This thesis examines various aspects related to the translation of algorithms, given in infinite precision or floating-point, into fixed-point. In particular, this thesis reports on the implementation of a given algorithm, an EDFA (Erbium-Doped Fibre Amplifier) control algorithm, on a FPGA (Field Programmable Gate Array) us
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Henninen, Svein Rypdal. "Application of asynchronous design to microcontroller startup logic." Thesis, Norges teknisk-naturvitenskapelige universitet, Institutt for elektronikk og telekommunikasjon, 2011. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-16349.

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Digital circuits designed today are almost exclusively clocked. As designs grow in size it becomes harder to effectively distribute the various clock signals over the circuit. The clock is also a big contribution to the power consumption of a circuit. Some work is being done to provide alternatives to standard synchronous design. One of these alternatives is the Balsa system.Several versions of an asynchronous module for controlling the startup process of a microcontroller was made in Balsa and compared to a standard synchronous implementation. Area estimates for the best asynchronous implemen
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Li, Nan. "Digital control strategies for DC/DC SEPIC converters towards integration." Phd thesis, INSA de Lyon, 2012. http://tel.archives-ouvertes.fr/tel-00760064.

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The use of SMPS (Switched mode power supply) in embedded systems is continuously increasing. The technological requirements of these systems include simultaneously a very good voltage regulation and a strong compactness of components. SEPIC ( Single-Ended Primary Inductor Converter) is a DC/DC switching converter which possesses several advantages with regard to the other classical converters. Due to the difficulty in control of its 4th-order and non linear property, it is still not well-exploited. The objective of this work is the development of successful strategies of control for a SEPIC co
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Palakurthi, Praveen Kumar. "Design of a low voltage analog to digital converter." To access this resource online via ProQuest Dissertations and Theses @ UTEP, 2009. http://0-proquest.umi.com.lib.utep.edu/login?COPT=REJTPTU0YmImSU5UPTAmVkVSPTI=&clientId=2515.

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Patil, Dinesh. "Design of robust energy-efficient digital circuits using geometric programming /." May be available electronically:, 2008. http://proquest.umi.com/login?COPT=REJTPTU1MTUmSU5UPTAmVkVSPTI=&clientId=12498.

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Chen, Tze Wee. "A physics-based design methodology for digital systems robust to ESD-CDM events /." May be available electronically:, 2009. http://proquest.umi.com/login?COPT=REJTPTU1MTUmSU5UPTAmVkVSPTI=&clientId=12498.

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Burnham, James Russell. "Design and analysis of jitter-tolerant digital delay-locked loops and fixed delay lines /." May be available electronically:, 2007. http://proquest.umi.com/login?COPT=REJTPTU1MTUmSU5UPTAmVkVSPTI=&clientId=12498.

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Agah, Ali. "Design of incremental sigma-delta modulators with extended range for high-resolution analog-go-digital conversion for bioluminescence detection arrays /." May be available electronically:, 2007. http://proquest.umi.com/login?COPT=REJTPTU1MTUmSU5UPTAmVkVSPTI=&clientId=12498.

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44

Benhaddou, Mohamed. "Définition d'une méthodologie de conception de circuits intégrés numériques indépendante de la technologie : application à la conception d'un processeur flou." Vandoeuvre-les-Nancy, INPL, 1995. http://www.theses.fr/1995INPL067N.

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Les technologies de fabrication de circuits intégrés numériques et les outils de CAO pour la conception de ceux-ci ont régulièrement évolué. La tendance actuelle est de décrire le comportement du concept à un niveau d'abstraction élevé à l'aide d'un langage de description du matériel standard comme Verilog ou VHDL, et laisser le soin aux outils de synthèse de générer les masques du circuit ou sa liste d'équipotentielles dans la bibliothèque d'un fondeur. Le problème est le prix élevé de ces outils de synthèse de haut niveau qui est dissuasif pour les PME/PMI. L’objectif de ce travail est de mo
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Mohamed, Mohamed Hassan Wahba Ayman. "Diagnostic des erreurs de conception dans les circuits digitaux : le cas des erreurs simples." Grenoble 1, 1997. http://www.theses.fr/1997GRE10086.

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Le diagnostic automatique des erreurs de conception est un probleme important dans le domaine de la cao. Bien que des outils automatises de synthese soient employes pour generer des structures de circuits correctes-par-construction, celles-ci sont souvent modifiees manuellement pour refleter des petites modifications faites sur la specification, ou pour ameliorer certaines caracteristiques critiques de la conception. Les outils de verification peuvent reveler l'existence d'erreurs, mais ils ne donnent aucune information sur leurs emplacements ou la facon de les corriger. Ces outils generent se
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46

Dekhissi, Habri. "Etude des performances des technologies HCMOS 3 et HCMOS 4." Grenoble 2 : ANRT, 1987. http://catalogue.bnf.fr/ark:/12148/cb37604368s.

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47

Husemann, Ronaldo. "Arquitetura de co-projeto hardware/software para implementação de um codificador de vídeo escalável padrão H.264/SVC." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2011. http://hdl.handle.net/10183/49305.

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Visando atuação flexível em redes heterogêneas, modernos sistemas multimídia podem adotar o conceito da codificação escalável, onde o fluxo de vídeo é composto por múltiplas camadas, cada qual complementando e aprimorando gradualmente as características de exibição, de forma adaptativa às capacidades de cada receptor. Atualmente, a especificação H.264/SVC representa o estado da arte da área, por sua eficiência de codificação aprimorada, porém demanda recursos computacionais extremamente elevados. Neste contexto, o presente trabalho apresenta uma arquitetura de projeto colaborativo de hardware
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48

Morozkin, Pavel. "Design and implementation of image processing and compression algorithms for a miniature embedded eye tracking system." Electronic Thesis or Diss., Sorbonne université, 2018. https://accesdistant.sorbonne-universite.fr/login?url=https://theses-intra.sorbonne-universite.fr/2018SORUS435.pdf.

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Les interactions Homme-machines (IHM) deviennent progressivement une partie intégrante de notre futur. Parmi eux, les systèmes embarqués d’oculométrie permettent à l'utilisateur d’interagir avec les objets placés dans un environnement connu, par l'utilisation les mouvements naturels des yeux. La solution mobile d’oculométrie EyeDee™ (développée par SuriCog) est un exemple précis de produit basé sur l’IHM. Elle inclut un système portable filaire ou sans fil Weetsy™ composé d’une monture Weetsy™ et d’une carte électronique Weetsy™, d’un capteur intelligent à distance π-Box™ et d’une unité de tra
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49

Goudard, Vincent. "Représentation et contrôle dans le design interactif des instruments de musique numériques." Thesis, Sorbonne université, 2020. https://accesdistant.sorbonne-universite.fr/login?url=http://theses-intra.upmc.fr/modules/resources/download/theses/2020SORUS051.pdf.

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Les instruments de musique numériques se présentent comme des objets complexes, qui se situent à la fois dans une continuité historique avec l'histoire de la lutherie tout en étant marqués par une rupture forte provoquée par le numérique et ses conséquences en terme de possibilités sonores, de relations entre le geste et le son, de situations d'écoute, de re-configurabilité des instruments, etc. Ce travail de doctorat propose une analyse des caractéristiques émanant de l'intégration du numérique dans les instruments de musique, en s'appuyant notamment sur une réflexion musicologique, sur des d
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von, Wenckstern Michael. "Web applications using the Google Web Toolkit." Master's thesis, Technische Universitaet Bergakademie Freiberg Universitaetsbibliothek "Georgius Agricola", 2013. http://nbn-resolving.de/urn:nbn:de:bsz:105-qucosa-115009.

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This diploma thesis describes how to create or convert traditional Java programs to desktop-like rich internet applications with the Google Web Toolkit. The Google Web Toolkit is an open source development environment, which translates Java code to browser and device independent HTML and JavaScript. Most of the GWT framework parts, including the Java to JavaScript compiler as well as important security issues of websites will be introduced. The famous Agricola board game will be implemented in the Model-View-Presenter pattern to show that complex user interfaces can be created with the Google
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