Relevant bibliographies by topics / Direct Bonded Copper (DBC)

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Book chapters
  4. Conference papers

Academic literature on the topic 'Direct Bonded Copper (DBC)'

Author: Grafiati
Published: 4 June 2021
Last updated: 8 February 2022

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Journal articles on the topic "Direct Bonded Copper (DBC)"

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Grzesiak, Wojciech, Piotr Maćków, Tomasz Maj, Beata Synkiewicz, Krzysztof Witek, Ryszard Kisiel, Marcin Myśliwiec, Janusz Borecki, Tomasz Serzysko, and Marek Żupnik. "Application of direct bonded copper substrates for prototyping of power electronic modules." Circuit World 42, no. 1 (February 1, 2016): 23–31. http://dx.doi.org/10.1108/cw-10-2015-0051.

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Purpose – This paper aims to present certain issues in direct bonded copper (DBC) technology towards the manufacture of Al2O3 or AlN ceramic substrates with one or both sides clad with a copper (Cu) layer. Design/methodology/approach – As part of the experimental work, attempts were made to produce patterns printed onto DBC substrates based on four substantially different technologies: precise cutting with a diamond saw, photolithography, the use of a milling cutter (LPKF ProtoMat 93s) and laser ablation with differential chemical etching of the Cu layer. Findings – The use of photolithography and etching technology in the case of boards clad with a 0.2-mm-thick Cu layer, can produce conductive paths with a width of 0.4 mm while maintaining a distance of 0.4 mm between the paths, and in the case of boards clad with a 0.3-mm-thick copper layer, conductive paths with a width of 0.5 mm while maintaining a distance of 0.5 mm between paths. The application of laser ablation at the final step of removing the unnecessary copper layer, can radically increase the resolution of printed pattern even to 0.1/0.1 mm. The quality of the printed pattern is also much better. Research limitations/implications – Etching process optimization and the development of the fundamentals of technology and design of power electronic systems based on DBC substrates should be done in the future. A limiting factor for further research and its implementation may be the relatively high price of DBC substrates in comparison with typical PCB printed circuits. Practical implications – Several examples of practical implementations using DBC technology are presented, such as full- and half-bridge connections, full-wave rectifier with an output voltage of 48 V and an output current of 50 A, and part of a battery discharger controller and light-emitting diode illuminator soldered to a copper heat sink. Originality/value – The paper presents a comparison of different technologies used for the realization of precise patterns on DBC substrates. The combination of etching and laser ablation technologies radically improves the quality of DBC-printed patterns.
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Patterson, Brian, Srikanth Kulkarni, Aicha Elshabini, and Fred Barlow. "Evaluation of Direct Bond Aluminum Substrates for Power Electronic Applications in Extreme Environments." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2012, CICMT (September 1, 2012): 000012–17. http://dx.doi.org/10.4071/cicmt-2012-ta12.

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Power packages that require large current capacities typically employ some form of thick conductive traces attached to a thermally conductive ceramic material to create a suitable package substrate. The most common substrate currently used in high power applications is Direct Bonded Copper (DBC). Though this is a well established, reliable, and commonly used substrate, DBC suffers from poor long term mechanical reliability when exposed to extreme temperature excursions. In an attempt to improve on this technology, substrate materials such as Active Metal Bond / Braze (AMB) and Direct Bonded Aluminum (DBA) are being investigated. Previous work has shown that the accelerated aging / thermal shock lifetimes of DBC and AMB are significantly shorter than that of DBA substrates. Though DBA substrates last longer, they still have some issues that require attention before it can be accepted as an improved alternative to DBC substrates in these types of applications. The main issues that have been observed are DBA's increase in surface roughness during aging and aluminum's poor solderability when compared to copper or nickel. The emphasis of this paper is to investigate the dramatic increase in DBA's surface roughness and its' possible causes due to thermal cycling as well as present a thermal cycling lifetime comparison of the three different substrate. To evaluate this, a DBA sample with one side raw aluminum and one side electroless nickel plated (high phosphorous) was thermally shocked from −40°C to 200°C with surface roughness measurements preformed every 300 cycles. Another batch of samples was thermally shocked to 6000 cycles and lifetimes were compared. One nickel plated DBA sample shocked to 4000 cycles was cross-sectioned and analyzed with SEM and EDAX to evaluate any changes in the metal. The grain structure of a thermally cycled sample was also examined with a Scanning Electron Microscope (SEM).
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Gundel, Paul, Anton Miric, Kai Herbst, Melanie Bawohl, Jessica Reitz, Christina Modes, Gabriel Zier, Ilias Nikolaidis, and Mark Challingsworth. "Advanced DBC - Highly Reliable and Conductive Copper Ceramic Substrates." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2016, CICMT (May 1, 2016): 000073–78. http://dx.doi.org/10.4071/2016cicmt-tp2b2.

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Abstract So far Direct Bonded Copper (DBC) substrates have been the standard for power electronics. They provide excellent electrical and thermal conductivity at low cost. Weaknesses of DBC technology are the inevitable warpage and the relatively low reliability under thermal cycling. The low reliability poses a significant hurdle in particular for automotive applications with high lifetime requirements. Thick Print Copper (TPC) substrates with low warpage and excellent reliability overcome these weaknesses, but also provide a reduced conductivity at a higher cost. We present two thick-film/DBC hybrid technologies which combine the best properties of DBC and TPC: excellent conductivity, low cost, reduced warpage and excellent reliability.
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Mei, Yunhui, Guo-Quan Lu, Xu Chen, Chen Gang, Shufang Luo, and Dimeji Ibitayo. "Investigation of Post-Etch Copper Residue on Direct Bonded Copper (DBC) Substrates." Journal of Electronic Materials 40, no. 10 (July 30, 2011): 2119–25. http://dx.doi.org/10.1007/s11664-011-1716-8.

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Persons, Ryan, and Paul Gundel. "Print Copper on Ceramic for High Reliability Electronics." International Symposium on Microelectronics 2015, no. 1 (October 1, 2015): 000330–35. http://dx.doi.org/10.4071/isom-2015-wp12.

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In the power electronics world, Direct Bonded Copper (DBC) is the primary substrate technology. In this paper, we will discuss an alternative technology utilizing screen printable copper pastes (Thick Printed Copper - TPC) on a variety of substrate technologies including Alumina (Al2O3) and Aluminum Nitride (AlN). These materials when processed, look and perform similar to DBC, but exhibit superior reliability and excellent design flexibility. DBC has drawbacks when it comes to thermal mechanical reliability and lacks the flexibility to have multiple copper thicknesses for power and signal circuits within the same design, which is easily achieved via screen printing. The benefits of this TPC system will be demonstrated through data generated on passive thermal shock tests in comparison to high end DBC. Furthermore, this Thick Print Copper technology has the excellent potential for replacing high end Metal Core Printed Circuit Board (MCPCB) technology due to utilization of higher thermal conductive dielectric materials like Al2O3 and AlN. This will allow for designers to drive their LED's harder and effectively producing LED modules with higher power densities.
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Lee, Chung Hyo, Young Sup Lee, Dong Choul Cho, and Chang Hee Lee. "Microstructure and Mechanical Properties of DBC on Sputter Deposited Copper on Alumina Substrate." Materials Science Forum 449-452 (March 2004): 677–80. http://dx.doi.org/10.4028/www.scientific.net/msf.449-452.677.

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The process of Direct Bonding Copper (DBC) is performed by a spinel reaction between CuO and Al2O3. In order to develop DBC on alumina substrate with high bonding strength, alumina substrate was preformed as follows: Cu was sputter-deposited on alumina substrate. Sputter-Deposited Cu (SDC) on alumina substrate was oxidized at 673K for 30min in air atmosphere and then stabilized at 1273K for 30min in N2 gas atmosphere to improve bonding strtrength between preformed alumina substrate and SDC layer. Subsequently, the Cu-foil (300µm) was bonded on preformed-alumina substrate in N2 gas atmosphere at 1342~1345K. It was found that optimum condition of DBC on preformed-alumina substrate could be successfully obtained at 1345K for 30min. Consequently, bonding strength of DBC on alumina substrate was the high value of 80N/cm. Observation and analysis of microstructure for Cu sputtered DBC showed that reaction compounds such as CuAlO2 and CuAl2O4 approved to be formed in the vicinity of interface between Cu and alumina substrate.
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Kim, Dongjin, Yasuyuki Yamamoto, Shijo Nagao, Naoki Wakasugi, Chuantong Chen, and Katsuaki Suganuma. "Measurement of Heat Dissipation and Thermal-Stability of Power Modules on DBC Substrates with Various Ceramics by SiC Micro-Heater Chip System and Ag Sinter Joining." Micromachines 10, no. 11 (October 31, 2019): 745. http://dx.doi.org/10.3390/mi10110745.

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This study introduced the SiC micro-heater chip as a novel thermal evaluation device for next-generation power modules and to evaluate the heat resistant performance of direct bonded copper (DBC) substrate with aluminum nitride (AlN-DBC), aluminum oxide (DBC-Al2O3) and silicon nitride (Si3N4-DBC) ceramics middle layer. The SiC micro-heater chips were structurally sound bonded on the two types of DBC substrates by Ag sinter paste and Au wire was used to interconnect the SiC and DBC substrate. The SiC micro-heater chip power modules were fixed on a water-cooling plate by a thermal interface material (TIM), a steady-state thermal resistance measurement and a power cycling test were successfully conducted. As a result, the thermal resistance of the SiC micro-heater chip power modules on the DBC-Al2O3 substrate at power over 200 W was about twice higher than DBC-Si3N4 and also higher than DBC-AlN. In addition, during the power cycle test, DBC-Al2O3 was stopped after 1000 cycles due to Pt heater pattern line was partially broken induced by the excessive rise in thermal resistance, but DBC-Si3N4 and DBC-AlN specimens were subjected to more than 20,000 cycles and not noticeable physical failure was found in both of the SiC chip and DBC substrates by a x-ray observation. The results indicated that AlN-DBC can be as an optimization substrate for the best heat dissipation/durability in wide band-gap (WBG) power devices. Our results provide an important index for industries demanding higher power and temperature power electronics.
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Molisani, André Luiz, and Humberto Naoyuki Yoshimura. "Intermediate Oxide Layers for Direct Bonding of Copper (DBC) to Aluminum Nitride Ceramic Substrates." Materials Science Forum 660-661 (October 2010): 658–63. http://dx.doi.org/10.4028/www.scientific.net/msf.660-661.658.

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DBC is a process where copper foils are bonded to ceramic substrates for manufacturing hybrid electronic circuits and packages with high power-handling capabilities. For aluminum nitride (AlN) ceramics, a heat-treatment is required to grow an oxide layer to promote the bonding with copper. The oxidation treatment, however, must be conducted in special conditions to avoid the occurrence of severe cracking. In this work, an alternative method is proposed to form an intermediate oxide layers for DBC to AlN substrates. By this method, eutectic powder mixtures (CuO-CaO and CuO-Al2O3 systems) were applied to dense AlN substrates and then heat-treated at 1200 °C for 1 h in air. Different types of AlN ceramics sintered between 1650 and 1700 °C for 4 h in nitrogen atmosphere with additives of the system Y2O3-CaO-SrO-Li2O were investigated. The prepared oxide layers (thickness of ~25 m) presented good microstructural joining with the AlN substrates (characterized by SEM and EDS analysis), and did not affect significantly the thermal conductivity in the working temperature range of electronic devices (~100 to 50 W/m.K determined by laser flash method between 100 and 200 °C) compared to the AlN substrates.
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Ivanova, Mariya, Yvan Avenas, Christian Schaeffer, Jean-Bernard Dezord, and Juergen Schulz-Harder. "Heat Pipe Integrated in Direct Bonded Copper (DBC) Technology for Cooling of Power Electronics Packaging." IEEE Transactions on Power Electronics 21, no. 6 (November 2006): 1541–47. http://dx.doi.org/10.1109/tpel.2006.882974.

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Toth Pal, Zsolt, Ya Fan Zhang, Ilja Belov, Hans Peter Nee, and Mietek Bakowski. "Investigation of Pressure Dependent Thermal Contact Resistance between Silver Metallized SiC Chip and DBC Substrate." Materials Science Forum 821-823 (June 2015): 452–55. http://dx.doi.org/10.4028/www.scientific.net/msf.821-823.452.

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– Thermal contact resistances between a silver metallized SiC chip and a direct bonded copper (DBC) substrate have been measured in a heat transfer experiment. A novel experimental method to separate thermal contact resistances in multilayer heat transfer path has been demonstrated. The experimental results have been compared with analytical calculations and also with 3D computational fluid dynamics (CFD) simulation results. A simplified CFD model of the experimental setup has been validated. The results show significant pressure dependence of the thermal contact resistance but also a pressure independent part.
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Dissertations / Theses on the topic "Direct Bonded Copper (DBC)"

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Watt, Grace R. "Impact of Device Parametric Tolerances on Current Sharing Behavior of a SiC Half-Bridge Power Module." Thesis, Virginia Tech, 2020. http://hdl.handle.net/10919/96559.

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This paper describes the design, fabrication, and testing of a 1.2 kV, 6.5 mΩ, half-bridge, SiC MOSFET power module to evaluate the impact of parametric device tolerances on electrical and thermal performance. Paralleling power devices increases current handling capability for the same bus voltage. However, inherent parametric differences among dies leads to unbalanced current sharing causing overstress and overheating. In this design, a symmetrical DBC layout is utilized to balance parasitic inductances in the current pathways of paralleled dies to isolate the impact of parametric tolerances. In addition, the paper investigates the benefits of flexible PCB in place of wire bonds for the gate loop interconnection to reduce and minimize the gate loop inductance. The balanced modules have dies with similar threshold voltages while the unbalanced modules have dies with unbalanced threshold voltages to force unbalanced current sharing. The modules were placed into a clamped inductive DPT and a continuous, boost converter. Rogowski coils looped under the wire bonds of the bottom switch dies to observe current behavior. Four modules performed continuously for least 10 minutes at 200 V, 37.6 A input, at 30 kHz with 50% duty cycle. The modules could not perform for multiple minutes at 250 V with 47.7 A (23 A/die). The energy loss differential for a ~17% difference in threshold voltage ranged from 4.52% (~10 µJ) to -30.9% (~30 µJ). The energy loss differential for a ~0.5% difference in V_th ranged from -2.26% (~8 µJ) to 5.66% (~10 µJ). The loss differential was dependent on whether current unbalance due to on-state resistance compensated current unbalance due to threshold voltage. While device parametric tolerances are inherent, if the higher threshold voltage devices can be paired with devices that have higher on-state resistance, the overall loss differential may perform similarly to well-matched dies. Lastly, the most consistently performing unbalanced module with 17.7% difference in V_th had 119.9 µJ more energy loss and was 22.2°C hotter during continuous testing than the most consistently performing balanced module with 0.6% difference inV_th.
Master of Science
This paper describes the design, construction, and testing of advanced power devices for use in electric vehicles. Power devices are necessary to supply electricity to different parts of the vehicle; for example, energy is stored in a battery as direct current (DC) power, but the motor requires alternating current (AC) power. Therefore, power electronics can alter the energy to be delivered as DC or AC. In order to carry more power, multiple devices can be used together just as 10 people can carry more weight than 1 person. However, because the devices are not perfect, there can be slight differences in the performance of one device to another. One device may have to carry more current than another device which could cause failure earlier than intended. In this research project, multiple power devices were placed into a package, or "module." In a control module, the devices were selected with similar properties to one another. In an experimental module, the devices were selected with properties very different from one another. It was determined that the when the devices were 17.7% difference, there was 119.9 µJ more energy loss and it was 22.2°C hotter than when the difference was only 0.6%. However, the severity of the difference was dependent on how multiple device characteristics interacted with one another. It may be possible to compensate some of the impact of device differences in one characteristic with opposing differences in another device characteristic.
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Ha, Min Seok. "Thermal analysis of high power led arrays." Thesis, Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/31803.

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Thesis (M. S.)--Mechanical Engineering, Georgia Institute of Technology, 2010.
Committee Chair: Samuel Graham; Committee Member: J. Rhett Mayor; Committee Member: Yogendra Joshi. Part of the SMARTech Electronic Thesis and Dissertation Collection.
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Gaiser, Patrick [Verfasser], and Jürgen [Akademischer Betreuer] Wilde. "Lebensdauermodellierung von Aluminiumoxid-basierten Direct Bonded Copper-Substraten." Freiburg : Universität, 2019. http://d-nb.info/1202712762/34.

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Mabille, Loïc. "Vers la compréhension des mécanismes de dégradation et de vieillissement des assemblages photovoltaïques pour des applications sous haute concentration." Phd thesis, Université Paris Sud - Paris XI, 2014. http://tel.archives-ouvertes.fr/tel-00985464.

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Les systèmes photovoltaïques à concentration, ou CPV, reposent sur le principe de la concentration des rayons du soleil sur une cellule photovoltaïque à très haut rendement. Le CPV reste jeune face au photovoltaïque (PV) classique qui accumule plus de 30 ans de retour d'expérience.La pérennisation de cette technologie CPV ne passera que par la démonstration d'une certaine maturité. Aussi, la question de la fiabilité de ces systèmes est plus que jamais d'actualité. Dans ce contexte, le Commissariat à L'Energie Atomique et aux Energies Alternatives (CEA) a répondu à la sollicitation lancée par des fabricants de modules CPV français sur la thématique de la conception et de la fiabilisation de modules CPV par une collaboration de ses différents laboratoires, dont le Laboratoire des Modules Photovoltaïques (LMPV). C'est au sein de ce laboratoire que s'effectuent les travaux de thèse. La diversité des éléments constituant un module CPV a poussé les travaux de thèse à se concentrer sur le coeur fonctionnel des modules : les assemblages CPV. Une première partie des travaux de thèse a consisté à mettre en place les bons outils de caractérisation, en partant parfois d'une feuille blanche. La mesure de caractéristique IV dans l'obscurité, la mesure de réponse spectrale, la tomographie RX ou encore l'électroluminescence sont autant de moyens de caractérisation de cellules multi-jonctions amenés par les travaux de thèse. Les efforts conduits sur l'électroluminescence auront permis l'invention d'une nouvelle technique de caractérisation des interfaces cellule/ substrat des assemblages CPV, concrétisée par le dépôt d'un brevet. Une collaboration entre le laboratoire d'accueil et l'Institut de l'Energie Solaire (IES) à Madrid a permis l'accès à la mesure de performance des assemblages CPV sous éclairement. Tous ces moyens ont rendu possible une caractérisation fine des assemblages CPV et ont permis de s'intéresser à leur robustesse-fiabilité, deuxième partie des travaux de thèse. Deux types d'assemblages CPV ont été étudiés durant les travaux de thèse. Le premier, basé sur un substrat Direct Bonded Copper (DBC) correspond à l'état de l'art et est le plus utilisé dans l'industrie CPV. Le deuxième, en rupture technologique avec l'état de l'art, repose sur un Substrat Métal Isolé (SMI), et a été intégralement développé par le CEA et ses partenaires industriels. L'étude de la robustesse de ces assemblages CPV a été faite par l'emploi de tests de vieillissement accéléré dont la nature est justifiée par le retour d'expérience et la définition des spécifications environnementales. Aucune défaillance n'a été observé sur chacun des types d'assemblage. Les assemblages SMI se comportent comme les assemblages DBC, considérés comme références. Les travaux de thèse offrent donc un premier retour d'expérience propre au laboratoire d'accueil et la mise en place d'une infrastructure complète de caractérisation d'assemblage CPV permet aujourd'hui au CEA d'être un acteur clé du CPV en France.
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Ivanova, Mariya. "Conception et réalisation de fonctions thermiques intégrées dans lesubstrat de composants électroniques de puissance. Apport de lagestion des flux thermiques par des mini et micro caloducs." Phd thesis, 2005. http://tel.archives-ouvertes.fr/tel-00171856.

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Les modules de puissance ont tendance à devenir de plus en plus compacts et ceci engendre une
augmentation significative des densités de flux à évacuer. Un refroidissement plus performant est devenu
impératif. Les caloducs plats présentent un intérêt certain lorsque les applications visées intéressent le
domaine spatial où les critères de masse, d'encombrement et d'isolation électrique sont primordiaux.
L'objectif des travaux de thèse est de réaliser la conception et l'étude des mini et micro caloducs pour le
refroidissement de l'électronique embarquée. Dans un premier temps, des études théoriques et
expérimentales ont été conduites pour concevoir et réaliser de micro caloducs en silicium. La seconde
partie des travaux consiste l'étude de conception, de réalisation et de caractérisation des caloducs intégrés
dans un substrat DBC (Direct Bonded Copper). L'ensemble de ces travaux a montré tout l'apport des
mini et micro caloducs dans la gestion thermique des systèmes électroniques.
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Book chapters on the topic "Direct Bonded Copper (DBC)"

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Visser, Ron, and John B. Snook. "Direct Bond Copper (DBC) Technologies." In Conveyor Belt Furnace Thermal Processing, 123–32. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-69730-7_16.

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Xu, Jinlong, Joyce Zhang, and Ken Kuang. "Influence of Firing Temperature and Atmospheric Conditions on Processing of Direct Bond Copper (DBC)." In Conveyor Belt Furnace Thermal Processing, 133–39. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-69730-7_17.

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Atkins, Peter. "Electric Occurrence: Electrolysis." In Reactions. Oxford University Press, 2011. http://dx.doi.org/10.1093/oso/9780199695126.003.0010.

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Electrolysis makes use of electric currents, a stream of electrons, to bring about chemical change. It puts electricity to work by using it to break or form bonds by forcing electrons on to molecules or sucking electrons out of them. Electrolysis is an application of the redox processes I described in Reaction 5, where I showed that reduction is the gain of electrons and that oxidation is their loss. All that happens in electrolysis is the use of an external supply of electrons from a battery or other direct-current (DC) source to push them on to a species and so bring about its reduction, or the use of the electron-sucking power of a battery to remove them from a species to bring about its oxidation. Electrolysis, in other words, is electrically driven reduction and oxidation. In fact, the process is rather broader than just forcing species to accept or give up electrons because, as I have hinted, molecules might respond to the change in their number of electrons by discarding or rearranging atoms. For instance, when water is electrolysed, the H–O bonds of the H2O molecules are broken and hydrogen and oxygen gases are formed. When an electric current is passed through molten common salt (sodium chloride, NaCl), metallic sodium and gaseous chlorine, Cl2, are formed. Electrolysis is a major technology in the chemical industry, for among other applications it is used to make chlorine, to purify copper, and to extract aluminium. To bring about electrolysis, two metal or graphite rods, the ‘electrodes’, are inserted into the molten substance or solution and connected to a DC electrical supply. The electrons that form the electric current enter the substance through one electrode (the ‘cathode’) and leave it through the other electrode (the ‘anode’). A molecule or ion close to the cathode is forced to collect one or more electrons from that electrode and be reduced. A molecule or ion close to the anode is forced to release them to that electrode and thereby become oxidized. A reasonably simple first example is the purification of copper.
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Conference papers on the topic "Direct Bonded Copper (DBC)"

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Schulz-Harder, J., and K. Exel. "Recent developments of direct bonded copper (DBC) substrates for power modules." In ICEPT 2003. Fifth International Conference on Electronic Packaging Technology. Proceedings. IEEE, 2003. http://dx.doi.org/10.1109/eptc.2003.1298787.

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Schulz-Harder, J. "Advanced DBC (direct bonded copper) substrates for high power and high voltage electronics." In Twenty-Second Annual IEEE Semiconductor Thermal Measurement and Measurement Symposium. IEEE, 2006. http://dx.doi.org/10.1109/stherm.2006.1625233.

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Schulz-Harder, J. "Advanced DBC (direct bonded copper) substrates for high power and high voltage electronics." In 2005 IEEE 11th European Conference on Power Electronics and Applications. IEEE, 2005. http://dx.doi.org/10.1109/epe.2005.219687.

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Narumanchi, Sreekant, Douglas DeVoto, Mark Mihalic, Tim Popp, and Patrick McCluskey. "Thermal Performance and Reliability of Large-Area Bonded Interfaces in Power Electronics Packages." In ASME 2011 International Mechanical Engineering Congress and Exposition. ASMEDC, 2011. http://dx.doi.org/10.1115/imece2011-65399.

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In automotive power electronics packages (e.g., insulated gate bipolar transistor [IGBT] packages), conventional polymeric thermal interface materials (TIMs) such as greases, gels, and phase-change materials pose a bottleneck to heat removal and are also associated with reliability concerns. High thermal performance bonded interfaces have become an industry trend. However, due to mismatches in the coefficient of thermal expansion between materials/layers and the resultant thermomechanical stresses, there could be voids and crack formations in these bonded interfaces as well as delaminations, which pose a problem from a reliability standpoint. These defects manifest themselves in increased thermal resistance in the package, which acts as a bottleneck to heat removal from the package. Hence, the objective of this research is to investigate and improve the thermal performance and reliability of novel bonded interface materials for power electronics packaging applications. Thermal performance and reliability of bonds/joints is presented for bonds based on a thermoplastic (polyamide) adhesive with embedded micron-sized carbon fibers, sintered silver (Ag), and conventional lead (Pb)-based solder materials. These materials form a bond between 50.8 mm × 50.8 mm footprint direct-bond-copper (DBC) substrate and copper (Cu) base plate samples. Samples undergo thermal cycling (−40°C to 150°C) for up to 2,000 cycles as an upper limit. Damage occurrence is monitored every 100 temperature cycles by several non-destructive techniques, including steady-state thermal resistance measurement, acoustic microscopy, and high-voltage potential testing. This yields a consistent story on the thermal performance and reliability of large-area joints under accelerated stress conditions.
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Sinha, K., A. Dasgupta, R. Beaupre, and A. Gowda. "Mechanical Strength of Copper-Silicon Interface of Planar Metallization Power Modules." In ASME 2008 International Mechanical Engineering Congress and Exposition. ASMEDC, 2008. http://dx.doi.org/10.1115/imece2008-67367.

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Planar metallization interconnection is an advanced approach to power module packaging. One advantage of this approach is the ability to interconnect a large number of small devices without wirebonds. The structure consists of multiple layers of dissimilar materials including, copper, kapton, silicon, direct bonded copper (DBC) and solder die attach. When subjected to power or thermal cycling, the difference in thermal expansion of the various layers causes interlaminar stresses and risk of delamination. In particular, potential high risk regions include the interface where plated copper vias make electrical connection to the silicon semiconductor device through thin adhesion and barrier metal films, because of the large CTE difference between them. This study examines the mechanical strength of this copper-silicon interface. The delamination mechanisms of a bimaterial interface can be classified into three types: opening mode, sliding mode, and twisting mode. The first two modes are explored in this study using specially designed experiments. The third mode does not contribute to thermo-mechanical stresses at the copper-silicon interface due to surrounding mechanical constraints and is not addressed. 3D finite element analysis of this via structure is combined with the above experimental results, to qualitatively assess the thermomechanical stress margins in a typical operating environment. Identification and understanding of these failure modes and mechanisms enables to better via designs for reliable operation of planar metallization power modules.
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Mabille, Loïc, Christophe Mangeant, and Mathieu Baudrit. "Development of CPV solar receiver based on insulated metal substrate (IMS): Comparison with receiver based on the direct bonded copper substrate (DBC) - A reliability study." In 8TH INTERNATIONAL CONFERENCE ON CONCENTRATING PHOTOVOLTAIC SYSTEMS: CPV-8. AIP, 2012. http://dx.doi.org/10.1063/1.4753888.

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7

Gurpinar, Emre, Burak Ozpineci, and Shajjad Chowdhury. "Design, Analysis and Comparison of Insulated Metal Substrates for High Power Wide-Bandgap Power Modules." In ASME 2019 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems. American Society of Mechanical Engineers, 2019. http://dx.doi.org/10.1115/ipack2019-6436.

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Abstract In this technical paper, design, analysis and comparison of insulated metal substrates for high power wide-bandgap semiconductor-based power modules is discussed. The paper starts with technical description and discussion of state-of-the-art direct bonded copper substrates with different ceramic insulators such as AlN, Al2O3 and Si3N4. This is followed by introduction of insulated metal substrates, material properties and options on each layer, and design approach for high power applications. The properties of dielectric thickness, and impact on power handling capability of the substrate are discussed. Insulated metal substrate design approach for SiC MOSFET based power modules is presented. Finite element analysis-based characterization and comparison of different designs including steady-state and transient thermal response is presented. The results show that IMS is a promising alternative to DBC in high power modules with improved transient thermal performance. IMS provides flexible building structure with multi-layer stacking options and variable thicknesses at different layers.
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Liu, Lanbing, David Nam, Ben Guo, Rolando Burgos, and Guo-quan Lu. "Evaluation of a Lead Glass for Encapsulating High-Temperature Power Modules for Aerospace Application." In ASME 2019 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems. American Society of Mechanical Engineers, 2019. http://dx.doi.org/10.1115/ipack2019-6393.

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Abstract Encapsulation is a big challenge for packaging high-temperature power modules due to limited choices of insulation materials that can be easily processed and have high reliable working temperature of over 250°C. In this work, we evaluated a lead glass as a potential high-temperature encapsulant for protecting SiC power chips interconnected on a common Al2O3 direct-bond-copper (DBC) substrate. To avoid glass cracking due to its high elastic modulus and mismatched coefficient of thermal expansion (CTE) with that of the DBC substrate, we added a polyimide buffer layer between the glass and the substrate to reduce thermomechanical stresses. We found that the buffer layer was effective in reducing cracks in the glass, but it also lowered the breakdown and partial discharge inception field strengths. Single-chip SiC MOSFET packages were fabricated using the glass encapsulant to demonstrate its feasibility for high-temperature encapsulation.
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Bai, John G., Zach Z. Zhang, Jesus N. Calata, and Guo-Quan Lu. "Low-Temperature Sintering of Nanoscale Silver Pastes for High-Performance and Highly-Reliable Device Interconnection." In ASME 2005 International Mechanical Engineering Congress and Exposition. ASMEDC, 2005. http://dx.doi.org/10.1115/imece2005-79187.

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In this paper, we report our development on making of nanoscale silver pastes and their low-temperature sintering for semiconductor device interconnections. The nanoscale silver pastes were prepared by dispersing 30-nm silver powder under ultrasonic vibration and mechanical agitation in an organic vehicle. Sintering of the silver paste prints at 280°C for 10 minutes resulted in a density of ~80% in the air ambient. Some important properties of the low-temperature sintered silver include ~2.4 W/K-cm for thermal conductivity, ~3.8 × 10−6 Ω-cm for electrical resistivity, and ~9 GPa for the effective elastic modulus. SiC Schottky rectifiers attached to either silver- or gold-coated direct bond copper (DBC) substrates show low forward voltage drops. The silver joints do not contain large voids but rather uniformly distributed microscale pores. Die-shear tests showed that bonding strengths of the silver joints were around 21 MPa on the gold-coated DBC substrates and 38 MPa on the silver-coated DBC substrates, respectively. The latter is comparable to that of reflowed eutectic lead-tin solder joints. Based on the findings in this work, the low-temperature sintering of nanoscale silver pastes is promising to be a high performance and highly-reliable semiconductor device bonding solution for high power packages.
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Hose, Clayton L., Dimeji Ibitayo, Lauren M. Boteler, Jens Weyant, and Bradley Richard. "Integrated Vapor Chamber Heat Spreader for Power Module Applications." In ASME 2017 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems collocated with the ASME 2017 Conference on Information Storage and Processing Systems. American Society of Mechanical Engineers, 2017. http://dx.doi.org/10.1115/ipack2017-74132.

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This work presents a demonstration of a coefficient of thermal expansion (CTE) matched, high heat flux vapor chamber directly integrated onto the backside of a direct bond copper (DBC) substrate to improve heat spreading and reduce thermal resistance of power electronics modules. Typical vapor chambers are designed to operate at heat fluxes > 25 W/cm2 with overall thermal resistances < 0.20 °C/W. Due to the rising demands for increased thermal performance in high power electronics modules, this vapor chamber has been designed as a passive, drop-in replacement for a standard heat spreader. In order to operate with device heat fluxes >500 W/cm2 while maintaining low thermal resistance, a planar vapor chamber is positioned onto the backside of the power substrate, which incorporates a specially designed wick directly beneath the active heat dissipating components to balance liquid return and vapor mass flow. In addition to the high heat flux capability, the vapor chamber is designed to be CTE matched to reduce thermally induced stresses. Modeling results showed effective thermal conductivities of up to 950 W/m-K, which is 5 times better than standard copper-molybdenum (CuMo) heat spreaders. Experimental results show a 43°C reduction in device temperature compared to a standard solid CuMo heat spreader at a heat flux of 520 W/cm2.
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You might also be interested in the extended bibliographies on the topic 'Direct Bonded Copper (DBC)' for particular source types:
Journal articles
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