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1
Vithanage, Kasuni Perera Mampe. "Control of a Dynamic Voltage Restorer to compensate single phase voltage sags." Thesis, KTH, Elektriska energisystem, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-119234.
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Quality of the output power delivered from the utilities has become a major concern of the modern industries for the last decade. These power quality associated problems are voltage sag, surge, flicker, voltage imbalance, interruptions and harmonic problems. These power quality issues may cause problems to the industries ranging from malfunctioning of equipments to complete plant shut downs. Those power quality problems affect the microprocessor based loads, process equipments, sensitive electric components which are highly sensitive to voltage level fluctuations. It has been identified that power quality can be degraded both due to utility side abnormalities as well as the customer side abnormalities. To overcome the problems caused by customer side abnormalities so called custom power devices are connected closer to the load end. One such reliable customer power device used to address the voltage sag, swell problem is the Dynamic Voltage Restorer (DVR). It is a series connected custom power device, which is considered to be a cost effective alternative when compared with other commercially available voltage sag compensation devices. The main function of the DVR is to monitor the load voltage waveform constantly and if any sag or surge occurs, the balance (or excess) voltage is injected to (or absorbed from) the load voltage. To achieve the above functionality a reference voltage waveform has to be created which is similar in magnitude and phase angle to that of the supply voltage. Thereby during any abnormality of the voltage waveform it can be detected by comparing the reference and the actual voltage waveforms. A new control technique to detect and compensate for the single phase voltage sags is designed in this project. The simulation was checked in the EMTDC/PSCAD simulation software and has shown reliable results.
2
Lam, Chi Seng. "Over-operating voltage and stability study of a transformerless-coupled dynamic voltage restorer." Thesis, University of Macau, 2005. http://umaclib3.umac.mo/record=b1445894.
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3
Ardi, Shanai. "A Nonlinear Programming Approach for Dynamic Voltage Scaling." Thesis, Linköping University, Department of Computer and Information Science, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2774.
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<p>Embedded computing systems in portable devices need to be energy efficient, yet they have to deliver adequate performance to the often computationally expensive applications. Dynamic voltage scaling is a technique that offers a speed versus power trade-off, allowing the application to achieve considerable energy savings and, at the same time, to meet the imposed time constraints.</p><p>In this thesis, we explore the possibility of using optimal voltage scaling algorithms based on nonlinear programming at the system level, for a complex multiprocessor scheduling problem. We present an optimization approach to the modeled nonlinear programming formulation of the continuous voltage selection problem excluding the consideration of transition overheads. Our approach achieves the same optimal results as the previous work using the same model, but due to its speed, can be efficiently used for design space exploration. We validate our results using numerous automatically generated benchmarks.</p>
4
FERREIRA, LUIS FERNANDO. "STATIC AND DYNAMIC SIMULATION FOR GENERATOR VOLTAGE CONTROL." PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO, 2006. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=9454@1.
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CONSELHO NACIONAL DE DESENVOLVIMENTO CIENTÍFICO E TECNOLÓGICO<br>O problema tratado nesta dissertação é a relação oposta
entre a tensão de
excitação de geradores e compensadores síncronos e a tensão
controlada,
quando o sistema de transmissão da área encontra-se muito
carregado. Neste
caso, a capacidade nominal de um gerador / compensador não
seria útil para
manter a tensão controlada. Devido à relação oposta, uma
maior excitação da
máquina iria abaixar a tensão controlada. O controle
automático iria continuar
agindo, abaixando ainda mais a tensão. Este mecanismo pode
levar o sistema
ao colapso e foi verificado em ponto de operação real do
sistema brasileiro. Esse
fenômeno ocorre quando a injeção de potência na rede de
transmissão ou
distribuição é elevada. Com o advento da geração
distribuída, co-geração e
produtores independentes, usualmente conectados à rede
existente em níveis de
tensão mais baixas, têm-se observado ocorrências do
fenômeno. O objetivo do
trabalho é então entender melhor as situações operativas
reais que levam à
ocorrência do fenômeno, principalmente quando existem
vários equipamentos de
controle de tensão ao redor do gerador em análise. A
abordagem do problema
baseou-se na verificação do comportamento do gerador /
compensador como
dispositivo de controle de tensão, no domínio do tempo e em
regime
permanente. Avaliaram-se as ações de controle do mesmo a
partir de sete tipos
de análise distintas para pontos de operação na região
normal e anormal da
curva SV. A real existência do fenômeno foi comprovada
através de algumas
destas análises. Porém, conclui-se que nem todas as formas
de análise no
domínio do tempo fazem uma avaliação completa do fenômeno.
Dentre essas,
estão a análise dinâmica agregada e a análise dinâmica
agregada sob influência
dos equipamentos de controle de tensão, que para pontos de
operação na
região anormal da curva SV não responderam em concordância
com os outros
tipos de análise.<br>The problem addressed in this research is the opposite
relationship
between the , synchronous generator / compensator
excitation voltage and the
controlled voltage when nearby network is heavily loaded.
In this situation, the
nominal capacity of a generator / compensator would not
keep the voltage
controlled. Due to the opposite relationship, the higher
the excitation voltage the
lower is the controlled voltage. So, the automatic control
would continue acting
lowering the voltage. This mechanism, verified in a real
operational point of the
Brazilian Electric System, can lead the system to collapse.
This phenomenon
occurs when the power injection into the network is high.
It is prone to occur in
the new scenario of distributed generation connected to
already existing low
voltage networks. The objective of this work is to
understand the actual operative
situations that lead to the occurrence of the phenomenon,
mainly when there are
several voltage control devices nearby the generator. The
analysis of the problem
was based on the verification of the generator behaviour as
a voltage control
device, in time domain simulation and in steady state. The
control actions were
evaluated from seven different ways for operating points in
the normal and the
abnormal region of the SV curve. The actual existence of
the phenomenon was
proven through some of these analyses. However, some of the
time domain
simulations did not evaluated the phenomenon completely.
Among them, the
aggregated dynamic analysis and the aggregated dynamic
analysis under
influence of other voltage control devices have not got the
expected
responses for the abnormal region of the SV curve, in
comparison with other
analysis.
5
Haskell, Timothy David. "Modeling and Analysis of a Dynamic Voltage Regulator." DigitalCommons@CalPoly, 2013. https://digitalcommons.calpoly.edu/theses/987.
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Increased government funding and incentives in recent years has led to an increase in the number of grid-tied renewable energy sources as their economic benefits become more renowned. Unfortunately, the outputs of these renewable resources are often highly variable, resulting in undesirable voltage disruptions that are harmful to sensitive loads. In addition to the energy variability of renewable energy sources, random voltage sags, swells and disruptions are already a major issue in power systems. Recent advances in power electronic devices have provided a platform for new solutions to the voltage support problem in power systems. One promising solution is the Dynamic Voltage Regulator (DVR), a series compensating device used to protect a sensitive load that is connected downstream from voltage sag or swell. For this thesis, the design, modeling, and analysis of a DVR system were performed using PSCAD software. Results from simulation demonstrate the DVR’s effectiveness in protecting a sensitive load from load and source side voltage disturbances as well as regulate the load bus voltage to its rated value.
6
PONTES, BRUNO DO CARMO. "STATIC AND DYNAMIC SIMULATION FOR THE VOLTAGE CONTROL BY LTC AND STATIC VOLTAGE COMPENSATOR." PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO, 2008. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=13043@1.
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PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO<br>O tema abordado neste trabalho é a observação e análise, em
regime permanente e dinâmico, da ocorrência de um fenômeno
que já foi observado em condições reais de operação do
sistema elétrico brasileiro, que é a relação oposta à usual
entre a grandeza controlada e a grandeza controladora.
Nestes caso, mesmo que haja margem de recursos para manter
a tensão controlada, ela não é útil. Por exemplo, uma
diminuição na relação de transformação num transformador de
tapes variáveis, com intuito de aumentar a tensão
controlada acaba por reduzí-la, até que os limites de troca
de tapes sejam atingidos ou o sistema entre em colapso.
Para demonstrar a existência do problema, foram executadas
simulações, em regime permanente e dinâmico, e verificado
o efeito do controle de tensão por um transformador com
tapes variáveis e por compensadores estáticos de potência
reativa, situações corriqueiras de um sistema de
potência. Foram demonstradas situações em que foi possível
verificar a mudança da região de operação. Para a análise
em regime permanente foi utilizado um algoritmo de
fluxo de carga, e para a análise dinâmica, uma simulação no
domínio do tempo. Nas simulações envolvendo transformadores
de tapes variáveis, foi possível verificar a existência o
efeito reverso da ação de controle de tensão nas análises
estática e dinâmica. Nas simulações utilizando o
compensador estático de potência reativa houve
divergência entre os resultados das duas análises.<br>This work presents the observation and analysis, in steady
state and dynamic performance, of the phenomenon already
observed in real operation conditions of the
Brazilian Electric System, which is the opposite
relationship between the controlled value
and the target value. In this case, even if the resources
have margin to keep the voltage controlled, this is not
useful. For example, the reduction in the turn ratio on
load tap changer transformer, with the aim of increase in
the controlled voltage, result in its reduction, until the
tap changer limit is reached or the system is led to the
collapse. To demonstrate the existence of this problem,
steady state and dynamic performance simulations were done,
and the voltage control effect by on load tap changer
transformer and static var compensator , current situations
in a power system. Several situations where is possible
verify the operation region changing was demonstrated. For
steady state analysis was used a load flow algorithm and,
for the dynamic analysis, a time domain simulation. In the
simulations with on load tap changer transformer, it was
possible to verify the existence of the reverse effect of
the voltage control action in the static and dynamic
analysis. In the simulations using static var compensator, a
divergence was found between the results in the two
analyses.
7
Lim, Yun Seng. "Probabilistic assessments of voltage-sag occurrence and the evaluation of the dynamic voltage restorer capability." Thesis, University of Manchester, 2002. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.488045.
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Roa-Sepulveda, C. A. "Dynamic simulation of voltage instability phenomena in power systems." Thesis, Imperial College London, 1992. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.390456.
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9
Giuliano, David (David Michael). "Miniaturized, low-voltage power converters with fast dynamic response." Thesis, Massachusetts Institute of Technology, 2013. http://hdl.handle.net/1721.1/84886.
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Thesis (Ph. D.)--Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2013.<br>Cataloged from PDF version of thesis.<br>Includes bibliographical references (pages 216-224).<br>This thesis introduces a two-stage architecture that combines the strengths of switched capacitor (SC) techniques (small size, light-load performance) with the high efficiency and regulation capability of switch-mode power converters. The resulting designs have a superior efficient-power density trade-off over traditional designs. These power converters can provide numerous lowvoltage outputs over a wide input voltage range with a very fast dynamic response, which are ideal for powering logic devices in the mobile and high-performance computing markets. Both design and fabrication considerations for power converters using this architecture are addressed. The results are demonstrated in a 2.4 W dc-dc converter implemented in a 180 nm CMOS IC process and co-packaged with its passive components for high-performance. The converter operates from an input voltage of 2.7 V to 5.5 V with an output voltage of </= 1.2 V, and achieves a 2210 W/inch³ power density with >/= 80% efficiency.<br>by David Giuliano.<br>Ph.D.
10
Sinangil, Mahmut E. (Mahmut Ersin). "Ultra-dynamic voltage scalable (U-DVS) SRAM design considerations." Thesis, Massachusetts Institute of Technology, 2008. http://hdl.handle.net/1721.1/44728.
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Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.<br>Includes bibliographical references (leaves 73-78).<br>With the continuous scaling down of transistor feature sizes, the semiconductor industry faces new challenges. One of these challenges is the incessant increase of power consumption in integrated circuits. This problem has motivated the industry and academia to pay significant attention to low-power circuit design for the past two decades. Operating digital circuits at lower voltage levels was shown to increase energy efficiency and lower power consumption. Being an integral part of the digital systems, Static Random Access Memories (SRAMs), dominate the power consumption and area of modern integrated circuits. Consequently, designing low-power high density SRAMs operational at low voltage levels is an important research problem. This thesis focuses on and makes several contributions to low-power SRAM design. The trade-offs and potential overheads associated with designing SRAMs for a very large voltage range are analyzed. An 8T SRAM cell is designed and optimized for both sub-threshold and above-threshold operation. Hardware reconfigurability is proposed as a solution to power and area overheads due to peripheral assist circuitry which are necessary for low voltage operation. A 64kbit SRAM has been designed in 65nm CMOS process and the fabricated chip has been tested, demonstrating operation at power supply levels from 0.25V to 1.2V. This is the largest operating voltage range reported in 65nm semiconductor technology node. Additionally, another low voltage SRAM has been designed for the on-chip caches of a low-power H.264 video decoder. Power and performance models of the memories have been developed along with a configurable interface circuit. This custom memory implemented with the low-power architecture of the decoder provides nearly 10X power savings.<br>by Mahmut E. Sinangil.<br>S.M.
11
Hanington, Gary Joseph. "Dynamic supply voltage RF power amplifiers for wireless applications /." Diss., Connect to a 24 p. preview or request complete full text in PDF format. Access restricted to UC campuses, 1999. http://wwwlib.umi.com/cr/ucsd/fullcit?p9945782.
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12
Woodworth, Ronald Keith. "THE DYNAMIC THERMAL ANALYSIS OF A VOLTAGE REGULATOR CIRCUIT." Thesis, The University of Arizona, 1985. http://hdl.handle.net/10150/275365.
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13
Llanos, Roger Vicente Caputo. "Voltage scaling interfaces for multi-voltage digital systems." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2015. http://hdl.handle.net/10183/159617.
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Os Sistemas Digitais de Múltiplas Tensões exploram o conceito de dimensionamento da tensão de alimentação através da aplicação de diferentes fontes para regiões específicas do chip. Cada uma destas regiões pertence a um domínio de energia e pode ter duas ou mais configurações de voltagens. Independentemente dos distintos níveis de energia em diferentes domínios de tensão, os blocos devem processar sinais com níveis lógicos coerentes. Nestes sistemas, os Conversores de Nível (LS do inglês Level Shifters) são componentes essenciais que atuam como interfaces de escalonamento da tensão entre domínios de energia, garantindo a correta transmissão dos sinais. Com a apropriada interface de escalonamento de tensão e sua correta implementação, pode-se evitar o consumo excessivo de potência dinâmica e estática. Portanto, a concepção e implementação de conversores de nível deve ser um processo consciente que garanta o menor sobrecusto no tamanho, consumo de energia, e tempo de atraso. Neste trabalho estudam-se as principais características das interfaces de escalonamento de tensão e se introduce um conversor de tensão com eficiência energética e área reduzida, adequado para a conversão de baixo a alto nível. Apresentam-se os conversores de nível com o melhor desempenho encontrados na literatura, os quais são categorizados em dois principais grupos: Dois trilhos (Dual-rail) e Único trilho (Single-rail), de acordo ao número de linhas de alimentação necessárias. O circuito proposto foi comparado com a topologia tradicional de cada grupo, o Differential Cascode Voltage Switch (DCVS) e o conversor de Puri respectivamente. Simulações na tecnologia CMOS 130nm da IBMTM mostram que a topologia proposta requer até 93,79% menos energia em determinadas condições. Esta apresentou 88,03% menor atraso e uma redução de 39,6% no Produto Potência-Atraso (PDP), quando comparada com a topologia DCVS. Em contraste com o conversor Puri, obteve-se uma redução de 32,08% no consumo de energia, 13,26% diminuição no atraso e 15,37% inferior PDP. Além disso, o conversor de nível proposto foi o único capaz de trabalhar a 35% da tensão nominal de alimentação.<br>Multiple Voltage Digital Systems exploit the concept of voltage scaling by applying different supplies to particular regions of the chip. Each of those regions belongs to a power domain and may have two or more supply voltage configurations. Regardless of distinct energy levels on different power domains, the blocks shall process signals with coherent logic levels. In these systems, the Level Shifters (LS) are essential components that act as voltage scaling interfaces between power domains, guaranteeing the correct signal transmission. With the appropriate voltage scaling interface and its proper implementation, we can avoid excessive static and dynamic power consumption. Therefore, the design and implementation of level shifters should be a conscientious process and must guarantee the lowest overhead in size, energy consumption, and delay time. In this work, we study the main characteristics of voltage scaling interfaces and introduce an energy-efficient level shifter with reduced area, and suitable for low-to-high level conversion. We present the level shifters with the best performance that we found in the literature and categorize them into two main groups: Dual-rail and Single-rail, according to the number of power rails required. The proposed circuit was compared to the traditional topology of each group, Differential Cascode Voltage Switch (DCVS) and Puri’s level shifter respectively. Simulations on an IBMTM 130nm CMOS technology show that the proposed topology requires up to 93.79% less energy under certain conditions. It presented 88.03% smaller delay and 39.6% less Power-Delay Product (PDP) when compared to the DCVS topology. In contrast with the Puri’s level shifter, we obtained a reduction of 32.08% in power consumption, 13.26% smaller delay and 15.37% lower PDP. Besides, our level shifter was the only one capable of working at 35% of the nominal supply voltage.
14
Oguz, Gulcin. "Performance Of A Dynamic Voltage Restorer For A Practical Situation." Master's thesis, METU, 2004. http://etd.lib.metu.edu.tr/upload/12605617/index.pdf.
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Among most severe power system disturbances those degrading power quality are voltage sags and transient interruptions. Even voltage sags lasting only a few tens of
milliseconds are enough to bring entire production lines to standstill, causing considerable economic damage as well as endangering the production equipment. Therefore necessary measures have to be taken to protect sensitive loads which are susceptible to these voltage disturbances. Among the solution candidates such as, Uninterruptible Power Supplies, Motor-Generator Sets, etc, Dynamic Voltage Restorer (DVR) which is an effective custom power device has been proposed to mitigate such bus voltage sags on sensitive loads with its excellent dynamic performance.
In this study, load side connected shunt converter topology was chosen for the implementation of DVR. The performance DVR was tried to be improved by improving the control strategy used. Super Film located in Gaziantep which is one of
the SANKO subsidiary company was chosen to simulate the operation of DVR as actual case of Turkish industry. All the simulations in this study were carried on PSCAD/EMTDC Software.
15
Wang, Chau-Shing. "Dynamic phase controller for flicker mitigation /." free to MU campus, to others for purchase, 2003. http://wwwlib.umi.com/cr/mo/fullcit?p3091976.
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Jin, Donghyun. "Dynamic ON-resistance in high voltage GaN field-effect-transistors." Thesis, Massachusetts Institute of Technology, 2014. http://hdl.handle.net/1721.1/91108.
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Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014.<br>Cataloged from PDF version of thesis.<br>Includes bibliographical references.<br>Recently, the development of energy efficient electrical power management systems has received considerable interest due to its potential to realize significant energy savings for the world. With current Si-based power electronics system being matured, GaN Field-Effect-Transistors have emerged as a disruptive technology with great potential that arises from the outstanding material properties of GaN. However, in spite of great progress in GaN device fabrication, electrical reliability and a number of unique anomalies of GaN remain key challenges that prevent the wide deployment of this technology. In particular, the dynamic ON-resistance (RON), in which the RON of the transistor remains high for a certain period of time after a high-voltage OFF-ON switching event, is a critical concern. This phenomenon greatly affects the efficiency of electrical power management circuits based on GaN power transistors. This thesis investigates in depth this important issue. Firstly, we have developed a new dynamic RON measurement methodology which can observe dynamic RON transients after OFF-to-ON switching events over many decades in time. We have experimentally demonstrated this technique on GaN-on-SiC high-voltage HEMTs (High-Electron- Mobility-Transistors). The possible origin of the mechanisms responsible for dynamic RON in these devices has been postulated. Through our new technique, the impact of high-power stress on dynamic RON has been investigated as well. The results emphasize the importance of studying dynamic RON characteristics over very short time scale when conducting reliability studies of GaN transistors. Secondly, high-voltage GaN-on-Si MIS (Metal-Insulator-Semiconductor) HEMTs designed for > 600 V switching operation have been investigated. Excessive electron trapping leading to total current collapse has been observed. We have carried out an extensive characterization of this phenomenon and we have proposed "Zener trapping" as the responsible mechanism. In this view, electron trapping takes place inside the AlGaN/GaN heterostructure through a tunneling process under high-electric-field. The understanding derived here suggests that this effect can be mitigated through attention to defect control during epitaxial growth and appropriate design of the field plate structure of the device. Our findings in this thesis provide a path to achieve high performance GaN power transistors with minimum dynamic RON effects.<br>by Donghyun Jin.<br>Ph. D.
17
Herbst, Steven (Steven G. ). "A low-noise bandgap voltage reference employing dynamic element matching." Thesis, Massachusetts Institute of Technology, 2011. http://hdl.handle.net/1721.1/77071.
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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.<br>Cataloged from PDF version of thesis.<br>Includes bibliographical references (p. 109).<br>Bandgap voltages references are widely used in IC design, but are sensitive to low-frequency noise and component mismatch. This thesis describes the design and testing of a new IC voltage reference that targets these issues through three dynamic element matching (DEM) subsystems. The first is a chopper OTA, and the second two are component rotation schemes: one to exchange the positions of two critical resistors, and the second to cycle through all BJTs, periodically selecting each to participate as the "1" transistor of the N:1 bandgap ratio. Practical designs that address the various switching issues typically associated with DEM, such as glitch and clock drift, are described. Analytic expressions for the effects of noise and mismatch throughout the bandgap reference are derived, along with expressions for calculating the improvement that can be achieved by DEM. A test chip was implemented in a 0.25[mu]m BiCMOS process; with its three DEM subsystems enabled it is shown to achieve a 20x 1/f noise improvement and a 34x mismatch error improvement.<br>by Steven Herbst.<br>M.Eng.
18
SOUZA, FABIO LUIZ DE. "DYNAMIC AGGREGATION OF POWER SYSTEM STABILIZER MODELS APPLIED IN VOLTAGE REGULATORS AND CALCULATION OF DYNAMIC EQUIVALENTS." PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO, 1999. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=7314@1.
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COORDENAÇÃO DE APERFEIÇOAMENTO DO PESSOAL DE ENSINO SUPERIOR<br>O cálculo de equivalentes dinâmicos baseados em coerência
apresenta três etapas básicas: a identificação de
geradores coerentes, a redução estática da rede e a
agregação dinâmica dos modelos das unidades geradoras
coerentes.
Esta dissertação trata do problema da agregação dinâmica
de modelos de estabilizadores aplicados em reguladores de
tensão de geradores coerentes, visando o cálculo de
equivalentes dinâmicos precisos para estudos de
estabilidade transitória de sistemas de energia elétrica.
A determinação de um critério de escolha do melhor modelo
equivalente, para uma dada composição de modelos de
estabilizadores num grupo de geradores coerentes, é o
objetivo principal.
O ajuste dos parâmetros dos modelos equivalentes de
estabilizadores dos grupos coerentes é realizado, a partir
das respostas em freqüência dos modelos individuais de
cada grupo, utilizando-se o método de Levenberg-Marquardt,
o que caracteriza um problema de otimização multivariável.
O desempenho dinâmico dos equivalentes calculados com a
metodologia adotada é avaliado em um sistema teste.<br>The calculation of coherency-based dynamic equivalents has
three main steps: the identification of coherent
generators, the network reduction and the dynamic
aggregation of the coherent generating unit models.
This dissertation deals with the problem of dynamic
aggregation of power system stabilizer models to calculate
coherency-based dynamic equivalents for power system
transient stability studies. The determination of a
criteria to choose the best equivalent model for a given
composition of power system stabilizer models in a group
of coherent generators is the main objective.
The parameters of the power system stabilizer equivalent
models for each group of coherent generating units are
adjusted to match the frequency response of the individual
models. This multivariable optimization problem is solved
using the Levenberg-Marquardt method.
The dynamic performance of the equivalents is evaluated in
a test system.
19
Beeravolu, Nagendrakumar. "Predicting Voltage Abnormality Using Power System Dynamics." ScholarWorks@UNO, 2013. http://scholarworks.uno.edu/td/1722.
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The purpose of this dissertation is to analyze dynamic behavior of a stressed power system and to correlate the dynamic responses to a near future system voltage abnormality. It is postulated that the dynamic response of a stressed power system in a short period of time-in seconds-contains sufficient information that will allow prediction of voltage abnormality in future time-in minutes. The PSSE dynamics simulator is used to study the dynamics of the IEEE 39 Bus equivalent test system. To correlate dynamic behavior to system voltage abnormality, this research utilizes two different pattern recognition methods one being algorithmic method known as Regularized Least Square Classification (RLSC) pattern recognition and the other being a statistical method known as Classification and Regression Tree (CART). Dynamics of a stressed test system is captured by introducing numerous contingencies, by driving the system to the point of abnormal operation, and by identifying those simulated contingencies that cause system voltage abnormality.
Normal and abnormal voltage cases are simulated using the PSSE dynamics tool. The results of simulation from PSSE dynamics will be divided into two sets of training and testing set data. Each of the two sets of data includes both normal and abnormal voltage cases that are used for development and validation of a discriminator. This research uses stressed system simulation results to train two RLSC and CART pattern recognition models using the training set obtained from the dynamic simulation data. After the training phase, the trained pattern recognition algorithm will be validated using the remainder of data obtained from simulation of the stressed system. This process will determine the prominent features and parameters in the process of classification of normal and abnormal voltage cases from dynamic simulation data.
Each of the algorithmic or statistical pattern recognition methods have their advantages and disadvantages and it is the intention of this dissertation to use them only to find correlations between the dynamic behavior of a stressed system in response to severe contingencies and the outcome of the system behavior in a few minutes into the future.
20
Zhu, Yifan. "Dynamic Voltage Scaling with Feedback Scheduling for Real-time Embedded Systems." NCSU, 2005. http://www.lib.ncsu.edu/theses/available/etd-08022005-230539/.
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Dynamic voltage scaling (DVS) is a promising method to reduce the power consumption of CMOS-based embedded processors. However, pure DVS techniques do not perform well for dynamic systems where the execution times of different jobs vary significantly. A novel DVS scheme with feedback control mechanisms for hard real-time systems is proposed in this work. It produces energy-efficient schedules for both static and dynamic workloads. Task-splitting, slack-passing and preemption-handling schemes are proposed to aggressively reduce the speed of each task. Different feedback control structures are integrated into the DVS algorithm to make it adaptable to workload variations. This scheme relies strictly on operating system support. It is evaluated in simulation as well as on an embedded platform. For given task sets, simulation experiments demonstrate the benefits of this scheme with savings of up to 29\% in energy over previous work. This scheme exhibits up to 24\% additional energy savings over other DVS algorithms on the embedded platform. The feedback-based DVS scheme is further extended to be leakage aware, which considers not only dynamic but also static power consumption caused by leakage current in circuits. A combined DVS, delay and sleeping scheme is proposed for architectures where static power exceeds dynamic power in some cases. DVS is used when dynamic power dominates the total power consumption, while a sleep mode is entered when static power becomes dominant. The extended algorithm, DVSleak, shows 30\% additional energy savings on average over a pure DVS algorithm in the simulation experiment.
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Wang, Chenxing. "DYNAMIC VOLTAGE SCALING FOR PRIORITY-DRIVEN SCHEDULED DISTRIBUTED REAL-TIME SYSTEMS." UKnowledge, 2007. http://uknowledge.uky.edu/gradschool_diss/571.
Full textAbstract:
Energy consumption is increasingly affecting battery life and cooling for real- time systems. Dynamic Voltage and frequency Scaling (DVS) has been shown to substantially reduce the energy consumption of uniprocessor real-time systems. It is worthwhile to extend the efficient DVS scheduling algorithms to distributed system with dependent tasks. The dissertation describes how to extend several effective uniprocessor DVS schedul- ing algorithms to distributed system with dependent task set. Task assignment and deadline assignment heuristics are proposed and compared with existing heuristics concerning energy-conserving performance. An admission test and a deadline com- putation algorithm are presented in the dissertation for dynamic task set to accept the arriving task in a DVS scheduled real-time system. Simulations show that an effective distributed DVS scheduling is capable of saving as much as 89% of energy that would be consumed without using DVS scheduling. It is also shown that task assignment and deadline assignment affect the energy- conserving performance of DVS scheduling algorithms. For some aggressive DVS scheduling algorithms, however, the effect of task assignment is negligible. The ad- mission test accept over 80% of tasks that can be accepted by a non-DVS scheduler to a DVS scheduled real-time system.
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SANTOS, SABRINA DA SILVA. "DYNAMIC AGGREGATION OF VOLTAGE REGULATORS: ANATEM MODELS 19, 20 AND 21." PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO, 2005. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=7115@1.
Full textAbstract:
COORDENAÇÃO DE APERFEIÇOAMENTO DO PESSOAL DE ENSINO SUPERIOR<br>A agregação dinâmica de reguladores de tensão de unidades
geradoras
coerentes, visando o cálculo de equivalentes dinâmicos
para estudos de
estabilidade transitória de sistemas de energia elétrica,
é o objeto desta
dissertação. A metodologia empregada para o cálculo de
equivalentes dinâmicos
apresenta três etapas: a identificação de geradores
coerentes, a redução estática da
rede e a agregação dinâmica dos modelos das unidades
geradoras coerentes. A
agregação dinâmica de um grupo de geradores coerentes
consiste em representar
este grupo através de uma ou mais unidades geradoras
equivalentes. As unidades
geradoras coerentes podem ser representadas por diferentes
modelos de máquina
síncrona, regulador de tensão, estabilizador, turbina e
regulador de velocidade.
Haverá, então, um modelo equivalente para cada componente
da unidade
geradora. Os parâmetros lineares de cada modelo
equivalente são ajustados
numericamente através do método de Levenberg-Marquardt
para resolver o
problema de otimização multivariável. O objetivo principal
é a determinação do
melhor modelo equivalente para uma dada composição de
modelos de reguladores
de tensão num grupo de unidades geradoras coerentes. O
sistema teste New
England é utilizado para avaliar a metodologia empregada,
observando-se os
desempenhos dinâmicos dos equivalentes propostos. Serão
considerados modelos
do banco de dados de estabilidade do sistema elétrico
brasileiro.<br>This dissertation deals with the problem of dynamic
aggregation of voltage
regulators of coherent generating units to calculate
dynamic equivalents for power
system transient stability studies. The methodology used
to calculate coherencybased
dynamic equivalents has three basic steps: the
identification of the coherent
groups of generating units, the static reduction of the
external network and the
dynamic aggregation of coherent generating unit models.
The dynamic
aggregation of a group of coherent generating units
consists of the representation
of this group by one or more equivalent generating units.
The coherent generating
units can be represented by different models of
synchronous machine, voltage
regulator, stabilizer, turbine and speed governor. There
will be an equivalent
model for each component of the generating unit. The
linear parameters of the
equivalent models are numerically adjusted using the
Levenberg-Marquardt
method in order to solve the multivariable optimization
problem. The main
objective is the determination of the best equivalent
model for a given
composition of voltage regulator models in a group of
coherent generating units.
The New England system is used to evaluate the dynamic
performance of the
equivalents. The voltage regulator models considered in
this work are in the
Brazilian electrical system stability database. The swing
curves of the internal
system generators obtained with the equivalent system are
compared with those
obtained with the simulation of the complete system.
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TEIXEIRA, MARCOS VINICIUS PIMENTEL. "STATIC AND DYNAMIC ANALYSES OF CONTROL DEVICE EFFECTS ON VOLTAGE STABILITY." PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO, 2016. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=27705@1.
Full textAbstract:
PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO<br>COORDENAÇÃO DE APERFEIÇOAMENTO DO PESSOAL DE ENSINO SUPERIOR<br>CONSELHO NACIONAL DE DESENVOLVIMENTO CIENTÍFICO E TECNOLÓGICO<br>PROGRAMA DE EXCELENCIA ACADEMICA<br>O problema da estabilidade de tensão está associado à máxima injeção de potência em barras da rede e à possibilidade do controle de tensão ter o efeito oposto ao esperado. Alguns casos reais de blecaute, caracterizados por afundamento de tensão, sugerem que os procedimentos normais para o controle de tensão do sistema podem agravar ainda mais o problema. Isso ocorreria porque, em determinadas situações especiais, caracterizadas pela relação inversa entre as variáveis de controle dos equipamentos, as ações de controle teriam o efeito oposto ao esperado da sua lógica de projeto. Esta afirmação é baseada no critério de estabilidade de tensão a pequenas perturbações que diz: Dada uma condição de operação para cada barra no sistema, o sistema é estável caso o módulo da tensão na barra aumente à medida que a injeção de potência reativa nessa mesma barra é aumentada. Um sistema é instável se, para pelo menos uma barra no sistema, o módulo de tensão da barra diminui conforme a injeção de potência reativa nessa barra é aumentada. Adicionalmente, o critério da curva diz: Uma vez que todos os dispositivos de controle de potência reativa são projetados para funcionar satisfatoriamente quando um aumento em é acompanhado por um aumento em , a operação do lado direito das curvas é estável e do lado esquerdo é instável. Além disso, a parte inferior da curva representa o limite de estabilidade e define o valor de potência reativa mínimo para uma operação estável. Esse efeito não esperado do controle poderia causar tensões excessivamente baixas (ou altas) para a operação normal do sistema e provocar consequências indesejáveis. Visto isso, esse trabalho tem como principal objetivo investigar, no domínio do tempo, o efeito das ações de controle de tensão em pontos onde as variáveis de controle dos equipamentos apresentam relação inversa e, assim, validar (ou não) os resultados estimados pelos métodos baseados em
análise estática como, por exemplo, os critérios de estabilidade de tensão a pequenas perturbações e da curva . As simulações dinâmicas mostram que a análise estática não pode ser aplicada a todos os tipos de equipamentos que controlam a tensão. Outra possível causa do problema da estabilidade de tensão está relacionada à atuação de limitadores de sobre-excitação de máquinas síncronas e, por esta razão, é proposto um método para identificar as máquinas propensas a atingir o limite de sobre-excitação em estudos de regime permanente. No entanto, a atuação desses limitadores, na grande maioria das vezes, não apresenta efeito prejudicial na estabilidade do sistema e, por isto, também é proposto um critério que aponta a iminente perda da estabilidade devido à atuação dos limitadores. Este critério pode ser útil na concepção de esquemas automáticos de rejeição de carga, a fim de impedir a perda de estabilidade, e ele também pode ser utilizado em avaliações de segurança online para alertar sobre possíveis riscos de instabilidade e, consequentemente, para indicar ações preventivas.<br>The voltage stability problem is associated with the maximum power injection in the network and the possibility of the voltage control having the opposite effect. Some real cases of blackouts characterized by voltage decays suggest that normal procedures for automatic voltage control can adversely affect the voltage level in the system. This may have been because in special situations, characterized by an inverse relationship between the controls variables in the devices used to control the system voltage, the automatic voltage control can have the opposite effect to that expected based on the design logic. This statement is based on the criterion for small-disturbance voltage stability: At a given operating condition for every bus in the system, a system is voltage-stable if the bus voltage magnitude increases as the reactive power injection at the same bus is increased. A system is voltage-unstable if, for at least one bus in the system, the bus voltage magnitude decreases as the reactive power injection at the same bus is increased. In addition, it is based on the curve criterion: Since all reactive power control devices are designed to operate satisfactorily when an increase in is accompanied by an increase in , operation on the right side of the is stable and on the left side is unstable. Besides, the bottom of the curve represents the stability limit and defines the minimum reactive power requirement for stable operation. The unexpected control effect could produce excessively low (or high) voltages for normal system operation and cause undesirable consequences. In light of this, the present work seeks to analyze in the time domain the effects of device control actions starting from points where the control variables are inversely related and validated (or not) the results estimated by methods based on static analysis, for example, the criterion for small-disturbance voltage stability and curve. Dynamic simulations show that static analysis cannot be applied to
all types of devices used to control the voltage. Another possible cause of the voltage stability problem is the action of overexcitation limiters. For this reason, it is proposed a way for identifying the machines that have a chance to hit the overexcitation limit in static analysis studies. However, in most cases, the action of these limiters has no detrimental effect on system stability and, therefore, it is also proposed a criterion that identifies the imminent loss of stability due to these limiters. This criterion may be useful in design of load shedding schemes, in order to prevent loss of stability, and can be used for online security assessment, warning for instability and indicating preventive actions.
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Mtanga, Jameson Joseph. "Dynamic modeling and vibration control of high-voltage overhead transmission lines." Master's thesis, University of Cape Town, 2008. http://hdl.handle.net/11427/5022.
Full textAbstract:
Includes abstract.<br>Includes bibliographical references (leaves 140-144).<br>The problem of the dynamic behavior of overhead power transmission lines under wind and other excitations is an important one, since it allows an optimal design and positioning of vibration dampers for the cables. Excessive sway and oscillation of power lines need to be avoided, as they can lead to damage of the lines and power interruptions. The relatively high flexibility of the cables, coupled with the large spans and large sags involved, make the dynamic response of the system highly nonlinear. In this study, we numerically investigate the damped free-vibration response of systems of cables of particularly large spans (120, 200 and 400m).
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Regulski, Pawel Adam. "Estimation of parameters of dynamic load models for voltage stability studies." Thesis, University of Manchester, 2012. https://www.research.manchester.ac.uk/portal/en/theses/estimation-of-parameters-of-dynamic-load-models-for-voltage-stabily-studies(db6176e0-c7df-4ad6-83f7-5772eb9f8421).html.
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Current environmental and economic trends have forced grid operators to maximize the utilization of the existing assets, which is causing systems to be operated closer to their stability limits than ever before. This requires, among other things, better knowledge and modelling of the existing power system equipment to increase the accuracy of the assessment of current stability margins.This research investigates the possibility of improving the quality of load modeling. The thesis presents a review of the traditional methods for estimation of load model parameters and proposes to use Improved Particle Swarm Optimization. Different algorithms are tested and compared in terms of accuracy, reliability and CPU requirements using computer simulations and real-data captured in a power system.Estimation of frequency and power components has also been studied in this thesis. A review of the existing methods has been provided and the use of an Unscented Kalman Filter proposed. This nonlinear recursive algorithm has been thoroughly tested and compared against selected traditional techniques in a number of experiments involving computer-generated signals as well as measurements obtained in laboratory conditions.
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Hong, lue Ik. "Dynamic voltage scaling algorithms for soft and hard real-time system." Thesis, Curtin University, 2012. http://hdl.handle.net/20.500.11937/940.
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Dynamic Voltage Scaling (DVS) has not been investigated completely for further minimizing the energy consumption of microprocessor and prolonging the operational life of real-time systems. In this dissertation, the workload prediction based DVS and the offline convex optimization based DVS for soft and hard real-time systems are investigated, respectively. The proposed algorithms of soft and hard real-time systems are implemented on a small scaled wireless sensor network (WSN) and a simulation model, respectively.
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Skoglund, Oscar. "Dynamic voltage regulation using SVCs : A simulation study on the Swedish national grid." Thesis, KTH, Elektriska energisystem, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-136869.
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Voltage stability is a major concern when planning and operating electrical power systems.As demand for electric power increases, power systems are stressed more and more. TheFACTS family of components were introduced to utilize the existing grid to a higherdegree, while still maintaining system stability.This thesis investigates if the addition of another SVC to the Swedish national gridcould increase the power transfer from north to south. Placement of the SVC was basedon two different indices used to indicate weak areas of the grid; the Q-V sensitivity indexand the V CPI index.Simulations were performed with both the added SVC and regular switched shuntcompensation and the results were compared against each other. Studies were alsoperformed to investigate the effect of an SVC installed at the grid connection of a large(1000 MW) wind farm. Simulations were performed where the wind farm was modeledby either doubly fed induction generators (DFIG) or single cage induction generators.This simulation study was performed using PSSTME, based on a detailed model ofthe Nordic power system as it existed in 2007.The studies showed that adding a ±200 MVAr SVC to the Swedish national gridcould increase the power transfer by 150 MW, where an equally rated switched shuntcapacitor/reactor would result in a 100 MW increase. In these studies, the transfercapacity was limited by voltage collapse situations.However, installing the same ±200 MVAr SVC at the connection of a large windfarm showed an increase in power transfer by 1000 MW, while the switched shuntcompensation only resulted in a 500 MW increase. In the simulations that showed thegreatest increase in transfer capacity, the added wind farm was modeled by single-cageinduction generators. In this case the transfer capacity was limited by transient stabilityproblems.
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Mori, Yuichiro, Koichi Asakura, and Toyohide Watanabe. "A Task Selection Based Power-aware Scheduling Algorithm for Applying DVS." IEEE, 2009. http://hdl.handle.net/2237/13959.
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Angeles, Antolin Linan Maria. "Effects of load modelling on Voltage Impasse Regions (VIR)." Thesis, KTH, Skolan för elektroteknik och datavetenskap (EECS), 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-254416.
Full textAbstract:
Voltage Impasse Region (VIR) is a phenomenon in power systemswhose dynamics are describe by a set of Differential AlgebraicEquations (DAE). VIR denotes a state-space area where voltagecausality is lost, i.e. the Jacobian of the algebraic part of DAEis singular. In a Time Domain Simulation (TDS) once system trajectoriesenter VIR, TDS experiences non-convergence of the solution.Then, there is no reason to continue with the simulation. Thisis why it is important to understand the mechanisms that introduceVIR. It is known that VIR appears in relation to static, non-linearload models. However, it remained unknown what the cumulativeeffect of several static, non-linear loads would be.This master thesis has further expanded the concept of VIRby carrying out a structured study on how the load modelling affectsVIR. For this purpose, this thesis proposes a quasi-dynamicmethodology to map VIR in the relative rotor angle space. Themethodology introduces a new discrete index called Voltage ImpasseRegion Flag (VIRflag), which allows to determine if the algebraicequations of DAE are solvable or not and, thus, to locate VIR.A test system is used to test the proposed quasi-dynamic approach.The VIRflag was first used to map VIR for various load combinations.Then, the relationship between TDS non-convergence issuesand the intersection of a trajectory with VIR is examined toverify the proposed methodology.The proposed method has been proved to be efficient in the determinationof VIR regardless of the number of non-linear loads inthe power system. Among the static exponential load models, theConstant Power (CP) load component has been identified as theone with the largest influence on VIR appearance and shape. TheConstant Current (CC) loads induce ”smaller" VIR areas and theConstant Impedance (CI) load can only alter the shape of VIR inthe presence of non-linear load models.<br>VIR (Voltage Impasse Regions) är ett fenomen i kraftsystem varsdynamiska förlöp beskrivs av differential-algebraiska ekvationer(DAE). VIR betecknar ett område i tillståndsrummet där går förlorad,dvs Jakobianen av den algebraiska delen av DAE är singulärI tidsdomän-simuleringar (TDS) när en trajektoria träffar VIR,konvergerar TDS inte till en lösning. Då finns ingen anledning attfortsätta med simuleringen. Därför är det viktigt att förstå mekanismernasom introducerar VIR. Det är känt att VIR är relateradetill statiska, icke-linjära lastmodeller. Det var dock okänt vadden kumulativa effekten av flera statiska, icke-linjära belastningarskulle vara.Denna uppsats har vidareutvecklat begreppet VIR genom attgenomföra en strukturerad studie om hur lastmodellering påverkarVIR. För detta ändamål föreslår denna avhandling en kvasidynamiskmetod för att kartlägga VIR i det relativa rotorvinkelrummet.Metoden introducerar ett nytt diskret index som heterVoltage Impasse Region Flag (VIRflag), vilket gör det möjligt attbestämma om den algebraiska delen av DAE är lösbar eller inteoch därmed lokalisera VIR. Ett används för att testa det föreslagnakvasi-dynamiska tillvägagångssättet. VIRflag användes först för attkartlägga VIR för olika belastningskombinationer. Därefter granskasförhållandet mellan konvergensproblem i TDS och korsningenmellan en trajektoria och VIR för att verifiera den föreslagna metoden.Den föreslagna metoden har visat sig vara effektiv vid bestämningav VIR, oberoende av antalet icke-linjära belastningar. Bland destatiska exponentiella belastningsmodellerna har konstanteffektlast(CP) haridentifierats som den som har störst inflytande påVIR;s form. Den konstantströmlasten (CC) inducerar mindre"VIRområdenoch konstantimpedanslasten (CI) kan endast ändra formenav VIR i närvaro av icke-linjära belastningsmodeller.
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Petrie, Alexander Craig. "Ultra-Low-Supply-Voltage Analog-to-Digital Converters." BYU ScholarsArchive, 2019. https://scholarsarchive.byu.edu/etd/9122.
Full textAbstract:
This thesis presents techniques to implement analog-to-digital converters (ADCs) under an ultra-low-supply-voltage of 0.2 V to reduce the power consumption. The thesis proposes a dynamic bulk biasing circuit to adjust the PMOS bulk voltage to balance the NMOS and PMOS drain currents to guarantee functionality in the presence of process, voltage, and temperature variations. The dynamic bulk bias circuit is analyzed rigorously to show its functionality. This thesis also describes a new comparator suitable for a 0.2-V supply using ac-coupling, stacked input pairs, and voltage-boosted load capacitor. A 10-bit 5-kS/s successive-approximation-register (SAR) ADC in a 180-nm CMOS process with a supply voltage of 0.2 V demonstrates these ideas. The ADC exhibits a differential nonlinearity (DNL) and integral nonlinearity (INL) within +0.42/-0.45 and +0.62/-0.67 LSB, respectively. The measured SFDR and SNDR at 5 kS/s with a Nyquist-frequency input are 65.9 dB and 52.1 dB, respectively. The entire ADC and dynamic bulk biasing circuitry consume 22 nW including leakage power to yield a figure-of-meirt (FoM) of 8.8 fJ/conv.-step. Measurements of multiple chips show the proposed dynamic bulk biasing fully recovers the ADC performance when the supply voltage is varied. The nW power consumption makes the design well suited for wireless sensor node and energy harvester applications.
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Gu, Hao-Ren, and 古皓仁. "Low-voltage SAR ADC Design Using Dynamic Voltage Keeper." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/16953502326701872980.
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碩士<br>國立東華大學<br>電機工程學系<br>103<br>In this thesis, A low voltage Successive Approximation Analog-to-Digital Converter (SAR ADC) with bootstrap techniques is presented. A novel dynamic voltage Keeper is presented, to design a Sample and Hold (S&;H) circuit and applied to SAR ADC, the proposed technique can reduce leakage current of S&;H circuit and enhance its performance. We uses UMC 0.18μm Mixed-Mode and RFCMOS 1.8V/3.3V 1P6M Metal Capacitor Process to design a 100kS/s, 10-bit ADC under 0.8V supply voltage. Simulation results show that the proposed SAR ADC achieve an SNDR of 56.428dB, and ENOB is 9.08bits, the input range achieve full swing, and consume 8.5μW, the chip occupied an area of 0.613*0.663 mm2.
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Chiang, Tai Yi, and 江泰逸. "Low Voltage Dynamic Logic Circuit Design Using PD SOI Dynamic-Threshold Voltage MOS (DTMOS) Techniques." Thesis, 2001. http://ndltd.ncl.edu.tw/handle/63618067044843627667.
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碩士<br>國立臺灣大學<br>電機工程學研究所<br>89<br>This thesis reports several low-voltage dynamic logic circuits using partially-depleted (PD) SOI CMOS dynamic threshold (DTMOS) techniques.
In chapter 2, two novel true single-phase-clocking (TSPC) latches using PD SOI COMS DTMOS technique for low-voltage CMOS VLSI circuits are proposed. Via controlling the body voltage dynamically, the 0.8V split-output PD-SOI TSPC latch using DTMOS techniques shows an 80% reduction in the switching time and the non-split-output latch has less slow clock problems as verified by MEDICI result.
In chapter 3, a 0.7V Manchester carry look-ahead circuit using PD SOI DTMOS techniques suitable for low-voltage CMOS VLSI systems is reported. Using asymmetrical dynamic threshold pass-transistor (ADTPT) technique with the PD-SOI DTMOS dynamic logic circuit, this 0.7V PD-SOI DTMOS Manchester carry look-ahead has an improvement of 30% in the propagation delay time as compared to the conventional circuit based on two-dimensional device simulation MEDICI results.
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Chin, Shang-Chei, and 金尚志. "Study of Dynamic Threshold Voltage MOSFET." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/35114525041736943045.
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Mochocki, Bren Christopher. "Voltage scheduling techniques for dynamic voltage scaling processors with practical limitations." 2004. http://etd.nd.edu/ETD-db/theses/available/etd-03042004-140126/.
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Thesis (M.S.)--University of Notre Dame, 2004.<br>Thesis directed by Xiaobo (Sharon) Hu for the Department of Computer Science and Engineering. "March 2004." Includes bibliographical references (leaves 52-55).
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GOUR, RITIKA. "LIMITED CAPACITY DYNAMIC VOLTAGE RESTORER FOR VOLTAGE REGULATION IN RADIAL DISTRIBUTION FEEDER." Thesis, 2016. http://dspace.dtu.ac.in:8080/jspui/handle/repository/15000.
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The distribution system is one of most important and critical part of power system. The variation in the voltage at load end is of great concern in the distribution system. The voltage is required to be kept regulated within a specified range in the distribution system. Series compensation is technically more suitable solution for regulating the voltage in the radial distribution feeder when compared with shunt compensators. Two vital factors which decide the quality of compensation are the location of series compensation device and the rating of the device. The optimum location of device can be found, using various algorithms optimization technique with multiple restrain. But its optimum location changes every time a fault or large transients occur on the feeder. The rating of device increases with the amount of compensation required to achieve requisite regulation.
This thesis presents an alternative for the conventional lumped series compensation devices prevalent in distribution power systems. The two measures presented in the thesis are curative measures and remedial measures. Curative measure is implemented with the distributed capacity limited DVR as a future course of action to enable efficient and cost-effective voltage regulation on radial feeder. Number of capacity limited DVR are incorporated into the feeder without affecting its power flow. An autonomous control for controlling the D-DVR is investigated to efficiently regulate the voltage on radial feeder in a cost-effective manner. The performance of the D-DVR is evaluated using MATLAB simulation environment to validate the concept of D-DVR and its autonomous control through simulated results under perturbing load and source conditions. Remedial measure is also been studied to improve the response of OLTC transformer installed on the feeder by operating it in conjunction with the capacity limited DVR for step-less operation. Control algorithm for the same is developed. The performance of duo has been investigated and validated using MATLAB/SIMULINK environment under load and source dynamics.
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Chang, Yun, and 常雲. "Dynamic and Unbalance Voltage Compensation Using STATCOM." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/77864677544321383466.
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碩士<br>國立中正大學<br>電機工程所<br>96<br>The high-precision devices become increasingly popular as the high-tech industry rises. This brings much attention to the problems of power quality. Commonly seen problems are mainly caused by fluctuations on heavy loads, non-linear loads, faults and many others.
This thesis will address problems of voltage quality, focusing on voltage flicker, voltage sag/dip, voltage unbalance, and investigate their causes, standards and impacts to power systems. Among all Flexible AC Transmission Systems (FACTS), which are only recently being widely utilized, we applied a so-called Static Synchronous Compensator (STATCOM) to mitigate the voltage variation problems as aforementioned. This device possesses characteristics such as rapid response, and the ability to provide reactive power at low voltage. These characteristics help to actively supply or absorb reactive power to or from the system, ultimately achieving the function of voltage regulation.
This thesis employs a Space Vector Pulse Width Modulation based controller to provide solutions for problems in voltage flicker and voltage sag/dip. In addition, solutions in voltage unbalance are also provided with two types of controllers; one controller compensates for the amplitude variation for phase voltages, the other controller compensates for the voltage of negative sequence.
Controllers are then built in a software called Power System Computer Aided Design/ElectroMagnetic Trasient for DC (PSCAD/EMTDC), where various simulations of dynamic voltage variations are carried out. Investigations on the feasibilities of the control framework and the extent of the voltage quality improvements are also included. Lastly, the actual voltages measurements of an electric arc furnace taken from a steelwork factory are input into the PSCAD environment. Using the designed compensator to carry out simulations, STATCOM''s compensation outcome on the voltage of the actual electric arc furnace, and the extent to which it is capable of exerting its effect, are observed.
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Chang, Chia-Hao, and 張家豪. "An Implementation of a Dynamic Voltage Restorer." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/94300368133245260548.
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碩士<br>國立中山大學<br>電機工程學系研究所<br>92<br>The design and implementation of a dynamic voltage restorer (DVR) is presented in this thesis. The proposed DVR can restore the end-user voltage to its normal level by rapidly injecting a compensating voltage onto the power line against the upstream power disturbances. The control algorithm uses the concept of reference voltage tracking method. Based on the electric circuit theory, the filter of the DVR is also analyzed. Besides, performance of the proposed method is simulated and compared with other different control methods by using Matlab-simulink/PSB. The results show the effectiveness of the proposed method. A 2.18 KVA DVR prototype is implemented to verify the performance of the proposed method.
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Yang, Cheng-Chang, and 楊政璋. "Study and Implementation of Dynamic Voltage Regulator." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/73264826980945901299.
Full textAbstract:
碩士<br>國立雲林科技大學<br>電機工程系碩士班<br>94<br>In the power system network, the large industrial equipments and diode bridge rectifier loads generate large non-sinusoidal currents into the distribution system. These currents contain the serious harmonics and reactive power. Reactive power and intermittent loads variation increase the power losses in the distribution and transmission system result in the voltage variation at the receiving end. Voltage sag and swell, voltage flicker and momentary interruption are the most common problems encountered.
This thesis presents a single-phase and three-phase dynamic voltage regulator (DVR) with sinusoidal pulse-width modulation (SPWM) technique to control compensating voltage. When voltage sag and swell conditions occur at source terminal, compensator can provide compensation immediately and make the load voltage at the desired root mean square (RMS) value. The simulation software package MATLAB/SIMULINK is used to simulate the system operation. The digital signal processor (DSP) TMS320C32 is used to implement the proposed circuit configuration. The experimental results are presented to verify the effectiveness of the dynamic voltage regulator.
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Liu, Sheng-Che, and 劉聖哲. "Low-Voltage Circuit Design Using PD SOI Dynamic-Threshold Voltage MOS (DTMOS) Techniques." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/54800027175988214419.
Full textAbstract:
碩士<br>國立臺灣大學<br>電機工程學研究所<br>88<br>This thesis reports two low-voltage low-power circuits which are designed by using PD SOI DTMOS techniques.
In chapter 2, this thesis introduced a novel 0.7V two-port 6T SRAM memory cell structure with single-bit-line simultaneous read-and-write access (SBLSRWA) capability using partially-depleted SOI CMOS dynamic-threshold techniques. With an innovative approach by connecting the body terminal for an NMOS device in the latch and the write access pass transistor to write word line, this 6T memory cell can be used to provides SBLSRWA capability for 0.7V two-port SOI CMOS cache memory.
In chapter 3, this thesis introduced a novel low-voltage content addressable memory (CAM) cell structure using partially-depleted SOI CMOS dynamic-threshold techniques. With a unique structure by dynamically controlling the bodies of transistors that compose XOR portion of CAM cell via two auxiliary transistors, this CAM cell can be used to provide faster compare capability for low voltage range SOI CMOS CAM applications.
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Miftakhutdinov, Rustam Raisovich. "Performance prediction for dynamic voltage and frequency scaling." Thesis, 2014. http://hdl.handle.net/2152/26939.
Full textAbstract:
This dissertation proves the feasibility of accurate runtime prediction of processor performance under frequency scaling. The performance predictors developed in this dissertation allow processors capable of dynamic voltage and frequency scaling (DVFS) to improve their performance or energy efficiency by dynamically adapting chip or core voltages and frequencies to workload characteristics. The dissertation considers three processor configurations: the uniprocessor capable of chip-level DVFS, the private cache chip multiprocessor capable of per-core DVFS, and the shared cache chip multiprocessor capable of per-core DVFS. Depending on processor configuration, the presented performance predictors help the processor realize 72–85% of average oracle performance or energy efficiency gains.<br>text
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Wu, Yung-Hsing, and 吳永興. "Study of Multilevel Inverter in Dynamic Voltage Restorer." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/42729404516294274512.
Full textAbstract:
碩士<br>國立雲林科技大學<br>電機工程系碩士班<br>92<br>In recent years, the booming development of the high-tech industry, results in the production line extend continuously at the different areas. However, the power quality limitation or requirement of the electronic instruments and equipments request is more strict. In addition, the widely use of the nonlinear loads generate the serious power pollution into the electric power system. Therefore, it is an important issue to increase the power quality and insure the system stability.
In the related research topics of electric power quality, power fail is not the most important problem, the phenomemon of electric power disturbance, voltage sags, voltage swell, voltage harmonic distortion, voltage flickers, electromagnetic interence, the fluctuation of frequency, phase misregistration, the unbalance of three-phase voltages and the momentary of power failure is the main concern of power quality.
This thesis studies a structure of the dynamic voltage restorer based on a series connection of H-bridge cells to improve several transient phenomenas of electric power disturbances.
Simulations are presented to verify the effectiveness of the proposed control scheme.
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Lin, Cheng-Ming, and 林政銘. "Design of Dynamic Voltage Regulator Using Fuzzy Logic." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/61780406372462614609.
Full textAbstract:
碩士<br>國立臺灣大學<br>電機工程學研究所<br>95<br>The power quality affects the industry to a great extent. Poor quality in the power supply, such as voltage fluctuations, may cause damage in sensitive equipments. How to maintain constant voltage profile at the load bus under disturbance conditions is of major concern in this work.
The purpose of this thesis is to use fuzzy logic control to design the Dynamic Voltage Regulator (DVR). This compensator employs a direct current capacitor to offer the voltage source and uses the pulse-width modulation technology to adjust the output voltage of the three-phase voltage-source inverter. DVR can be used to compensate the voltage drop caused by balanced system fault. The effectiveness of the designed DVR is first investigated by digital simulations using the MATLAB software. Then, in the experiment, the control kernel of digital system for DVR is based on a personal computer with Adventec PCL-1800 data acquisition cards. The three-phase pulse width modulation signals are generated by computer software in order to reach the objective of voltage compensation.Finally, it is concluded from results of simulations and experiments that load bus voltage can be effectively regulated by the designed DVR.
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Wu, Sheng-Lung, and 吳勝隆. "Design of a Series-type Dynamic Voltage Regulator." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/36743646272984464621.
Full textAbstract:
碩士<br>國立臺灣大學<br>電機工程學研究所<br>92<br>The power quality affects the industry to a great extent. Poor quality in the power supply, such as voltage fluctuations, may cause damage in sensitive equipments. How to maintain constant voltage profile at the load bus under disturbance conditions is of major concern in this work.
The purpose of this thesis is to analyze and design the Dynamic Voltage Regulator (DVR). This compensator employs a direct current capacitor to offer the voltage source and uses the pulse-width modulation technology to adjust the output voltage of the three-phase voltage-sourced inverter. Both steady-state performance and transient characteristic of the DVR are investigated in the thesis. In steady-state, DVR can be used to compensate the voltage drop caused by circuit reactance. In transient state, voltage sag in the load bus can be improved in a very short period by the proposed DVR.
The effectiveness of the designed DVR is first investigated by digital simulations using the PSCAD software. Then, in the experiment, the control kernel of digital system for DVR is based on a personal computer with Adventec PCL-1800 data acquisition cards. The three-phase pulse width modulation signals are generated by computer software in order to reach the objective of voltage compensation.
Finally, it is concluded from results of simulations and experiments that load bus voltage can be effectively regulated by the designed DVR.
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Sung, Meng-Lin, and 宋孟霖. "Dynamic Voltage Scaling on Remote Desktop Protocol Applications." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/00454832848607233596.
Full textAbstract:
碩士<br>國立交通大學<br>資訊科學系<br>91<br>In recent years, many new handheld devices with powerful computing ability have been developed. However, the power consumption increases with the computing ability. To extend the battery life of the handheld devices, power management becomes more and more important.
In this work, we focus on power management for remote desktop protocol applications. The problem of power management on such applications is that the client side system has no knowledge of what applications are running in a RDP session. In this thesis, we propose a power management architecture for RDP applications. We use server and client side stubs to get the information related to power management. So, the power manager can distinguish different applications in the RDP session, and can use different policies for different applications. To verify the feasibility of our approach, we implement a prototype system on a Tablet PC, Xpilot. The experimental results show that the energy saving of our system is around 11%.
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Wu, Chih-Ming, and 吳志銘. "A FPGA-Based Design of Dynamic Voltage Restorer." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/74w9j3.
Full textAbstract:
碩士<br>國立成功大學<br>電機工程學系碩博士班<br>90<br>In this paper, the novel deign of dynamic voltage restorer is proposed to protect important loads and restrict the unwanted disturbances. With this proposed circuit design, the drawbacks of traditional dynamic restorers such as slow response and poor voltage transients can be both effectively solved. By allocating the output filters in the appropriate places in the circuit, it is found not only the voltage sag problem can be compensated, but also the voltage transients can be resolved in an efficient manner. To facilitate the circuit design, the field programmable gate array (FPGA) is also employed for the digital controller design in the dynamic voltage restorer, thereby increasing the flexibility of circuit design while improving the dynamic performance significantly. This proposed circuit has been simulated in the laboratory, and experimented through the hardware validation. Test results confirm the feasibility of the deign approach for the applications considered.
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Rau, Ren-Jiun, and 饒仁均. "Modular Design and Implementation of Dynamic Voltage Restorers." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/95135322201569603942.
Full textAbstract:
碩士<br>國立成功大學<br>電機工程學系碩博士班<br>93<br>Following the increased concern of electric power quality along with high capacity requirements of installed equipment nowadays, a modular design of dynamic voltage restorer is thus proposed in this thesis with the consideration of the future capacity expansion. In the circuit design of the proposed method, two modules are operated in parallel, where the voltage-controlled inverter is severed as the primary module and the current-controlled inverter is auxiliary module. In the primary module where the two-loop control circuit is employed, the load voltage is well stabilized by outer-loop control circuit and the dynamic response is significantly improved through the inner-loop one. As for the auxiliary module, the current-controlled inverter of this module is applied to reach the current distribution among different modules such that the compensation capacity can be better increased. To operate this proposed system, the voltage-controlled inverter would be integrated with the current-controlled inverter. Then, once the undervoltage signal is detected, the voltage would be compensated immediately such that the waveform at the load side can become more sinusoidal. To validate the feasibility of this proposed approach, this method has been tested through software simulations and hardware implementation. Test results show that the method has reached the goal of power quality improvement and capacity expansion, which are also deemed beneficial for electric power quality study and application
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Kuo, Bo-Jyun, and 郭柏均. "Implementation of Low Voltage, High Speed Dynamic Comparators." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/34201778882532732853.
Full textAbstract:
碩士<br>國立交通大學<br>電子研究所<br>101<br>This thesis presents two low voltage, high speed dynamic comparators. It
improves the core circuit “latch architecture”, so the comparators can operate
at low supply voltage. The comparators have the large enough overdrive
voltage to keep the transconductance, so the comparators can maintain the
high speed operation.And realizing comparators in 65nm CMOS. The first
comparator operate at supply voltage is 0.6V, the operating speed is 1GHz,
and the input referred offset(1&;#1049434;) is 6mV, the input referred noise(1&;#1049434;) is
0.65mV, and the sensitivity is 3mV to achieve the BER is 10-9. And the power
consumption is only 38&;#1049221;W. The second comparator operate at supply voltage
is 0.6V, the operating speed is 1.3GHz, and the input referred offset(1&;#1049434;) is
7.5mV, the input referred noise(1&;#1049434;) is 0.5mV, and the sensitivity is 4.2mV to
achieve the BER is 10-9. And the power consumption is 64&;#1049221;W.
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I-RuChen and 陳奕如. "Routability-driven Powerplanning with Dynamic Voltage Drop Constraint." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/3253b2.
Full text
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Taram, Dev Kumar. "Power Quality Improvement Using Dynamic Voltage Restorer (DVR)." Thesis, 2015. http://ethesis.nitrkl.ac.in/6855/1/POWER_Taram_2015.pdf.
Full textAbstract:
Now a day power quality problem has become a major issue to deal with, in order to maintain quality supply. Modern generation greatly depends on electrical energy for improving their life style. Modern equipment like computers, electric motors etc. cannot run without electricity. In order to improve the performance, the equipment demands quality supply The power quality is affected by various factors of the electrical network. Power quality problems such as voltage and frequency variation, harmonic contents affect the performance of electrical utility and shorten its life time. Such problem has to be compensated to ensure the quality supply. One of the most frequently occurring power quality problems in transmission network is voltage sag/swell. Such problems can cause heavy flow of current reduces the life time of the equipment or can cause over voltage affecting the insulation level of the equipment. Many modern custom devices are present in order to mitigate such problems. Among them, Dynamic Voltage Restorer (DVR) is efficient and cost effective. In this paper, an overview of DVR and control scheme used to control the DVR is presented. The simulation result with the proposed control scheme is also shown.
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Wang, Chun-Chieh, and 王俊傑. "Design of a Series-type Dynamic Voltage Regulator With 12-pulse Voltage Source Inverter." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/83113260701615990301.
Full textAbstract:
碩士<br>國立臺灣大學<br>電機工程學研究所<br>94<br>With the development of high technology industries, the proliferation of voltage-sensitive load equipment has made industrial processes much more vulnerable to degradation in the quality of power supply. Among the several novel custom power devices, the dynamic voltage restorer (DVR) for application in distribution systems is a recent invention.
The purpose of this thesis is to design a 12-pulse series-type Dynamic Voltage Regulator . A direct current capacitor is employed as the storage device for the DVR and the 12 - pulse control technique is used to adjust the output voltage of the three-phase voltage-source inverter (VSI). The 12-pulse VSI is compared with the Pulse Wide Modulated (PWM) VSI.
Both steady-state performance and transient characteristic of the DVR are investigated in the thesis. To show the advantage of the proposed 12-pulse VSI, compensation capability and power loss are investignted. The purpose is use a lower direct current capacitor voltage than the PWM VSI to achieve voltage compensation. The effectiveness of the designed DVR is first investigated by digital simulations using the MATLAB software. Then, in the experiment, the control kernel of the digital system for the DVR is based on a personal computer with data acquisition cards. Voltage compensation is achieved through the computer coder written in C language. Finally, it is concluded from results of simulations and experiments that load bus voltage can be effectively and superiorly regulated by the designed 12-pulse VSI DVR.