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Relevant bibliographies by topics / ECG circuit design / Dissertations / Theses

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Dissertations / Theses on the topic 'ECG circuit design'

Author: Grafiati

Published: 4 June 2021

Last updated: 13 February 2022

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1

Svärd, Daniel. "Design and evaluation of a capacitively coupled sensor readout circuit, toward contact-less ECG and EEG." Thesis, Linköping University, Department of Electrical Engineering, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-54520.

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<p>In modern medicine, the measurement of electrophysiological signals play a key role in health monitoring and diagnostics. Electrical activity originating from our nerve and muscle cells conveys real-time information about our current health state. The two most common and actively used techniques for measuring such signals are electrocardiography (ECG) and electroencephalography (EEG).</p><p>These signals are very weak, reaching from a few millivolts down to tens of microvolts in amplitude, and have the majority of the power located at very low frequencies, from below 1 Hz up to 40 Hz. These

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2

Benko, Igor. "ECF processes and asynchronous circuit design." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1999. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape8/PQDD_0003/NQ44753.pdf.

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3

Massingham, John William. "A design technique for mixed ECL and CMOS circuitry." Thesis, University of Aberdeen, 1994. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.241357.

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In this thesis, the principles of mixing ECL and CMOS technologies have been investigated with the intention of increasing the operating speed of synchronous systems. To achieve this, the design will be primarily CMOS based with the critical path implemented in ECL to reduce the delay and hence improve the execution time. Logic conversion circuitry between the two technologies has been designed, with the CMOS-ECL conversion circuit being a simple enhancement of the basic ECL current switch and ECL-CMOS translation being achieved with 0.5ns using a "double inverter circuit". To reduce the power

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4

Pickles, Neil S. (Neil Stuart) Carleton University Dissertation Engineering Electrical. "Design, modeling, and optimization of ECL interface circuits for BiCMOS integrated systems." Ottawa, 1993.

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5

MOHSSINE, MOHAMMED. "Performances et methodologie d'implantation de circuits integres bipolaires ecl." Paris 6, 1987. http://www.theses.fr/1987PA066533.

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Actuellement, il est important de disposer des moyens de comparaison des differentes technologies (bipolaires si et ga as, mos si et mesfet ga as) selon les criteres vlsi (vitesse, puissance, densite d'integration, rendement de fabrication, cout des processus, outils de cao disponible, etc. . . ); nous donnons une modelisation simplifiee des performances dynamiques des portes ecl cml et nous montrons comment les portes complexes peuvent etre ramenees aux portes simples pour l'evaluation des performances. Nous presentons les regles de dessin simplifiees, definies a partir des technologies hbip

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6

Souza, Cezar Henrique de. "Planejamento e projeto de circuitos secundários de distribuição de energia elétrica por meio de algoritmo busca tabu /." Ilha Solteira : [s.n.], 2006. http://hdl.handle.net/11449/87252.

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Orientador: José Roberto Sanches Mantovani<br>Banca: Ruben Augusto Romero Lázaro<br>Banca: Benemar Alencar de Souza<br>Resumo: Neste trabalho apresentam-se o desenvolvimento e a implementação de um algoritmo computacional para o problema de planejamento e projeto de circuitos secundários de distribuição de energia elétrica. O problema é formulado como um modelo de Programação Não Linear Inteiro Misto (PNLIM), e para sua solução propõe-se um algoritmo de Busca Tabu (BT). Esta ferramenta permite determinar e avaliar os custos dos elementos que compõem o sistema de distribuição (reforma e/ou cons

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7

Lin, Chan-Hui, and 林展輝. "57Hz Low Pass Elliptic Filter Circuit Design of ECG." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/99561174078972319530.

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碩士<br>中原大學<br>電機工程研究所<br>99<br>Abstract The precision of a output signal, making sure the signal is in or between the programed frequency band, is very important and top priority in analog filter circuit design field. To catch the subtle signal such as human body’s physiology by cardiograph, the precision is very important but often affected by test environment and facility itself. Therefore, the precision of the filter design is a crucial topic for research. OTA (Operational Transconductaance Amplifier) is best candidate for analog filter circuit design identified by savants recently. The mai

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Wang, Pelurn, and 王登立. "Design for 0.05Hz high pass elliptic filter circuit in ECG." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/92061109885162857035.

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碩士<br>中原大學<br>電機工程研究所<br>99<br>Heart disease is one of the top ten causes of death in recent years, cardiovascular disease, especially the well known but hard to be noticed myocardial infarction. EGG is the most commonly used machine to check cardiovascular related diseases. However, the medical ECG is unaffordable for general families; the accuracy of those less expansive ECG machines is limited by the cost and design of their filter circuit. Consequently, myocardial infarction is hard to be accurately detected at the initial stage. According to studies on cardio pathology analysis, the myoca

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9

Chen, Jian-Zh, and 陳建智. "Design for 60Hz band reject elliptic filter circuit of ECG." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/3amd3x.

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碩士<br>中原大學<br>電機工程研究所<br>99<br>ECG monitoring equipment that picks up feeble body physical signals and the other hand this usually had a great effect upon the accuracy of the output signals by the test environment and equipment.It designs analog filter circuit that points on the accuracy of the output signal. It can be the output signal makes sure to operation at a predetermined frequency range. OTA (Operational Transconductaance Amplifier) is best candidate for analog filter circuit design identified by savants recently. The main character of OTA is Io=Gm(V+-V-), where Io stands for output c

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10

Abdul, Jamil M. M., C. F. Soon, A. Achilleos, Mansour Youseffi, and F. Javid. "Electrocardiograph (ECG) circuit design and software-based processing using LabVIEW." 2017. http://hdl.handle.net/10454/16940.

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Yes<br>The efficiency and acquisition of a clean (diagnosable) ECG signal dependent upon the proper selection of electronic components and the techniques used for noise elimination. Given that the human body and the lead cables act as antennas, hence picking up noises from the surroundings, thus a major part in the design of an ECG device is to apply various techniques for noise reduction at the early stage of the transmission and processing of the signal. This paper, therefore, covers the design and development of a Single Chanel 3-Lead Electrocardiograph and a Software-based processing envir

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11

Tung, Cheng-Wei, and 董鈞瑋. "Analog Front-End Circuit Design for the ECG Acquisition System." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/73791390117504859206.

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碩士<br>國立臺灣大學<br>電機工程學研究所<br>92<br>Abstract A monolithic analog front-end circuit for ECG acquisition system is described in this thesis. The system includes the instrumentation, which is based on the current balancing technique that ensures this type of circuit to achieve high immunity to common mode signals as first stage, gain amplifier stage and the switched capacitor low pass filter. In order to obtain good performance of the circuit, the non-ideal effect like offset voltage has been analyzed in this thesis. The circuit was implemented in TSMC 0.35μm , 2p4m mixed-signal CMOS technology an

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Mo, Chu-Yuan, and 莫居緣. "Design of Analog Front-End Circuit for ECG Measurement System." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/78181569204289054667.

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碩士<br>逢甲大學<br>電子工程學系<br>103<br>The present study proposes an analog front-end (AFE) circuit used in electrocardiogram (ECG) monitoring devices to achieve low-power common-mode rejection ratio (CMRR). The overall AFE circuit comprises an instrumentation amplifier (IA) to amplify the received ECG signals in the first stage, a fourth-order high-pass filter (HPF) to exclude ECG signals below 2 mHz in the second stage, a finite-gain low-pass filter (LPF) to provide a 40 dB gain and filter out signals over 300 Hz in the third stage, and a notch filter to block the 60 Hz noise interferences generated

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13

Chen, Jian-Cheng, and 陳健成. "Circuit Design and Prototyping System Realization for ECG Bio-Signal Measurement." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/10938278701499500004.

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碩士<br>國立勤益科技大學<br>電子工程系<br>98<br>In this study, based on a continuous slope of the sampling points, we modify algorithm of authors So and Chan to detect the QRS-wave of electrocardiogram (ECG). Without signal filtering function, the study is still able to accurately identify the peak position of QRS complex waves in ECG signal. In addition, an experimental bio-signal measured prototyping system composed of bio-signal amplification board, data acquisition modular, personal computer, and monitor system is developed in the study. A bio-signals amplification board with multiple functions including

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14

Lee, Su-Jung, and 李淑蓉. "OP 741 Modeling of ECG Amplification and Active Filtering Circuit Design." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/22184607128472211408.

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碩士<br>輔仁大學<br>電機工程學系碩士在職專班<br>102<br>This paper establishes a design of an integrated amplification and filtering circuit for the analog front end (AFE) of the electrocardiogram (ECG) signals with the modeling of the representative 741 operational amplifiers (op-amps). The instrument amplifier in the first stage utilizes the popular topology with three op-amps. The voltage gain of the input noninverting amplifiers are designed with a factor of 10. The difference amplifier behind the noninverting amplifiers provides the voltage gain of 10. ECG signals are amplified through an instrumentation am

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15

KAO, CHEN-EN, and 高晨恩. "Delay-Free ECG Circuit Design Using Noise Spectrum Monitoring to Eliminate Noise." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/as5s27.

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碩士<br>中華大學<br>電機工程學系<br>107<br>In life, there are many ways to measure ECG signals, and most of the measurements are the fastest and most convenient way to deal with the noise detected, the low-pass filtering and band-pass filter are used to filter out the noise. After the low-pass filter and the band-pass filter filter out the noise, the problems caused by the waveform attenuation and delay, if you want to sample the high point of the waveform, and the attenuation occurs, the sampling accuracy will be it is affected, and this paper is to improve the waveform attenuation and delay. By collect

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16

Chen, Bo-Chen, and 陳柏辰. "Discrete and Integrated Circuit Designs and Realization for Twelve-Lead ECG Capture Systems." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/66919123874109870419.

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碩士<br>龍華科技大學<br>電子工程系碩士班<br>104<br>This thesis research objectives in discrete and integrated circuit used to retrieve ECG physiological signals, discrete circuitry designed to produce a circuit board measurements, integrated circuits with TSMC 0.18μm CMOS process developed from. Discrete circuit architecture from the analog front-end circuitry and digital system circuit is constituted, analog front-end circuit comprises a lead switch, neutral circuit, instrumentation amplifiers, filters, and right leg drive circuit, a digital system by the microcontroller, analog to digital conversion devices

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17

Li, Wen-Chih, and 李文志. "Analog Front-end Circuits and Time-Frequency Analysis Design for ECG Sensing System." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/z48cz8.

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碩士<br>國立中山大學<br>醫學科技研究所<br>106<br>Recently, the demand for wireless electronic medical devices has been greatly increased. The innovation of wearable sensors with a portable data analysis device can not only monitors medical parameters of the patient under the less affection to human’s daily activities. Based on above design target, we design several chips for the implementation of the measuring and analyzing platform which includes the following three parts: (1) A front-end readout circuit is composed of Instrumentation Amplifier (IA), band-pass filter, gain stage, and Analog-to-Digital Conve

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18

Chen, Ming-Huai, and 陳明輝. "Design of Analog Front-End Circuit for EEG Measurement System." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/11788057126613548876.

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碩士<br>逢甲大學<br>電子工程學系<br>103<br>ABSTRACT This paper presents an analog front-end (AFE) circuitry of an electroencephalogram (EEG) measurement system with a high common-mode rejection ratio (CMRR). The whole AFE circuit includes a first-stage AC coupling circuit to filter out low frequency noise, a second-stage instrumentation amplifier with a high CMRR of three op amp to provide 53.9 dB differential-mode gain and 128.2 dB CMRR, a third-stage notch filter to filter out 60 Hz mains noise, and a fourth-stage low-pass filter (LPF) to filter out signals above 250 Hz. The instrumentation amplifier in

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19

Shun-Wen, Cheng. "Design and Analysis of High-Performance CMOS Logic Circuits and Power-Aware Arithmetic Circuit Structures on the Deep-Submicron Process Technology." 2005. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0002-2006200518024100.

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20

Chen, Cheng-Chuan. "2.4GHz WLAN IF Circuit Design and Test." 2004. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-0907200416561100.

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21

Wan-Shian, Wu. "Robust Circuit Control Design of Biochemical Networks." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0016-1303200709290239.

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22

Chang, Ming-Hui. "Mechanism and Circuit Design of CMOS Electrostatic Micromotors." 2004. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2707200416193500.

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23

Huang, Pei-Hsuan, and 黃珮瑄. "Design of CMOS Sensor Interface Circuits for EEG and Hall Sensor Applications." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/x3a5qh.

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碩士<br>國立臺灣大學<br>電子工程學研究所<br>107<br>In this dissertation, two circuits are presented. The first one realizes a low-power and low-noise analog front-end circuit for EEG application. It is fabricated in UMC 180-nm process. The analog front-end (AFE) includes a low-noise instrumentation amplifier (LNA) followed by a programmable gain amplifier (PGA) to further increase the gain. Both LNA and PGA employ capacitively-coupled IA (CCIA) topology to achieve good power efficiency. This chip uses the architecture without chopper technique and achieves total power consumption 3.24 uW per channel. The inte

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24

"Energy-Efficient Circuit and Architecture Designs for Intelligent Systems." Doctoral diss., 2020. http://hdl.handle.net/2286/R.I.62917.

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abstract: In the era of artificial intelligent (AI), deep neural networks (DNN) have achieved accuracy on par with humans on a variety of recognition tasks. However, the high computation and storage requirement of DNN training and inference have posed challenges to deploying or locally training the DNNs on mobile and wearable devices. Energy-efficient hardware innovation from circuit to architecture level is required.In this dissertation, a smart electrocardiogram (ECG) processor is first presented for ECG-based authentication as well as cardiac monitoring. The 65nm testchip consumes 1.06 μW

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25

Zong-Jin, Yang. "Design and Implementation of Clock and Data Recovery Circuit." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-1707200614193500.

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26

Hong-Fu, Chou. "Circuit Design for the LDPC Codec Using Interblock Memory." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2107200612110100.

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27

Chuang, Kai-Hsiang. "Analog Front-End Circuit Design for 10GBASE-T Ethernet." 2007. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2307200720031100.

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28

Ying-Haw, Shu. "Design of High Performance Asynchronous Pipeline Circuits." 2005. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2207200509413800.

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29

Chen, Chun-Hao. "Preamplifier Circuits Design and Sensing Systems Integration." 2008. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2907200811224200.

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30

Tsung-Ying, Li. "CMOS Receiver Front-End Circuit Design for 10GBASE Ethernet System." 2005. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2007200519113100.

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31

Kwok-Fong, Kual. "A Transmission Interface Integrated Circuit Design for ISO14443A RFID Transponders." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0006-2308200621343700.

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32

Shih-Chieh, Chen. "6V Pumping and Driving Circuit Design Using Standard CMOS Technology." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0016-1303200709465748.

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33

Liu, An-Shyi. "Transmission-Line Based Optimization Design for Microwave Passive Circuit Applications." 2008. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-1308200817292600.

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34

Yang, Ya-Lan. "Design and Implementation of Multimode Carrier Recovery Circuit for Wireless LAN." 2004. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-1307200414235400.

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35

Cheng-Wei, Chu. "Design and Implementation of an H.264 Intra-frame Coding Circuit." 2005. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-0807200514395000.

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36

Li, I.-Yin. "Design Constraints on FSC LCD and a Novel Charge Recycling Circuit." 2007. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-3004200714510400.

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37

Wang, Po-Sheng, and 王柏升. "Design and Verify a Dry-Sensor Based Multi-Channel Digital Active Circuit for EEG Signal Acquisition System." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/kf853r.

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碩士<br>國立交通大學<br>電控工程研究所<br>101<br>A brain-computer interface (BCI) is communication systems that can help users interact with the outside environment. The use of electroencephalographic (EEG) signal has become the most common approach for BCI and provides a way for those disabled to communicate with outside environment. However the most common way for traditional EEG measurement is through wet sensor, which means need more preparing time include the skin preparation and the use of conductive gel. But when the time passes, the conductive gel will dry up and cause the degradation of performance.

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38

Wei, Chun-Hao. "Design and Implementation of 0.6-V CMOS Analog Circuits." 2007. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2407200718063700.

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39

Jun-Chau, Chien. "Circuit Designs for 40-Gb/s High-Speed Communication Systems." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2307200622101700.

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Huang, Chih-Chuan. "Design and Implementation of an Automatic Gain Control Circuit for Wireless LAN." 2004. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-0807200417285600.

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41

Chang-Yu, Chen. "CMOS RF Front-End Circuit Design for Low-Band Ultra-Wideband Systems." 2005. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2007200517312100.

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42

Kao, Shao-Ku. "Design and implementation of all-digital DLL and duty cycle corrector circuit." 2007. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-0607200714104900.

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43

Liu, Chi-En. "Design of Reader Transmitter and Tag Baseband Circuit for Radio-Frequency Identification." 2007. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-0701200817282000.

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Chung, Yi-Yen, and 鍾怡燕. "Analysis and Design of Coplanar-EBG Structures to Suppress Ground Bounce Noise in High-Speed Circuits." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/49219400513154182847.

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碩士<br>國立臺灣大學<br>電信工程學研究所<br>95<br>For the first time to characterize the physical mechanism of Coplanar Electromagnetic Band-Gap (Coplanar-EBG) structures, the viewpoint of the parallel-plate resonance cavity is proposed in this thesis. Besides, the overall arrangement of effective stackup layout and mechanism decision of the upper-side and lower-side of stop-band are also presented. In the realistic high-speed digital circuit, the complicate trace layout and multilayer connection by via transitions are inevitable. Thus the position effect of arbitrary noise excitation to Coplanar-EBG becomes

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Chia-Liang, Lin. "The Design and Implementation of 5-bit 10Gb/s Track-and-Hold Circuit." 2005. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-1207200502321200.

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Wei, Wang. "Portable All-Digital Phase-Lock Loop Circuit Design With Programmable Pulse Width Control." 2005. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-1307200515550300.

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47

Yi-Cheng, Hsieh. "Design and Implementation of a Clock and Data Recovery Circuit for 10GBASE-LX4." 2005. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2307200518481800.

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48

Wang, Chao-Yung. "Design and Implementation of Receiver Front-End Circuit for 10GBASE Optical Communication System." 2007. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-1507200720143500.

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49

Su, Wei-Chuan. "Analysis and Control Circuit Design for CCFL Backlight Inverter Based on Piezoelectric Transformer." 2008. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2501200816401800.

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Chang, Fu-Chieh. "Design and Implementation of CMOS K-Band Phase-Locked Loop Related Circuit Blocks." 2008. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0020-1607200819292500.

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