Academic literature on the topic 'Efficient implementation for HBVM'
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Journal articles on the topic "Efficient implementation for HBVM"
Di Stefano, F., E. S. Malinverni, R. Pierdicca, G. Fangi, and S. Ejupi. "HBIM IMPLEMENTATION FOR AN OTTOMAN MOSQUE. CASE OF STUDY: SULTAN MEHMET FATIH II MOSQUE IN KOSOVO." ISPRS - International Archives of the Photogrammetry, Remote Sensing and Spatial Information Sciences XLII-2/W15 (August 22, 2019): 429–36. http://dx.doi.org/10.5194/isprs-archives-xlii-2-w15-429-2019.
Full textLowe, Christopher F., Linda Merrick, P. Richard Harrigan, Tony Mazzulli, Christopher H. Sherlock, and Gordon Ritchie. "Implementation of Next-Generation Sequencing for Hepatitis B Virus Resistance Testing and Genotyping in a Clinical Microbiology Laboratory." Journal of Clinical Microbiology 54, no. 1 (November 4, 2015): 127–33. http://dx.doi.org/10.1128/jcm.02229-15.
Full textPepe, Massimiliano, Domenica Costantino, and Alfredo Restuccia Garofalo. "An Efficient Pipeline to Obtain 3D Model for HBIM and Structural Analysis Purposes from 3D Point Clouds." Applied Sciences 10, no. 4 (February 12, 2020): 1235. http://dx.doi.org/10.3390/app10041235.
Full textKontoudaki, A., and A. Georgopoulos. "HBIM LIBRARY DEVELOPMENT FOR A DORIC TEMPLE COLUMN." International Archives of the Photogrammetry, Remote Sensing and Spatial Information Sciences XLIII-B2-2022 (May 30, 2022): 1153–58. http://dx.doi.org/10.5194/isprs-archives-xliii-b2-2022-1153-2022.
Full textSteytler, M., and D. W. Thaldar. "Public health emergency preparedness and response in South Africa: A review of recommendations for legal reform relating to data and biological sample sharing." South African Journal of Bioethics and Law 14, no. 3 (December 31, 2021): 101–6. http://dx.doi.org/10.7196/sajbl.2021.v14i3.772.
Full textBruno, N., and R. Roncella. "A RESTORATION ORIENTED HBIM SYSTEM FOR CULTURAL HERITAGE DOCUMENTATION: THE CASE STUDY OF PARMA CATHEDRAL." ISPRS - International Archives of the Photogrammetry, Remote Sensing and Spatial Information Sciences XLII-2 (May 30, 2018): 171–78. http://dx.doi.org/10.5194/isprs-archives-xlii-2-171-2018.
Full textLeoni, Leonardo, Alessandra Cantini, Farshad BahooToroody, Saeed Khalaj, Filippo De Carlo, Mohammad Mahdi Abaei, and Ahmad BahooToroody. "Reliability Estimation under Scarcity of Data: A Comparison of Three Approaches." Mathematical Problems in Engineering 2021 (March 19, 2021): 1–15. http://dx.doi.org/10.1155/2021/5592325.
Full textHarlin, Ulrika, Jörgen Frohm, Martina Berglund, and Johan Stahre. "TOWARDS EFFICIENT AUTOMATION IMPLEMENTATION." IFAC Proceedings Volumes 39, no. 4 (2006): 71–76. http://dx.doi.org/10.3182/20060522-3-fr-2904.00012.
Full textSchiper, A. "Efficient Implementation of Rendezvous." Computer Journal 32, no. 3 (March 1, 1989): 267–72. http://dx.doi.org/10.1093/comjnl/32.3.267.
Full textAlpern, Bowen, Anthony Cocchi, Stephen Fink, and David Grove. "Efficient implementation of Java interfaces." ACM SIGPLAN Notices 36, no. 11 (November 2001): 108–24. http://dx.doi.org/10.1145/504311.504291.
Full textDissertations / Theses on the topic "Efficient implementation for HBVM"
King, Myron Decker. "An efficient sequential BTRS implementation." Thesis, Massachusetts Institute of Technology, 2009. http://hdl.handle.net/1721.1/46603.
Full textIncludes bibliographical references (leaves 73-74).
This thesis describes the implementation of BTRS, a language based on guarded atomic actions (GAA). The input language to the compiler which forms the basis of this work is a hierarchical tree of modules containing state, interface methods, and rules which fire atomically to cause state transitions. Since a schedule need not be specified, the program description is inherently nondeterministic, though the BTRS language does allow the programmer to remove nondeterminism by specifying varying degrees of scheduling constraints. The compiler outputs a (sequential) single-threaded C implementation of the input description, choosing a static schedule which adheres to the input constraints. The resulting work is intended to be used as the starting point for research into efficient software synthesis from guarded atomic actions, and ultimately a hardware inspired programming methodology for writing parallel software. This compiler is currently being used to generate software for a heterogeneous system in which the software and hardware components are both specified in BTRS.
by Myron Decker King.
S.M.
Patel, Nirav B. "Voronoi diagrams robust and efficient implementation /." Diss., Online access via UMI:, 2005.
Find full textStenman, Erik. "Efficient Implementation of Concurrent Programming Languages." Doctoral thesis, Uppsala University, Department of Information Technology, 2002. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-2688.
Full textDissertation in Computer Science to be publicly examined in Häggsalen, Ångströmlaboratoriet, Uppsala University, on Friday, November 1, 2002 at 1:00 pm for the degree of doctor of philosophy. The examination will be conducted in English.
This thesis proposes and experimentally evaluates techniques for efficient implementation of languages designed for high availability concurrent systems. This experimental evaluation has been done while developing the High Performance Erlang (HiPE) system, a native code compiler for SPARC and x86. The two main goals of the HiPE system are to provide efficient execution of Erlang programs, and to provide a research vehicle for evaluating implementation techniques for concurrent functional programming languages.
The focus of the thesis is the evaluation of two techniques that enable inter-process optimization through dynamic compilation. The first technique is a fast register allocator called linear scan, and the second is a memory architecture where processes share memory.
The main contributions of the thesis are:
An evaluation of linear scan register allocation in a different language setting. In addition the performance of linear scan on the register poor x86 architecture is evaluated for the first time.
A description of three different heap architectures (private heaps, shared heap, and a hybrid of the two), with a systematic investigation of implementation aspects and an extensive discussion on the associated performance trade-offs of the heap architectures. The description is accompanied by an experimental evaluation of the private vs. the shared heap setting.
A novel approach to optimizing a concurrent program, by merging code from a sender with code from a receiver, is presented together with other methods for reducing the overhead of context switching.
A description of the implementation aspects of a complete and robust native code Erlang system, which makes it possible to test compiler optimizations on real world programs.
ALVES, ROGERIO GUEDES. "EFFICIENT MULTI-RATE SYSTEM IMPLEMENTATION FORMS." PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO, 1993. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=8692@1.
Full textInicialmente apresenta-se a estrutura de um sistema Multi- taxa, faz-se uma revisão teórica do mesmo, e descreve-se seu funcionamento. Posteriormente são apresentadas várias formas de implementar este sistema, como realizá-lo no domínio do tempo, parte no domínio do tempo e parte no domínio da freqüência e realizá-lo no domínio da freqüência. Nestas formas de implementação são considerados fatores como: emprego da técnica de overlap- save ou overlap-add para realização da convolução a ser implementada no sistema, e utilização de filtros do tipo IIR ou FIR para realizar o filtro de reconstrução. Nos sistemas implementados das diversas formas são analisados o atraso e a complexidade comparando-se os resultados teóricos obtidos. Nestas diferentes formas de implementação são mostrados sistemas com particularidades interessantes como: implementação da interpolação no domínio da freqüência e utilização de uma FFT inversa voltada para interpolação e decimação. Finalmente são apresentados resultados práticos dos sistemas realizados, sendo estes avaliados, comparados com os teóricos e comentados.
Firstly, a multi-rate system structure is presented, a theorical review is made and its behavior is described. Afterwards, many forms of its implementation are presented: in time domain, mixed time domain and frequency domain; and in the frequency domain only. In those implementation some factors are taken into account, such as the use of the overlap-save and overlap- add techniques for the convolution, and the utilization of IIR or FIR structures as reconstruction filters. In the system implemented, the delay and complexity are analised, by the comparing to the theorical results. Some interesting results are show, such as the implementation of the frequency domain interpolation and the use of an inverse FFT dedicated to decimation and interpolation. Finally, pratical results of the implemented system are presented. These are evaluated, compared to the theorical ones and commented upon.
Mahdi, Abdul-Hussain Ebrahim. "Efficient generalized transform algorithms for digital implementation." Thesis, Bangor University, 1990. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.277612.
Full textWojtczak, Dominik. "Recursive probabilistic models : efficient analysis and implementation." Thesis, University of Edinburgh, 2009. http://hdl.handle.net/1842/3217.
Full textTaylor, David Eirik. "Efficient Implementation of Cross-Correlation in Hardware." Thesis, Norges teknisk-naturvitenskapelige universitet, Institutt for elektronikk og telekommunikasjon, 2014. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-25839.
Full textAbdoel-Gawad, Farag Saleh. "Efficient hardware implementation of the CORDIC algorithm." Thesis, Liverpool John Moores University, 1999. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.299066.
Full textFan, Yanan. "Efficient implementation of Markov chain Monte Carlo." Thesis, University of Bristol, 2001. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.343307.
Full textJerez, Juan Luis. "Custom optimization algorithms for efficient hardware implementation." Thesis, Imperial College London, 2013. http://hdl.handle.net/10044/1/12791.
Full textBooks on the topic "Efficient implementation for HBVM"
Fontijne, D. H. F. Efficient implementation of geometric algebra. [S.l: s.n.], 2007.
Find full textDörr, Heiko, ed. Efficient Graph Rewriting and Its Implementation. Berlin, Heidelberg: Springer Berlin Heidelberg, 1995. http://dx.doi.org/10.1007/bfb0031909.
Full textEfficient graph rewriting and its implementation. New York, N.Y: Springer-Verlag, 1995.
Find full textJiang, Guang-Shan. Efficient implementation of weighted ENO schemes. Hampton, VA: Institute for Computer Applications in Science and Engineering, NASA Langley Research Center, 1995.
Find full textShen, Hong. Efficient design and implementation of parallel algorithms. Åbo: Åbo Akademis Förlag, 1991.
Find full textXia, Edward. Efficient implementation of an XML query algebra. Ottawa: National Library of Canada, 2002.
Find full textNolan, Gary. Efficient SAP NetWeaver BW implementation and upgrade guide. 2nd ed. Boston, MA: Galileo Press, 2010.
Find full textStanley, Osher, and Langley Research Center, eds. Efficient implementation of essentially non-oscillatory shock capturing schemes. Hampton, Va: National Aeronautics and Space Administration, Langley Research Center, 1987.
Find full textKosuge, Yoshimichi. AIX 4.3 elements of security: Effective and efficient implementation. Poughkeepsie, N.Y: IBM, International Technical Support Organization, 2000.
Find full textBook chapters on the topic "Efficient implementation for HBVM"
Koopman, Pieter, and Rinus Plasmeijer. "Efficient Combinator Parsers." In Implementation of Functional Languages, 120–36. Berlin, Heidelberg: Springer Berlin Heidelberg, 1999. http://dx.doi.org/10.1007/3-540-48515-5_8.
Full textHerout, Adam, Markéta Dubská, and Jirí Havel. "Efficient Implementation of PClines." In Real-Time Detection of Lines and Grids, 55–68. London: Springer London, 2012. http://dx.doi.org/10.1007/978-1-4471-4414-4_6.
Full textShenoy, Narendra, and Richard Rudell. "Efficient Implementation of Retiming." In The Best of ICCAD, 615–30. Boston, MA: Springer US, 2003. http://dx.doi.org/10.1007/978-1-4615-0292-0_49.
Full textde Dormale, Guerric Meurice, Philippe Bulens, and Jean-Jacques Quisquater. "Efficient Modular Division Implementation." In Field Programmable Logic and Application, 231–40. Berlin, Heidelberg: Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-30117-2_25.
Full textMeinel, Christoph, and Thorsten Theobald. "Efficient Implementation of OBDDs." In Algorithms and Data Structures in VLSI Design, 105–22. Berlin, Heidelberg: Springer Berlin Heidelberg, 1998. http://dx.doi.org/10.1007/978-3-642-58940-9_7.
Full textZein, André. "Towards Implementation." In Transition Towards Energy Efficient Machine Tools, 111–30. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012. http://dx.doi.org/10.1007/978-3-642-32247-1_5.
Full textFranke, Hubertus, Peter Hochschild, Pratap Pattnaik, and Marc Snir. "An Efficient Implementation of MPI." In Programming Environments for Massively Parallel Distributed Systems, 219–29. Basel: Birkhäuser Basel, 1994. http://dx.doi.org/10.1007/978-3-0348-8534-8_22.
Full textIndermark, K., and H. Klaeren. "Efficient implementation of structural recursion." In Fundamentals of Computation Theory, 204–13. Berlin, Heidelberg: Springer Berlin Heidelberg, 1987. http://dx.doi.org/10.1007/3-540-18740-5_43.
Full textBischof, Mario, Tobias Oder, and Tim Güneysu. "Efficient Microcontroller Implementation of BIKE." In Innovative Security Solutions for Information Technology and Communications, 34–49. Cham: Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-41025-4_3.
Full textIzu, Tetsuya, Jun Kogure, Masayuki Noro, and Kazuhiro Yokoyama. "Efficient Implementation of Schoof’s Algorithm." In Lecture Notes in Computer Science, 66–79. Berlin, Heidelberg: Springer Berlin Heidelberg, 1998. http://dx.doi.org/10.1007/3-540-49649-1_7.
Full textConference papers on the topic "Efficient implementation for HBVM"
Perich, Filip, Edward Morgan, Olga Ritterbush, Mark McHenry, and Salvador D'Itri. "Efficient dynamic spectrum access implementation." In MILCOM 2010 - 2010 IEEE Military Communications Conference. IEEE, 2010. http://dx.doi.org/10.1109/milcom.2010.5679564.
Full textWiesmaier, Alex, Moritz Horsch, Johannes Braun, Franziskus Kiefer, Detlef Hhnlein, Falko Strenzke, and Johannes Buchmann. "An efficient mobile PACE implementation." In the 6th ACM Symposium. New York, New York, USA: ACM Press, 2011. http://dx.doi.org/10.1145/1966913.1966936.
Full textHuang, Yu-Jung, Yang-Shih Lin, Kuang-Yu Hung, and Kuo-Chen Lin. "Efficient Implementation of AES IP." In APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems. IEEE, 2006. http://dx.doi.org/10.1109/apccas.2006.342467.
Full textLanghammer, Martin, and Bogdan Pasca. "Efficient FPGA Modular Multiplication Implementation." In FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays. New York, NY, USA: ACM, 2021. http://dx.doi.org/10.1145/3431920.3439306.
Full textGarcia-Vite, Pedro, Juan M. Ramirez, and Julio C. Rosas-Caro. "Efficient implementation of DVR's control." In Energy Society General Meeting (PES). IEEE, 2009. http://dx.doi.org/10.1109/pes.2009.5275931.
Full text"Session MA8a1: Efficient hardware implementation." In 2016 50th Asilomar Conference on Signals, Systems and Computers. IEEE, 2016. http://dx.doi.org/10.1109/acssc.2016.7869026.
Full textAlpern, Bowen, Anthony Cocchi, Stephen Fink, and David Grove. "Efficient implementation of Java interfaces." In the 16th ACM SIGPLAN conference. New York, New York, USA: ACM Press, 2001. http://dx.doi.org/10.1145/504282.504291.
Full textHiroshi Tezuka, A. H., and Y. Ishikawa. "Highly Efficient Gang Scheduling Implementation." In SC98 - High Performance Networking and Computing Conference. IEEE, 1998. http://dx.doi.org/10.1109/sc.1998.10007.
Full textMohammad, Khader, and Sos Agaian. "Efficient FPGA implementation of convolution." In 2009 IEEE International Conference on Systems, Man and Cybernetics - SMC. IEEE, 2009. http://dx.doi.org/10.1109/icsmc.2009.5346737.
Full textChen, Xiaohe, Michael Cracraft, Yao Jiang Zhang, Jianmin Zhang, James L. Drewniak, Bruce Archambeault, and Samuel Connor. "An Efficient Implementation of Parallel FDTD." In 2007 International Symposium on Electromagnetic Compatibility. IEEE, 2007. http://dx.doi.org/10.1109/isemc.2007.197.
Full textReports on the topic "Efficient implementation for HBVM"
Harris, D., and T. Paik. Subspace Detectors: Efficient Implementation. Office of Scientific and Technical Information (OSTI), July 2006. http://dx.doi.org/10.2172/898451.
Full textHeimbigner, Dennis. An Efficient Implementation of Query/Advertise. Fort Belvoir, VA: Defense Technical Information Center, March 2003. http://dx.doi.org/10.21236/ada436796.
Full textBraun, Thomas R., and Ralph C. Smith. Efficient Implementation Algorithms for Homogenized Energy Models. Fort Belvoir, VA: Defense Technical Information Center, January 2005. http://dx.doi.org/10.21236/ada439961.
Full textFung, Nicholas, and Philip David. Implementation of Efficient Pan-Tilt-Zoom Camera Calibration. Fort Belvoir, VA: Defense Technical Information Center, April 2009. http://dx.doi.org/10.21236/ada497476.
Full textGoldberg, Andrew V. Processor-Efficient Implementation of a Maximum Flow Algorithm,. Fort Belvoir, VA: Defense Technical Information Center, January 1990. http://dx.doi.org/10.21236/ada323469.
Full textDay, David. An Efficient Implementation of Non Symmetric Lanczos Algorithm,. Fort Belvoir, VA: Defense Technical Information Center, October 1995. http://dx.doi.org/10.21236/ada310632.
Full textSherman, Rivi, and Amir Pnueli. Model Checking for Linear Temporal Logic: An Efficient Implementation. Fort Belvoir, VA: Defense Technical Information Center, June 1990. http://dx.doi.org/10.21236/ada225189.
Full textBraun, Thomas R., and Ralph C. Smith. Efficient Implementation Algorithm for a Homogenized Energy Model with Thermal Relaxation. Fort Belvoir, VA: Defense Technical Information Center, January 2005. http://dx.doi.org/10.21236/ada440030.
Full textHardwick, Jonathan C. Implementation and Evaluation of an Efficient 2D Parallel Delaunay Triangulation Algorithm,. Fort Belvoir, VA: Defense Technical Information Center, April 1997. http://dx.doi.org/10.21236/ada328005.
Full textLala, P. K., and A. Walker. Modular Implementation of Efficient Self-Checking Checkers for the Berger Code. Fort Belvoir, VA: Defense Technical Information Center, March 1996. http://dx.doi.org/10.21236/ada310441.
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