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Dissertations / Theses on the topic 'Electronic circuits Analog electronic systems'

Author: Grafiati

Published: 4 June 2021

Last updated: 8 February 2022

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1

Sabzavari, Abbas Mostafavi. "Fault simulation and diagnosis in analog electronic systems." Thesis, University of Exeter, 1988. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.328233.

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2

Knight, Clinton D. "WWW-based testing of analog circuits." Diss., Georgia Institute of Technology, 1999. http://hdl.handle.net/1853/14863.

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3

Yoon, Heebyung. "Fault detection and identification techniques for embedded analog circuits." Diss., Georgia Institute of Technology, 1998. http://hdl.handle.net/1853/13041.

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4

Hu, Yichuan. "Analog non-linear coding for improved performance in compressed sensing." Access to citation, abstract and download form provided by ProQuest Information and Learning Company; downloadable PDF file, 76 p, 2009. http://proquest.umi.com/pqdweb?did=1885755731&sid=5&Fmt=2&clientId=8331&RQT=309&VName=PQD.

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5

El-Gamal, Mohamed A. "Fault location and parameter identification in analog circuits." Ohio : Ohio University, 1990. http://www.ohiolink.edu/etd/view.cgi?ohiou1172776742.

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6

Peng, Sheng-Yu. "Charge-based analog circuits for reconfigurable smart sensory systems." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/29655.

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Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009.<br>Committee Chair: Hasler, Paul; Committee Member: Anderson, David; Committee Member: Degertekin, F.; Committee Member: Ghovanloo, Maysam; Committee Member: Minch, Bradley. Part of the SMARTech Electronic Thesis and Dissertation Collection.

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7

Killens, Jacob. "Utilizing standard CMOS process floating gate devices for analog design." Master's thesis, Mississippi State : Mississippi State University, 2001. http://library.msstate.edu/etd/show.asp?etd=etd-04092001-110957.

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8

Chawla, Ravi. "Power-efficient analog systems to perform signal-processing using floating-gate MOS device for portable applications." Available online, Georgia Institute of Technology, 2005, 2004. http://etd.gatech.edu/theses/available/etd-01052005-144937/unrestricted/chawla%5Fravi%5F200505%5Fphd.pdf.

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Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2005.<br>Paul Hasler, Committee Member ; Joy Laskar, Committee Chair ; Phil Allen, Committee Member ; Dave Anderson, Committee Member ; Mark T. Smith, Committee Member. Includes bibliographical references.

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9

Hall, Tyson Stuart. "Field-Programmable Analog Arrays: A Floating-Gate Approach." Diss., Available online, Georgia Institute of Technology, 2004:, 2004. http://etd.gatech.edu/theses/available/etd-07122004-124607/unrestricted/hall%5Ftyson%5Fs%5F200407%5Fphd.pdf.

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Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2005. Directed by David Anderson.<br>Prvulovic, Milos, Committee Member ; Citrin, David, Committee Member ; Lanterman, Aaron, Committee Member ; Yalamanchili, Sudhakar, Committee Member ; Hasler, Paul, Committee Member ; Anderson, David, Committee Chair. Includes bibliographical references.

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10

Coimbra, Ricardo Pureza. "Geração de tensão de referencia e sinal de sensoriamento termico usando transistores MOS em forte inversão." [s.n.], 2009. http://repositorio.unicamp.br/jspui/handle/REPOSIP/262029.

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Orientador: Carlos Alberto dos Reis Filho<br>Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação<br>Made available in DSpace on 2018-08-14T00:43:32Z (GMT). No. of bitstreams: 1 Coimbra_RicardoPureza_M.pdf: 4991793 bytes, checksum: 2b5fb9293ae9abe4c248964485ff74e3 (MD5) Previous issue date: 2009<br>Resumo: Fontes de referência de tensão e sensores de temperatura são blocos extensivamente utilizados em sistemas microeletrônicos. Como alternativa à aplicação de estruturas consolidadas, mas protegidas por acordos de propriedade intelectual

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11

Cajueiro, João Paulo Cerquinho. "Fonte de tensão de referencia ajustavel implementada com transistores MOS." [s.n.], 2005. http://repositorio.unicamp.br/jspui/handle/REPOSIP/260509.

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Orientador: Carlos Alberto dos Reis Filho<br>Tese (doutorado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação<br>Made available in DSpace on 2018-08-05T12:05:57Z (GMT). No. of bitstreams: 1 Cajueiro_JoaoPauloCerquinho_D.pdf: 1564955 bytes, checksum: 6ff645ea51f6ee2dcb9e7ab8db6363aa (MD5) Previous issue date: 2005<br>Resumo: Uma nova técnica de compensação de temperatura para implementar tensões de referência em circuitos CMOS é descrita, desde o seu fundamento teórico até a comprovação experimental feita com amostras de circuitos integrados protótipos qu

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12

U, Seng-Pan. "Tecnicas de interpolacao em filtros multiritmo com condensadores comutados para Interfaces Analogicas com filtragem de alta-frequencia = Multirate Switched-Capacitor interpolation techniques for very high-frequency Analog Front-End filtering." Thesis, University of Macau, 2002. http://umaclib3.umac.mo/record=b1873496.

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13

Zampronho, Neto Fernando. "Analise, projeto e layout de uma topologia de circuito regulador de tensão para aplicação em microprocessadores." [s.n.], 2009. http://repositorio.unicamp.br/jspui/handle/REPOSIP/259236.

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Orientadores: Jacobus Willibrordus Swart, Jader Alves de Lima Filho<br>Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação<br>Made available in DSpace on 2018-08-15T17:45:20Z (GMT). No. of bitstreams: 1 ZampronhoNeto_Fernando_M.pdf: 5842798 bytes, checksum: 248329a719c06d1a00d97f94590f1b92 (MD5) Previous issue date: 2009<br>Resumo: Este trabalho tem como objetivo o estudo de uma arquitetura de regulador de tensão do tipo multi-fase para alimentação de microprocessadores, os quais demandam pequena variação em sua tensão, mesmo face aos

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14

Purohit, Siddharth. "Compact modeling of silicon carbide (SiC) vertical junction field effect transistor (VJFET) in PSpice using Angelov model and PSpice simulation of analog circuit building blocks using SiC VJFET model." Master's thesis, Mississippi State : Mississippi State University, 2006. http://sun.library.msstate.edu/ETD-db/ETD-browse/browse.

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15

Aluru, Gunasekhar. "Exploring Analog and Digital Design Using the Open-Source Electric VLSI Design System." Thesis, University of North Texas, 2016. https://digital.library.unt.edu/ark:/67531/metadc849770/.

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The design of VLSI electronic circuits can be achieved at many different abstraction levels starting from system behavior to the most detailed, physical layout level. As the number of transistors in VLSI circuits is increasing, the complexity of the design is also increasing, and it is now beyond human ability to manage. Hence CAD (Computer Aided design) or EDA (Electronic Design Automation) tools are involved in the design. EDA or CAD tools automate the design, verification and testing of these VLSI circuits. In today’s market, there are many EDA tools available. However, they are very expen

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16

U, Seng-Pan. "多率開關電容內插技術及其在超高頻模擬前端濾波的應用". Thesis, University of Macau, 2002. http://umaclib3.umac.mo/record=b1637078.

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17

Tassoudji, Mohammad Ali. "Electromagnetic interference in electronic circuits and systems." Thesis, Massachusetts Institute of Technology, 1994. http://hdl.handle.net/1721.1/35392.

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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.<br>Includes bibliographical references (p. 191-198).<br>by Mohammad Ali Tassoudji.<br>Ph.D.

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18

Md, Ali Sawal Hamid. "System level performance and yield optimisation for analogue integrated circuits." Thesis, University of Southampton, 2009. https://eprints.soton.ac.uk/69724/.

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Advances in silicon technology over the last decade have led to increased integration of analogue and digital functional blocks onto the same single chip. In such a mixed signal environment, the analogue circuits must use the same process technology as their digital neighbours. With reducing transistor sizes, the impact of process variations on analogue design has become prominent and can lead to circuit performance falling below specification and hence reducing the yield. This thesis explores the methodology and algorithms for an analogue integrated circuit automation tool that optimizes perf

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19

Bhattacharya, Sambuddha. "Template-driven parasitic-aware optimization of analog/RF IC layouts /." Thesis, Connect to this title online; UW restricted, 2005. http://hdl.handle.net/1773/6121.

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20

Hong, Seong-Kwan. "Performance driven analog layout compiler." Diss., Georgia Institute of Technology, 1994. http://hdl.handle.net/1853/15037.

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21

Deese, Anthony Steven Nwankpa Chika O. "Analog methods for power system analysis and load modeling /." Philadelphia, Pa. : Drexel University, 2008. http://hdl.handle.net/1860/2822.

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22

Anglesea, John Robert Edward. "The optimisation of multisensor arrays in electronic odour sensing systems." Thesis, University of Derby, 2002. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.270027.

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23

Odame, Kofi. "Exploiting device nonlinearity in analog circuit design." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/29751.

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Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009.<br>Committee Chair: Hasler, Paul; Committee Member: Anderson, David; Committee Member: Butera, Robert; Committee Member: Minch, Bradley; Committee Member: Taylor, David. Part of the SMARTech Electronic Thesis and Dissertation Collection.

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24

Hou, Junwei. "Concurrent fault simulation for mixed-signal circuits." Diss., Georgia Institute of Technology, 2001. http://hdl.handle.net/1853/15735.

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25

Lui, Siu-hong. "Analog circuit design by nonconvex polynomial optimization two design examples /." Click to view the E-thesis via HKUTO, 2007. http://sunzi.lib.hku.hk/HKUTO/record/B39557418.

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26

Dai, Hong. "Development of a decomposition approach for testing large analog circuits." Ohio : Ohio University, 1989. http://www.ohiolink.edu/etd/view.cgi?ohiou1172006982.

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27

Cheung, Wing-tai. "Geometric programming and signal flow graph assisted design of interconnect and analog circuits." Click to view the E-thesis via HKUTO, 2007. http://sunzi.lib.hku.hk/HKUTO/record/B39558526.

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28

Butka, Brian K. "An investigation of marrow-bandgap semiconductors : devices, circuits, and systems." Diss., Georgia Institute of Technology, 1989. http://hdl.handle.net/1853/15489.

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29

Ellis, Kimberly Paige. "Analysis of setup management strategies in electronic assembly systems." Diss., Georgia Institute of Technology, 1996. http://hdl.handle.net/1853/30757.

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30

Chakrabarti, Sudip. "Test generation for fault isolation in analog and mixed-mode circuits." Diss., Georgia Institute of Technology, 2001. http://hdl.handle.net/1853/14899.

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31

Ozdemir, Ersin. "Evolutionary methods for the design of digital electronic circuits and systems." Thesis, Cardiff University, 1999. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.326874.

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32

St, Leger Aaron. "Power system security assessment through analog computation /." Click for resource, 2008. http://hdl.handle.net/1860/2815.

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33

Pansare, Manoj M. "Modeling and simulation of analog devices using PRECISE." Thesis, Virginia Tech, 1988. http://hdl.handle.net/10919/43263.

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The design and development of computer models to simulate analog devices and their effects on circuit applications has been investigated at length. The focus of this research is the development of theoretical and computer models for discrete devices using the popular simulator PRECISE, PRogram for Evaluating Circuits in an Interactive Simulation Environment [3], using a new method for model construction. This new method develops a model approximating the mathematics of the simulation via perturbations and iterations [19]. The models developed by the new method in each case yield a minimum si

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34

Pous, i. Sabadí Carles. "Case based reasoning as an extension of fault dictionary methods for linear electronic analog circuits diagnosis." Doctoral thesis, Universitat de Girona, 2004. http://hdl.handle.net/10803/7728.

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El test de circuits és una fase del procés de producció que cada vegada pren més importància quan es desenvolupa un nou producte. Les tècniques de test i diagnosi per a circuits digitals han estat desenvolupades i automatitzades amb èxit, mentre que aquest no és encara el cas dels circuits analògics. D'entre tots els mètodes proposats per diagnosticar circuits analògics els més utilitzats són els diccionaris de falles. En aquesta tesi se'n descriuen alguns, tot analitzant-ne els seus avantatges i inconvenients.<br/>Durant aquests últims anys, les tècniques d'Intel·ligència Artificial han esde

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35

張永泰 and Wing-tai Cheung. "Geometric programming and signal flow graph assisted design of interconnect and analog circuits." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2007. http://hub.hku.hk/bib/B39558526.

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36

Son, Kyung-Im. "A multi-class, multi-dimensional classifier as a topology selector for analog circuit design / by Kyung-Im Son." Thesis, Connect to this title online; UW restricted, 1998. http://hdl.handle.net/1773/5919.

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37

Lui, Siu-hong, and 呂小康. "Analog circuit design by nonconvex polynomial optimization: two design examples." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2007. http://hub.hku.hk/bib/B39557418.

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38

St, Leger Aaron Nwankpa Chika O. "Power system security assessment through analog computation /." Philadelphia, Pa. : Drexel University, 2008. http://hdl.handle.net/1860/2815.

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39

Abramson, David. "MITE Architectures for Reconfigurable Analog Arrays." Thesis, Georgia Institute of Technology, 2004. http://hdl.handle.net/1853/4920.

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With the introduction of the floating-gate transistor into reconfigurable architectures, great advances have been made in the field. Recently, Hall et. al. have proposed the first truly large-scale field programmable analog array (FPAA). As an outgrowth of this work, a new class of FPAAs based on translinear elements has begun to be developed. The use of translinear elements, multiple input translinear elements (MITEs) specifically, allows for extreme versatility in the functions implemented by the system while keeping the computational elements of the FPAA regular. In addition, synthesis

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40

Srinivasan, Venkatesh. "Programmable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip Learning." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/11588.

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In this work, programmable analog techniques using floating-gate transistors have been developed to design precision analog circuits, low-power signal processing primitives and adaptive systems that learn on-chip. Traditional analog implementations lack programmability with the result that issues such as mismatch are corrected at the expense of area. Techniques have been proposed that use floating-gate transistors as an integral part of the circuit of interest to provide both programmability and the ability to correct for mismatch. Traditionally, signal processing has been performed in the dig

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41

Roh, Jeongjin. "Mixed-signal signature analysis for systems-on-a-chip." Access restricted to users with UT Austin EID Full text (PDF) from UMI/Dissertation Abstracts International, 2001. http://wwwlib.umi.com/cr/utexas/fullcit?p3035971.

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42

Tohme, Philip Edward. "Optical switching and its application in Sonet-based transmission systems." Thesis, This resource online, 1991. http://scholar.lib.vt.edu/theses/available/etd-10242009-020314/.

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43

Bell, Ian M. "Developments in testing and design for test of mixed signal electronic circuits and systems." Thesis, University of Hull, 2007. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.441756.

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44

Shana'a, Osama K. "Circuit Implementation of a High-speed Continuous-time Current-mode Field Programmable Analog Array (FPAA)." PDXScholar, 1996. https://pdxscholar.library.pdx.edu/open_access_etds/5103.

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The growing interest in programmable analog circuits has led to the development of Field Programmable Analog Arrays (FPAAs). An FPAA consists of: 1) a programmable cell that can be reconfigured to perform several analog functions. 2) an architecture that interconnects a number of copies of the programmable cell. In this thesis, the full monolithic circuit implementation of the analog part of the programmable cell is presented. Chapter I gives an introduction to the idea of FPAA and introduces the FPAA architecture and the cell block diagram. Chapter II deals with the design and verification of

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45

Ravi, Sanjay. "Inter-pulse interval based mixed signal representations/." Full text open access at:, 2008. http://content.ohsu.edu/u?/etd,656.

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46

Carastro, Lawrence A. "Predictive statistical analysis of embedded meander resistors via measurement of canonical building blocks." Diss., Georgia Institute of Technology, 2002. http://hdl.handle.net/1853/15482.

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47

Kelber, Kristina, Wolfgang Schwarz, and Ronald Tetzlaff. "18th IEEE Workshop on Nonlinear Dynamics of Electronic Systems." Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2010. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-39134.

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48

Tomlin, Toby-Daniel. "Analysis and modelling of jitter and phase noise in electronic systems : phase noise in RF amplifiers and jitter in timing recovery circuits." University of Western Australia. School of Electrical, Electronic and Computer Engineering, 2004. http://theses.library.uwa.edu.au/adt-WU2004.0021.

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Timing jitter and phase noise are important design considerations in most electronic systems, particularly communication systems. The desire for faster transmission speeds and higher levels of integration, combined with lower signal levels and denser circuit boards has placed greater emphasis on managing problems related to phase noise, timing jitter, and timing distribution. This thesis reports original work on phase noise modelling in electronic systems. A new model is proposed which predicts the up-conversion of baseband noise to the carrier frequency in RF amplifiers. The new model is vali

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49

Dong, Rumei. "Modeling of the cardiovascular system with integrated finite elemant and electrical analog methods /." View online ; access limited to URI, 2006. http://0-wwwlib.umi.com.helin.uri.edu/dissertations/fullcit/3239905.

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50

Khane, Vaibhav B. "Analogy based modeling of natural convection." Diss., Rolla, Mo. : Missouri University of Science and Technology, 2009. http://scholarsmine.mst.edu/thesis/pdf/Khane_09007dcc807046fe.pdf.

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Thesis (M.S.)--Missouri University of Science and Technology, 2009.<br>Vita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed November 25, 2009) Includes bibliographical references (p. 23-24).

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