Journal articles: 'Electronic circuits Analog electronic systems'

1

ITOH, MAKOTO. "SYNTHESIS OF ELECTRONIC CIRCUITS FOR SIMULATING NONLINEAR DYNAMICS." International Journal of Bifurcation and Chaos 11, no. 03 (March 2001): 605–53. http://dx.doi.org/10.1142/s0218127401002341.

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In this paper, we present a unified approach for synthesizing nonlinear circuits. That is, we synthesize electronic circuits for simulating nonlinear dynamics. One advantage of our approach is that we can directly synthesize nonlinear circuits from ordinary differential equations. A large variety of chaotic nonlinear systems (Chua's circuit, hyperchaotic system, Lorenz system, Rössler system, etc.) are realized by using several analog circuit elements.

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Dieste-Velasco, M. Isabel. "Application of a Fuzzy Inference System for Optimization of an Amplifier Design." Mathematics 9, no. 17 (September 5, 2021): 2168. http://dx.doi.org/10.3390/math9172168.

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Simulation programs are widely used in the design of analog electronic circuits to analyze their behavior and to predict the response of a circuit to variations in the circuit components. A fuzzy inference system (FIS) in combination with these simulation tools can be applied to identify both the main and interaction effects of circuit parameters on the response variables, which can help to optimize them. This paper describes an application of fuzzy inference systems to modeling the behavior of analog electronic circuits for further optimization. First, a Monte Carlo analysis, generated from the tolerances of the circuit components, is performed. Once the Monte Carlo results are obtained for each of the response variables, the fuzzy inference systems are generated and then optimized using a particle swarm optimization (PSO) algorithm. These fuzzy inference systems are used to determine the influence of the circuit components on the response variables and to select them to optimize the amplifier design. The methodology proposed in this study can be used as the basis for optimizing the design of similar analog electronic circuits.

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Waqas, Maria, Muhammad Khurram, and S. M. Razaul Hasan. "Analog Electronic Circuits to Model Cooperativity in Hill Process." Mehran University Research Journal of Engineering and Technology 39, no. 4 (October 1, 2020): 678–85. http://dx.doi.org/10.22581/muet1982.2004.01.

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In the field of computational biology, electronic modeling of bio-cellular processes is in vogue for about a couple of decades. Fast, efficient and scalable electronic mimetics of recurrently found bio-chemical reactions are expected to provide better electronic circuit simulators that can also be used as bio-sensors or implantable biodevices at cellular levels. This paper presents some possible electronic circuit equivalents to model dynamics of one such bio-chemical reaction commonly involved in many bio-cellular processes, specifically pathways in living cells, known as the Hill process. The distinguishing feature of this process is cooperativity which has been modeled in silicon substrate using a pair of transistors, one transistor driving current in the other the same way ligand binding to one receptor site controls the binding affinity of the other receptor sites. Two possible circuits have been proposed and compared to electronically model cooperativity of a Hill reaction. The main idea is to exploit the natural analogies found between structures and processes of a bio-cell and electronic transistor mechanics, to efficiently model fundamental bio-chemical reactions found recurring in bio-processes. These circuits can then be combined and rearranged quickly to form larger, more complex bio-networks, thus mitigating the intricacies involved in modeling of such systems.

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FRITZ, KARL E., BARBARA A. RANDALL, GREGG J. FOKKEN, MICHAEL J. DEGERSTROM, MICHAEL J. LORSUNG, JASON F. PRAIRIE, ERIC L. H. AMUNDSEN, et al. "HIGH-SPEED, LOW-POWER DIGITAL AND ANALOG CIRCUITS IMPLEMENTED IN IBM SiGe BiCMOS TECHNOLOGY." International Journal of High Speed Electronics and Systems 13, no. 01 (March 2003): 221–37. http://dx.doi.org/10.1142/s0129156403001582.

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Under the auspices of Defense Advanced Research Project Agency's Microsystems Technology Office (DARPA/MTO) Low Power Electronics Program, the Mayo Foundation Special Purpose Processor Development Group is exploring ways to reduce circuit power consumption, while maintaining or increasing functionality, for existing military systems. Applications presently being studied include all-digital radar receivers, electronic warfare receivers, and other types of digital signal processors. One of the integrated circuit technologies currently under investigation to support such military systems is the IBM Corporation silicon germanium (SiGe) BiCMOS process. In this paper, design methodology, simulations and test results from demonstration circuits developed for these applications and implemented in the IBM SiGe BiCMOS 5HP (50 GHz fT HBTs with 0.5 μm CMOS) and 7HP (120 GHz fT HBTs with 0.18 μm CMOS) technologies will be presented.

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5

WANG, SHIU-PING, SENG-KIN LAO, HSIEN-KENG CHEN, JUHN-HORNG CHEN, and SHIH-YAO CHEN. "IMPLEMENTATION OF THE FRACTIONAL-ORDER CHEN–LEE SYSTEM BY ELECTRONIC CIRCUIT." International Journal of Bifurcation and Chaos 23, no. 02 (February 2013): 1350030. http://dx.doi.org/10.1142/s0218127413500302.

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In recent years, there has been expanding research on the applications of fractional calculus to the areas of signal processing, modeling and controls. Analog circuit implementation of chaotic systems is used in studying nonlinear dynamical phenomena, which is also applied in realizing the controller development. In this paper, chain fractance and tree fractance circuits are constructed to realize the fractional-order Chen–Lee system. The results are in good agreement with those obtained from numerical simulation. This study shows that not only is this system related to gyro motion but can also be applied to electronic circuits for secure communication.

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Mattiussi, Claudio, Daniel Marbach, Peter Dürr, and Dario Floreano. "The Age of Analog Networks." AI Magazine 29, no. 3 (September 6, 2008): 63. http://dx.doi.org/10.1609/aimag.v29i3.2156.

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A large class of systems of biological and technological relevance can be described as analog networks, that is, collections of dynamical devices interconnected by links of varying strength. Some examples of analog networks are genetic regulatory networks, metabolic networks, neural networks, analog electronic circuits, and control systems. Analog networks are typically complex systems which include nonlinear feedback loops and possess temporal dynamics at different time scales. Both the synthesis and reverse engineering of analog networks are recognized as knowledge-intensive activities, for which few systematic techniques exist. In this paper we will discuss the general relevance of the analog network concept and describe an evolutionary approach to the automatic synthesis and the reverse engineering of analog networks. The proposed approach is called analog genetic encoding (AGE) and realizes an implicit genetic encoding of analog networks. AGE permits the evolution of human-competitive solutions to real-world analog network design and identification problems. This is illustrated by some examples of application to the design of electronic circuits, control systems, learning neural architectures, and the reverse engineering of biological networks.

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7

Czaja, Z. "A self-testing method of large analog circuits in electronic embedded systems." Journal of Physics: Conference Series 238 (July 1, 2010): 012013. http://dx.doi.org/10.1088/1742-6596/238/1/012013.

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López, Alberto, Francisco Ferrero, José Ramón Villar, and Octavian Postolache. "High-Performance Analog Front-End (AFE) for EOG Systems." Electronics 9, no. 6 (June 11, 2020): 970. http://dx.doi.org/10.3390/electronics9060970.

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Electrooculography is a technique for measuring the corneo-retinal standing potential of the human eye. The resulting signal is called the electrooculogram (EOG). The primary applications are in ophthalmological diagnosis and in recording eye movements to develop simple human–machine interfaces (HCI). The electronic circuits for EOG signal conditioning are well known in the field of electronic instrumentation; however, the specific characteristics of the EOG signal make a careful electronic design necessary. This work is devoted to presenting the most important issues related to the design of an EOG analog front-end (AFE). In this respect, it is essential to analyze the possible sources of noise, interference, and motion artifacts and how to minimize their effects. Considering these issues, the complete design of an AFE for EOG systems is reported in this work.

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9

WANG, KEH-CHUNG, RANDALL B. NUBLING, KEN PEDROTTI, NENG-HAUNG SHENG, PETER M. ASBECK, KEN POULTON, JOHN CORCORAN, KNUD KNUDSEN, HAN-TZONG YUAN, and CHRISTOPHER CHANG. "AlGaAs/GaAs HBTs FOR ANALOG AND DIGITAL APPLICATIONS." International Journal of High Speed Electronics and Systems 05, no. 03 (September 1994): 213–52. http://dx.doi.org/10.1142/s0129156494000127.

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AlGaAs/GaAs Heterojunction Bipolar Transistor (HBT) technology has emerged as an important IC technology for high performance electronic systems. Many outstanding circuits have been demonstrated as a result of the AlGaAs/GaAs HBTs high speed, high accuracy and its semi-insulating substrate. Several GaAs HBT manufacturing lines have been established; some of which are shipping products. In this paper, we describe AlGaAs/GaAs HBT technology, summarize some key and representative circuits in analog, A/D conversion and digital applications, and provide prospects of GaAs HBT research.

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10

Li, Zhong Qun, Xu Fei Wang, Shu Nong Zhang, and Jia Ming Liu. "A Method of Test Point Optimization Selection for Analog Circuits." Applied Mechanics and Materials 568-570 (June 2014): 3–7. http://dx.doi.org/10.4028/www.scientific.net/amm.568-570.3.

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In analog electronic systems, characteristic information required for fault prognosis is achieved by test points of a board, so the selection and optimization of test points is an important topic for PHM research of electronic products. Current methods for selection of test points generally rely on functional simulation analysis or testability modeling analysis. Based on this, FMMEA method is introduced to find failure susceptibility components in this paper, moreover, through simulating and calculating the predictability of test points, the final test points are determined. As an example, a board level system is presented to validate this approach.

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11

WAGEMAKERS, ALEXANDRE, SAMUEL ZAMBRANO, and MIGUEL A. F. SANJUÁN. "PARTIAL CONTROL OF TRANSIENT CHAOS IN ELECTRONIC CIRCUITS." International Journal of Bifurcation and Chaos 22, no. 02 (February 2012): 1250032. http://dx.doi.org/10.1142/s0218127412500320.

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We present an analog circuit implementation of the novel partial control method, that is able to sustain chaotic transient dynamics. The electronic circuit simulates the dynamics of the one-dimensional slope-three tent map, for which the trajectories diverge to infinity for nearly all the initial conditions after behaving chaotically for a while. This is due to the existence of a nonattractive chaotic set: a chaotic saddle. The partial control allows one to keep the trajectories close to the chaotic saddle, even if the control applied is smaller than the effect of the applied noise, introduced into the system. Furthermore, we also show here that similar results can be implemented on a circuit that simulates a horseshoe-like map, which is a simple extension of the previous one. This encouraging result validates the theory and opens new perspectives for the application of this technique to systems with higher dimensions and continuous time dynamics.

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12

Guo, Ke, Yi Zhu, and Ye San. "Analog Circuit Intelligent Fault Diagnosis Based on PCA and OAOSVM." Advanced Materials Research 468-471 (February 2012): 802–6. http://dx.doi.org/10.4028/www.scientific.net/amr.468-471.802.

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Fault diagnosis of analog circuits is essential for guaranteeing the reliability and maintainability of electronic systems. Analog circuit fault diagnosis can be regarded as a pattern recognition issue and addressed by one-against-one SVM. In order to obtain a good SVM-based fault classifier, the principal component analysis technique is adopted to capture the major fault features. The extracted fault features are then used as the inputs of SVM to solve fault diagnosis problem. The effectiveness of the proposed method is verified by the experimental results.

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13

CHEN, QINGQING, GYÖRGY CSABA, PAOLO LUGLI, ULF SCHLICHTMANN, MARTIN STUTZMANN, and ULRICH RÜHRMAIR. "CIRCUIT-BASED APPROACHES TO SIMPL SYSTEMS." Journal of Circuits, Systems and Computers 20, no. 01 (February 2011): 107–23. http://dx.doi.org/10.1142/s0218126611007098.

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This paper presents circuit-based approaches to SIMPL Systems (SIMulation Possible, but Laborious Systems), which could be regarded as a "public-key" version of Physical Unclonable Functions. The use of these systems can help us to avoid some of the potential vulnerabilities of conventional cryptography, such as its dependency on secret binary keys. Two specially designed circuits for SIMPL systems are discussed: "skew" memories and massively parallel analog processor arrays known as Cellular Nonlinear Networks. We argue that these circuits are able to serve as SIMPL systems in practice, and discuss their security against numerical and physical attacks.

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14

Ohme, Bruce W., and Mark R. Larson. "Analog Component Development for 300°C Sensor Interface Applications." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2012, HITEC (January 1, 2012): 000199–206. http://dx.doi.org/10.4071/hitec-2012-wp11.

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The development of Enhanced Geothermal Systems (EGS) for base-load electrical power generation will require electronics for sensing and control during exploration and drilling and also during production. The operating temperature environments for these applications will generally be more extreme than those encountered by electronics currently deployed for oil and gas development and production monitoring. To address this requirement, electronic components have been designed and fabricated for operation at temperatures of 300°C. These integrated circuits use silicon-on-insulator (SOI) fabrication processes to achieve high temperature operation. High-fidelity simulation models have been developed by characterization of SOI devices at 300°C. These device models were employed to design components required for the development of a down-hole orientation module. A wide-bandwidth, low-noise operational amplifier has been developed for use with MEMS accelerometer sensors. A multi-channel synchronous voltage-to-frequency converter with built-in reference and oscillators has also been developed for use with 3-axis flux-gate magnetometers. The components themselves are general purpose and could easily be used for other high-temperature sensor-interface applications. .

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15

Fowler, Boyd, and Abbas El Gamal. "Pulse-modulated analog neuron circuits." Journal of VLSI signal processing systems for signal, image and video technology 8, no. 1 (February 1994): 45–51. http://dx.doi.org/10.1007/bf02407109.

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16

Zhao, Tong, K. Sanada, A. Kitagawa, and T. Takenaka. "Real Time Measurement for High Frequency Pulsating Flow Rate in a Pipe." Journal of Dynamic Systems, Measurement, and Control 112, no. 4 (December 1, 1990): 762–68. http://dx.doi.org/10.1115/1.2896206.

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Two kinds of analog transformation methods for the measurement of high frequency pulsating flow rates in pipe flow are investigated. By use of the methods, the high frequency pulsating flow rates can be obtained by feeding differential pressure or centerline velocity to analog electronic circuits. First, the frequency characteristics of the electronic circuits for the measurement are examined by experiments. Then a criterion for determining the measurement distance of the differential pressure is derived analytically in order to ensure the required accuracy of the measurement when the flow rate is obtained from the differential pressure signal. Both methods are experimented with over a wide range of frequency. The results show that both methods are not only simple and practical, but also very accurate for the measurement of high frequency pulsating flow rates.

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17

Guo, Ke, Yi Zhu, and Ye San. "Analog Circuit Fault Diagnosis Using LDA and OAOSVM Approach." Advanced Materials Research 490-495 (March 2012): 1130–34. http://dx.doi.org/10.4028/www.scientific.net/amr.490-495.1130.

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Fault diagnosis of analog circuits is essential for guaranteeing the reliability and maintainability of electronic systems. Analog circuit fault diagnosis can be regarded as a pattern recognition issue and addressed by Multi-class SVM. A novel diagnosis technique based on linear discriminant analysis and one-against-one SVM is proposed in the paper. In order to obtain a good SVM-based fault classifier, the linear discriminant analysis technique is adopted to capture the major fault features. The extracted fault features are then used as the inputs of one-against-one SVMs to solve fault diagnosis issue. The effectiveness of the proposed approach is demonstrated by the experimental results.

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18

Tarim, Tuna, and Anthony Chan Carusone. "Editorial ISCAS 2006 Special Section on Analog Circuits and Systems." IEEE Transactions on Circuits and Systems I: Regular Papers 54, no. 1 (January 2007): 191–92. http://dx.doi.org/10.1109/tcsi.2006.889958.

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19

Odame, K., and P. E. Hasler. "Nonlinear Circuit Analysis via Perturbation Methods and Hardware Prototyping." VLSI Design 2010 (March 18, 2010): 1–8. http://dx.doi.org/10.1155/2010/687498.

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Nonlinear signal processing is necessary in many emerging applications where form factor and power are at a premium. In order to make such complex computation feasible under these constraints, it is necessary to implement the signal processors as analog circuits. Since analog circuit design is largely based on a linear systems perspective, new tools are being introduced to circuit designers that allow them to understand and exploit circuit nonlinearity for useful processing. This paper discusses two such tools, which represent nonlinear circuit behavior in a graphical way, making it easy to develop a qualitative appreciation for the circuits under study.

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20

Sahin, Muhammet Emin, Hasan Guler, and Serdar Ethem Hamamci. "Design and Realization of a Hyperchaotic Memristive System for Communication System on FPGA." Traitement du Signal 37, no. 6 (December 31, 2020): 939–53. http://dx.doi.org/10.18280/ts.370607.

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In this study, a memristor based hyperchaotic circuit is presented and implemented for communication systems on FPGA platform. Four dimensional hyperchaotic system, which contains active flux controlled memristor is designed by using a smooth continuous nonlinearity. Dynamical characteristics of designed hyperchaotic circuit are examined such as equilibrium points, chaotic attractors, Lyapunov exponents and bifurcation diagram. Furthermore, an electronic circuit model of hyperchaotic system has been modeled and results are submitted. Chaotic circuits are used in communication systems especially in secure communication due to their sensitive dependence on the initial conditions, not periodic, and having a spread spectrum. By using nonlinearity of memristor, the signals obtained from memristor based hyperchaotic system have been realized to analog and digital communication schemes on FPGA platform, which is suitable for re-programmable and reconfigurable systems. The success of memristor based hyperchaotic circuit with FPGA based communication is demonstrated by both simulation and experimental results.

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21

Zaleski, Dariusz, and Romuald Zielonko. "Two-functional µBIST for Testing and Self-Diagnosis of Analog Circuits in Electronic Embedded Systems." ACTA IMEKO 3, no. 4 (December 1, 2014): 10. http://dx.doi.org/10.21014/acta_imeko.v3i4.150.

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The paper concerns the testing of analog circuits and blocks in mixed-signal Electronic Embedded Systems (EESs), using the Built-in Self-Test (BIST) technique. An integrated, two-functional, embedded microtester (µBIST) based on reuse of signal blocks already present in an EES, such as microprocessors, memories, ADCs, DACs, is presented. The novelty of the µBIST solution is its extended functionality. It can perform 2 testing functions: functional testing and fault diagnosis on the level of localization of a faulty element. For functional testing the Complementary Signals (CSs), and for fault diagnosis the Simulation Before Test (SBT) vocabulary techniques have been used. In the fault vocabulary the graphical signatures in the form of identification curves in multidimensional spaces have been applied.

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22

HAIDER, MOHAMMAD RAFIQUL, JEREMY HOLLEMAN, SALWA MOSTAFA, and SYED KAMRUL ISLAM. "LOW-POWER BIOMEDICAL SIGNAL MONITORING SYSTEM FOR IMPLANTABLE SENSOR APPLICATIONS." International Journal of High Speed Electronics and Systems 20, no. 01 (March 2011): 115–28. http://dx.doi.org/10.1142/s0129156411006453.

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Implantable biomedical sensors and continuous real time in vivo monitoring of various physiological parameters requires low-power sensor electronics and wireless telemetry for transmission of sensor data. In this article, generic blocks required for such systems have been demonstrated with design examples. Ideally neural or electro-chemical sensor signal monitoring units comprise of low noise amplifiers, current or voltage mode analog to digital domain data conversion circuits and wireless telemetry circuits. The low-noise amplifier described here has a novel open loop amplifier scheme used for neural signal recording systems. The design has been implemented using 0.5-μm SOI-BiCMOS process. The fabricated chip can work with 1 V supply and consumes 805 nA. The current mode analog to digital conversion signal processing circuitry takes the current signal as an input and generates a pulse-width modulated data signal. The data signal is then modulated with a high frequency carrier signal to generate FSK data for wireless transmission. The design is fabricated in 0.5-μm standard CMOS process and consumes 1.1 mW of power with 3.5 V supply.

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23

OKUBO, NAOFUMI. "Notice the Analog Circuit Technology. RF Systems Need Analog Circuit Technologies." Journal of the Institute of Electrical Engineers of Japan 118, no. 7/8 (1998): 422–25. http://dx.doi.org/10.1541/ieejjournal.118.422.

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OKAMOTO, HIROSHI. "Notice the Analog Circuit Technology. Largest Analog Circuit-Electric Power Systems." Journal of the Institute of Electrical Engineers of Japan 118, no. 7/8 (1998): 426–29. http://dx.doi.org/10.1541/ieejjournal.118.426.

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Tynynyka, A. N. "Design methods for reducing noise and interferences in channels with lumped parameters in high-speed data processing." Технология и конструирование в электронной аппаратуре, no. 1-2 (2019): 10–19. http://dx.doi.org/10.15222/tkea2019.1-2.10.

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The article is devoted to the methods and rules of electronic design of radio electronic devices, which provide high stability and electromagnetic compatibility. The author considers how interferences may be caused by the unsuccessful design decisions when constructing discrete-analog channels of information conversion. The paper gives practical recommendations for choosing appropriate element base, grounding and power sources. The urgency of these tasks is caused by the requirements for increasing the speed of semiconductor devices and electronic circuits in general and reducing the amplitude of the working signals of digital devices, as well as by the problems of increasing the impact of interconnections and the assembly of nodes on the stability and speed of electronic devices and systems, by the problems of reducing the production complexity, material and time consumption, and of finding and eliminating the causes of low noise immunity of electronic devices. With the growth of the speed and layout density of the elements, ensuring the immunity of the electromagnetic interaction between different devices and systems becomes the most important task in construing the radio electronic systems in general. When designing any electronic circuit, one should inevitably allow for addi¬tional parasitic parameters of resistive, inductive and capacitive nature, which may unacceptably impair the performance and noise immunity of the actual design, or even lead to complete loss of functionality. Design and installation have a particular effect on the work of super-high-speed (high frequency) circuits and de¬vices – here the provision of system speed, noise immunity and electromagnetic compatibility become the main criteria for the quality of electronic design. The analysis of the special characteristics of the element base and of the experience of designing power sources and grounding, should help the developers of the electronic devices to reduce the noise in the shaped channels of high-speed data processing

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Ontañón-García, L. J., E. Campos-Cantón, and R. Femat. "Analog Electronic Implementation of a Class of Hybrid Dissipative Dynamical System." International Journal of Bifurcation and Chaos 26, no. 01 (January 2016): 1650018. http://dx.doi.org/10.1142/s0218127416500188.

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An analog electronic implementation by means of operational amplifiers of a class of hybrid dissipative systems in [Formula: see text] is presented. The switching systems have two unstable hyperbolic focus-saddle equilibria with the same stability index, a positive real eigenvalue and a pair of complex conjugated eigenvalues with negative real part. The analog circuit generates signals that oscillate in an attractor located between the two unstable equilibria, and may present saturation states at the moment of energizing it, i.e. if the initial voltage on the capacitors do not belong to the basin of attraction the circuit will end on a saturation state.

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MASUDA, T., N. SHIRAMIZU, E. OHUE, K. ODA, R. HAYAMI, M. KONDO, T. ONAI, et al. "A SiGe HBT IC CHIPSET for40-Gb/s OPTICAL TRANSMISSION SYSTEMS." International Journal of High Speed Electronics and Systems 13, no. 01 (March 2003): 239–63. http://dx.doi.org/10.1142/s0129156403001594.

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Using a 0.2-μm self-aligned epitaxial-growth silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) technology, we have developed a chipset for 40-Gb/s time-division multiplexing optical transmission systems. In this paper, we describe seven analog and digital ICs: a 45-GHz bandwidth transimpedance amplifier, a 48.7-GHz bandwidth automatic-gain-controllable amplifier, a 40-Gb/s decision circuit, a 40-Gb/s full-wave rectifier, a 40-Gb/s limiting amplifier with a 32-dB gain, a 45-Gb/s 1:4 demultiplexer, and a 45-Gb/s 4:1 multiplexer. To increase bandwidth of the transimpedance amplifier, a common-base input stage is introduced. In order to have high gain and wide bandwidth simultaneously, active load circuits composed of a differential transimpedance amplifier are used for the AGC amplifier, the limiting amplifier, and the decision circuit. Full-rate clocking is employed to reduce the influence caused by clock-duty variation in digital circuits such as the decision circuit, the demultiplexer, and the multiplexer. All ICs were characterized by using on-wafer probes, and some of them were built in brass-packages for bit-error rate measurement.

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Flores, Maria da Glória, Marcelo Negreiros, Luigi Carro, and Altamiro Susin. "A Noise Generator for Embedded Circuits Testing." Journal of Integrated Circuits and Systems 1, no. 1 (November 16, 2004): 38–43. http://dx.doi.org/10.29292/jics.v1i1.253.

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This paper describes the implementation of a white noise generator to be used as the input signal of a new method for testing analog-to-digital converters (ADCs) and linear filters. The main goal of this method is to avoid the comparison of the output signal with a known and very precise reference input. The proposed white noise generator is easily implemented, with less complexity than others excitation signals. The use of noise as the input signal avoids concerns about the inherent noise present in all electronic systems. The testing technique is based on the analysis of the spectral response of the CUT output. This paper covers the generation of the excitation signal, as well as simulation and practical results are presented to prove the efficiency of the test method.

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Rajendran, Selvakumar, Arvind Chakrapani, Srihari Kannan, and Abdul Quaiyum Ansari. "A Research Perspective on CMOS Current Mirror Circuits: Configurations and Techniques." Recent Advances in Electrical & Electronic Engineering (Formerly Recent Patents on Electrical & Electronic Engineering) 14, no. 4 (June 17, 2021): 377–97. http://dx.doi.org/10.2174/2352096514666210127140831.

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Background: Immense growth in the field of VLSI technology is fuelled by its feasibility to realize analog circuits in μm and nm technology. The current mirror (CM) is a basic building block used to enhance performance characteristics by constructing complex analog/mixed-signal circuits like amplifier, data converters and voltage level converters. In addition, the current mirror finds diverse applications from biasing to current-mode signal processing. Methods: In this paper, the Complementary Metal Oxide Semiconductor (CMOS) technologybased current mirror (CM) circuits are discussed with their advantages and disadvantages accompanied by the performance analysis of different parameters. It also briefs various techniques which are employed for improvising the current mirror performance like gain boosting and bandwidth extension. Besides, this paper lists the CMs that use different types of MOS devices like Floating Gate MOS, Bulk-driven MOS, and Quasi-Floating Gate MOS. As a result, the paper performs a detailed review of CMOS Current mirrors and their techniques. Results: Basic CM circuits that can act as building blocks in the VLSI circuits are simulated using 0.25 μm, BSIM and Level 1 technology. In addition, various devices based CMs are investigated and compared. Conclusion: The comprehensive discussion shows that the current mirror plays a significant role in analog/mixed-signal circuits design to realize complex systems for low-power biomedical and wireless applications.

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HOLMAN, W. T. "RADIATION-TOLERANT DESIGN FOR HIGH PERFORMANCE MIXED-SIGNAL CIRCUITS." International Journal of High Speed Electronics and Systems 14, no. 02 (June 2004): 353–66. http://dx.doi.org/10.1142/s0129156404002405.

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Modern semiconductor processes can provide significant intrinsic hardness against radiation effects in digital and analog circuits. Current design techniques using commercial processes for radiation-tolerant integrated circuits are summarized, with an emphasis on their application in high performance mixed-signal circuits and systems. Examples of "radiation hardened by design" (RHBD) methodologies are illustrated for reducing the vulnerability of circuits and components to total dose, single-event, and dose-rate effects.

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CHANG, M. F., and P. M. ASBECK. "III-V HETEROJUNCTION BIPOLAR TRANSISTORS FOR HIGH-SPEED APPLICATIONS." International Journal of High Speed Electronics and Systems 01, no. 03n04 (September 1990): 245–301. http://dx.doi.org/10.1142/s0129156490000137.

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Recent advances in communication, radar and computational systems demand very high performance electronic circuits. Heterojunction bipolar transistors (HBTs) have the potential of providing a more efficient solution to many key system requirements through intrinsic device advantages than competing technologies. This paper reviews the present status of GaAs and InP-based HBT technologies and their applications to digital, analog, microwave and multifunction circuits. It begins with a brief review of HBT device concepts and critical epitaxial growth parameters. Issues important for device modeling and fabrication technologies are discussed. The paper then highlights the performance and the potential impact of HBT devices and integrated circuits in various application areas. Key prospects for future HBT development are also addressed.

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Kumar Y, L. V. Santosh. "Design and Implementation of SAR-ADC for Medical Electronic Applications." International Journal of Advanced Research in Computer Science and Software Engineering 8, no. 5 (June 2, 2018): 55. http://dx.doi.org/10.23956/ijarcsse.v8i5.665.

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in today’s advance electronic and communication systems the role of high accuracy analog to digital converters are of great importance. Nowadays, a larger percentage of mixed-signal applications requires for health care systems. Also the speed of the chosen ADC design matters a lot as we are connected with the real world signals. SAR based ADC will provides us a better solution for various analog to digital systems. It is an essential device whenever data from the analog world, through sensors or transducers, should be digitally processed or when transmitting data between chips through either long-range wireless links or high-speed transmission between chips on the same printed circuit board. The paper projects up down and ring counter as a logic for successive approximation register (SAR logic for a ADC that is one of the best suited for low power. Here the resolution is of 4-bit and a power consumption of few milli watts. SAR ADC is implemented in 45 nm nano-meter scaling technology CMOS technology with a power supply of 0.5v by maintaining 4:1 w/l ratio.

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URAHAMA, KIICHI, and TADASHI YAMADA. "CONSTRAINED POTTS MEAN FIELD SYSTEMS AND THEIR ELECTRONIC IMPLEMENTATION." International Journal of Neural Systems 05, no. 03 (September 1994): 229–39. http://dx.doi.org/10.1142/s0129065794000244.

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The Potts mean field approach for solving combinatorial optimization problems subject to winner-takes-all constraints is extended for problems subject to additional constraints. Extra variables corresponding to the Lagrange multipliers are incorporated into the Potts formulation for the additional constraints to be satisfied. The extended Potts equations are solved by using constrained gradient descent differential systems. This gradient system is proven theoretically to always produce a legal local optimum solution of the constrained combinatorial optimization problems. An analog electronic circuit implementing the present method is designed on the basis of the previous Potts electronic circuit. The performance of the present method is theoretically evaluated for the constrained maximum cut problems. The lower bound of the cut size obtained with the present method is proven to be the same as that of the basic Potts scheme for the unconstrained maximum cut problems.

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Ballo, Andrea, Michele Bottaro, Alfio Dario Grasso, and Gaetano Palumbo. "Regulated Charge Pumps: A Comparative Study by Means of Verilog-AMS." Electronics 9, no. 6 (June 15, 2020): 998. http://dx.doi.org/10.3390/electronics9060998.

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This paper proposes a comparative study of regulation schemes for charge-pump-based voltage generators using behavioral models in Verilog- Analog Mixed Signal (AMS) code. An accurate and simple model of the charge pump is first introduced. It allows reducing the simulation time of complex electronic systems made up by both analog and digital circuits while maintaining a good agreement with transistor-level simulations. Finally, a comprehensive comparative study of the different regulation schemes for charge pumps is reported which allows the designer to choose the most suitable topology for a given application and Charge Pump (CP) operative zone.

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Acho, Leonardo. "A random signal generator by using analog electronics." Cybernetics and Physics, Volume 10, 2021, Number 1 (June 30, 2021): 5–8. http://dx.doi.org/10.35470/2226-4116-2021-10-1-5-8.

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The describing function theory is a powerful mathematical tool to predict oscillations in non-linear dynamical systems. This theory is here invoked to design a random signal generator and realized by using analog electronic elements. Then, and according to experimental results, histograms of the resultant signal are shown along with the generated signal in the time domain. Finally, the proposed electronic circuit is simple and cheap to construct.

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GHARPUREY, RANJIT, and SHAHRZAD NARAGHI. "SELF-INDUCED NOISE IN INTEGRATED CIRCUITS." International Journal of High Speed Electronics and Systems 15, no. 02 (June 2005): 277–95. http://dx.doi.org/10.1142/s012915640500320x.

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Circuits with diverse electrical behavior are often placed in close physical proximity in order to achieve high-levels of on-chip integration. The activity of certain types of circuits can generate harmful interference, and degrade the performance of the system through electromagnetic coupling. Considerable effort in system-on-a-chip implementations is in fact related to technology and architectural considerations for minimizing this interference. This is especially the case in systems that have exacting requirements on the dynamic range such as those for wireless applications. In this paper, we will discuss the evolution of techniques for modeling and analyzing these sources of noise generation and interference. We will provide a physical description of the problem. Techniques for extraction of electrical models to represent the media that support these noise sources will be covered. Macromodeling techniques will be discussed. Finally we will introduce the concept of functional modeling of circuit functions and present such a model for an integrated flash analog-to-digital converter.

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Albaba, Mouhamad Samer Ehsan, Ahmad Al-Abdo, and Yasser Khadra. "Calculation the precision of the conversion of bio-signals (heart sounds) in analog to digital and digital to analog conversion processes in ATmega 8 microcontroller processors using computer simulation." Association of Arab Universities Journal of Engineering Sciences 26, no. 4 (December 31, 2019): 105–12. http://dx.doi.org/10.33261/jaaru.2019.26.4.013.

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The research aims to calculate the precision transfer from the analogue to digital convertor (ADC) and the digital to analogue convertor (DAC) of the ATmega microcontroller series that are widely used in various circuits and their application of weak signals such as boi-signals, especially heart sounds signals.We chose the ATmega8 microcontroller and performed the measurements and results on the first heart sound (S1) after enforcement the simulations of an electronic stethoscope using the famous program proteus8 for electronic systems. We performed the analogue to digital conversion (ADC) for 20 samples of the signal and then we performed the opposite process DAC using 2R-R resistor network with 10 inputs.The results obtained showed a near perfect match between the signals before and after the conversion. Which suits this type of application.

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KILIC, RECAI. "UNIVERSAL PROGRAMMABLE CHAOS GENERATOR: DESIGN AND IMPLEMENTATION ISSUES." International Journal of Bifurcation and Chaos 20, no. 02 (February 2010): 419–35. http://dx.doi.org/10.1142/s021812741002551x.

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Chaos generators are generally designed and implemented by using analog circuit design techniques. Analog implementations require a variety of circuitry that comprises different passive and active electronic components like individual op-amps, comparators, analog multipliers, trigonometric function generators. Anyone who wants to experimentally investigate different structurally chaotic systems has to provide a significant amount of circuit hardware. This process may be hard and time consuming. At this stage, the question to be asked: Is there a unique analog component for implementing a universal analog chaos generator which is capable of generating the chaotic signals of nearly all analog-based chaotic systems. Fortunately, we can now answer this question positively. This analog device is FPAA (Field-Programmable Analog Array). FPAA is the analog equivalent of the FPGA (Field-Programmable Gate Array) used as programmable device in digital signal processing. FPAA is a programmable device for implementing a rich variety of systems including analog functions via dynamic reconfiguration. FPAA can be configured in real time which allows the designers to modify the design or make completely new design in real time. In this paper, we aim to show how FPAA device can be used as universal device for design and implementation of programmable analog chaos generators. For this purpose, we will introduce three FPAA-based design examples: autonomous Chua's circuit, nonautonomous MLC (Murali–Lakshmanan–Chua) circuit and a chaotic system based on a PLL (Phase Locked Loop) model.

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ALARCÓN, EDUARD, GERARD VILLAR, and ALBERTO POVEDA. "CMOS INTEGRATED CIRCUIT CONTROLLERS FOR SWITCHING POWER CONVERTERS." Journal of Circuits, Systems and Computers 13, no. 04 (August 2004): 789–811. http://dx.doi.org/10.1142/s0218126604001714.

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Two case examples of high-speed CMOS microelectronic implementations of high-performance controllers for switching power converters are presented. The design and implementation of a current-programmed controller and a general-purpose feedforward one-cycle controller are described. The integrated circuit controllers attain high-performance by means of using current-mode analog signal processing, hence allowing high switching frequencies that extend the operation margin compared to previous designs. Global layout-extracted transistor-level simulation results for 0.8 μm and 0.35 μm standard CMOS technologies confirm both the correct operation of the circuits in terms of bandwidth as well as their functionality for the control of switching power converters. The circuits may be used either as standalone IC controllers or as controller circuits that are technology-compatible with on-chip switching power converters and on-chip loads for future powered systems-on-chip.

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Chaudhary, Nivedita, Yogender Aggarwal, Nishant Singh, and Rakesh Kumar Sinha. "ELECTRONIC ANALOGY TO SIMULATE AND PREDICT THE DYNAMICS OF CELLULAR MECHANISM OF PARKINSON’S DISEASE STIMULATED BY ENVIRONMENTAL FACTORS." Biomedical Engineering: Applications, Basis and Communications 27, no. 06 (December 2015): 1550051. http://dx.doi.org/10.4015/s1016237215500519.

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The present work aims to simulate and predict the molecular pathway of Parkinson’s disease (PD) initiated by environmental stress. It is designed to predict how protein aggregation and Lewy body (LB) formation leads to dopamine toxicity finally leading to cell death. The Mechanistic electronic modeling using Digital-Analog hybrid technique has been designed and implemented using MULTISIM 8.0 (National Instruments, USA) to simulate and predict the dynamics of PD pathway under environmental stress condition. The electronic network is initiated through an analog comparator circuit that compares the long-term environmental alterations with the cellular set point level of the molecular kinetics. The pattern of neuronal firing is simulated with the help of analog electronic circuit. The simulation results show a slow progressive rise in [Formula: see text]-synuclein/LB/dopamine toxicity level within the neuronal cells, which is comparable to published experimental and modeling studies associated with PD. Finally, cell death is demonstrated, which leads to neurodegeneration. In conclusion, our model allows a straightforward implementation of qualitative representation for systems where the network topology or pathway is at least moderately known.

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TANIMOTO, HIROSHI. "Notice the Analog Circuit Technology. Analog Circuit-A Key Technology for Low-Voltage, Low-Power Systems." Journal of the Institute of Electrical Engineers of Japan 118, no. 7/8 (1998): 418–21. http://dx.doi.org/10.1541/ieejjournal.118.418.

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Aizenberg, Igor, Riccardo Belardi, Marco Bindi, Francesco Grasso, Stefano Manetti, Antonio Luchetta, and Maria Cristina Piccirilli. "A Neural Network Classifier with Multi-Valued Neurons for Analog Circuit Fault Diagnosis." Electronics 10, no. 3 (February 2, 2021): 349. http://dx.doi.org/10.3390/electronics10030349.

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In this paper, we present a new method designed to recognize single parametric faults in analog circuits. The technique follows a rigorous approach constituted by three sequential steps: calculating the testability and extracting the ambiguity groups of the circuit under test (CUT); localizing the failure and putting it in the correct fault class (FC) via multi-frequency measurements or simulations; and (optional) estimating the value of the faulty component. The fabrication tolerances of the healthy components are taken into account in every step of the procedure. The work combines machine learning techniques, used for classification and approximation, with testability analysis procedures for analog circuits.

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Marcondes, D. W. C., G. F. Comassetto, B. G. Pedro, J. C. C. Vieira, A. Hoff, F. Prebianca, C. Manchein, and H. A. Albuquerque. "Extensive Numerical Study and Circuitry Implementation of the Watt Governor Model." International Journal of Bifurcation and Chaos 27, no. 11 (October 2017): 1750175. http://dx.doi.org/10.1142/s0218127417501759.

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In this work we carry out extensive numerical study of a Watt centrifugal governor system model, and we also implement an electronic circuit by analog computation to experimentally solve the model. Our numerical results show the existence of self-organized stable periodic structures (SPSs) on parameter-space of the largest Lyapunov exponent and isospikes of time series of the Watt governor system model. A peculiar hierarchical organization and period-adding bifurcation cascade of the SPSs are observed, and this self-organized cascade accumulates on a periodic boundary. It is also shown that the periods of these structures organize themselves obeying the solutions of Diophantine equations. In addition, an experimental setup is implemented by a circuitry analogy of mechanical systems using analog computing technique to characterize the robustness of our numerical results. After applying an active control of chaos in the experiment, the effect of intrinsic experimental noise was minimized such that, the experimental results are astonishingly well in agreement with our numerical findings. We can also mention as another remarkable result, the application of analog computing technique to perform an experimental circuitry analysis in real mechanical problems.

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Hu, Han-Ping, Xiao-Hui Liu, and Fei-Long Xie. "Design and Implementation of Autonomous and Non-Autonomous Time-Delay Chaotic System Based on Field Programmable Analog Array." Entropy 21, no. 5 (April 26, 2019): 437. http://dx.doi.org/10.3390/e21050437.

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Time-delay chaotic systems can have hyperchaotic attractors with large numbers of positive Lyapunov exponents, and can generate highly stochastic and unpredictable time series with simple structures, which is very suitable as a secured chaotic source in chaotic secure communications. But time-delay chaotic systems are generally designed and implemented by using analog circuit design techniques. Analog implementations require a variety of electronic components and can be difficult and time consuming. At this stage, we can now solve this question by using FPAA (Field-Programmable Analog Array). FPAA is a programmable device for implementing multiple analog functions via dynamic reconfiguration. In this paper, we will introduce two FPAA-based design examples: An autonomous Ikeda system and a non-autonomous Duffing system, to show how a FPAA device is used to design programmable analog time-delay chaotic systems and analyze Shannon entropy and Lyapunov exponents of time series output by circuit and simulation systems.

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Lubaszewski, Marcelo, and Marcelo Antonio Pavanello. "Table of Contents and Foreword." Journal of Integrated Circuits and Systems 7, no. 1 (December 27, 2012): 1–6. http://dx.doi.org/10.29292/jics.v7i1.350.

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This issue of the Journal of Integrated Circuits and Systems (JICS) features a very broad content, including papers on analog and digital design, presenting novel solutions for circuit synthesis, energy efficiency, memory architectures and processor modeling and also proposing new approaches for wireless communication, motion estimation and neural networks applications. Six of these papers have been selected from the presentations given at SBCCI2011 (24th Symposium on Integrated Circuits and Systems Design), which has been held in João Pessoa, Brazil in 2011. Among the contributions presented at the Symposium, only a few best rated were selected by the JICS Editorial Board and have been invited to submit an extended version to the Journal. These papers have been reviewed by external experts and have been accepted for the special section on best SBCCI2011 papers. In addition to the best papers presented at the conference, one spontaneous submission passed through the usual reviewing process and has been accepted as a regular paper. We would like to thank the authors for their effort in preparing these high quality papers, as well as the reviewers for their help on paper selection, which guarantees the scientific level of this issue.We sincerely hope that JICS readers will enjoy these contributions.Marcelo Lubaszewski - JICS Editor-in-chief Marcelo Antonio Pavanello - JICS Co-Editor

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Escobar, Gerardo, P. R. Martinez, and J. Leyva-Ramos. "Analog Circuits to Implement Repetitive Controllers With Feedforward for Harmonic Compensation." IEEE Transactions on Industrial Electronics 54, no. 1 (February 2007): 567–73. http://dx.doi.org/10.1109/tie.2006.885515.

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Bonilla, José Trinidad Guillen, Héctor Guillen Bonilla, Verónica-M. Rodríguez-Betancourtt, Alex Guillen Bonilla, Antonio Casillas Zamora, Oscar Blanco Alonso, and Jorge Alberto Ramírez Ortega. "A Gas Sensor for Application as a Propane Leak Detector." Journal of Sensors 2021 (February 12, 2021): 1–11. http://dx.doi.org/10.1155/2021/8871166.

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A propane gas detector was built based on the semiconductor nickel antimonate oxide (NiSb2O6) by means of an analog electronic circuit. The gas detector was designed for monitoring atmospheres where the leakage of propane gas could possibly occur. The prototype’s construction methodology is presented in 5 stages: (1) synthesis of NiSb2O6 oxide powders, (2) characterization of the powders by XRD and TEM, (3) manufacture and electrical characterization of the chemical gas sensor, (4) design of the analog circuit based on the electrical response of the gas sensor, and (5) functionality tests. The gas detector was built at low cost and showed excellent functionality. The operating conditions were as follows: 200°C, gas concentration of 5 ppm, electronic circuit gain of 5, and sensor sensitivity of 0.41.

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Hao, Yunqiang, Dongbai Yi, Xiaowei Zhang, Wenxin Yu, Jianxiong Xi, and Lenian He. "A Power Management IC Used for Monitoring and Protection of Li-Ion Battery Packs." Journal of Sensors 2021 (April 8, 2021): 1–13. http://dx.doi.org/10.1155/2021/6611648.

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A power management system is a critical component of the system which needs Li-ion battery packs for power supply. This paper proposes a fully integrated, high-precision, and high-reliability Integrated Circuit (IC) for the power management system of Li-ion battery packs. It has full protection circuits including overvoltage, overtemperature, and overcurrent circuits with measuring voltage accuracy of 0.2 mV and a 15-bit internal Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC). This IC is designed to protect the system automatically and measure the battery cells’ voltage, temperature, and charging or discharging current with high precision. It also provides an I2C interface to communicate with an external Microcontroller Unit (MCU), making it achievable to perform battery cells’ voltage balancing and SOC estimation with 0.1% estimation accuracy in an hour.

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Beal, Aubrey N., and Robert N. Dean. "A Random Stimulation Source for Evaluating MEMS Devices using an Exact Solvable Chaotic Oscillator." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2015, DPC (January 1, 2015): 001594–625. http://dx.doi.org/10.4071/2015dpc-wp32.

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MEMS devices are nearly ubiquitous, with applications ranging from automobiles to toys, medical equipment to missiles, and cell phones to industrial equipment. At the microscale, fabrication tolerances are significantly less precise than at the scale of traditional machining techniques. This can result in significant differences in the operating characteristics between otherwise identical MEMS devices. A wide bandwidth random excitation source is ideal for evaluating these components, whether used as the forcing function for an electromechanical shaker employed to measure transmissibility, or as a voltage source to evaluate actuator structure resonances and instabilities. An electronic chaotic oscillator provides an ideal wide bandwidth voltage source which is provably random from first principles and may be simply integrated for the aforementioned MEMS testing. This type of system is easily integrated through standard Si MEMS processes and readily lends itself to application as a built-in-self test (BIST) component. These systems guarantee uniform frequency content from D.C. up to 100kHz due to their characteristically random behavior and serve as a strong candidate for providing uniform spectral density to a device under test. The proposed system is a simple, electronic circuit that creates a random, wideband excitation voltage for observing characteristics of MEMS devices. This functionality is achieved by the analog, digital or mixed signal computation of nonlinear differential equations that describe various exactly solvable chaotic systems. By creating Si microsystems which perform these computations, these test sources may be readily fabricated as integrated BIST components for MEMS devices or fabricated separately and integrated by flip chip assembly techniques. Furthermore, by considering the iterated map of this particular category of stimulation source, a direct and easy measurement of the stimulation entropy may be monitored and corrected. This work begins as a theoretical treatment involving the Nonlinear Dynamics of these types of systems including chaotic systems which permit closed form solutions. These systems are described classically through nonlinear differential equations and intuitively through iterated maps. These techniques reveal inherent methods for entropy measurement in these sources which may be implemented and controlled easily using electronic circuits. Subsequently, the simulation, circuit design methodology, circuit simulation, fabrication, testing and hardware verification of these wideband chaotic sources is presented. The development of this work delineates simple, wideband electronic testing circuits which may be fully integrated with MEMS devices using standard Si MEMS processes. The resulting microsystem may be used as the forcing function when measuring transmissibility of MEMS devices, or as a BIST element to evaluate MEMS microstructure characteristics through direct microelectronic fabrication or flip chip integration.

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Baranov, L. A., S. E. Ikonnikov, and I. B. Shubinsky. "Selecting Analog-to-Digital Conversion Parameters when Analyzing Noise in Track Circuits of Rail Traffic Safety Systems." Russian Electrical Engineering 90, no. 9 (September 2019): 632–37. http://dx.doi.org/10.3103/s1068371219090037.

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Journal articles on the topic 'Electronic circuits Analog electronic systems'

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