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Journal articles on the topic 'Electronic Circuits and Devices'
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1
Stavrinidou, Eleni, Roger Gabrielsson, Eliot Gomez, Xavier Crispin, Ove Nilsson, Daniel T. Simon, and Magnus Berggren. "Electronic plants." Science Advances 1, no. 10 (November 2015): e1501136. http://dx.doi.org/10.1126/sciadv.1501136.
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The roots, stems, leaves, and vascular circuitry of higher plants are responsible for conveying the chemical signals that regulate growth and functions. From a certain perspective, these features are analogous to the contacts, interconnections, devices, and wires of discrete and integrated electronic circuits. Although many attempts have been made to augment plant function with electroactive materials, plants’ “circuitry” has never been directly merged with electronics. We report analog and digital organic electronic circuits and devices manufactured in living plants. The four key components of a circuit have been achieved using the xylem, leaves, veins, and signals of the plant as the template and integral part of the circuit elements and functions. With integrated and distributed electronics in plants, one can envisage a range of applications including precision recording and regulation of physiology, energy harvesting from photosynthesis, and alternatives to genetic modification for plant optimization.
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Kostin, M. S., D. S. Vorunichev, and D. A. Korzh. "COUNTERREENGINEERING OF ELECTRONIC DEVICES." Russian Technological Journal 7, no. 1 (February 28, 2019): 57–79. http://dx.doi.org/10.32362/2500-316x-2019-7-1-57-79.
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The paper presents the main results of scientific and practical research in the field of special design reengineering and counterreengineering of radioelectronic devices. Methods and means of special design reengineering of functional modules of multilayer printed circuit boards and case microcircuits are presented. The basic process design for the reengineering of multilayer printed circuits of radioelectronic products is presented. The design is based on the physical principles of destructive and non-destructive decomposing test: mechanical processing and chemical etching, stereolaser structuring, IR imaging electrothermics and X-ray analysis. The article formulates positions and methodology of the circuit analysis of the basic architecture of electrical circuits and signal processes of radio electronic products by the configuration of the printed circuit, its electronic component base and their connected topologies. The article considers methods and techniques for the reengineering of radiotechnical circuits and signals enabling to reproduce the list of the electronic component base and the essential circuit technique, as well as to study the basic circuit characteristics of the appliance in four main modes: functional, in-circuit, peripheral and identification visualization. The methods and means of authentic performance of radioelectronic devices for a number of constructive and radiotechnical identifiers are considered. Technical methods and solutions for counterreengineering of radioelectronic devices have been developed.
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Kaur, Inderpreet, Shriniwas Yadav, Sukhbir Singh, Vanish Kumar, Shweta Arora, and Deepika Bhatnagar. "Nano Electronics: A New Era of Devices." Solid State Phenomena 222 (November 2014): 99–116. http://dx.doi.org/10.4028/www.scientific.net/ssp.222.99.
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The technical and economic growth of the twentieth century was marked by evolution of electronic devices and gadgets. The day-to-day lifestyle has been significantly affected by the advancement in communication systems, information systems and consumer electronics. The lifeline of progress has been the invention of the transistor and its dynamic up-gradation. Discovery of fabricating Integrated Circuits (IC’s) revolutionized the concept of electronic circuits. With advent of time the size of components decreased, which led to increase in component density. This trend of decreasing device size and denser integrated circuits is being limited by the current lithography techniques. Non-uniformity of doping, quantum mechanical tunneling of electrons from source to drain and leakage of electrons through gate oxide limit scaling down of devices. Heat dissipation and capacitive coupling between circuit components becomes significant with decreasing size of the components. Along with the intrinsic technical limitations, downscaling of devices to nanometer sizes leads to a change in the physical mechanisms controlling the charge propagation. To deal with this constraint, the search is on to look around for alternative materials for electronic device application and new methods for electronic device fabrication. Such material is comprised of organic molecules, proteins, carbon materials, DNA and the list is endless which can be grown in the laboratory. Many molecules show interesting electronic properties, which make them probable candidates for electronic device applications. The challenge is to interpret their electronic properties at nanoscale so as to exploit them for use in new generation electronic devices. Need to trim downsize and have a higher component density have ushered us into an era of nanoelectronics.
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Darwish, Mahmoud, Péter Neumann, János Mizsei, and László Pohl. "Electro-Thermal Simulation of Vertical VO2 Thermal-Electronic Circuit Elements." Energies 13, no. 13 (July 3, 2020): 3447. http://dx.doi.org/10.3390/en13133447.
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Advancement of classical silicon-based circuit technology is approaching maturity and saturation. The worldwide research is now focusing wide range of potential technologies for the “More than Moore” era. One of these technologies is thermal-electronic logic circuits based on the semiconductor-to-metal phase transition of vanadium dioxide, a possible future logic circuits to replace the conventional circuits. In thermal-electronic circuits, information flows in a combination of thermal and electronic signals. Design of these circuits will be possible once appropriate device models become available. Characteristics of vanadium dioxide are under research by preparing structures in laboratory and their validation by simulation models. Modeling and simulation of these devices is challenging due to several nonlinearities, discussed in this article. Introduction of custom finite volumes method simulator has however improved handling of special properties of vanadium dioxide. This paper presents modeling and electro-thermal simulation of vertically structured devices of different dimensions, 10 nm to 300 nm layer thicknesses and 200 nm to 30 μm radii. Results of this research will facilitate determination of sample sizes in the next phase of device modeling.
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Jones, Andrew, and Vinod Sikka. "Superhydrophobic Coatings on Electronic Components." International Symposium on Microelectronics 2011, no. 1 (January 1, 2011): 000113–16. http://dx.doi.org/10.4071/isom-2011-ta3-paper6.
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Superhydrophobic coatings provide exceptional protection to electrical circuits, switches, and other electrical devices which operate in wet environments, such as food processing plants or outdoor applications. Among various electrical device applications, electric motors and electrical switches have been successfully tested in the field at two food processors for nearly 20 months with exceptionally good results. Coated microelectronic circuit board has been in operation without any incidence for over 1 year.
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BENFDILA, A., S. ABBAS, R. IZQUIERDO, R. TALMAT, and A. VASEASHTA. "ON THE DRAIN CURRENT SATURATION IN CARBON NANOTUBE FIELD EFFECT TRANSISTORS." Nano 05, no. 03 (June 2010): 161–65. http://dx.doi.org/10.1142/s1793292010002062.
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Electronic devices based on carbon nanotubes (CNTs) show potential for circuit miniaturization due to their superior electrical characteristics and reduced dimensionality. The CNT field effect transistors (CNFETs) offer breakthrough in miniaturization of various electronic circuits. Investigation of ballistic transport governing the operation of CNFETs is essential for understanding the device's functional behavior. This investigation is focused on a study of current–voltage characteristics of device behavior in hard saturation region. The investigation utilizes a set of current–voltage characteristics obtained on typical devices. This work is an extension of our earlier work describing application of our approach to Si -MOSFET behavior in the saturation region.
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Kim, TaeWoong, and SoYoung Kim. "Electronic design automation requirements for R2R printing foundry." Flexible and Printed Electronics 7, no. 1 (February 4, 2022): 013001. http://dx.doi.org/10.1088/2058-8585/ac4d3d.
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Abstract Roll-to-roll (R2R) printed electronic devices have been in the spotlight over the decades as a potential replacement for Si-based semiconductors, research into this technology is still being actively conducted over the world. These printed electronic devices can be used in a variety of applications, so the demand for them is expected to reach over USD 20.7 billion in 2025 given a compound annual growth rate (CAGR) of 21.5%. As the new ink materials and printing technologies being researched are commercialized, foundry companies that produce printed electronics need to provide appropriate work flow that will allow engineers to design these kind of circuits using commercial electronic design automation (EDA) tools. This review paper describes the key parameters that should be found process design kit (PDK), including the contained design rules and the simulation program with integrated circuit emphasis model. We cover the factors that need to be considered when a fabless company develops circuits for the R2R process, including the design methodology from the beginning of the design to the final graphic data stream (GDS) completion stage, we also discuss other essential technological hurdles that must be overcome in this process. The overall process of design and analysis for printed electronic technique is based on the silicon design flow. We describe the full custom design flow for analog integrated circuits (ICs) and explain how the automatic placement and routing based design of digital integrated circuits can be carried out. In addition, the necessity of sign-off verification using post-simulation, electromagnetic (EM) simulation and bias check simulation required for commercial product development will be explained. The development of PDKs and EDA tools for circuit design in the R2R printed electronics foundry industry will have a potentially tremendous impact on the semiconductor ecosystem by lowering the barriers to producing these devices.
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Mishra, Brijendra, Vivek Singh Kushwah, and Rishi Sharma. "MODELING OF HYBRID MOS FOR THE IMPLEMENTATION OF SWITCHED CAPACITOR FILTER USING SINGLE ELECTRON TRANSISTOR." International Journal of Engineering Technologies and Management Research 5, no. 2 (May 4, 2020): 294–300. http://dx.doi.org/10.29121/ijetmr.v5.i2.2018.659.
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In digital integrated circuit architectures, transistors serve as circuit switches to charge and discharge capacitors to the required logic voltage levels. A transistor is a three terminal semiconductor device used to amplify and switch electronic signals and electrical power. It has been observed that the Scaling down of electronic device sizes has been the fundamental strategy for improving the performance of ultra-large-scale integrated circuits (ULSIs). Metaloxide-semiconductor field-effect transistors (MOSFETs) have been the most prevalent electron devices for ULSI applications. A better device will be formed with the help of new technology, with high operating speed low and power consumption, which can be the future of electronics industry. A methodology for the electric simulation of MOS/SET hybrid circuits will be developed. As a result of this, a functional model for the single-electron transistor will obtain and Implement Switched Capacitor Filter with the help of designed hybrid MOS. The SET model can be easily coded in any hardware description language.
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Wang, Lu, Hongyu Zhu, Ze Zuo, and Dianzhong Wen. "Full-function logic circuit based on egg albumen resistive memory." Applied Physics Letters 121, no. 24 (December 12, 2022): 243505. http://dx.doi.org/10.1063/5.0124826.
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The logic gate is the basic unit of a digital circuit structure. The operation, memory, I/O, and other reading and writing functions of computer systems require logic circuits. Logic gates based on resistive memory can make existing integrated circuits denser, smaller, faster, and use fewer devices. In this paper, Al/polymethyl methacrylate (PMMA)/egg albumen (EA):Au nanoparticles/PMMA/Al multilayer biological resistive random access memory was prepared based on the natural biological material—egg albumen (EA). The device has bipolar switching behavior, a higher switching current ratio, a lower threshold voltage, and better stability. A circuit based on auxiliary logic is constructed using this device, and the logic functions of AND, OR, NOT, NAND, and NOR are realized. This device provides an effective potential solution for implementing high-performance electronic devices and large-scale integrated circuits.
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Ni, Haiyan, Jianping Hu, Xuqiang Zhang, and Haotian Zhu. "The Optimizations of Dual-Threshold Independent-Gate FinFETs and Low-Power Circuit Designs." Journal of Circuits, Systems and Computers 29, no. 07 (September 23, 2019): 2050114. http://dx.doi.org/10.1142/s0218126620501145.
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In this paper, a method of optimizing dual-threshold independent-gate FinFET devices is discussed, and the optimal circuit design is carried out by using these optimized devices. Dual-threshold independent-gate FinFETs include low threshold devices and high threshold devices. The low threshold device is equivalent to two merging parallel short-gate devices and high threshold device is equivalent to two merging series SG devices. We optimize the device mainly by selecting the appropriate gate work function, gate oxide thickness, silicon body thickness and so on. Our optimization is based on the Berkeley BSIMIMG model and verified by TCAD tool. Based on these optimized devices, we designed the compact basic logic gates and two new compact D-type flip-flops. Additionally, we developed a circuit synthesis method based on Binary Decision Diagram (BDD) and the optimized compact basic logic gates. Hspice simulations show that the circuits using the proposed dual-threshold IG FinFETs have better performance than the circuits directly using the short-gate devices.
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OYA, TAKAHIDE, IKUKO N. MOTOIKE, and TETSUYA ASAI. "SINGLE-ELECTRON CIRCUITS PERFORMING DENDRITIC PATTERN FORMATION WITH NATURE-INSPIRED CELLULAR AUTOMATA." International Journal of Bifurcation and Chaos 17, no. 10 (October 2007): 3651–55. http://dx.doi.org/10.1142/s0218127407019512.
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We propose a novel semiconductor device in which electronic-analogue dendritic trees grow on multilayer single-electron circuits. A simple cellular-automaton circuit was designed for generating dendritic patterns by utilizing the physical properties of single-electron devices, i.e. quantum and thermal effects in tunneling junctions. We demonstrate typical operations of the proposed circuit through extensive numerical simulations.
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Chu, Kunmo, Byong Gwon Song, Yongsung Kim, and Chang Seung Lee. "Smart Passivation Materials with a Microencapsulated Liquid Metal for Self-Healing Conductors in Sustainable Electronic Devices." International Symposium on Microelectronics 2018, no. 1 (October 1, 2018): 000293–97. http://dx.doi.org/10.4071/2380-4505-2018.1.000293.
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Abstract Passivation and self-healing of electric circuits are of importance in the area of electronic packaging for improving durability of devices. In particular, flexible or stretchable devices are vulnerable to mechanical stimuli, such as cutting, piercing, scratching, and pressing. The damage to a circuit results in the breakdown of devices. Therefore, a passivation layer has been essential to preserve the soft circuits and provide self-healing of the electrical pathways after they are damaged.
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Ulansky, Vladimir, Ahmed Raza, and Denys Milke. "Two-Terminal Electronic Circuits with Controllable Linear NDR Region and Their Applications." Applied Sciences 11, no. 21 (October 20, 2021): 9815. http://dx.doi.org/10.3390/app11219815.
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Negative differential resistance (NDR) is inherent in many electronic devices, in which, over a specific voltage range, the current decreases with increasing voltage. Semiconductor structures with NDR have several unique properties that stimulate the search for technological and circuitry solutions in developing new semiconductor devices and circuits experiencing NDR features. This study considers two-terminal NDR electronic circuits based on multiple-output current mirrors, such as cascode, Wilson, and improved Wilson, combined with a field-effect transistor. The undoubted advantages of the proposed electronic circuits are the linearity of the current-voltage characteristics in the NDR region and the ability to regulate the value of negative resistance by changing the number of mirrored current sources. We derive equations for each proposed circuit to calculate the NDR region’s total current and differential resistance. We consider applications of NDR circuits for designing microwave single frequency oscillators and voltage-controlled oscillators. The problem of choosing the optimal oscillator topology is examined. We show that the designed oscillators based on NDR circuits with Wilson and improved Wilson multiple-output current mirrors have high efficiency and extremely low phase noise. For a single frequency oscillator consuming 33.9 mW, the phase noise is −154.6 dBc/Hz at a 100 kHz offset from a 1.310 GHz carrier. The resulting figure of merit is −221.6 dBc/Hz. The implemented oscillator prototype confirms the theoretical achievements.
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Ulansky, Vladimir, Ahmed Raza, and Hamza Oun. "Electronic Circuit with Controllable Negative Differential Resistance and its Applications." Electronics 8, no. 4 (April 8, 2019): 409. http://dx.doi.org/10.3390/electronics8040409.
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Electronic devices and circuits with negative differential resistance (NDR) are widely used in oscillators, memory devices, frequency multipliers, mixers, etc. Such devices and circuits usually have an N-, S-, or Λ-type current-voltage characteristics. In the known NDR devices and circuits, it is practically impossible to increase the negative resistance without changing the type or the dimensions of transistors. Moreover, some of them have three terminals assuming two power supplies. In this paper, a new NDR circuit that comprises a combination of a field effect transistor (FET) and a simple bipolar junction transistor (BJT) current mirror (CM) with multiple outputs is proposed. A distinctive feature of the proposed circuit is the ability to change the magnitude of the NDR by increasing the number of outputs in the CM. Mathematical expressions are derived to calculate the threshold currents and voltages of the N-type current-voltage characteristics for various types of FET. The calculated current and voltage thresholds are compared with the simulation results. The possible applications of the proposed NDR circuit for designing single-frequency oscillators and voltage-controlled oscillators (VCO) are considered. The designed NDR VCO has a very low level of phase noise and has one of the best values of a standard figure of merit (FOM) among recently published VCOs. The effectiveness of the proposed oscillators is confirmed by the simulation results and the implemented prototype.
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Walker, James Alfred, Richard Sinnott, Gordon Stewart, James A. Hilder, and Andy M. Tyrrell. "Optimizing electronic standard cell libraries for variability tolerance through the nano-CMOS grid." Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences 368, no. 1925 (August 28, 2010): 3967–81. http://dx.doi.org/10.1098/rsta.2010.0150.
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The project Meeting the Design Challenges of nano-CMOS Electronics ( http://www.nanocmos.ac.uk ) was funded by the Engineering and Physical Sciences Research Council to tackle the challenges facing the electronics industry caused by the decreasing scale of transistor devices, and the inherent variability that this exposes in devices and in the circuits and systems in which they are used. The project has developed a grid-based solution that supports the electronics design process, incorporating usage of large-scale high-performance computing (HPC) resources, data and metadata management and support for fine-grained security to protect commercially sensitive datasets. In this paper, we illustrate how the nano-CMOS (complementary metal oxide semiconductor) grid has been applied to optimize transistor dimensions within a standard cell library. The goal is to extract high-speed and low-power circuits which are more tolerant of the random fluctuations that will be prevalent in future technology nodes. Using statistically enhanced circuit simulation models based on three-dimensional atomistic device simulations, a genetic algorithm is presented that optimizes the device widths within a circuit using a multi-objective fitness function exploiting the nano-CMOS grid. The results show that the impact of threshold voltage variation can be reduced by optimizing transistor widths, and indicate that a similar method could be extended to the optimization of larger circuits.
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Li, Shuo, Nan Pan, Sen Gao, and Lei Li. "Three State Output Module and Digital Switch Circuit Based on Threshold Memristor." Journal of Physics: Conference Series 2395, no. 1 (December 1, 2022): 012021. http://dx.doi.org/10.1088/1742-6596/2395/1/012021.
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Abstract A memristor is a new electronic device with small volumes and small fluctuations. As a two-terminal device, it is mainly characterized by non-volatility and nanoscale characteristic size. Memristors can also calculate and store at the same time, which has a broad application prospect in logic circuits. Traditional integrated circuit technology has been very mature. And CMOS technology has almost reached the limit of physical size. Compared with traditional circuit components, memristor devices are compatible with CMOS circuits with their fast computing speed, low power consumption, and small layout area. A three-state output module based on a threshold memristor is proposed. The structure includes an inverter, a PMOS tube, two NMOS tubes, and two threshold memristors. Compared with the traditional three-state gate which only uses CMOS technology, the circuit area required by the module is smaller and the overall power consumption is lower, which caters to the development trend of portable and low-power electronic devices. Then the digital switch circuit using this module is introduced, which provides a new idea for the data transmission circuit. The circuit and module are simulated and verified by LTspice software.
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Stojev, Mile. "Electronic devices and circuits—conventional flow version." Microelectronics Journal 29, no. 8 (August 1998): 571. http://dx.doi.org/10.1016/s0026-2692(98)80017-7.
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Avouris, Phaedon, and Richard Martel. "Progress in Carbon Nanotube Electronics and Photonics." MRS Bulletin 35, no. 4 (April 2010): 306–13. http://dx.doi.org/10.1557/mrs2010.553.
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AbstractIn electronics and photonics, intrinsic properties of semiconducting materials play a dominant role in achieving high-performance devices and circuits. In this respect, carbon nanotubes are prime candidates because of their exceptionally high carrier mobility, low capacitance, and strong optical response (direct bandgap). Although these properties compare very favorably with those of crystalline silicon, several issues related to their synthesis, processing, and assembly have challenged efforts for making electronic and photonic devices. Tremendous progress, nevertheless, has been achieved over the years, and much has been learned from novel photonic devices and electronic circuits. We review some of the developments in nanotube transistor performance optimization, ac operation, nanotube circuits, self-assembly, thin-film devices, and nanotube optical devices such as light emitters and detectors. We also examine the issues and opportunities that still exist.
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Duraij, Martijn S., Yudi Xiao, Gabriel Zsurzsan, and Zhe Zhang. "Gallium-Nitride Field Effect Transistors in Extreme Temperature Conditions." Journal of Microelectronics and Electronic Packaging 18, no. 4 (October 1, 2021): 168–76. http://dx.doi.org/10.4071/imaps.1545724.
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Abstract Compact power electronic circuits and higher operating temperatures of switching devices call for an analysis and verification on the impact of the parasitic components in these devices. The found drift mechanisms in a gallium-nitride field effect transistors (GaN-FET) are studied by literature and related to measurement results. The measurements in extreme temperature conditions are far beyond the manufacturer-recommended operating range. Influences to parasitic elements in both static and dynamic operation of the GaN-FETs are investigated and related toward device losses in switch-mode power electronic circuits with the example of a half-bridge circuit. In this article, static operation investigation on the effect of temperature toward resistance, leakage currents, and reverse conduction is conducted. Dynamic operation between the two states of GaN-FET is also addressed and related to the potential impact in a switching circuit losses. A thermal chamber was built to precisely measure the effect of temperature toward parasitic elements in the devices using a curve tracer. It was found that the increment in RDSon, IDSS, IGSS, and VSD can be justified by the literature and verified by measurements. Incremental COSS and decreasing VGSth was found when exposing devices to extreme temperatures. These two parameters give real challenge over designing circuits at high temperature where timing is critical. Albeit temperature challenges, it is found that investigated GaN-FETs have potential to be used in extreme temperature-operating conditions.
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Hernandez, Yoanlys, Bernhard Stampfer, Tibor Grasser, and Michael Waltl. "Impact of Bias Temperature Instabilities on the Performance of Logic Inverter Circuits Using Different SiC Transistor Technologies." Crystals 11, no. 9 (September 21, 2021): 1150. http://dx.doi.org/10.3390/cryst11091150.
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All electronic devices, in this case, SiC MOS transistors, are exposed to aging mechanisms and variability issues, that can affect the performance and stable operation of circuits. To describe the behavior of the devices for circuit simulations, physical models which capture the degradation of the devices are required. Typically compact models based on closed-form mathematical expressions are often used for circuit analysis, however, such models are typically not very accurate. In this work, we make use of physical reliability models and apply them for aging simulations of pseudo-CMOS logic inverter circuits. The model employed is available via our reliability simulator Comphy and is calibrated to evaluate the impact of bias temperature instability (BTI) degradation phenomena on the inverter circuit’s performance made from commercial SiC power MOSFETs. Using Spice simulations, we extract the propagation delay time of inverter circuits, taking into account the threshold voltage drift of the transistors with stress time under DC and AC operating conditions. To achieve the highest level of accuracy for our evaluation we also consider the recovery of the devices during low bias phases of AC signals, which is often neglected in existing approaches. Based on the propagation delay time distribution, the importance of a suitable physical defect model to precisely analyze the circuit operation is discussed in this work too.
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Kazior, Thomas E. "Beyond CMOS: heterogeneous integration of III–V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems." Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences 372, no. 2012 (March 28, 2014): 20130105. http://dx.doi.org/10.1098/rsta.2013.0105.
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Advances in silicon technology continue to revolutionize micro-/nano-electronics. However, Si cannot do everything, and devices/components based on other materials systems are required. What is the best way to integrate these dissimilar materials and to enhance the capabilities of Si, thereby continuing the micro-/nano-electronics revolution? In this paper, I review different approaches to heterogeneously integrate dissimilar materials with Si complementary metal oxide semiconductor (CMOS) technology. In particular, I summarize results on the successful integration of III–V electronic devices (InP heterojunction bipolar transistors (HBTs) and GaN high-electron-mobility transistors (HEMTs)) with Si CMOS on a common silicon-based wafer using an integration/fabrication process similar to a SiGe BiCMOS process (BiCMOS integrates bipolar junction and CMOS transistors). Our III–V BiCMOS process has been scaled to 200 mm diameter wafers for integration with scaled CMOS and used to fabricate radio-frequency (RF) and mixed signals circuits with on-chip digital control/calibration. I also show that RF microelectromechanical systems (MEMS) can be integrated onto this platform to create tunable or reconfigurable circuits. Thus, heterogeneous integration of III–V devices, MEMS and other dissimilar materials with Si CMOS enables a new class of high-performance integrated circuits that enhance the capabilities of existing systems, enable new circuit architectures and facilitate the continued proliferation of low-cost micro-/nano-electronics for a wide range of applications.
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Wu, Yanqing, Damon B. Farmer, Fengnian Xia, and Phaedon Avouris. "Graphene Electronics: Materials, Devices, and Circuits." Proceedings of the IEEE 101, no. 7 (July 2013): 1620–37. http://dx.doi.org/10.1109/jproc.2013.2260311.
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Zhang, Wei. "Quantitative Analysis for Near-Field Characteristics of Converter Circuits." Applied Mechanics and Materials 48-49 (February 2011): 858–62. http://dx.doi.org/10.4028/www.scientific.net/amm.48-49.858.
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With the electric power industrial development, electric power device was abroad using as the core of switch converter. For a clear near-field characterization quantitative electromagnetic interference of converter circuits, this paper applied finite element method to analyze a Boost circuit. Transform topology structure of circuit and build corresponding entity finite element modeling. Quantitative analysis for different topology structure electromagnetic distributing and near-field characteristics, and it become clear that the distribution and the role of electromagnetic field of the circuit through the results. The objective of the analysis is to provide the principle and put a new way for the Layout and component design of the power electronic circuits, at the same time above research works make a foundation for further studying EMI problem of the power electronic devices and are of academically and application worthiness.
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I. Băjenescu, Titu-Marius. "SOME RELIABILITY ASPECTS OF MEMS AND NEMS MANUFACTURING." Journal of Engineering Science XXVIII, no. 2 (June 2021): 91–102. http://dx.doi.org/10.52326/jes.utm.2021.28(2).07.
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A full understanding of the physics and statistics of the defect generation is required to investigate the ultimate reliability limitations of manufacturability of MEMS and NEMS. In order that the user can include electronic components in circuits to achieve errorfree and reliable functional units, assemblies or devices, must he has understood the mode of operation of these components. Only knowledge of their parameters and special properties allows, according to data sheet specifications and manufacturer's documents the optimal components for a specific application, to select. Both for the analysis of electronic circuits and for circuit dimensioning are knowledge of the structure and function of the used components of semiconductor electronics absolutely necessary.
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Khastsaev, Boris D., Larisa M. Dedegkaeva, and Maksim P. Maslakov. "The design of electric drives with electronic protection devices." MATEC Web of Conferences 226 (2018): 04012. http://dx.doi.org/10.1051/matecconf/201822604012.
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The possibility of designing an electronic device for protection and diagnostics of electric drives with improved characteristics is considered. The technique and algorithm of design of similar devices, the structural scheme of the device constructed on their basis are offered. To improve the characteristics of the device of protection and diagnostics of electric drives in the work it is proposed to provide for the use of measuring transducers with linear dependencies of the output values on the controlled ones. The latter is possible as a result of the use of measuring circuits in measuring transducers with linearized dependencies of the output values on the input and the use of intelligent sensors. As a measuring circuit for the construction of measuring transducers is considered the measuring circuit of Kenigsberg, which is characterized by a linear dependence of the output active value of the passive measured (controlled physical quantities). At the same time, the intelligent sensors are additionally assigned the function of linearization of the output dependence of a «simple» sensor on the controlled physical quantity.
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Sekitani, Tsuyoshi. "(Invited, Digital Presentation) Ultra-Thin Organic Integrated Circuits Enabling Bio-Signal Monitoring." ECS Meeting Abstracts MA2022-01, no. 10 (July 7, 2022): 799. http://dx.doi.org/10.1149/ma2022-0110799mtgabs.
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Digital technology has permeated our society, and a wide variety of electronic devices are now in use. In particular, the development of electronic devices for biometric measurements, such as wearable electronics, has been remarkable, and coupled with research and development of high-speed communication and artificial intelligence (AI), many social implementations are being presented. Our group has been conducting research and development on flexible and stretchable electronic systems, which are flexible, soft like rubber, and lightweight, by integrating functional organic nano-materials. In this research activity, our flexible and stretchable electronics have obtained certification for medical devices and are promoting the development of new electronics for use in medical institutions. In this presentation, I would like to introduce our recent activities on the flexible and stretchable electronics utilizing the nanoscience and technology, and developed low-noise and ultra-flexible systems for measuring biological action potentials (electroencephalogram; EEG and electrocardiogram ; ECG).
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Riches, S. T., K. Cannon, C. Johnston, M. Sousa, P. Grant, J. Gulliver, M. Langley, et al. "Application of High Temperature Electronics Packaging Technology to Signal Conditioning and Processing Circuits." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2010, HITEC (January 1, 2010): 000089–96. http://dx.doi.org/10.4071/hitec-sriches-tp11.
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The requirement to install electronic power and control systems in high temperature environments has posed a challenge to the traditional limit of 125°C for high temperature exposure of electronics systems. The leap in operating temperature to above 200°C in combination with high pressures, vibrations and potentially corrosive environments means that different semiconductors, passives, circuit boards and assembly processes will be needed to fulfil the target performance specifications. Bare die mounted onto ceramic and insulated metal substrates can withstand higher temperatures than soldered surface mount devices on printed circuit boards. The results of the evaluation of electronic interconnect and substrate materials that have been submitted to temperatures of 250°C for up to 2000 hours will be presented, including details on novel adhesive formulations and high temperature insulated metal substrates. The materials and processes developed have been applied to the manufacture of high temperature circuits representative of analogue signal conditioning and processing, using silicon on insulator devices and passive components mounted into HTCC packages and onto thick film on ceramic substrates. Results of the characterisation of these devices and circuits at temperatures of 250°C for up to 2000 hours will be presented. This work forms part of the UPTEMP project has been set-up with support from UK Technology Strategy Board and the EPSRC, which started in March 2007 with 3 years duration. The project brings together a consortium of end-users (Sondex Wireline and Vibro-Meter UK), electronic module manufacturers (GE Aviation Systems Newmarket) and material suppliers (Gwent Electronic Materials and Thermastrate Ltd) with Oxford University-Materials Department, the leading UK high temperature electronics research centre.
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Zhang, Zhao Yan, Xing Wu Wang, and Yong Guang Ma. "Research on Simulation of Electronic-Protection Circuit of Chopper Cascade Speed Control System." Applied Mechanics and Materials 721 (December 2014): 569–74. http://dx.doi.org/10.4028/www.scientific.net/amm.721.569.
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Firstly, according to the topology of conventional chopper cascade speed system to analyze the transient process of main loop during of contactor operation when device failure. Because the contactor action requires a longer time, Equipment is vulnerable to the impact of high voltage, high current during the contactor action, and cause damage to power electronic devices. For contactors drawbacks, the main circuit topology with electronic-protection circuit is designed. Then analyze transient process of chopper cascade speed control system with electronic-protection circuit under high-voltage power failure conditions. Finally, simulation model of chopper cascade speed control system with electronic-protection circuit is built respectively in Matlab. Simulation results show that electronic-protection circuits effectively solve the problem of high-voltage power failure under active inverter structure and inverter subversion.
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Azimi, Mohammad, Mehdi Habibi, and Hamidreza Karimi-Alavijeh. "An organic, threshold voltage based, all PMOS, voltage reference generator for flexible sensor tags." Flexible and Printed Electronics 6, no. 4 (December 1, 2021): 045015. http://dx.doi.org/10.1088/2058-8585/ac43f9.
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Abstract The developments and advances achieved in organic semiconductors have promised lower costs for integrated circuit production and also fabrication of electronic circuits using printed technology on unconventional substrates such as plastic, clothing, and even skin. An important building block essential to most electronic circuits is a voltage, process, and temperature independent potential generator which can be used to bias amplifiers and produce a fixed reference for sensor devices. The generation of a voltage reference is also important for voltage regulators. Currently, most reported organic integrated circuits use only p-type OFETs in their circuits due to simpler fabrication procedures. Furthermore, air stable p-type organic semiconductors such as pentacene and CuPc are well characterized. In this paper, a low power two stage all PMOS voltage reference generator is proposed. Since properties such as threshold voltage value and device aging are dependent on the OFET structure, the type of device chosen for this purpose will have a direct impact on the circuit performance. Three different types of OFETs with silver, copper, and gold drain/source electrodes are studied in this work. Performance factors such as line sensitivity (LS), temperature coefficient (TC), power consumption, time constant, and output drifts of the fabricated integrated circuits are measured and reported to verify the characteristics of the proposed circuits. It is shown that the drain/source metal choice affects the threshold voltage dependent output potential of the reference generators.
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Li, Bo, and Guoyong Shi. "A Native SPICE Implementation of Memristor Models for Simulation of Neuromorphic Analog Signal Processing Circuits." ACM Transactions on Design Automation of Electronic Systems 27, no. 1 (January 31, 2022): 1–24. http://dx.doi.org/10.1145/3474364.
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Since the memristor emerged as a programmable analog storage device, it has stimulated research on the design of analog/mixed-signal circuits with the memristor as the enabler of in-memory computation. Due to the difficulty in evaluating the circuit-level nonidealities of both memristors and CMOS devices, SPICE-accuracy simulation tools are necessary for perfecting the art of neuromorphic analog/mixed-signal circuit design. This article is dedicated to a native SPICE implementation of the memristor device models published in the open literature and develops case studies of applying such a circuit simulation with MOSFET models to study how device-level imperfections can make adversarial effects on the analog circuits that implement neuromorphic analog signal processing. Methods on memristor stamping in the framework of modified nodal analysis formulation are presented, and implementation results are reported. Furthermore, functional simulations on neuromorphic signal processing circuits including memristors and CMOS devices are carried out to validate the effectiveness of the native SPICE implementation of memristor models from the perspectives of simulation accuracy, efficiency, and convergence for large-scale simulation tasks.
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MUJAL, JORDI, ELOI RAMON, and JORDI CARRABINA. "METHODOLOGY AND TOOLS FOR INKJET PROCESS ABSTRACTION FOR THE DESIGN OF FLEXIBLE AND ORGANIC ELECTRONICS." International Journal of High Speed Electronics and Systems 20, no. 04 (December 2011): 829–42. http://dx.doi.org/10.1142/s0129156411007082.
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Inkjet printing is a promising and challenging technique that could potentially revolutionize large area and organic electronics fabrication. Inkjet systems are designed to construct devices and circuits drop by drop, which would lead to a new paradigm in electronics fabrication. However, inkjet technology for Printed Electronics is still under development and several challenges remain. While there is significant progress being made in the development of electronic devices, such as transistors or sensors, there is a lack of work on circuit and system level design. Designing devices and circuits implies a wide knowledge of process aspects, requiring a complex interaction among concepts, tools and processes coming from different science and engineering disciplines. An explicit methodology is needed to separate design from fabrication in a similar way as in silicon design, to design devices and systems without a deep knowledge of process and materials; thus making it possible to open up inkjet technology to a larger community and undergo more rapid design implementations. In this paper we present the main aspects of such a methodology and we discuss the key topics on inkjet technology that allow us to propose these new specific steps.
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Gedeon, Dominik, and Stefan J. Rupitsch. "Finite element based system simulation for piezoelectric vibration energy harvesting devices." Journal of Intelligent Material Systems and Structures 29, no. 7 (October 9, 2017): 1333–47. http://dx.doi.org/10.1177/1045389x17733328.
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We present a system simulation approach for piezoelectric vibration energy harvesting devices. Accurate modeling of the electromechanical structure is achieved by the finite element method. For consideration of power electronic circuits as a means of energy extraction, the finite element model is iteratively coupled to electric circuits via Simulink. The high computational cost of conventional finite element calculations is overcome by a specialized modal truncation method for general linear piezoelectric structures. In doing so, the simulation approach allows efficient prediction of mechanical quantities (e.g. displacements, stresses) as well as electric potentials in the continuum under the influence of arbitrary electrical circuits. Several examples are studied to validate the truncation approach against analytical models and full finite element models. The applicability of the method is demonstrated for a piezoelectric vibration energy harvester in conjunction with a power electronic circuit.
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Goswami, Neelaksha, and Satendra Singh. "Learning on Proposal and Optimization of Stumpy Influence CMOS Transconductance Operational Amplifier." RESEARCH REVIEW International Journal of Multidisciplinary 6, no. 12 (December 15, 2021): 184–90. http://dx.doi.org/10.31305/rrijm.2021.v06.i12.028.
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Portable systems, such as wireless communication systems, laptops, smart phones, consumer electronics, and implanted medical devices, are in high demand in the rapidly expanding consumer market. When it comes to extending the running duration of these portable devices, low-power and low-voltage integrated circuits are used almost universally to achieve this. The design of an analogue integrated circuit with somewhat excellent processing characteristics, when compared to its digital equivalent, is a difficult undertaking, especially when it comes to applications requiring low voltage and low power. The use of a digitally driven CMOS technology for the design of an analogue circuit equivalent has increased the difficulty of the difficulties in today's environment. Because of this, the design of ultra-low power analogue circuits has become the bottleneck in the contemporary Complementary Metal Oxide Semiconductor (CMOS) technology. This thesis analyses some of the frequently utilised low power design strategies, which are specifically suited for analogue circuits and are being widely adopted. In today's electronic age, it is necessary to build competitive analogue integrated circuits in order to stay up with the high performance digital integrated circuits that are now available. Since its invention, the amplifier has played a critical role in the design of the vast majority of analogue integrated circuits. Despite this, the performance of the amplifier is what distinguishes the majority of analogue circuits such as converters, filters, and tracking circuits.
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Lee, Changhoon, Changwoo Han, and Changhwan Shin. "Inverter design with positive feedback field-effect transistors." Semiconductor Science and Technology 37, no. 3 (January 28, 2022): 035014. http://dx.doi.org/10.1088/1361-6641/ac41e5.
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Abstract As the physical size of semiconductor devices continues to be aggressively scaled down, feedback field-effect transistors (FBFET) with a positive feedback mechanism among a few promising steep switching devices have received attention as next-generation switching devices. Conventional FBFETs have been studied to explore their device performance. However, this has been restricted to the case of single FBFET; basic circuit designs with FBFETs have not been investigated extensively. In this work, we propose an inverter circuit design with silicon-on-insulator (SOI) FBFETs; we verified this inverter design with mixed-mode technology computer-aided design simulation. The basic principles and mechanisms for designing FBFET inverter circuits are explained because their configuration is different from conventional inverters. In addition, the device parameters necessary to optimize circuit construction are introduced for logic device applications.
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Zheng, Yu-Qing, Yuxin Liu, Donglai Zhong, Shayla Nikzad, Shuhan Liu, Zhiao Yu, Deyu Liu, et al. "Monolithic optical microlithography of high-density elastic circuits." Science 373, no. 6550 (July 1, 2021): 88–94. http://dx.doi.org/10.1126/science.abh3551.
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Polymeric electronic materials have enabled soft and stretchable electronics. However, the lack of a universal micro/nanofabrication method for skin-like and elastic circuits results in low device density and limited parallel signal recording and processing ability relative to silicon-based devices. We present a monolithic optical microlithographic process that directly micropatterns a set of elastic electronic materials by sequential ultraviolet light–triggered solubility modulation. We fabricated transistors with channel lengths of 2 micrometers at a density of 42,000 transistors per square centimeter. We fabricated elastic circuits including an XOR gate and a half adder, both of which are essential components for an arithmetic logic unit. Our process offers a route to realize wafer-level fabrication of complex, high-density, and multilayered elastic circuits with performance rivaling that of their rigid counterparts.
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García de la Vega, Ignacio, and Ricardo Riaza. "Saddle-Node Bifurcations in Classical and Memristive Circuits." International Journal of Bifurcation and Chaos 26, no. 04 (April 2016): 1650064. http://dx.doi.org/10.1142/s0218127416500644.
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This paper addresses a systematic characterization of saddle-node bifurcations in nonlinear electrical and electronic circuits. Our approach is a circuit-theoretic one, meaning that the bifurcation is analyzed in terms of the devices’ characteristics and the graph-theoretic properties of the digraph underlying the circuit. The analysis is based on a reformulation of independent interest of the saddle-node theorem of Sotomayor for semiexplicit index one differential-algebraic equations (DAEs), which define the natural context to set up nonlinear circuit models. The bifurcation is addressed not only for classical circuits, but also for circuits with memristors. The presence of this device systematically leads to nonisolated equilibria, and in this context the saddle-node bifurcation is shown to yield a bifurcation of manifolds of equilibria; in cases with a single memristor, this phenomenon describes the splitting of a line of equilibria into two, with different stability properties.
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Blaschenko, O. D., E. P. Razmenov, and I. M. Starkov. "Modernization of Control of Switching-on the Circuits of a Two-Circuit Pulse Current Generator." Elektronnaya Obrabotka Materialov 58, no. 1 (February 2022): 93–100. http://dx.doi.org/10.52577/eom.2022.58.1.93.
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A possibility of developing control devices for switching on circuits in double-circuit pulse cur-rent generators in various discharge-pulse technologies is shown. The advantages of using those devices in the technology of a high-voltage electrochemical explosion are described, which requires a specific energy input based on the time delays between switching on the circuits. A scheme is proposed for automatically starting the second circuit in a double-circuit pulse current generator, which provides smooth (non-discrete) adjustment of the time delay of operation and realizing a wider range of delay times
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Qiu, Fulian, and David Harrison. "Multilayer supercapacitor threads for woven flexible circuits." Circuit World 41, no. 4 (November 2, 2015): 154–60. http://dx.doi.org/10.1108/cw-04-2015-0018.
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Purpose – Wearable electronic devices have emerged which require compact, flexible power storage devices such as batteries and supercapacitors. Recently, energy storage devices have been developed based on supercapacitor threads. However, current supercapacitor energy storage threads which use electrolytes based on aqueous gels have a 1 V potential window. This is much lower than the voltage required by most electronic devices. This current contribution presents an approach for fabricating a multilayer supercapacitor working as a circuit unit, in which series combinations of the multiple layer structures can achieve a higher potential window, which can better meet the needs of wearable electronic devices. Design/methodology/approach – Two-capacitive layer thread supercapacitors were fabricated using a semi-automatic dip coating method by coating two capacitive layers sequentially on a 50 μm stainless steel core wire, each capacitive layer includes ink, aqueous-based gel electrolyte and silver conductive paint layers. Findings – Two capacitive layers of the single thread supercapacitor can work independently, or as combination circuits – parallel and series. Cyclic voltammograms showed that all flexible circuits have high electrochemical stability. For the case of series circuit configuration, with H3PO-polyvinyl alcohol (PVA) gel electrolyte, a working potential window of 2 V was achieved. Originality/value – A flexible single thread supercapacitor of multilayer structure, with working voltage above 1 V in H3PO4-PVA gel electrolyte, has not been reported before. A semi-automatic dip coating setup used to process the thread supercapacitor has high potential for transfer to an industrial environment for mass production.
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Buscarino, Arturo, Carlo Famoso, Luigi Fortuna, and Mattia Frasca. "Chua's Circuit Dynamics Controlled by Using a Water Electrolytic Cell Component." International Journal of Bifurcation and Chaos 24, no. 09 (September 2014): 1430026. http://dx.doi.org/10.1142/s0218127414300262.
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In this paper, experimental results showing that the dynamics of Chua's circuit can be controlled by using water electrolytic cell based devices are reported. A Chua's circuit where one of the electrical components is replaced by an electrolytic cell device has been realized and its dynamics has been studied showing how different regimes appear when the parameters of the cell (in particular, the level of immersion of the electrode plates and the distance between them) are changed. The results obtained pave the way to the possibility of coupling nonlinear electronic components with electrochemical devices so as to develop a new hybrid technology for implementing a new class of nonlinear circuits.
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Zhang, Chuang, Chang-Ling Zou, Yan Zhao, Chun-Hua Dong, Cong Wei, Hanlin Wang, Yunqi Liu, Guang-Can Guo, Jiannian Yao, and Yong Sheng Zhao. "Organic printed photonics: From microring lasers to integrated circuits." Science Advances 1, no. 8 (September 2015): e1500257. http://dx.doi.org/10.1126/sciadv.1500257.
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A photonic integrated circuit (PIC) is the optical analogy of an electronic loop in which photons are signal carriers with high transport speed and parallel processing capability. Besides the most frequently demonstrated silicon-based circuits, PICs require a variety of materials for light generation, processing, modulation, and detection. With their diversity and flexibility, organic molecular materials provide an alternative platform for photonics; however, the versatile fabrication of organic integrated circuits with the desired photonic performance remains a big challenge. The rapid development of flexible electronics has shown that a solution printing technique has considerable potential for the large-scale fabrication and integration of microsized/nanosized devices. We propose the idea of soft photonics and demonstrate the function-directed fabrication of high-quality organic photonic devices and circuits. We prepared size-tunable and reproducible polymer microring resonators on a wafer-scale transparent and flexible chip using a solution printing technique. The printed optical resonator showed a quality (Q) factor higher than 4 × 105, which is comparable to that of silicon-based resonators. The high material compatibility of this printed photonic chip enabled us to realize low-threshold microlasers by doping organic functional molecules into a typical photonic device. On an identical chip, this construction strategy allowed us to design a complex assembly of one-dimensional waveguide and resonator components for light signal filtering and optical storage toward the large-scale on-chip integration of microscopic photonic units. Thus, we have developed a scheme for soft photonic integration that may motivate further studies on organic photonic materials and devices.
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Sapaev, X., E. Abduraimov, and Sh Umarov. "NUMERICAL CALCULATION OF ELECTRONIC CIRCUITS WITH NONLINEAR ELEMENTS." Technical science and innovation 2020, no. 4 (December 28, 2020): 122–29. http://dx.doi.org/10.51346/tstu-01.20.4-77-0095.
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Non-linear elements are widely used in various automation devices, converting and measuring equipment. They are often presented in the form of diode-resistive circuits. In single-circuit electrical circuits, their calculation by a numerical method reduces to compiling nonlinear equations and solving it using the Newton-Raphson method with specifying reasonable initial conditions for the calculation. The article is aimed at determining the dimensions of the Jacobi matrix in numerical calculations of nonlinear chains. Using the example of numerical calculation of two simplest schemes with nonlinear elements, it is shown that by eliminating the coordinate chain (system equations) from the system of equations that do not contain nonlinear elements, the Jacobi matrix is reduced in size
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Brazil, T. J. "Simulating circuits and devices." IEEE Microwave Magazine 4, no. 1 (March 2003): 42–50. http://dx.doi.org/10.1109/mmw.2003.1188235.
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Chlaihawi, Amer, Adnan Sabbar, and Hur Jedi. "A high-performance multilevel inverter with reduced power electronic devices." International Journal of Power Electronics and Drive Systems (IJPEDS) 11, no. 4 (December 1, 2020): 1883. http://dx.doi.org/10.11591/ijpeds.v11.i4.pp1883-1889.
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This paper introduces a new topology of multilevel inverter, which is able to operate at high performance. This proposed circuit achieves requirements of reduced number of switches, gate-drive circuits, and high design flexibility. In most cases fifteen-level inverters need at least twelve switches. The proposed topology has only ten switches. The inverter has a quasi-sine output voltage, which is formed by level generator and polarity changer to produce the desired voltage and current waveforms. The detailed operation of the proposed inverter is explained. The theoretical analysis and design procedure are given. Simulation results are presented to confirm the analytical approach of the proposed circuit. A 15-level and 31-level multilevel inverters were designed and tested at 50 Hz.
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Koo, Jae-Mo, Sungjun Im, Linan Jiang, and Kenneth E. Goodson. "Integrated Microchannel Cooling for Three-Dimensional Electronic Circuit Architectures." Journal of Heat Transfer 127, no. 1 (January 1, 2005): 49–58. http://dx.doi.org/10.1115/1.1839582.
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The semiconductor community is developing three-dimensional circuits that integrate logic, memory, optoelectronic and radio-frequency devices, and microelectromechanical systems. These three-dimensional (3D) circuits pose important challenges for thermal management due to the increasing heat load per unit surface area. This paper theoretically studies 3D circuit cooling by means of an integrated microchannel network. Predictions are based on thermal models solving one-dimensional conservation equations for boiling convection along microchannels, and are consistent with past data obtained from straight channels. The model is combined within a thermal resistance network to predict temperature distributions in logic and memory. The calculations indicate that a layer of integrated microchannel cooling can remove heat densities up to 135W/cm2 within a 3D architecture with a maximum circuit temperature of 85°C. The cooling strategy described in this paper will enable 3D circuits to include greater numbers of active levels while exposing external surface area for functional signal transmission.
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Zeng, Xiang-jun, Xu Yang, and Zhao-an Wang Xi'an. "Analysis of Capacitive and Inductive Coupling inside Hybrid Integrated Power Electronic Module." Journal of Microelectronics and Electronic Packaging 1, no. 3 (July 1, 2004): 169–75. http://dx.doi.org/10.4071/1551-4897-1.3.169.
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Electromagnetic compatibility has to be given enough attention in the design of hybrid Integrated Power Electronic Module (IPEM) due to the sharply decreased distances between power devices and the control/driving circuits as compared to such distances for conventional power electronic equipment built with discrete devices. The high dν/dt, di/dt and high frequency parasitic ringing emanating from the switching circuit can cause serious EMI within the control/driving circuit due to cross-coupling. This paper analyzes the capacitive and inductive cross-coupling problems inside an IPEM. Finite Element Method (FEM) is used to extract the mutual capacitances between the metal bars in the model. Then the influence of dν/dt can be estimated. The high frequency circulating current in the bridge circuits is also investigated since it causes magnetic interference due to mutual inductance coupling. The mutual inductance is calculated with the simplified Partial Element Equivalent Circuit (PEEC) approach and image method. The experiment validates the effectiveness of this evaluation. In the end, the electromagnetic shielding is discussed.
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Staniloiu, Marius, Horațiu Popescu, Georgiana Rezmeriţă, and Mihai Iordache. "The Equivalent Circuits Thévenin and Norton." Scientific Bulletin of Electrical Engineering Faculty 21, no. 2 (December 1, 2021): 40–48. http://dx.doi.org/10.2478/sbeef-2021-0021.
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Abstract The main objectives of this paper are to correctly define the equivalent Thévenin and Norton circuits and to presents the complete and exact proof of Thévenin and Norton theorems. These circuits allow the separation of the linear portions of the electronic circuits from the nonlinear ones and in this way the polarization process of the electronic devices becomes much more efficient. When linear and/or nonlinear analyzed circuits have a small number of nonlinear circuit elements, their analysis, synthesis, and simulation are performed much more efficiently if the nonlinear part of the circuit is separated from the linear one. By determining the equivalent Thévenin or Norton circuits in relation to the load to connected terminals of a system with two or more magnetic coupled coils, that are part of the wireless power transfer systems, optimal load parameters are determined so that the maximum active power is transmitted to the load.
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Silvestre, Rocío, Raúl Llinares Llopis, Laura Contat Rodrigo, Víctor Serrano Martínez, Josué Ferri, and Eduardo Garcia-Breijo. "Low-Temperature Soldering of Surface Mount Devices on Screen-Printed Silver Tracks on Fabrics for Flexible Textile Hybrid Electronics." Sensors 22, no. 15 (August 2, 2022): 5766. http://dx.doi.org/10.3390/s22155766.
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The combination of flexible-printed substrates and conventional electronics leads to flexible hybrid electronics. When fabrics are used as flexible substrates, two kinds of problems arise. The first type is related to the printing of the tracks of the corresponding circuit. The second one concerns the incorporation of conventional electronic devices, such as integrated circuits, on the textile substrate. Regarding the printing of tracks, this work studies the optimal design parameters of screen-printed silver tracks on textiles focused on printing an electronic circuit on a textile substrate. Several patterns of different widths and gaps between tracks were tested in order to find the best design parameters for some footprint configurations. With respect to the incorporation of devices on textile substrates, the paper analyzes the soldering of surface mount devices on fabric substrates. Due to the substrate’s nature, low soldering temperatures must be used to avoid deformations or damage to the substrate caused by the higher temperatures used in conventional soldering. Several solder pastes used for low-temperature soldering are analyzed in terms of joint resistance and shear force application. The results obtained are satisfactory, demonstrating the viability of using flexible hybrid electronics with fabrics. As a practical result, a simple single-layer circuit was implemented to check the results of the research.
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FOSSUM, JERRY G. "A SIMULATION-BASED PREVIEW OF EXTREMELY SCALED DOUBLE-GATE CMOS DEVICES AND CIRCUITS." International Journal of High Speed Electronics and Systems 12, no. 02 (June 2002): 563–72. http://dx.doi.org/10.1142/s0129156402001460.
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This paper gives a simulation-based preview of device-design issues and performance of extremely scaled DG CMOS. A suite of simulation tools, including a 2D numerical device simulator, a 1D numerical Poisson-Schrödinger solver, and a generic, physics/process-based DG MOSFET compact model in Spice, is applied to both asymmetrical-and symmetrical-gate DG CMOS devices and circuits to provide physical insight at the device and circuit levels. The results give added motivation as well as preliminary guidance for the development of DG CMOS.
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Davidson, D. A., and O. Berolo. "GaAs charge-coupled devices." Canadian Journal of Physics 67, no. 4 (April 1, 1989): 225–31. http://dx.doi.org/10.1139/p89-040.
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This paper reports on the first Canadian involvement in the design, process development, fabrication, and evaluation of a gallium arsenide (GaAs) charge-coupled device (CCD). The project is applications driven, and is eventually expected to yield devices capable of performing at microwave frequencies with broad bandwidths. The devices were originally designed to operate in a transient digitizer for high-energy nuclear-event analysis at the the Tri- University Meson Facility (TRIUMF) in B.C.The prototype device consists of a 32-stage, four-phase GaAs CCD intended to function at radio-frequencies (if). The work that has been undertaken will be discussed under the following aspects: device design, layout description, and substrate-material specifications. This discussion will be supported by an in-depth explanation of the functioning and operation of the GaAs CCD, and how the above considerations affect it. A description will be given of the procedures, methodology, and the test-bed utilized to evaluate the devices. Results will be given for CCDs operating close to 1 GHz. The rf waveform will be analyzed in the context of charge-transfer efficiency (CTE) and the presence of clock feedthrough. Because of the need for an eventual integration of the GaAs CCD on-chip with other essential auxiliary electronic circuitry, results will be given for devices working in conjunction with other GaAs digital and analog circuits, such as a broad-band four-phase clock generator and a sample-and-hold circuit.
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Colinge, Jean-Pierre. "Silicon-on-lnsulator Technology: Past Achievements and Future Prospects." MRS Bulletin 23, no. 12 (December 1998): 16–19. http://dx.doi.org/10.1557/s0883769400029778.
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In silicon-on-insulator (SOI) technology, devices are dielectrically insulated from one another—usually by silicon dioxide. Unlike in conventional silicon devices, there is no direct contact between a transistor and the silicon substrate. The advantages of this type of isolation are many: reduced parasitic capacitances and reduced crosstalk between devices, improved current drive, subthreshold characteristics, and current gain. Silicon-on-insulator devices have been and are being used in several niche-market applications such as hightemperature and radiation-hard integrated circuits. However most importantly, SOI technology seems perfectly adapted to the needs of low-voltage, low-power (LVLP) electronic circuits. Because of the growing market for portable systems, LVLP technology is bound to soon become one of the drivers of the microelectronics industry, and SOI is likely to be part of it. Moreover major companies such as IBM, Sharp, Motorola, and Peregrine have announced upcoming lowpower and high-frequency lines of SOI products. The goal of this article is to introduce the reader to the basics of SOI device physics and the integrated-circuit applications of SOI.