Academic literature on the topic 'Electronic workbench multisim'

This article discusses the use of special software products for the design and simulation of the operation of electrical circuits, namely, the most commonly used programs Electronic Workbench and Multisim are compared, their advantages and disadvantages are determined. In the course of the experiments, on the basis of the above presented software systems, the operation of the electrical circuits of the devices of the amplitude diode detector and the low-frequency amplifier was simulated to identify the capabilities of the programs. In the course of the research, a visual table was compiled, thanks to which it is possible to compare the obtained parameters with the reference characteristics taken from real-life devices. The uptime was chosen as a control parameter, the article contains its calculation formula, and the final calculations are given in the table to better substantiate the capabilities of the software products under consideration. At the end of the article, conclusions are presented on the work done, thanks to which it is possible to determine the pros and cons of each of the programs under consideration.

Context. Self-Timed Circuits, proposed by D. Muller on the rise of the digital era, continues to excite researchers’ minds. These circuits started with the task of improving performance by taking into account real delays. Then Self-Timed Circuits have moved into the field of green computing. At last, they are currently positioned mainly in the field of fault tolerance. There is much redundancy in Self-Timed Circuits. It is believed that Self-Timed Circuits approaches will be in demand in the nano-circuitry when a synchronous approach becomes impossible. Strictly Self-Timed Circuits check transition process completion for each gate’s output. For this, they use so-called D. Muller elements (C-elements, hysteresis flip-flops, G-flip-flops). Usually, Self-Timed Circuits are designed on Uncommitted Logic Array. Now an extensive base of Uncommitted Logic Array Self-Timed gates exists. It is believed that SelfTimed Circuits are not compatible with FPGA technology. However, attempts to create self-timed FPGAs do not stop. The article proposes a Self-Timed Lookup Table for the Self-Timed Uncommitted Logic Array and the Self-Timed FPGA, carried out either by constants or utilizing additional memory cells. Authors proposed 1,2 – Self-Timed Lookup Table and described simulation results. Objective. The work’s goal is the analysis and design of the Strictly Self-Timed universal logic element based on Uncommitted Logic Array cells and pass-transistors circuits. Methods. Analysis and synthesis of the Strictly Self-Timed circuits with Boolean algebra. Simulation of the proposed element in the CAD “ARC”, TRANAL program, system NI Multisim by National Instruments Electronics Workbench Group, and layout design by Microwind. The reliability theory and reliability calculations in PTC Mathcad. Results. Authors designed, analyzed, and proved the Self-Timed Lookup Table’s workability for the Uncommitted Logic Arrays and FPGAs. Layouts of the novel logic gates are ready for manufacturing. Conclusions. The conducted studies allow us to use proposed circuits in perspective digital devices.