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Relevant bibliographies by topics / Field effect transistor MOSFET

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Academic literature on the topic 'Field effect transistor MOSFET'

Author: Grafiati

Published: 4 June 2021

Last updated: 6 February 2022

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Journal articles on the topic "Field effect transistor MOSFET"

1

Hashim, Muhaimin Bin Mohd, AHM Zahirul ALAM, and Naimah Binti Darmis. "EFFECT OF FERRO ELECTRIC THICKNESS ON NEGATIVE CAPACITANCE FET (NCFET)." IIUM Engineering Journal 22, no. 1 (January 30, 2021): 339–46. http://dx.doi.org/10.31436/iiumej.v22i1.1814.

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Conventional Field Effect Transistor (FET) are well known to require at least 60mV/decade at 300K change in the channel potential to change the current by a factor of 10. Due to this, 60mV/decade becomes the bottleneck of this day transistor. A comprehensive study of the Negative Capacitance Field Effect Transistor (NCFETis presented. This paper shows the effect of ferroelectric material in MOSFET structure by replacing the insulator in the conventional MOSFET. It should be possible to obtain a steeper subthreshold swing (SS) compared to the one without a ferroelectric material layer, thus breaking the fundamental limit on the operating voltage of MOSFET. 27% of the subthreshold slope reduction is observed by introducing ferroelectric in the dielectric layer compared to the conventional MOSFETs. Hence, the power dissipation in MOSFET can be mitigated and shine to a new technology of a low voltage/low power transistor operation. ABSTRAK: Transistor Kesan Medan Konvensional (FET) terkenal memerlukan sekurang-kurangnya 60mV / dekad pada 300K perubahan pada saluran yang berpotensi untuk mengubah arus dengan faktor 10. Oleh kerana itu, 60mV / dekad menjadi hambatan transistor hari ini. Kajian komprehensif mengenai Negative Capacitance Field Effect Transistor (NCFETis dikemukakan. Makalah ini menunjukkan kesan bahan ferroelektrik dalam struktur MOSFET dengan mengganti penebat dalam MOSFET konvensional. Sebaiknya dapatkan swing swing subthreshold (SS) yang lebih curam berbanding dengan satu tanpa lapisan bahan ferroelektrik, sehingga melanggar had asas pada voltan operasi MOSFET. 27% pengurangan cerun subthreshold diperhatikan dengan memperkenalkan ferroelektrik di lapisan dielektrik berbanding dengan MOSFET konvensional. Oleh itu, pelesapan daya dalam MOSFET dapat dikurangkan dan bersinar dengan teknologi baru operasi transistor voltan rendah / kuasa rendah.

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Natarajamoorthy, Mathan, Jayashri Subbiah, Nurul Ezaila Alias, and Michael Loong Peng Tan. "Stability Improvement of an Efficient Graphene Nanoribbon Field-Effect Transistor-Based SRAM Design." Journal of Nanotechnology 2020 (April 30, 2020): 1–7. http://dx.doi.org/10.1155/2020/7608279.

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The development of the nanoelectronics semiconductor devices leads to the shrinking of transistors channel into nanometer dimension. However, there are obstacles that appear with downscaling of the transistors primarily various short-channel effects. Graphene nanoribbon field-effect transistor (GNRFET) is an emerging technology that can potentially solve the issues of the conventional planar MOSFET imposed by quantum mechanical (QM) effects. GNRFET can also be used as static random-access memory (SRAM) circuit design due to its remarkable electronic properties. For high-speed operation, SRAM cells are more reliable and faster to be effectively utilized as memory cache. The transistor sizing constraint affects conventional 6T SRAM in a trade-off in access and write stability. This paper investigates on the stability performance in retention, access, and write mode of 15 nm GNRFET-based 6T and 8T SRAM cells with that of 16 nm FinFET and 16 nm MOSFET. The design and simulation of the SRAM model are simulated in synopsys HSPICE. GNRFET, FinFET, and MOSFET 8T SRAM cells give better performance in static noise margin (SNM) and power consumption than 6T SRAM cells. The simulation results reveal that the GNRFET, FinFET, and MOSFET-based 8T SRAM cells improved access static noise margin considerably by 58.1%, 28%, and 20.5%, respectively, as well as average power consumption significantly by 97.27%, 99.05%, and 83.3%, respectively, to the GNRFET, FinFET, and MOSFET-based 6T SRAM design.

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Dinh, Hien Sy, and Trung Hoang Huynh. "SIMULATING CURRENT - VOLTAGE CHARACTERISTICS OF MOLECULAR TRANSISTOR FIELD EFFECT TRANSISTOR." Science and Technology Development Journal 12, no. 13 (July 15, 2009): 5–12. http://dx.doi.org/10.32508/stdj.v12i13.2389.

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Molecular Field Effect Transistor (MFET) is a promising alternative candidate of traditional MOSFET in future due to its small size, low power consumption and high speed. In this work, we introduce a model of three-terminal MFET. The structure of the MFET is in shape like traditional MOSFET, but its conductive channel is replaced by a benzene-1,4-dithiolate molecule. We use non-equilibrium Green's function method to compute transport function of charges and ultimately, the current-voltage (1-V) characteristics. The program is written by using graphic user guide (GUI) in Matlab. We have found significant difference of I-V characteristics between MOSFET and MFET. In addition, impacts of types of material, temperature, and bias on I-V characteristics of the MFET have been considered. Using GUI in Matlab, obtained results of simulations are intuitively displayed.

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Gu, Jie, Qingzhu Zhang, Zhenhua Wu, Jiaxin Yao, Zhaohao Zhang, Xiaohui Zhu, Guilei Wang, et al. "Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETs." Nanomaterials 11, no. 2 (January 26, 2021): 309. http://dx.doi.org/10.3390/nano11020309.

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A 16-nm-Lg p-type Gate-all-around (GAA) silicon nanowire (Si NW) metal oxide semiconductor field effect transistor (MOSFET) was fabricated based on the mainstream bulk fin field-effect transistor (FinFET) technology. The temperature dependence of electrical characteristics for normal MOSFET as well as the quantum transport at cryogenic has been investigated systematically. We demonstrate a good gate-control ability and body effect immunity at cryogenic for the GAA Si NW MOSFETs and observe the transport of two-fold degenerate hole sub-bands in the nanowire (110) channel direction sub-band structure experimentally. In addition, the pronounced ballistic transport characteristics were demonstrated in the GAA Si NW MOSFET. Due to the existence of spacers for the typical MOSFET, the quantum interference was also successfully achieved at lower bias.

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NASTAUSHEV, Yu V., T. A. GAVRILOVA, M. M. KACHANOVA, O. V. NAUMOVA, I. V. ANTONOVA, V. P. POPOV, L. V. LITVIN, D. V. SHEGLOV, A. V. LATYSHEV, and A. L. ASEEV. "FIELD EFFECT NANOTRANSISTOR ON ULTRATHIN SILICON-ON-INSULATOR." International Journal of Nanoscience 03, no. 01n02 (February 2004): 155–60. http://dx.doi.org/10.1142/s0219581x04001936.

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Peculiarities of the fabrication of field effect transistor (FET) at nanoscaled size on ultrathin silicon-on-insulator (SOI) was studied in details. Two types of FET transistor were successfully realized: in-plane-gate FET (IPGFET) with 40 nm minimum channel size and multichannel top-gate MOSFET on silicon-on-insulator. The deep submicron top-gate of Ti/Au embraces each of the conductive oxidized silicon wires placed with 400 nm pitch. The type and concentration of carries in a conductive channel of the ultrathin SOI was controlled by a bottom gate. The fabricated transistors demonstrated high transconductance and low threshold voltage. Some results of electron properties of the nano-FET transistors are presented.

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Hamieh, S. "Improving the RF Performance of Carbon Nanotube Field Effect Transistor." Journal of Nanomaterials 2012 (2012): 1–7. http://dx.doi.org/10.1155/2012/724121.

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Compact model of single-walled semiconducting carbon nanotube field-effect transistors (CNTFETs) implementing the calculation of energy conduction subband minima under VHDLAMS simulator is used to explore the high-frequency performance potential of CNTFET. The cutoff frequency expected for a MOSFET-like CNTFET is well below the performance limit, due to the large parasitic capacitance between electrodes. We show that using an array of parallel nanotubes as the transistor channel combined in a finger geometry to produce a single transistor significantly reduces the parasitic capacitance per tube and, thereby, improves high-frequency performance.

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Islam, Md Rabiul, Md Kamrul Hasan, Md Abdul Mannan, M. Tanseer Ali, and Md Rokib Hasan. "Gate Length Effect on Gallium Nitride Based Double Gate Metal-Oxide-Semiconductor Field-Effect Transistor." AIUB Journal of Science and Engineering (AJSE) 18, no. 2 (August 31, 2019): 73–80. http://dx.doi.org/10.53799/ajse.v18i2.43.

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We have investigated the performance of Gallium Nitride (GaN) based Double-Gate (DG) Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET). Atlas Device Simulation Framework -Silvaco has been used to access Non-Equilibrium Green Function to distinguish the transfer characteristics curve, ON state current (ION), OFF-state current (IOFF), Drain Induced Barrier Lowering (DIBL), Subthreshold Swing, Electron Current Density, Conduction Band Energy and Electric Field. The concept of Solid state device physics on the effect of gate length studied for the next generation logic applications. GaN-based DG MOSFETs shows better performance than Si-based Single gate MOSFETs. The proposed device has drawn the attention over conventional SG-MOSFET due to fas switching performance. The device turn on and turn off voltage is respectively VGS=1V(On state) and VGS-0V(OFF State). To validate our simulation tool and model results, previous research model has been investigated using Silvaco Atlas and the results obtained are compared to the previous results.

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Ahn, Tae Jun, and Yun Seop Yu. "Interface Trap Charge Effects of Monolithic 3D Junctionless Field-Effect Transistors (JLFET) Inverter." Journal of Nanoscience and Nanotechnology 21, no. 8 (August 1, 2021): 4252–57. http://dx.doi.org/10.1166/jnn.2021.19388.

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We investigated the effect of the interface trap charge in a monolithic three-dimensional inverter structure composing of JLFETs (M3DINV-JLFET), using the interface trap charge distribution extracted in the previous study. The effect of interface trap charge was compared with a conventional M3DINV composing of MOSFETs (M3DINV-MOSFETs) by technology computer-aided design simulation. When the interface trap charges in both M3DINV-JLFET and M3DINV-MOSFET are added, the threshold voltages, on-current levels, and subthreshold swings of both JLFETs and MOSFETs increase, decrease, and increase, respectively, and switching voltages and propagation delays of M3DINV are shifted and increased, respectively. However, since JLFET and MOSFET have different current paths of bulk and interface in channel, respectively, MOSFET is more affected by the interface trap, and M3DINV-JLFET has almost less effect of interface trap at different thickness of interlayer dielectric, compared to M3DINV-MOSFET.

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Marcoux, J., J. Orchard-Webb, and J. F. Currie. "Complementary metal oxide semiconductor-compatible junction field-effect transistor characterization." Canadian Journal of Physics 65, no. 8 (August 1, 1987): 982–86. http://dx.doi.org/10.1139/p87-156.

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We report on the fabrication and electrical characterization of a vertical junction-gate field-effect transistor (JFET) that is compatible with all complementary metal oxide semiconductor (CMOS) technologies. It can be used as a buried load for an enhancement n-channel metal oxide semiconductor field-effect transistor (n-MOSFET), replacing the p-MOSFET within the standard CMOS inverter configuration and resulting in a 40% net area economy in standard cells. To be entirely CMOS process compatible, this JFET device differs from others in the literature in that dopant concentrations in the n substrates (1014) and in the p wells (1015) are substantially lower. For integrated-circuit applications, one seeks to use the JFET with the smallest area to minimize parasitic capacitances and to maximize switching speeds. However, at these concentration levels, the dc current–voltage characteristics depend critically on the lateral dimension of the JFET's square channel. Above 10 μm, the characteristics are pentode-like and similar to those of a classic MOSFET. Below 10 μm, the channel is naturally pinched-off, and for reverse gate bias, the small JFETs are triode-like. There is also a nonreciprocity between the source and the drain when the source-to-drain voltage polarity is changed, which is due to the distance between the channel and the electrode collecting the carriers. When its gate is forward-biased, the small JFETs behave as bipolar transistors. Depending on source-to-drain voltage polarities, I–V characteristics exhibit saturation effects caused by base-widening phenomena at the JFET's drain contact.

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Tan, Michael Loong Peng. "Long Channel Carbon Nanotube as an Alternative to Nanoscale Silicon Channels in Scaled MOSFETs." Journal of Nanomaterials 2013 (2013): 1–5. http://dx.doi.org/10.1155/2013/831252.

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Long channel carbon nanotube transistor (CNT) can be used to overcome the high electric field effects in nanoscale length silicon channel. When maximum electric field is reduced, the gate of a field-effect transistor (FET) is able to gain control of the channel at varying drain bias. The device performance of a zigzag CNTFET with the same unit area as a nanoscale silicon metal-oxide semiconductor field-effect transistor (MOSFET) channel is assessed qualitatively. The drain characteristic of CNTFET and MOSFET device models as well as fabricated CNTFET device are explored over a wide range of drain and gate biases. The results obtained show that long channel nanotubes can significantly reduce the drain-induced barrier lowering (DIBL) effects in silicon MOSFET while sustaining the same unit area at higher current density.

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Dissertations / Theses on the topic "Field effect transistor MOSFET"

1

Speer, Kevin M. "The Silicon Carbide Vacuum Field-Effect Transistor (VacFET)." Case Western Reserve University School of Graduate Studies / OhioLINK, 2011. http://rave.ohiolink.edu/etdc/view?acc_num=case1301445427.

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李華剛 and Eddie Herbert Li. "Narrow-channel effect in MOSFET." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 1990. http://hub.hku.hk/bib/B31209312.

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Lin, Xinnan. "Double gate MOSFET technology and applications /." View abstract or full-text, 2007. http://library.ust.hk/cgi/db/thesis.pl?ECED%202007%20LIN.

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Peters, Chris (Christopher Joseph) Carleton University Dissertation Engineering Electrical. "MOSFET based gamma radiation detector." Ottawa, 1992.

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Budihardjo, Irwan Kukuh. "A charge based power MOSFET model /." Thesis, Connect to this title online; UW restricted, 1995. http://hdl.handle.net/1773/5975.

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Chen, Qiang. "Scaling limits and opportunities of double-gate MOSFETS." Diss., Georgia Institute of Technology, 2003. http://hdl.handle.net/1853/15011.

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Bjeletich, Peter John. "Characterization of heteroepitaxial silicon germanium carbon layers for metal oxide semiconductor field effect transistor (MOSFET) applications /." For electronic version search Digital dissertations database. Restricted to UC campuses. Access is free to UC campus dissertations, 2004. http://uclibs.org/PID/11984.

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Thesis (Ph. D.)--University of California, Davis, 2005.
Degree granted in Electrical Engineering. Dissertation completed in 2004; degree granted in 2005. Also available via the World Wide Web. (Restricted to UC campuses)

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Singh, Jagar. "Technology, characteristics, and modeling of large-grain polysilicon MOSFET /." View Abstract or Full-Text, 2002. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202002%20SINGH.

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Baird, John Malcolm Edward. "A micro processor based A.C. drive with a Mosfet inverter." Thesis, Cape Technikon, 1991. http://hdl.handle.net/20.500.11838/1119.

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Thesis (Masters Diploma (Electrical Engineering)--Cape Technikon, Cape Town,1991
A detailed study into the development of a three phase motor drive, inverter and microprocessor controller using a scalar control method. No mathematical modelling of the system was done as the drive was built around available technology. The inverter circuit is of a Vo~tage source inverter configuration whicp uses MOSFETs switching at a base frequency of between 1.2 KHz and 2 KHz. Provision has been made for speed control and dynamic braking for special applications, since the drive is not going to be put into a specific application as yet, it was felt that only a basic control should be implemented and space should be left for special requests from prospective customers. The pulses for the inverter are generated from the HEF 4752 I.e. under the control of the micro processor thus giving the processor full control over the inverter and allowing it to change almost any parameter at any time. Although the report might seem to cover a lot of unimportant ground it is imperative that the reader is supplied with the back-ground information in order to understand where A.e. drives failed in the past and where A.e. drives are heading in the future. As well as where this drive seeks to use available technology to the best advantage.

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Man, Tsz Yin. "One dimensional quantum mechanical transport in double-gate MOSFET /." View Abstract or Full-Text, 2003. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202003%20MAN.

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Books on the topic "Field effect transistor MOSFET"

1

Taylor, B. E. Power Mosfet design. Chichester, W. Sussex, England: Wiley, 1993.

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Baliga, B. Jayant. Advanced power MOSFET concepts. New York: Springer, 2010.

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Cherem, Schneider Márcio, ed. MOSFET modeling for circuit analysis and design. Singapore: World Scientific, 2007.

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Warner, R. M. MOSFET theory and design. New York: Oxford University Press, 1999.

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Cheng, Yuhua. MOSFET modeling & BSIM3 user's guide. Boston: Kluwer Academic Publishers, 1999.

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Chenming, Hu, ed. MOSFET modeling & BSIM3 user's guide. Boston: Kluwer Academic Publishers, 1999.

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Cheng, Yuhua. MOSFET modeling & BSIM3 user's guide. New York: Kluwer Academic Publishers, 2002.

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8

Hänsch, W. The drift diffusion equation and its applications in MOSFET modeling. Wien: Springer-Verlag, 1991.

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Hänsch, W. The drift diffusion equation and its applications in MOSFET modeling. Wien: Springer-Verlag, 1991.

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10

Foty, D. MOSFET modeling with SPICE: Principles and practice. Upper Saddle River, NJ: Prentice Hall PTR, 1997.

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Book chapters on the topic "Field effect transistor MOSFET"

1

N. Makarov, Sergey, Reinhold Ludwig, and Stephen J. Bitar. "MOS Field-Effect Transistor (MOSFET)." In Practical Electrical Engineering, 919–72. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-21173-2_18.

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Kolawole, Michael Olorunfunmi. "MOS Field-Effect Transistor (MOSFET) Circuits." In Electronics, 173–204. First edition. | Boca Raton, FL : CRC Press, 2020.: CRC Press, 2020. http://dx.doi.org/10.1201/9781003052913-5.

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Tietze, Ulrich, Christoph Schenk, and Eberhard Gamm. "Field Effect Transistor." In Electronic Circuits, 169–268. Berlin, Heidelberg: Springer Berlin Heidelberg, 2008. http://dx.doi.org/10.1007/978-3-540-78655-9_3.

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Weik, Martin H. "field-effect transistor." In Computer Science and Communications Dictionary, 601. Boston, MA: Springer US, 2000. http://dx.doi.org/10.1007/1-4020-0613-6_7077.

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Gift, Stephan J. G., and Brent Maundy. "Field-Effect Transistor." In Electronic Circuit Design and Application, 89–125. Cham: Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-46989-4_3.

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Oktyabrsky, Serge. "p-type Channel Field-Effect Transistors." In Fundamentals of III-V Semiconductor MOSFETs, 349–78. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-1547-4_12.

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Shur, M., G. Simin, S. Rumyantsev, R. Jain, and R. Gaska. "Insulated Gate Nitride-Based Field Effect Transistors." In Fundamentals of III-V Semiconductor MOSFETs, 379–422. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-1547-4_13.

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Weik, Martin H. "negative field-effect transistor." In Computer Science and Communications Dictionary, 1078. Boston, MA: Springer US, 2000. http://dx.doi.org/10.1007/1-4020-0613-6_12154.

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Weik, Martin H. "field-effect transistor photodetector." In Computer Science and Communications Dictionary, 601. Boston, MA: Springer US, 2000. http://dx.doi.org/10.1007/1-4020-0613-6_7079.

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Jayendran, Ariacutty, and Rajah Jayendran. "The field effect transistor." In Englisch für Elektroniker, 102–11. Wiesbaden: Vieweg+Teubner Verlag, 1996. http://dx.doi.org/10.1007/978-3-322-84907-6_14.

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Conference papers on the topic "Field effect transistor MOSFET"

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Hashim, A. M., H. H. Ping, C. Y. Pin, Mohamad Rusop, Rihanum Yahaya Subban, Norlida Kamarulzaman, and Wong Tin Wui. "Characterization of MOSFET-like Carbon Nanotube Field Effect Transistor." In INTERNATIONAL CONFERENCE ON ADVANCEMENT OF MATERIALS AND NANOTECHNOLOGY: (ICAMN—2007). AIP, 2010. http://dx.doi.org/10.1063/1.3377796.

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Devnath, Bappy Chandra, and Satyendra N. Biswas. "MOSFET-like Carbon nanotube Field Effect Transistor based Full adder design." In 2019 1st International Conference on Advances in Science, Engineering and Robotics Technology (ICASERT). IEEE, 2019. http://dx.doi.org/10.1109/icasert.2019.8934521.

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Roche, Benoit, Benoit Voisin, Xavier Jehl, Marc Sanquer, Romain Wacquez, Maud Vinet, Veeresh Deshpande, and Bernard Previtali. "Realization of both a single electron transistor and a field effect transistor with an underlapped FDSOI MOSFET geometry." In 2012 13th International Conference on Ultimate Integration on Silicon (ULIS). IEEE, 2012. http://dx.doi.org/10.1109/ulis.2012.6193374.

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Ni, Weijiang, Xiaoliang Wang, Hongling Xiao, Miaoling Xu, Mingshan Li, Holger Schlichting, and Tobias Erlbacher. "1700V 34mΩ 4H-SiC MOSFET With Retrograde Doping in Junction Field-Effect Transistor Region." In 2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC). IEEE, 2019. http://dx.doi.org/10.1109/edssc.2019.8754174.

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Sinha, Sanjeet Kumar, and Saurabh Chaudhury. "Advantage of carbon nannotube field effect transistor (CNTFET) over double-gate MOSFET in nanometre regime." In 2012 National Conference on Computing and Communication Systems (NCCCS). IEEE, 2012. http://dx.doi.org/10.1109/ncccs.2012.6412983.

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Schwierz, Frank. "The frequency limits of field-effect transistors: MOSFET vs. HEMT." In 2008 9th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT). IEEE, 2008. http://dx.doi.org/10.1109/icsict.2008.4734822.

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Raju, Uthaman, Praveen Pandojirao-S., Niraja Sivakumar, and Dereje Agonafer. "Static Power Consumption: Silicon on Insulator Metal Oxide Semiconductor Field Effect Transistor." In ASME 2007 International Mechanical Engineering Congress and Exposition. ASMEDC, 2007. http://dx.doi.org/10.1115/imece2007-44059.

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The static power consumption due to leakage current plays a significant part in semiconductor devices, as the device dimensions continue to shrink. Low power dissipation is one of the critical factors needed to achieve high performance in a chip. New methods are continuously being implemented for reduction of leakage current in deep sub micron ultra thin SOI MOSFET using device simulator tools. In this paper, an 18nm gate length ultra thin SOI MOSFET is simulated for different silicon body thicknesses and the leakage current is determined by using the device simulator, MEDICITM. It is demonstrated that MEDICI™ device simulations is a good tool that can effectively be used for ultra thin SOI MOSFET devices to study the effect of design parameters on the leakage current. Ultra thin SOI MOSFET with 18nm gate length of different Silicon body thickness is simulated and the leakage current as determined by using MEDICI™ shows that the leakage current decreases by 10–15% as the silicon body thickness reduces by 2 nm.

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Jones, Keith W., Atindra K. Mitra, and Jeffry Ramsey. "Heat Generation in the Metal-Oxide-Silicon Field-Effect Transistor (MOSFET) and Possible Thermal Management Solutions." In International Conference On Environmental Systems. 400 Commonwealth Drive, Warrendale, PA, United States: SAE International, 2004. http://dx.doi.org/10.4271/2004-01-2571.

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Seven, Fikri, and ve Mustafa Sen. "Fabrication and Characterization of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET)-based Micro pH Sensor." In 2020 Medical Technologies Congress (TIPTEKNO). IEEE, 2020. http://dx.doi.org/10.1109/tiptekno50054.2020.9299291.

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Martino, Joao A., Paula G. D. Agopian, Eddy Simoen, and Cor Claeys. "Field effect transistors: From mosfet to Tunnel-Fet analog performance perspective." In 2014 IEEE 12th International Conference on Solid -State and Integrated Circuit Technology (ICSICT). IEEE, 2014. http://dx.doi.org/10.1109/icsict.2014.7021276.

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Reports on the topic "Field effect transistor MOSFET"

1

Dorsey, Andrew M., and Matthew H. Ervin. Effects of Differing Carbon Nanotube Field-effect Transistor Architectures. Fort Belvoir, VA: Defense Technical Information Center, July 2009. http://dx.doi.org/10.21236/ada502660.

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Suslov, Alexey, and Tzu-Ming Lu. Capacitance of a Ge/SiGe heterostructure field-effect transistor. Office of Scientific and Technical Information (OSTI), November 2018. http://dx.doi.org/10.2172/1484586.

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Blair, S. M. AlGaN/InGaN Nitride Based Modulation Doped Field Effect Transistor. Fort Belvoir, VA: Defense Technical Information Center, November 2003. http://dx.doi.org/10.21236/ada422632.

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Sun, W. D., Fred H. Pollak, Patrick A. Folkes, and Godfrey A. Gumbs. Band-Bending Effect of Low-Temperature GaAs on a Pseudomorphic Modulation-Doped Field-Effect Transistor. Fort Belvoir, VA: Defense Technical Information Center, March 1999. http://dx.doi.org/10.21236/ada361412.

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Huebschman, Benjamin D., Pankaj B. Shah, and Romeo Del Rosario. Theory and Operation of Cold Field-effect Transistor (FET) External Parasitic Parameter Extraction. Fort Belvoir, VA: Defense Technical Information Center, May 2009. http://dx.doi.org/10.21236/ada499619.

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Harrison, Richard Karl, Stephen Wayne Howell, Jeffrey B. Martin, and Allister B. Hamilton. Exploring graphene field effect transistor devices to improve spectral resolution of semiconductor radiation detectors. Office of Scientific and Technical Information (OSTI), December 2013. http://dx.doi.org/10.2172/1200672.

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Jackson, H. G., T. T. Shimizu, and B. Leskovar. Preliminary measurements of gamma ray effects on characteristics of broad-band GaAs field-effect transistor preamplifiers. Office of Scientific and Technical Information (OSTI), January 1985. http://dx.doi.org/10.2172/5126571.

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Cooper, Donald E., and Steven C. Moss. Picosecond Optoelectronic Measurement of the High Frequency Scattering Parameters of a GaAs FET (Field Effect Transistor). Fort Belvoir, VA: Defense Technical Information Center, June 1986. http://dx.doi.org/10.21236/ada170618.

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Aizin, Gregory. Plasmon Enhanced Electron Drag and Terahertz Photoconductance in a Grating-Gated Field-Effect Transistor with Two-Dimensional Electron Channel. Fort Belvoir, VA: Defense Technical Information Center, January 2006. http://dx.doi.org/10.21236/ada447174.

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