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Journal articles on the topic 'Field Programmable Analog Array (FPAA)'

Author: Grafiati

Published: 4 June 2021

Last updated: 1 February 2022

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1

MAHMOUD, SOLIMAN A., and EMAN A. SOLIMAN. "LOW VOLTAGE CURRENT CONVEYOR-BASED FIELD PROGRAMMABLE ANALOG ARRAY." Journal of Circuits, Systems and Computers 20, no. 08 (2011): 1677–701. http://dx.doi.org/10.1142/s0218126611008109.

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In this paper a low voltage low power field programmable analog array (FPAA) is realized. The FPAA configurable analog block (CAB) design is based on three-bit digitally controlled fully differential current conveyor. The FPAA consists of seven CABs. The CABs are directly connected together without adding extra hardware by placing them in a hexagonal lattice arrangement. A variable gain amplifier, tunable second-order low-pass filter, and a tunable second-order band-pass filter are realized as an application for the FPAA. The FPAA total power consumption is 105.12 mW at 1 V supply. The FPAA is

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KILIC, RECAI. "UNIVERSAL PROGRAMMABLE CHAOS GENERATOR: DESIGN AND IMPLEMENTATION ISSUES." International Journal of Bifurcation and Chaos 20, no. 02 (2010): 419–35. http://dx.doi.org/10.1142/s021812741002551x.

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Chaos generators are generally designed and implemented by using analog circuit design techniques. Analog implementations require a variety of circuitry that comprises different passive and active electronic components like individual op-amps, comparators, analog multipliers, trigonometric function generators. Anyone who wants to experimentally investigate different structurally chaotic systems has to provide a significant amount of circuit hardware. This process may be hard and time consuming. At this stage, the question to be asked: Is there a unique analog component for implementing a unive

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PALUSINSKI, O. A., D. M. GETTMAN, D. ANDERSON, H. ANDERSON, and C. MARCJAN. "FILTERING APPLICATIONS OF FIELD PROGRAMMABLE ANALOG ARRAYS." Journal of Circuits, Systems and Computers 08, no. 03 (1998): 337–53. http://dx.doi.org/10.1142/s021812669800016x.

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A Field Programmable Analog Array (FPAA), built in CMOS technology, contains uncommitted operational amplifiers, switches, and capacitors. A FPAA containing banks of programmable switched capacitors (SC) can be used to build filters for analog signals as well as a large number of diverse analog applications. The parameters of a given application, such as a filter, are functions of the capacitor values. Manufacturing and quantization errors may result in capacitor values in the FPAA other than those required by the application. For an FPAA to be a viable substitute for dedicated devices we must

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GAUDET, VINCENT C., and P. GLENN GULAK. "IMPLEMENTATION ISSUES FOR HIGH-BANDWIDTH FIELD-PROGRAMMABLE ANALOG ARRAYS." Journal of Circuits, Systems and Computers 08, no. 05n06 (1998): 541–58. http://dx.doi.org/10.1142/s0218126698000341.

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This paper is a tutorial introduction to field-programmable analog arrays, as well as a review of existing field-programmable analog array architectures, of both educational and industrial origin. Circuit issues relevant to the development of high-bandwidth FPAAs are presented. A current conveyor-based architecture, which promises to achieve video bandwidths, is described. Test results are presented for the CMOS current conveyor-based FPAA building block, with programmable transconductors and capacitors. Measurements indicate bandwidths in excess of 10 MHz, and functionality of amplifiers, int

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Hu, Han-Ping, Xiao-Hui Liu, and Fei-Long Xie. "Design and Implementation of Autonomous and Non-Autonomous Time-Delay Chaotic System Based on Field Programmable Analog Array." Entropy 21, no. 5 (2019): 437. http://dx.doi.org/10.3390/e21050437.

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Time-delay chaotic systems can have hyperchaotic attractors with large numbers of positive Lyapunov exponents, and can generate highly stochastic and unpredictable time series with simple structures, which is very suitable as a secured chaotic source in chaotic secure communications. But time-delay chaotic systems are generally designed and implemented by using analog circuit design techniques. Analog implementations require a variety of electronic components and can be difficult and time consuming. At this stage, we can now solve this question by using FPAA (Field-Programmable Analog Array).

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Korkmaz, Nimet, and Recai Kilic. "Implementations of Modified Chaotic Neural Models with Analog Reconfigurable Hardware." International Journal of Bifurcation and Chaos 24, no. 04 (2014): 1450046. http://dx.doi.org/10.1142/s0218127414500461.

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This paper focuses on implementations of two modified Aihara's chaotic neuron models and a simple chaotic neural network constructed with two chaotic neurons in a programmable and reconfigurable manner with an analog programmable device, FPAA (Field Programmable Analog Array). After testing the chaotic behaviors of two chaotic neuron models and a simple chaotic neural network through numerical analyses that consist of time domain responses, phase portrait illustrations and bifurcation diagrams, the experimental setup is constructed with a FPAA device. The parametric adjustments of chaotic neur

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Suszynski, R., and K. Wawryn. "Rapid prototyping of algorithmic A/D converters based on FPAA devices." Bulletin of the Polish Academy of Sciences: Technical Sciences 61, no. 3 (2013): 691–96. http://dx.doi.org/10.2478/bpasts-2013-0073.

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Abstract A rapid prototyping method for designing mixed signal systems has been presented in the paper. The method is based on implementation of the field programmable analog array (FPAA) to configure and reconfigure mixed signal systems. A serial algorithmic analog digital converter has been used as an example. Three converter architectures have been selected and implemented FPAA device. To verify and illustrate converters operation and prototyping capabilities, implemented converters have been excited by a sinusoidal signal. Analog sinusoidal excitations, digital responses and sinusoidal wav

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Malcher, Andrzej, and Piotr Falkowski. "Analog Reconfigurable Circuits." International Journal of Electronics and Telecommunications 60, no. 1 (2014): 8–19. http://dx.doi.org/10.2478/eletel-2014-0002.

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Abstract The aim of this paper is to present an overview of a new branch of analog electronics represented by analog reconfigurable circuits. The reconfiguration of analog circuits has been known and used since the beginnings of electronics, but the universal reconfigurable circuits called Field Programmable Analog Arrays (FPAA) have been developed over the last two decades. This paper presents the classification of analog circuit reconfiguration, examples of FPAA solutions obtained as academic projects and commercially available ones, as well as some application examples of the dynamic reconf

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Deese, Anthony S., and Chika O. Nwankpa. "Utilization of FPAA Technology for Emulation of Multiscale Power System Dynamics in Smart Grids." IEEE Transactions on Smart Grid 2, no. 2 (2011): 606–14. http://dx.doi.org/10.1109/tsg.2011.2161782.

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In this paper, the authors address computational issues associated with implementation of VLSI technologies-specifically, the utilization of field programmable analog array (FPAA) technology to analyze the steady-state as well dynamic behavior of nonlinear, multiscale power systems. Emphasis is placed on the following issues: adaptation of FPAA hardware for power flow analyses, design and construction of physical prototype, optimal hardware scaling, and application of emulation to transient fault analyses.

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KILIC, RECAI, and FATMA YILDIRIM DALKIRAN. "RECONFIGURABLE IMPLEMENTATIONS OF CHUA'S CIRCUIT." International Journal of Bifurcation and Chaos 19, no. 04 (2009): 1339–50. http://dx.doi.org/10.1142/s0218127409023664.

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Chua's circuit is very suitable as a programmable chaos generator because of its robust nonlinearity. In addition to exhibiting a rich variety of bifurcation and chaos phenomenon, this circuit can be modeled and realized with a fixed main system block and many different nonlinear function blocks such as piecewise-linear function, cubic-like function, piecewise-quadratic function and other trigonometric functions. This paper presents a FPAA (Field Programmable Analog Array) based programmable implementation of Chua's circuit. Nonlinear function blocks used in Chua's circuit are modeled with an

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Gao, Jin Shan, and Shi Jie Wang. "Phase Sensitive Detection Based on FPAA." Advanced Materials Research 433-440 (January 2012): 5714–21. http://dx.doi.org/10.4028/www.scientific.net/amr.433-440.5714.

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Application of FPAA (field programmable analog array) for the construction of phase-sensitive detector is described. The working principle of the phase sensitive detector is introduced. With software called Anadigmdesigner2, a signal selection circuit, a inverting circuit, a rectifier and a low pass filter circuit are achieved. The simulation of the phase-sensitive detector circuit designed is made. Phase rang from 75º to 115 º, phase errors detected are below ±0.392%.

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Tahir, Fadhil, and Saif Ramadhan. "Analog Programmable Circuit Implementation for Memristor." Iraqi Journal for Electrical and Electronic Engineering 14, no. 1 (2018): 1–9. http://dx.doi.org/10.37917/ijeee.14.1.1.

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In this work, a new flux controlled memristor circuit is presented. It provides a tool to emulate the pinched hysteresis loop.When driven the memristor by a bipolar periodic signal, the memristor exhibits a “pinched hysteresis loop” in the voltage-current plane and starting from some critical frequency, the hysteresis lobe area decreases monotonically as the excitation frequency increases, the pinched hysteresis loop shrinks to a single-valued function when the frequency tends to infinity. The design model numerically simulated and the physical implementation is achieved by using a field progr

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Hasler, Jennifer, Aishwarya Natarajan, and Sihwan Kim. "Enabling Energy-Efficient Physical Computing through Analog Abstraction and IP Reuse." Journal of Low Power Electronics and Applications 8, no. 4 (2018): 47. http://dx.doi.org/10.3390/jlpea8040047.

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This paper shows the first step in analog (and mixed signal) abstraction utilized in large-scale Field Programmable Analog Arrays (FPAA), encoded in the open-source SciLab/Xcos based toolset. Having any opportunity of a wide-scale utilization of ultra-low power technology both requires programmability/reconfigurability as well as abstractable tools. Abstraction is essential both make systems rapidly, as well as reduce the barrier for a number of users to use ultra-low power physical computing techniques. Analog devices, circuits, and systems are abstractable and retain their energy efficient o

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Deng, Jun, Hua Yong Tan, Lun Cai Liu, and Lin Tao Liu. "Research of a Mixed-Signal Programmable SoC Based on FPAA." Applied Mechanics and Materials 556-562 (May 2014): 1741–44. http://dx.doi.org/10.4028/www.scientific.net/amm.556-562.1741.

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This paper presents a novel architecture for mixed-signal SoC, which integrates a Field Programmable Analog Array (FPAA) into a SoC based on 32-bit RISC CPU. The FPAA unit can be configured as Filter, Comparator, Gain Amplifier, and so on. The proposed mixed-signal SoC can transform the intermediate frequency (IF) analog signal to baseband digital signal and realize the real-time baseband signal processing, besides this, which can transmit the modulated IF signals which are converted from baseband signals by digital up-conversion (DUC). The proposed mixed-signal SoC is a transceiver on chip ac

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Becerra-Vargas, José Armando, Manuel Alejandro Maldonado-Rojas, and Mayra Johanna Toscano-Bustamante. "Diseño implementación de un controlador proporcional integral derivativo pid, en un arreglo analógico proglamable en campo fpaa." Respuestas 12, no. 2 (2016): 18–25. http://dx.doi.org/10.22463/0122820x.560.

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En el presente artículo se describe el desarrollo del prototipo de un controlador PID, implementado en un arreglo analógico FPAA (Field Programmable Analog Array), diseñado y construido en el laboratorio de microelectrónica de la universidad Francisco de Paula Santander y el grupo de investigación en automatización y control (GIAC) y validado sobre un el control de velocidad para motor DC del módulo MRCC900 de ALECOP del laboratorio de Electrónica de Potencia del Servicio Nacional de Aprendizaje SENA, regional Norte de Santander.Palabras Clave: Microelectrónica; PID; FPAA; Microcontroladores;

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Zayer, Salam, Marwah Muneer Al-bayati, György Györök, and Ahmed Bouzid. "Pragmatic Implementation of the Front-End of an N-bit/V ADC based on FPGA and FPAA." Carpathian Journal of Electronic and Computer Engineering 13, no. 2 (2020): 12–15. http://dx.doi.org/10.2478/cjece-2020-0008.

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Abstract Reconfigurability has made it possible, among other benefits, to replace traditional discrete components with chips, whose internal components can be programmed in this case FPAAs (Field Programmable Analog Arrays). This paper presents a design and implementation of FPAA of the analog front end dedicated to a new ADC architecture called “N-bit/V”. After validation of the algorithm in simulation, the experimentation results show that the obtained reconfigurable circuit can replace the traditional discrete components-based circuits.

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Pawase, Ramesh, and N. P. Futane. "MEMS Seismic Sensor with FPAA Based Interface Circuit for Frequency-Drift Compensation using ANN." International Journal of Reconfigurable and Embedded Systems (IJRES) 6, no. 2 (2018): 120. http://dx.doi.org/10.11591/ijres.v6.i2.pp120-126.

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<p>Electrochemical MEMS seismic sensor is limited by its non-ideality of frequency dependent characteristics hence interface circuits for compensation is necessary. The conventional compensation circuits are limited by high power consumption, bulky external hardware circuitry. In these methods digital circuits are also limited by inherent analog to digital conversion and vice versa which consumes significant power, acquires more size and limits speed. A Field programmable analog array (FPAA) overcomes these limitations and gives fast, simple and user friendly development platform with le

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18

Becker, J., and Y. Manoli. "Eine FPAA-Architektur zur rekonfigurierbaren Instantiierung von zeitkontinuierlichen Analogfiltern." Advances in Radio Science 3 (May 13, 2005): 371–75. http://dx.doi.org/10.5194/ars-3-371-2005.

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Abstract. Im Folgenden wird eine neue Methodik von FPAAs (Field Programmable Analog Arrays) gezeigt, die speziell für die Instantiierung von zeitkontinuierlichen (continuous-time, CT) Analogfiltern in Hardware entwickelt wurde. Die Chiptopologie beinhaltet 17 digital konfigurierbare analoge Blöcke (configurable analog blocks, CABs), die durch ein hexagonales Netzwerk miteinander verbunden sind. Jeder CAB ist aus einstellbaren Gm-C Integratoren aufgebaut, welche das analoge Signal sowohl formen und seinen Weg durch die Matrix festlegen, gleichzeitig aber auch die Grundbausteine für zeitkontinui

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Baskaya, F., D. V. Anderson, and Sung Kyu Lim. "Net-Sensitivity-Based Optimization of Large-Scale Field-Programmable Analog Array (FPAA) Placement and Routing." IEEE Transactions on Circuits and Systems II: Express Briefs 56, no. 7 (2009): 565–69. http://dx.doi.org/10.1109/tcsii.2009.2023351.

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Becker, J., F. Henrici, and Y. Manoli. "Rekonfigurationstechniken und Anwendungsgebiete für ein programmierbares G<sub>m</sub>-C Analog-Filter." Advances in Radio Science 4 (September 6, 2006): 263–67. http://dx.doi.org/10.5194/ars-4-263-2006.

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Abstract. FPAAs (Field Programmable Analog Arrays) erlauben es, analoge Signalübertragungsfunktionen auf Hardware abzubilden, die von veränderbaren digitalen Konfigurationsdaten abhängen. Sowohl für das Design von Filterstrukturen auf Systemebene als auch für die genaue Simulation ihrer analogen Übertragungsfunktion auf Transistorebene ist es dabei notwendig, die entsprechenden Konfigurationsdaten einzugeben bevor die Phasen/Betragsanalyse durchgeführt werden kann. Die vorliegende Arbeit stellt ein graphisches Entwurfsprogramm zur Instantiierung von analogen Filtern für ein FPAA mit 17 gm-C Bl

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Suszyński, Robert, and Krzysztof Wawryn. "Rapid Prototyping of Third-Order Sigma-Delta A/D Converters." International Journal of Electronics and Telecommunications 59, no. 1 (2013): 99–104. http://dx.doi.org/10.2478/eletel-2013-0012.

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Abstract Prototyping of third-order sigma-delta analog to digital converters (ΣΔ ADCs) has been presented in the paper. The method is based on implementation of field programmable analog arrays (FPAA) to configure and reconfigure proposed circuits. Three third-order ΣΔ ADC structures have been considered. The circuit characteristics have been measured and then the structure of the converters have been reconfigured to satisfy input specifications.

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Bhattacharyya, Swagat, Steven Andryzcik, and David W. Graham. "An Acoustic Vehicle Detector and Classifier Using a Reconfigurable Analog/Mixed-Signal Platform." Journal of Low Power Electronics and Applications 10, no. 1 (2020): 6. http://dx.doi.org/10.3390/jlpea10010006.

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The wireless sensor nodes used in a growing number of remote sensing applications are deployed in inaccessible locations or are subjected to severe energy constraints. Audio-based sensing offers flexibility in node placement and is popular in low-power schemes. Thus, in this paper, a node architecture with low power consumption and in-the-field reconfigurability is evaluated in the context of an acoustic vehicle detection and classification (hereafter “AVDC”) scenario. The proposed architecture utilizes an always-on field-programmable analog array (FPAA) as a low-power event detector to select

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Salman, Alaa, Fadhil Tahir, and Mofeed Rashid. "Design and Implementation Model for Linearization Sensor Characteristic by FPAA." Iraqi Journal for Electrical and Electronic Engineering 11, no. 2 (2015): 165–73. http://dx.doi.org/10.37917/ijeee.11.2.3.

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Linearization sensors characteristics becomes very interest field for researchers due to the importance in enhance the system performance, measurement accuracy, system design simplicity (hardware and software), reduce system cost, ..etc. in this paper, two approaches has been introduced in order to linearize the sensor characteristics; first is signal condition circuit based on lock up table (LUT) which this method performed for linearize NTC sensor characteristic. Second is ratiometric measurement equation which this method performed for linearize LVDT sensor characteristic. The proposed meth

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Gao, Jin Shan, and Shi Jie Wang. "Speaker Localization Based on Phase Detection of Vowel Fundamental Frequencies." Advanced Materials Research 433-440 (January 2012): 6490–96. http://dx.doi.org/10.4028/www.scientific.net/amr.433-440.6490.

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Research on human-robot interaction has recently been getting an increasing amount of attention. In the research field of human-robot interaction, speech signal processing in particular is the source of much interest. In this paper, we present experiment of speaker localization using a microphone array and an ITD (Interaural Time Difference) method which finds the sound source by phase shift of two signals. Band pass filters are designed to get vowel fundamental frequencies. Phase sensitive detectors are applied to measure the phase differences of voice signal of different microphones. All cir

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ARIK, SEDA, and RECAİ KILIÇ. "RECONFIGURABLE HARDWARE PLATFORM FOR EXPERIMENTAL TESTING AND VERIFYING OF MEMRISTOR-BASED CHAOTIC SYSTEMS." Journal of Circuits, Systems and Computers 23, no. 10 (2014): 1450145. http://dx.doi.org/10.1142/s021812661450145x.

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Although the memristor is produced physically, it is not commercially available yet. For this reason the testing and verifying of memristor-based systems are performed only by using simulation tools and emulator circuits composed of generally discrete components. In this study, field programmable analog array (FPAA) as a reconfigurable hardware platform is introduced for the experimental testing and verifying of memristor-based chaotic systems. By using this platform, it is possible to implement several memristor-based chaotic systems characterized with different nonlinear functions on a uniqu

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Yang, Ting, Junfeng Hu, Wei Geng, Yili Fu, and Mahdi Tavakoli. "FPAA-Based Control of Bilateral Teleoperation Systems for Enhanced User Task Performance." Presence: Teleoperators and Virtual Environments 26, no. 2 (2017): 210–27. http://dx.doi.org/10.1162/pres_a_00293.

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In a bilateral teleoperation system, discrete-time implementation of the controller can cause performance degradation. This is due to a well-known stability-imposed upper bound on the product of the discrete-time controller's gain and the sampling period. In this article, for a bilateral teleoperation system, a continuous-time controller based on a Field Programmable Analog Array (FPAA) is deployed and compared in terms of performance with its discrete-time counterpart. Experimental results show that, unlike the discrete-time controller, the FPAA-based controller helps the human user complete

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MAHMOUD, SOLIMAN A. "DIGITALLY CONTROLLED CMOS BALANCED OUTPUT TRANSCONDUCTOR AND APPLICATION TO VARIABLE GAIN AMPLIFIER AND GM-C FILTER ON FIELD PROGRAMMABLE ANALOG ARRAY." Journal of Circuits, Systems and Computers 14, no. 04 (2005): 667–84. http://dx.doi.org/10.1142/s021812660500257x.

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A digitally controlled balanced output transconductor (DCBOTA) is proposed and analyzed. The proposed DCBOTA is based on the BOTA given in Ref. 1 and MOS switches. The DCBOTA transconductance is tunable in a range of 2n-1 times using n bits control word. The proposed DCBOTA is simulated using CMOS 0.35 μm technology and the results have shown the feasibility of the proposed DCBOTA. The simulation results show that the DCBOTA has a transconductance tuning range from 20 μA/V to 140 μA/V using 3 bits control word and a 3-dB bandwidth larger than 80 MHz. A general configurable analog block (CAB) b

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Lakshmanan, S. K., and A. Koenig. "Towards a generic operational amplifier with dynamic reconfiguration capability." Advances in Radio Science 4 (September 6, 2006): 259–62. http://dx.doi.org/10.5194/ars-4-259-2006.

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Abstract. Analog and analog-digital mixed signal electronics needed for sensor systems are indispensable components which tend to drifts from the normal phase of operation due to the impact of manufacturing conditions and environmental influences like etching, aging etc. Precise design methodology, trimming / calibration are essential to restore functionality of the system. Recent block level granular approaches using Field Programmable Analog Array and the more recent approaches from evolutionary electronics providing transistor level granularity using Field Programmable Transistor Arrays off

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Bojja Venkatakrishnan, Satheesh, Elias A. Alwan, and John L. Volakis. "Challenges in Clock Synchronization for On-Site Coding Digital Beamformer." International Journal of Reconfigurable Computing 2017 (2017): 1–8. http://dx.doi.org/10.1155/2017/7802735.

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Typical radio frequency (RF) digital beamformers can be highly complex. In addition to a suitable antenna array, they require numerous receiver chains, demodulators, data converter arrays, and digital signal processors. To recover and reconstruct the received signal, synchronization is required since the analog-to-digital converters (ADCs), digital-to-analog converters (DACs), field programmable gate arrays (FPGAs), and local oscillators are all clocked at different frequencies. In this article, we present a clock synchronization topology for a multichannel on-site coding receiver (OSCR) using

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Chu, Kai-Chun, Kuo-Chi Chang, Hsiao-Chuan Wang, Yuh-Chung Lin, and Tsui-Lien Hsu. "Field-Programmable Gate Array-Based Hardware Design of Optical Fiber Transducer Integrated Platform." Journal of Nanoelectronics and Optoelectronics 15, no. 5 (2020): 663–71. http://dx.doi.org/10.1166/jno.2020.2835.

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This study focuses on the hardware architecture of a Raman scattering distributed optical fiber transducer platform, the principles of Raman scattering are analyzed, and the output 2 analog electrical signals are converted to digital signals at a 16-bit sampling rate by an Analog-to-Digital Converter (ADC). The system is implemented based on the FPGA. The integrated circuit is responsible for controlling the data acquisition process. The differential amplifier circuit, FPGA peripheral circuit, and CPU subsystem circuit, which takes ARM as the core, are separately designed. The composition of s

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Merz, Roman, Cyril Botteron, Frédéric Chastellain, and Pierre-André Farine. "A Programmable Receiver for Communication Systems and Its Application to Impulse Radio." Research Letters in Communications 2009 (2009): 1–5. http://dx.doi.org/10.1155/2009/238521.

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The design of a programmable receiver for an ultra wideband (UWB) communication is presented. The receiver is using a fast analog to digital converter (ADC) and a field programmable gate array (FPGA) allowing a rapid performance evaluation for various system architectures and signal processing algorithms. To demonstrate the performance and the versatility of the receiver, a simple communication system and a localization system are implemented. The accuracy of the latter is presented for an indoor environment.

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Tran, Hoai Linh, Van Nam Pham, and Duc Thao Nguyen. "A hardware implementation of intelligent ECG classifier." COMPEL: The International Journal for Computation and Mathematics in Electrical and Electronic Engineering 34, no. 3 (2015): 905–19. http://dx.doi.org/10.1108/compel-05-2014-0119.

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Purpose – The purpose of this paper is to design an intelligent ECG classifier using programmable IC technologies to implement many functional blocks of signal acquisition and processing in one compact device. The main microprocessor also simulates the TSK neuro-fuzzy classifier in testing mode to recognize the ECG beats. The design brings various theoretical solutions into practical applications. Design/methodology/approach – The ECG signals are acquired and pre-processed using the Field-Programmable Analog Array (FPAA) IC due to the ability of precise configuration of analog parameters. The

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Hasler, Jennifer, Sahil Shah, Sihwan Kim, Ishan Lal, and Michelle Collins. "Remote System Setup Using Large-Scale Field Programmable Analog Arrays (FPAA) to Enabling Wide Accessibility of Configurable Devices." Journal of Low Power Electronics and Applications 6, no. 3 (2016): 14. http://dx.doi.org/10.3390/jlpea6030014.

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Garvie, Michael, Ittai Flascher, Andrew Philippides, Adrian Thompson, and Phil Husbands. "Evolved Transistor Array Robot Controllers." Evolutionary Computation 28, no. 4 (2020): 677–708. http://dx.doi.org/10.1162/evco_a_00272.

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For the first time, a field programmable transistor array (FPTA) was used to evolve robot control circuits directly in analog hardware. Controllers were successfully incrementally evolved for a physical robot engaged in a series of visually guided behaviours, including finding a target in a complex environment where the goal was hidden from most locations. Circuits for recognising spoken commands were also evolved and these were used in conjunction with the controllers to enable voice control of the robot, triggering behavioural switching. Poor quality visual sensors were deliberately used to

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Wang, Faqiang, and Yufang Xiao. "A Multiscroll Chaotic Attractors with Arrangement of Saddle-Shapes and Its Field Programmable Gate Array (FPGA) Implementation." Complexity 2020 (July 2, 2020): 1–8. http://dx.doi.org/10.1155/2020/9169242.

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Based on the step function and signum function, a chaotic system which can generate multiscroll chaotic attractors with arrangement of saddle-shapes is proposed and the stability of its equilibrium points is analyzed. The under mechanism for the generation of multiscroll chaotic attractors and the reason for the arrangement of saddle shapes and being symmetric about y-axis are presented, and the rule for controlling the number of scroll chaotic attractors with saddle shapes is designed. Based on the core chips including Altera Cyclone IV EP4CE10F17C8 Field Programmable Gate Array and Digital t

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Zhang, Zi Sheng, Peng Bo Ge, Xiao Dong Shi, Bo Feng Liu, and Zhi Qiang Liu. "The Control System of High Voltage Electrostatic Precipitator Based on FPGA." Advanced Materials Research 823 (October 2013): 528–31. http://dx.doi.org/10.4028/www.scientific.net/amr.823.528.

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It is urgent to study a new control system for improving the efficiency of electrostatic precipitator. The System-on-a-Programmable-Chip (SOPC) development board, which belongs to the series of Cyclone of Altera Company, is used as the development platform. Analog Digital (AD) conversion module, voltage control module and overall control module of the electrostatic precipitator are designed and the simulation waveform of the system is analyzed, based on the programmable logic device EP1C12Q240C6 and Very-High-Speed Integrated Circuit Hardware Description Language (VHDL) programming language. T

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Zhang, Zhi Li, Ying Zhang, and Peng Chen. "The Design of Multichannel Marine Seismic Acquisition Unit Based on ADS1282." Advanced Materials Research 989-994 (July 2014): 3274–77. http://dx.doi.org/10.4028/www.scientific.net/amr.989-994.3274.

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For marine seismic data acquisition needs,a multichannel marine seismic data acquisition unit was designed,which used the 32-bit analog-to-digital ADS1282 as a core and Field programmable gate array (FPGA) as the acquisition controller.The unit can achieve multichannel seismic data sampling and transmission functions.The design fully used with the design ADS1282 chip integration,with the corresponding anti-jamming measures,not only simplified the circuit design,but also ensured the quality of signal acquisition and system stability.the design used FPGA to realize a multichannel hydrophone sign

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Yuan, Zeshi, Hongtao Li, Yunchi Miao, Wen Hu, and Xiaohua Zhu. "Digital-Analog Hybrid Scheme and Its Application to Chaotic Random Number Generators." International Journal of Bifurcation and Chaos 27, no. 14 (2017): 1750210. http://dx.doi.org/10.1142/s0218127417502108.

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Practical random number generation (RNG) circuits are typically achieved with analog devices or digital approaches. Digital-based techniques, which use field programmable gate array (FPGA) and graphics processing units (GPU) etc. usually have better performances than analog methods as they are programmable, efficient and robust. However, digital realizations suffer from the effect of finite precision. Accordingly, the generated random numbers (RNs) are actually periodic instead of being real random. To tackle this limitation, in this paper we propose a novel digital-analog hybrid scheme that e

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Mohammed, Raya Kahtan, and Hamsa Abdulkareem Abdullah. "Implementation of digital and analog modulation systems using FPGA." Indonesian Journal of Electrical Engineering and Computer Science 18, no. 1 (2020): 485. http://dx.doi.org/10.11591/ijeecs.v18.i1.pp485-493.

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<p><span>FPGA (Field Programmable Gate Array) based implementations of digital and analog modulation techniques play a vital rule in the design of signal processing system. The performance and flexibility provided by reconfigurable computing speeds up the development process in signal processing implementations using FPGA. Different methods for digital and analog modulation are designed in this paper by usinSg System Generator tools &amp; Vivado. Then all designed systems are implemented successfully in an FPGA hardware via the NEXYS 4 DDR with ARTIX 7 XC7A100T. A comparison be

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Saleh, Shukur Bin, Sulaiman Bin Mazlan, Nik Iskandar Bin Hamzah, et al. "Smart Home Security Access System Using Field Programmable Gate Arrays." Indonesian Journal of Electrical Engineering and Computer Science 11, no. 1 (2018): 152. http://dx.doi.org/10.11591/ijeecs.v11.i1.pp152-160.

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Nowadays, the rapid growth of burglary and theft cases over the world has been threatening to the vulnerability of traditional home security systems. Therefore the development home security with intelligent control wherein focus to enhance conventional technique to theadvanced digital security systemand to be more interestinginhome or building owner for preventing intruders in smart home implementation. However, using avariety of type conventional lock doors for security purposes and analog intruder sensor with individual function system is not secure enoughin order to protect the person or co

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Tudose, Mihai-Liviu, Andrei Anghel, Remus Cacoveanu, and Mihai Datcu. "Pulse Radar with Field-Programmable Gate Array Range Compression for Real Time Displacement and Vibration Monitoring." Sensors 19, no. 1 (2018): 82. http://dx.doi.org/10.3390/s19010082.

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This paper aims to present the basic functionality of a radar platform for real time monitoring of displacement and vibration. The real time capabilities make the radar platform useful when live monitoring of targets is required. The system is based on the RF analog front-end of a USRP, and the range compression (time-domain cross-correlation) is implemented on the FPGA included in the USRP. Further processing is performed on the host computer to plot real time range profiles, displacements, vibration frequencies spectra and spectrograms (waterfall plots) for long term monitoring. The system i

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Phanatamporn, Kitithorn, та Ratchatin Chancharoen. "A μP-μC-FPGA Synergy Controller for a Linear Delta Robot". Applied Mechanics and Materials 619 (серпень 2014): 230–35. http://dx.doi.org/10.4028/www.scientific.net/amm.619.230.

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The paper proposes a novel of fully integrated microprocessor (μP), microcontroller (μC) and field programmable gate array (FPGA) robot controller that combines their processing power to fully control all functions of a linear Delta robot. The μP computes the heavy floating point Mathematics including the control law and all robot kinematics at 1 kHz rate while FPGA processes all digital signals from/to the digital sensors and actuators in parallel. At the same time, the μC interfaces with analog I/O and personal computer and passes the signals to the μP via FPGA. The proposed controller is ef

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Bai, Yang, Xin Zhang, Qiang Yang, Yong Yang, Weibo Deng, and Di Yao. "Multi-Channel Data Acquisition Card under New Acquisition and Transmission Architecture of High Frequency Ground Wave Radar." Sensors 21, no. 4 (2021): 1128. http://dx.doi.org/10.3390/s21041128.

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It is known that the data acquisition and processing system plays an important role in radar target detection system. In order to meet the requirements of real-time processing and accurate transmission of echo signals in high-frequency ground-wave radar (HFGWR) systems, a new acquisition and transmission framework utilizing the designed acquisition card based on the PCIe (peripheral component interconnect express) has been designed and is presented in this paper. The Xilinx FPGA (Field-Programmable Gate Array) chip Kintex7-XC7K325T is adopted as a hardware carrier in acquisition card. The hard

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Wang, Yu Liang, Shuang Wei Han, Hong Sheng Li, and Hao Liu. "Research and Test of the Digital Phase Locked Loop Drive Technology for Silicon Micro-Machined Gyroscope." Advanced Materials Research 403-408 (November 2011): 4252–59. http://dx.doi.org/10.4028/www.scientific.net/amr.403-408.4252.

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A program of digital phase locked loop (DPLL) drive is proposed to supply the gaps including debugging complex, easiness of interference and poor flexibility in the traditional analog drive loop of the silicon micro-machined gyroscope (SMG). The program, i.e. field programmable gate array (FPGA) is utilized to process the drive sensitive signal of the SMG after the analog to digital (A/D) processing of high-precision, has been utilized to achieve phase and amplitude closed-loop of the SMG’s drive mode. The simulation and test results show that the program has a great advantage to reduce the re

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Li, Ya Qin, Dan Chen, and Cao Yuan. "An Improved Hardware System of Excitations Pulse on X-Waves with Direct Digital Synthesizer." Applied Mechanics and Materials 329 (June 2013): 382–86. http://dx.doi.org/10.4028/www.scientific.net/amm.329.382.

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Limited diffracting waves such X-wave have great potential applications in the enlargement of the field depth in acoustic imaging systems. In practice, the generation of real time X-wave ultrasonic fields is a complex technology which involves precise and specific voltage for the excitations for each distinct array element. In order to simplify hardware system of excitations pulse in X-wave, the complex excitations were instead by simple driving, which combination of rectangular and triangular driving pulses. The improved hardware system consists a computer for communication with the circuit,

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Okuno, Hirotsugu, and Tetsuya Yagi. "Bio-Inspired Real-Time Robot Vision for Collision Avoidance." Journal of Robotics and Mechatronics 20, no. 1 (2008): 68–74. http://dx.doi.org/10.20965/jrm.2008.p0068.

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A mixed analog-digital integrated vision sensor was designed to detect an approaching object in real-time. To respond selectively to approaching stimuli, the sensor employed an algorithm inspired by the visual nervous system of a locust, which can avoid collisions robustly by using visual information. An electronic circuit model was designed to mimic the architecture of the locust nervous system. Computer simulations showed that the model provided appropriate responses for collision avoidance. We implemented the model with a compact hardware system consisting of a silicon retina and field-prog

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Hoffmann, C., and P. Russer. "A low-noise high dynamic-range time-domain EMI measurement system for CISPR Band E." Advances in Radio Science 9 (August 1, 2011): 309–15. http://dx.doi.org/10.5194/ars-9-309-2011.

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Abstract. In this paper, a broadband time-domain EMI measurement system for measurements from 9 kHz to 18 GHz is presented that allows for compliant EMI measurements in CISPR Band E. Combining ultra-fast analog-to-digital-conversion and real-time digital signal processing on a field-programmable-gate-array (FPGA) with ultra-broadband multi-stage down-conversion, scan times can be reduced by several orders of magnitude in comparison to a traditional heterodyne EMI-receiver. The ultra-low system noise floor of 6–8 dB and the real-time spectrogram allow for the characterisation of the time-behavi

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Ameur, Noura Ben, Nouri Masmoudi та Mourad Loulou. "FPGA-Based Design Δ–Σ Audio D/A Converter with a Resolution Clock Generator Enhancement Circuit". Journal of Circuits, Systems and Computers 24, № 03 (2015): 1550037. http://dx.doi.org/10.1142/s0218126615500371.

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This paper, focus on synthesis design of a Δ–Σ digital-to-analog converter (DAC) algorithm intended for professional digital audio. A rapid register-transfer-level (RTL) using a top-down design method with VHSIC hardware description language (VHDL) is practiced. All the RTL design simulation, VHDL implementation and field programmable gate array (FPGA) verification are rapidly and systematically performed through the methodology. A distributed pipelining, streaming and resource sharing design are considered for area and speed optimization while maintaining the original precision of the audio D

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Liu, Shi Wei, and Shi Bin Liu. "Design and Realization of a Digital Multichannel Fluxgate Signal Processing System." Applied Mechanics and Materials 182-183 (June 2012): 491–95. http://dx.doi.org/10.4028/www.scientific.net/amm.182-183.491.

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Addressing drawbacks of analog components and questions of multi-channel fluxgate signal operation, a FPGA (Field Programmable Gate Array) based signal processing system is designed. Three copies of sub modules compose the whole system, each of which exclusively processes one of three outputs of the fluxgate sensor. A “Phase-Sensitive-Rectification & Low-Pass-Filtering” circuit structure is employed in the processing module, through which the fluxgate signal harmonics are extracted and converted into direct quantities according to detected magnetic intensities. Firstly designed in HDL (Har

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QASIM, SYED MANZOOR, and SHUJA AHMAD ABBASI. "A NOVEL FPGA-BASED APPROACH FOR DIGITAL WAVEFORM GENERATION USING ORTHOGONAL FUNCTIONS." Journal of Circuits, Systems and Computers 16, no. 06 (2007): 895–909. http://dx.doi.org/10.1142/s021812660700409x.

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This paper presents a novel approach for the generation of periodic waveforms in digital form using Field Programmable Gate Array (FPGA) and orthogonal functions. The orthogonal function consists of a set of Rademacher–Walsh Functions, and utilizing these functions, virtually any periodic waveform can be synthesized. Recent technological advancements in FPGA and availability of sophisticated digital design tools have made it possible to realize high-speed waveform generator in a cost-effective way. We demonstrate the proposed technique for the successful generation of Trapezoidal, Sinusoidal,

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