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Dissertations / Theses on the topic 'Field-programmable gate array Medical image'

Author: Grafiati

Published: 5 June 2025

Last updated: 16 July 2025

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1

Afandi, Ahmad. "Efficient reconfigurable architectures for 3D medical image compression." Thesis, Brunel University, 2010. http://bura.brunel.ac.uk/handle/2438/7677.

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Recently, the more widespread use of three-dimensional (3-D) imaging modalities, such as magnetic resonance imaging (MRI), computed tomography (CT), positron emission tomography (PET), and ultrasound (US) have generated a massive amount of volumetric data. These have provided an impetus to the development of other applications, in particular telemedicine and teleradiology. In these fields, medical image compression is important since both efficient storage and transmission of data through high-bandwidth digital communication lines are of crucial importance. Despite their advantages, most 3-D m

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2

Donachy, Paul. "Design and implementation of a high level image processing machine using reconfigurable hardware." Thesis, Queen's University Belfast, 1996. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.337688.

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3

Rajagopalan, Kamal. "An FPGA architecture for improved arithmetic performance /." St. Lucia, Qld, 2001. http://www.library.uq.edu.au/pdfserve.php?image=thesisabs/absthe16460.pdf.

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4

De, la Cruz Juan Alberto. "Field-Programmable Gate Array Implementation of a Scalable Integral Image Architecture Based on Systolic Arrays." DigitalCommons@USU, 2011. https://digitalcommons.usu.edu/etd/854.

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The integral image representation of an image is important for a large number of modern image processing algorithms. Integral image representations can reduce computation and increase the operating speed of certain algorithms, improving real-time performance. Due to increasing demand for real-time image processing performance, an integral image architecture capable of accelerating the calculation based on the amount of available resources is presented. Use of the proposed accelerator allows for subsequent stages of a design to have data sooner and execute in parallel. It is shown here how, wit

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Raghavan, Anup Kumar. "JPG : a partial bitstream generation tool to support partial reconfiguration in Virtex FPGAs /." [St. Lucia, Qld.], 2004. http://www.library.uq.edu.au/pdfserve.php?image=thesisabs/absthe17691.pdf.

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6

Fetter, Bryan J. "Design recovery and implementation of the AYK-14 VHSIC processor module adapter with field programmable gate array technology." Thesis, Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service, 2002. http://library.nps.navy.mil/uhtbin/hyperion-image/02Dec%5FFetter.pdf.

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Thesis (M.S. in Aeronautical Engineering)--Naval Postgraduate School, December 2002.<br>Thesis advisor(s): Russell W. Duren, Hersch Loomis. Includes bibliographical references (p. 199). Also available online.

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7

Kotteri, Kishore. "Optimal, Multiplierless Implementations of the Discrete Wavelet Transform for Image Compression Applications." Thesis, Virginia Tech, 2004. http://hdl.handle.net/10919/32491.

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<p>The use of the discrete wavelet transform (DWT) for the JPEG2000 image compression standard has sparked interest in the design of fast, efficient hardware implementations of the perfect reconstruction filter bank used for computing the DWT. The accuracy and efficiency with which the filter coefficients are quantized in a multiplierless implementation impacts the image compression and hardware performance of the filter bank. A high precision representation ensures good compression performance, but at the cost of increased hardware resources and processing time. Conversely, lower precision in

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8

Xu, Haifeng. "Digital Image Processing Algorithms Research Based on FPGA." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-91039.

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As we can find through the development of TV systems in America, the digital TV related digital broadcasting is just the road we would walk into. Nowadays digital television is prevailing in China, and the government is promoting the popularity of digital television. However, because of the economic development, analog television will still take its place in the TV market during a long period. But the broadcasting system has not been reformed, as a result, we should not only take use of the traditional analog system we already have, but also improve the quality of the pictures of analog system

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9

Kirioukhine, Guennadi. "Implementation of two-dimensional discrete cosine transform in xilinx field programmable gate array using flow-graph and distributed arithmetic techniques." Ohio : Ohio University, 2002. http://www.ohiolink.edu/etd/view.cgi?ohiou1174679848.

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10

Shaffer, Daniel Alan. "An FPGA Implementation of Large-Scale Image Orthorectification." University of Dayton / OhioLINK, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1523624621509277.

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11

Cappabianco, Fabio Augusto Menocci. "Uma plataforma de hardware para processamento de imagem baseada na transformada imagem-floresta." [s.n.], 2006. http://repositorio.unicamp.br/jspui/handle/REPOSIP/275908.

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Orientadores: Guido Costa Souza de Araujo, Alexandre Xavier Falcão<br>Dissertação (mestrado) - Universidade Estadual de Campinas, Instituto de Computação<br>Made available in DSpace on 2018-08-07T09:45:52Z (GMT). No. of bitstreams: 1 Cappabianco_FabioAugustoMenocci_M.pdf: 2472578 bytes, checksum: 8df546b29eccff4337413df4b5d9a7c3 (MD5) Previous issue date: 2006<br>Resumo: Implementações de operadores de processamento de imagens em plataformas de hardware têm obtido ótimos resultados devido a sua atuação paralela em diversas regiões da imagem. Ao mesmo tempo, a IFT (Image Foresting Transform)

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12

Heithecker, Sven. "Communication and memory scheduling in reconfigurable image processing systems." Berlin Dissertation.de, 2008. http://d-nb.info/994809271/04.

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13

Johnson, Darrel E. "Estimating the Dynamic Sensitive Cross Section of an FPGA Design through Fault injection." Diss., CLICK HERE for online access, 2005. http://contentdm.lib.byu.edu/ETD/image/etd803.pdf.

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14

Almeida, Carlos Caetano de 1976. "Arquitetura do módulo de convolução para visão computacional baseada em FPGA." [s.n.], 2015. http://repositorio.unicamp.br/jspui/handle/REPOSIP/265780.

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Orientador: Eurípedes Guilherme de Oliveira Nóbrega<br>Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Mecânica<br>Made available in DSpace on 2018-08-27T23:49:29Z (GMT). No. of bitstreams: 1 Almeida_CarlosCaetanode_M.pdf: 5316196 bytes, checksum: 8c3ec7a0c5709f2507df4dbc54c137b0 (MD5) Previous issue date: 2015<br>Resumo: Esta dissertação apresenta o estudo de uma arquitetura para o processamento digital de imagens, desenvolvido através de dispositivos de hardware programável, no caso FPGA, para a implementação eficiente no domínio do tempo do algoritmo da

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15

Tallawi, Reham. "FPGA-based Speed Limit Sign Detection." Master's thesis, Universitätsbibliothek Chemnitz, 2017. http://nbn-resolving.de/urn:nbn:de:bsz:ch1-qucosa-229018.

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This thesis presents a new hardware accelerated approach using image processing and detection algorithms for implementing fast and robust traffic sign detection system with focus on speed limit sign detection. The proposed system targets reconfigurable integrated circuits particularly Field Programmable Gate Array (FPGA) devices. This work propose a fully parallelized and pipelined parallel system architecture to exploit the high performance and flexibility capabilities of FPGA devices. This thesis is divided into two phases, the first phase, is a software prototype implementation of the propo

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ROLFO, DANIELE. "High-performance hardware accelerators for image processing in space applications." Doctoral thesis, Politecnico di Torino, 2015. http://hdl.handle.net/11583/2616951.

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Mars is a hard place to reach. While there have been many notable success stories in getting probes to the Red Planet, the historical record is full of bad news. The success rate for actually landing on the Martian surface is even worse, roughly 30%. This low success rate must be mainly credited to the Mars environment characteristics. In the Mars atmosphere strong winds frequently breath. This phenomena usually modifies the lander descending trajectory diverging it from the target one. Moreover, the Mars surface is not the best place where performing a safe land. It is pitched by many and clo

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17

Garcia, Lorca Federico. "Filtres récursifs temps réel pour la détection de contours : optimisations algorithmiques et architecturales." Paris 11, 1996. http://www.theses.fr/1996PA112439.

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Dans cette thèse on s'intéresse à deux aspects différents : conceptuel et réalisationel, sur lesquels portent les quatre innovations présentées. Si celles-ci sont illustrées par une application au détecteur de contours de Deriche, elles sont facilement généralisables à d'autres détecteurs qu'ils soient basés sur le calcul de maxima locaux de la dérivée première, ou le calcul des passages par zéro du laplacien. Les filtres à réponse impulsionnelle infinie symétriques ou anti-symétriques peuvent être réalisés sous forme cascade. Le filtre de lissage peut être défini par intégration numérique du

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18

Le, Pelleter Tugdual. "Méthode de discrétisation adaptée à une logique événementielle pour l'utra-faible consommation : application à la reconnaissance de signaux physiologiques." Thesis, Université Grenoble Alpes (ComUE), 2015. http://www.theses.fr/2015GREAT043/document.

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Les systèmes embarqués mobiles font partis intégrante de notre quotidien. Afin de les rendre plus adaptésaux usages, ils ont été miniaturisés et leur autonomie a été augmentée, parfois de façon très considérable.Toutefois, les propositions d’amélioration butent désormais sur les possibilités de la technologie des circuitsintégrés. Pour aller plus loin, il faut donc envisager de repenser la chaîne de traitement du signal afin deréduire la consommation de ces dispositifs. Cette thèse développe une approche originale pour exploiterefficacement l’échantillonnage par traversée de niveaux d’une part

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19

Liu, Chao. "3D EM/MPM MEDICAL IMAGE SEGMENTATION USING AN FPGA EMBEDDED DESIGN IMPLEMENTATION." 2011. http://hdl.handle.net/1805/2633.

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Indiana University-Purdue University Indianapolis (IUPUI)<br>This thesis presents a Field Programmable Gate Array (FPGA) based embedded system which is used to achieve high speed segmentation of 3D images. Segmenta- tion is performed using Expectation-Maximization with Maximization of Posterior Marginals (EM/MPM) Bayesian algorithm. In this system, the embedded processor controls a custom circuit which performs the MPM and portions of the EM algorithm. The embedded processor completes the EM algorithm and also controls image data transmission between host computer and on-board memory. Th

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20

Lee, Wan-Yi, and 李婉伊. "The Design of Evolvable Image Filters on Field-Programmable Gate Array." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/53629934463051962768.

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碩士<br>國立高雄大學<br>電機工程學系碩士班<br>102<br>Evolvable hardware (EHW) is a combination of reconfigurable hardware and evolutionary algorithms. EHW employs evolutionary computation to attempt to find out optimal or flexible hardware designs that can be implemented on reconfigurable hardware platforms. With the efficiency of hardware execution and the ability of adaptibility, EHW has advantages in solving complex problems. In most studies, the performance of EHW algorithms, that is assumed to be implemented in a single hardware configuration, is simulated. In this thesis, the hardware degisn of EHW-based

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21

Carrasqueira, Tiago Miguel Saraiva. "FPGA in image processing supported by IOPT-Flow." Master's thesis, 2019. http://hdl.handle.net/10362/93698.

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Image processing is widely used in the most diverse industries. One of the tools widely used to perform image processing is the OpenCV library. Although the implementation of image processing algorithms can be made in software, it is also possible to implement image processing algorithms in hardware. In some cases, the execution time can be smaller than the execution time achieved in software. This work main goal is to evaluate the use of VHDL, DS-Pnets, and IOPT-Flow to develop image processing systems in hardware, in FPGA-based platforms. To enable it, a validation platform was developed. A

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22

Antony, Daniel Sanju. "Performance Analysis of Non Local Means Algorithm using Hardware Accelerators." Thesis, 2016. http://etd.iisc.ac.in/handle/2005/2932.

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Image De-noising forms an integral part of image processing. It is used as a standalone algorithm for improving the quality of the image obtained through camera as well as a starting stage for image processing applications like face recognition, super resolution etc. Non Local Means (NL-Means) and Bilateral Filter are two computationally complex de-noising algorithms which could provide good de-noising results. Due to its computational complexity, the real time applications associated with these letters are limited. In this thesis, we propose the use of hardware accelerators such as GPU (Grap

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23

Antony, Daniel Sanju. "Performance Analysis of Non Local Means Algorithm using Hardware Accelerators." Thesis, 2016. http://etd.iisc.ernet.in/handle/2005/2932.

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Image De-noising forms an integral part of image processing. It is used as a standalone algorithm for improving the quality of the image obtained through camera as well as a starting stage for image processing applications like face recognition, super resolution etc. Non Local Means (NL-Means) and Bilateral Filter are two computationally complex de-noising algorithms which could provide good de-noising results. Due to its computational complexity, the real time applications associated with these letters are limited. In this thesis, we propose the use of hardware accelerators such as GPU (Grap

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24

(9356939), Jui-wei Tsai. "Digital Signal Processing Architecture Design for Closed-Loop Electrical Nerve Stimulation Systems." Thesis, 2020.

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<div>Electrical nerve stimulation (ENS) is an emerging therapy for many neurological disorders. Compared with conventional one-way stimulations, closed-loop ENS approaches increase the stimulation efficacy and minimize patient's discomfort by constantly adjusting the stimulation parameters according to the feedback biomarkers from patients. Wireless neurostimulation devices capable of both stimulation and telemetry of recorded physiological signals are welcome for closed-loop ENS systems to improve the quality and reduce the costs of treatments, and real-time digital signal processing (DSP) en

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