Relevant bibliographies by topics / Field programmable gate array; Partielle Rekonfiguration

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Academic literature on the topic 'Field programmable gate array; Partielle Rekonfiguration'

Author: Grafiati
Published: 4 June 2021
Last updated: 3 February 2022

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Dissertations / Theses on the topic "Field programmable gate array; Partielle Rekonfiguration"

1

Beckert, René. "Untersuchungen zur Kostenoptimierung für Hardware-Emulatoren durch Anwendung von Methoden der partiellen Laufzeitrekonfiguration." Dresden TUDpress, 2008. http://d-nb.info/991847423/04.

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Rullmann, Markus. "Models, Design Methods and Tools for Improved Partial Dynamic Reconfiguration". Doctoral thesis, Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2010. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-61526.

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Partial dynamic reconfiguration of FPGAs has attracted high attention from both academia and industry in recent years. With this technique, the functionality of the programmable devices can be adapted at runtime to changing requirements. The approach allows designers to use FPGAs more efficiently: E. g. FPGA resources can be time-shared between different functions and the functions itself can be adapted to changing workloads at runtime. Thus partial dynamic reconfiguration enables a unique combination of software-like flexibility and hardware-like performance. Still there exists no common understa
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3

Voigt, Sven-Ole. "Dynamically reconfigurable dataflow architecture for high performance digital signal processing on multi FPGA platforms." Aachen Shaker, 2008. http://d-nb.info/992481694/04.

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4

Ahmadinia, Ali. "Optimization algorithms for dynamically reconfigurable embedded systems." Berlin : Köster, 2006. http://deposit.ddb.de/cgi-bin/dokserv?id=2793299&prov=M&dok_var=1&dok_ext=htm.

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5

Güneysu, Tim Erhan. "Cryptography and cryptanalysis on reconfigurable devices security implementations for hardware and reprogrammable devices." Berlin Bochum Dülmen London Paris Europ. Univ.-Verl, 2009. http://d-nb.info/994465785/04.

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6

Lertlaokul, Kawin. "Virtual Partial Reconfiguration Framework for the Digilent Nexys 3 Board." 2019. https://monarch.qucosa.de/id/qucosa%3A35354.

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The modern embedded system is getting more complicated due to the functional requirements of the system are rapidly increasing. The modern system must have more reliable, as it deals with a lot of data. The distributed systems are used in variety technologies field due to it has more reliable than single control unit. It can transfer task to other processing unit when the one part of system failed while the single control unit failed cause the system to stop operate. The FPGA are being used increasingly in the distributed system due to the benefit of FPGA over microcontroller and ASIC. FPGA is
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7

Rullmann, Markus. "Models, Design Methods and Tools for Improved Partial Dynamic Reconfiguration". Doctoral thesis, 2009. https://tud.qucosa.de/id/qucosa%3A25391.

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Partial dynamic reconfiguration of FPGAs has attracted high attention from both academia and industry in recent years. With this technique, the functionality of the programmable devices can be adapted at runtime to changing requirements. The approach allows designers to use FPGAs more efficiently: E. g. FPGA resources can be time-shared between different functions and the functions itself can be adapted to changing workloads at runtime. Thus partial dynamic reconfiguration enables a unique combination of software-like flexibility and hardware-like performance. Still there exists no common underst
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Books on the topic "Field programmable gate array; Partielle Rekonfiguration"

1

Plessl, Christian. Hardware virtualization on a coarse-grained reconfigurable processor. Shaker, 2006.

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2

Peter Y.K. Cheung (Editor), Georg A. Constantinides (Editor), and Jose T. de Sousa (Editor), eds. Field Programmable Logic and Application: 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings (Lecture Notes in Computer Science). Springer, 2003.

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