Relevant bibliographies by topics / Field programmable mixed-signal arrays

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers

Academic literature on the topic 'Field programmable mixed-signal arrays'

Author: Grafiati
Published: 4 June 2021
Last updated: 3 February 2022

Create a spot-on reference in APA, MLA, Chicago, Harvard, and other styles

Select a source type:

Consult the lists of relevant articles, books, theses, conference reports, and other scholarly sources on the topic 'Field programmable mixed-signal arrays.'

Next to every source in the list of references, there is an 'Add to bibliography' button. Press on it, and we will generate automatically the bibliographic reference to the chosen work in the citation style you need: APA, MLA, Harvard, Chicago, Vancouver, etc.

You can also download the full text of the academic publication as pdf and read online its abstract whenever available in the metadata.

Journal articles on the topic "Field programmable mixed-signal arrays"

1

Wunderlich, Richard B., Farhan Adil, and Paul Hasler. "Floating Gate-Based Field Programmable Mixed-Signal Array." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21, no. 8 (August 2013): 1496–505. http://dx.doi.org/10.1109/tvlsi.2012.2211049.

Full text
APA, Harvard, Vancouver, ISO, and other styles
2

Lakshmanan, S. K., and A. Koenig. "Towards a generic operational amplifier with dynamic reconfiguration capability." Advances in Radio Science 4 (September 6, 2006): 259–62. http://dx.doi.org/10.5194/ars-4-259-2006.

Full text
Abstract:
Abstract. Analog and analog-digital mixed signal electronics needed for sensor systems are indispensable components which tend to drifts from the normal phase of operation due to the impact of manufacturing conditions and environmental influences like etching, aging etc. Precise design methodology, trimming / calibration are essential to restore functionality of the system. Recent block level granular approaches using Field Programmable Analog Array and the more recent approaches from evolutionary electronics providing transistor level granularity using Field Programmable Transistor Arrays offers considerable extensions. In our work, we started on a new medium granular level approach called Field Programmable medium-granular Mixed-signal Array (FPMA) providing basic building blocks of heterogeneous array of active and passive devices to configure established circuit structures which are adaptive, biologically inspired and dynamically re-configurable. Our design objective is to create components of clear compatibility to that of the industrial standards having predictable behavior along with the incorporation of existing design knowledge. The cells can be used in as a single instance or multiple instances. Further, we will focus on a generic dynamic reconfigurable amplifier cell with flexible topology and dimension called Generic Operational Amplifier (GOPA). The incentive of our work comes from recent development in the field of measurement and instrumentation. The digital programming of analog devices is carried out using range of algorithms from simple to evolutionary. Physical realization of the basic cells is carried out in 0.35 μm CMOS technology.
APA, Harvard, Vancouver, ISO, and other styles
3

Liu, Lintao, Yuhan Gao, and Jun Deng. "Design and implementation of a reconfigurable mixed-signal SoC based on field programmable analog arrays." Journal of Semiconductors 38, no. 11 (November 2017): 115001. http://dx.doi.org/10.1088/1674-4926/38/11/115001.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Mintzer, Les. "FIR filters with field-programmable gate arrays." Journal of VLSI signal processing systems for signal, image and video technology 6, no. 2 (August 1993): 119–27. http://dx.doi.org/10.1007/bf01607876.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Louie, Marianne E., and Milos D. Ercegovac. "Implementing division with field programmable gate arrays." Journal of VLSI signal processing systems for signal, image and video technology 7, no. 3 (October 1994): 271–85. http://dx.doi.org/10.1007/bf02409403.

Full text
APA, Harvard, Vancouver, ISO, and other styles
6

Portniagin, N. N., Y. V. Repina, and V. N. Portniagin. "Field-Programmable Gate Arrays: Application in the Digital Signal Processing." Journal of Computational and Theoretical Nanoscience 16, no. 7 (July 1, 2019): 2900–2906. http://dx.doi.org/10.1166/jctn.2019.8193.

Full text
APA, Harvard, Vancouver, ISO, and other styles
7

Hall, T. S., C. M. Twigg, J. D. Gray, P. Hasler, and D. V. Anderson. "Large-scale field-programmable analog arrays for analog signal processing." IEEE Transactions on Circuits and Systems I: Regular Papers 52, no. 11 (November 2005): 2298–307. http://dx.doi.org/10.1109/tcsi.2005.853401.

Full text
APA, Harvard, Vancouver, ISO, and other styles
8

Sugimoto, Yohei, Satoru Ozawa, and Noriyasu Inaba. "Spaceborne synthetic aperture radar signal processing using field-programmable gate arrays." Journal of Applied Remote Sensing 12, no. 03 (July 25, 2018): 1. http://dx.doi.org/10.1117/1.jrs.12.035007.

Full text
APA, Harvard, Vancouver, ISO, and other styles
9

Deng, Jun, Hua Yong Tan, Lun Cai Liu, and Lin Tao Liu. "Research of a Mixed-Signal Programmable SoC Based on FPAA." Applied Mechanics and Materials 556-562 (May 2014): 1741–44. http://dx.doi.org/10.4028/www.scientific.net/amm.556-562.1741.

Full text
Abstract:
This paper presents a novel architecture for mixed-signal SoC, which integrates a Field Programmable Analog Array (FPAA) into a SoC based on 32-bit RISC CPU. The FPAA unit can be configured as Filter, Comparator, Gain Amplifier, and so on. The proposed mixed-signal SoC can transform the intermediate frequency (IF) analog signal to baseband digital signal and realize the real-time baseband signal processing, besides this, which can transmit the modulated IF signals which are converted from baseband signals by digital up-conversion (DUC). The proposed mixed-signal SoC is a transceiver on chip actually, due to the internal integrated IPs, such as ADC, DAC, DDC and DUC, which can provide smaller board area, lower power consumption and the system cost for the product development of transceiver. This design will have a good potential for wireless communication applications.
APA, Harvard, Vancouver, ISO, and other styles
10

Tan, H., M. Walby, W. Hennig, W. Warburton, P. Grudberg, C. Reintsema, D. Bennett, W. Doriese, and J. Ullom. "A Digital Signal Processing Module for Time-Division Multiplexed Microcalorimeter Arrays." Applied Superconductivity, IEEE Transactions on 23, no. 3 (January 2013): 2500305. http://dx.doi.org/10.1109/tasc.2012.2236632.

Full text
Abstract:
We have developed a digital signal processing module for real time processing of time-division multiplexed data from SQUID-coupled transition-edge sensor microcalorimeter arrays. It is a 3U PXI card consisting of a standardized core processor board and a daughter board. Through fiber-optic links on its front panel, the daughter board receives time-division multiplexed data (comprising error and feedback signals) and clocks from the digital-feedback cards developed at the National Institute of Standards and Technology. After mixing the error signal with the feedback signal in a field-programmable gate array, the daughter board transmits demultiplexed data to the core processor. Real-time processing in the field-programmable gate array of the core processor board includes pulse detection, pileup inspection, pulse height computation, and histogramming into on-board spectrum memory. Data from up to 128 microcalorimeter pixels can be processed by a single module in real time. Energy spectra, waveform, and run statistics data can be read out in real time through the PCI bus by a host computer at a maximum rate of ~100 MB/s. The module's hardware architecture, mechanism for synchronizing with NIST's digital-feedback, and count rate capability are presented.
APA, Harvard, Vancouver, ISO, and other styles
More sources

Dissertations / Theses on the topic "Field programmable mixed-signal arrays"

1

Wunderlich, Richard Bryan. "Floating-gate-programmable and reconfigurable, digital and mixed-signal systems." Diss., Georgia Institute of Technology, 2014. http://hdl.handle.net/1853/51815.

Full text
Abstract:
This body of work as whole has the theme of using floating-gates and reconfigurable systems to explore and implement non-traditional computing solutions to difficult problems. Various computational methodologies are used simultaneously to solve problems by mapping pieces of them to the appropriate type of computer. There exists no systematic approach to simultaneously apply analog, digital, and neuromorphic techniques to solving general problems. Typically, this is a very difficult task, and one that few attempt to undertake. However, when done right, solutions can be found with orders-of-magnitude improvement over existing solutions restricted to using only one type computational domain. To that end, I have helped build large and complicated reconfigurable systems (and software tools for helping to use these systems) capable of implementing solutions to problems in all three of those domains simultaneously. These systems are used to explore and implement these cross domain solutions to difficult problems. The earlier work was involved with simply applying floating-gate technology to improving the building blocks of digital systems. Through that early work a new logic family built from floating-gate transistors was discovered, a Logical Effort compatible power analysis technique was developed, and low power floating-gate based FPGA was implemented. This work was then merged with existing research in the group involving solving problems using reconfigurable analog, and neuromorphic techniques. Thus converging on the mentioned systems that allow one to solve problems using techniques from all three domains: analog, neuromorphic, and digital.
APA, Harvard, Vancouver, ISO, and other styles
2

Schlottmann, Craig Richard. "Analog signal processing on a reconfigurable platform." Thesis, Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/29623.

Full text
Abstract:
Thesis (M. S.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2010.
Committee Chair: Hasler, Paul; Committee Member: Anderson, David; Committee Member: Ghovanloo, Maysam. Part of the SMARTech Electronic Thesis and Dissertation Collection.
APA, Harvard, Vancouver, ISO, and other styles
3

Nease, Stephen H. "Neural and analog computation on reconfigurable mixed-signal platforms." Diss., Georgia Institute of Technology, 2014. http://hdl.handle.net/1853/53999.

Full text
Abstract:
This work addresses neural and analog computation on reconfigurable mixed-signal platforms. Many engineered systems could gain tremendous benefits by emulating neural systems. For example, neural systems are incredibly power efficient and fault-tolerant. They are also capable of types of computation that we cannot yet match with conventional computers. Neuromorphic engineers typically implement neural computation using analog circuits because they are low-power and naturally model some aspects of neurobiology. One problem with analog circuits is that they are typically inflexible. To address this shortcoming, our lab has developed reconfigurable analog systems known as Field Programmable Analog Arrays (FPAAs). This dissertation consists of two main parts. The first is the implementation of neural and analog circuits on FPAAs. We first implemented an adaptive winner-take-all circuit, which could model attention in neural systems. Next, we modeled the dendrite, which is the conductive tissue that relays inputs from synapses to the neuron cell body. We also implemented a subtractive music synthesizer, perhaps providing the electronic music synthesis community with a good platform for experimentation. Finally, we conducted a number of neural learning experiments on a neuromorphic platform. The second part of this dissertation includes design aspects of new FPAAs, including configurable blocks that can be used as current-mode DACs in a digitally-enhanced FPAA, the RASP 2.9v. We also consider the design of a new neuromorphic platform containing 256 neurons and over 200,000 synapses, many with learning capability. We also created an active delay line that could be used for beamforming or FIR filter applications. In summary, this work adds to the field of reconfigurable systems by both showing how to implement circuits with them and creating new systems based on lessons learned while working with previous systems.
APA, Harvard, Vancouver, ISO, and other styles
4

Ortiz, Gual Fernando Enrique. "Novel reconfigurable computing architectures for embedded high performance signal processing and numerical applications." Access to citation, abstract and download form provided by ProQuest Information and Learning Company; downloadable PDF file 1.73 Mb., 102 p, 2006. http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&res_dat=xri:pqdiss&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&rft_dat=xri:pqdiss:3221141.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Moeller, Tyler J. (Tyler John) 1975. "Field programmable gate arrays for radar front-end digital signal processing." Thesis, Massachusetts Institute of Technology, 1999. http://hdl.handle.net/1721.1/80555.

Full text
Abstract:
Thesis (S.B. and M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.
Includes bibliographical references (p. 113-116).
by Tyler J. Moeller.
S.B.and M.Eng.
APA, Harvard, Vancouver, ISO, and other styles
6

Stevenson, Jeremy C. Duren Russell Walker Thompson Michael Wayne. "A comparison of field programmable gate arrays and digital signal processors in acoustic array processing." Waco, Tex. : Baylor University, 2006. http://hdl.handle.net/2104/4186.

Full text
APA, Harvard, Vancouver, ISO, and other styles
7

Alaqeeli, Abdulqadir A. "Global Positioning System signal acquisition and tracking using field programmable gate arrays." Ohio : Ohio University, 2002. http://www.ohiolink.edu/etd/view.cgi?ohiou1178735512.

Full text
APA, Harvard, Vancouver, ISO, and other styles
8

Ozalevli, Erhan. "Exploiting Floating-Gate Transistor Properties in Analog and Mixed-Signal Circuit Design." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/14048.

Full text
Abstract:
With the downscaling trend in CMOS technology, it has been possible to utilize the advantages of high element densities in VLSI circuits and systems. This trend has readily allowed digital circuits to predominate VLSI implementations due to their ease of scaling. However, high element density in integrated circuit technology has also entailed a decrease in the power consumption per functional circuit cell for the use of low-power and reconfigurable systems in portable equipment. Analog circuits have the advantage over digital circuits in designing low-power and compact VLSI circuits for signal processing systems. Also, analog circuits have been employed to utilize the wide dynamic range of the analog domain to meet the stringent signal-to-noise-and-distortion requirements of some signal processing applications. However, the imperfections and mismatches of CMOS devices can easily deteriorate the performance of analog circuits when they are used to realize precision and highly linear elements in the analog domain. This is mainly due to the lack of tunability of the analog circuits that necessitates the use of special trimming or layout techniques. These problems can be alleviated by making use of the analog storage and capacitive coupling capabilities of floating-gate transistors. In this research, tunable resistive elements and analog storages are built using floating-gate transistors to be incorporated into signal processing applications. Tunable linearized resistors are designed and implemented in CMOS technology, and are employed in building a highly linear amplifier, a transconductance multiplier, and a binary-weighted resistor digital-to-analog converter. Moreover, a tunable voltage reference is designed by utilizing the analog storage feature of the floating-gate transistor. This voltage reference is used to build low-power, compact, and tunable/reconfigurable voltage-output digital-to-analog converter and distributed arithmetic architecture.
APA, Harvard, Vancouver, ISO, and other styles
9

Hooper, Mark S. "Submicron CMOS programmable analog floating-gate circuits and arrays using DC-DC converters." Diss., Available online, Georgia Institute of Technology, 2005, 2005. http://etd.gatech.edu/theses/available/etd-12032004-155022/unrestricted/Hooper%5FMark%5FS%5F200505%5Fphd.pdf.

Full text
Abstract:
Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2005.
Kucic, Matthew, Committee Member ; Hasler, Paul, Committee Chair ; Heck, Bonnie, Committee Member ; Cressler, John, Committee Member ; Anderson, David, Committee Member. Vita. Includes bibliographical references.
APA, Harvard, Vancouver, ISO, and other styles
10

Twigg, Christopher M. "Floating Gate Based Large-Scale Field-Programmable Analog Arrays for Analog Signal Processing." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/11601.

Full text
Abstract:
Large-scale reconfigurable and programmable analog devices provide a new option for prototyping and synthesizing analog circuits for analog signal processing and beyond. Field-programmable analog arrays (FPAAs) built upon floating gate transistor technologies provide the analog reconfigurability and programmability density required for large-scale devices on a single integrated circuit (IC). A wide variety of synthesized circuits, such as OTA followers, band-pass filters, and capacitively coupled summation/difference circuits, were measured to demonstrate the flexibility of FPAAs. Three generations of devices were designed and tested to verify the viability of such floating gate based large-scale FPAAs. Various architectures and circuit topologies were also designed and tested to explore the trade-offs present in reconfigurable analog systems. In addition, large-scale FPAAs have been incorporated into class laboratory exercises, which provide students with a much broader range of circuit and IC design experiences than have been previously possible. By combining reconfigurable analog technologies with an equivalent large-scale digital device, such as a field-programmable gate array (FPGA), an extremely powerful and flexible mixed signal development system can be produced that will enable all of the benefits possible through cooperative analog/digital signal processing (CADSP).
APA, Harvard, Vancouver, ISO, and other styles
More sources

Books on the topic "Field programmable mixed-signal arrays"

1

Digital signal processing with field programmable gate arrays. 2nd ed. Berlin: Springer-Verlag, 2004.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
2

Meyer-Baese, Uwe. Digital Signal Processing with Field Programmable Gate Arrays. Berlin, Heidelberg: Springer Berlin Heidelberg, 2004.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
3

Meyer-Baese, Uwe. Digital Signal Processing with Field Programmable Gate Arrays. Berlin, Heidelberg: Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-662-06728-4.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Meyer-Baese, Uwe. Digital Signal Processing with Field Programmable Gate Arrays. Berlin, Heidelberg: Springer Berlin Heidelberg, 2014. http://dx.doi.org/10.1007/978-3-642-45309-0.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Meyer-Baese, Uwe. Digital Signal Processing with Field Programmable Gate Arrays. Berlin, Heidelberg: Springer Berlin Heidelberg, 2001. http://dx.doi.org/10.1007/978-3-662-04613-5.

Full text
APA, Harvard, Vancouver, ISO, and other styles
6

Chow, Paul. A field-programmable mixed-analog-digital array. Ottawa: National Library of Canada, 1994.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
7

Chu, Liou. Real-time multi-channel digital signal processing using field programmable gates array. Manchester: UMIST, 1997.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
8

Lamarche, Paul-Hugo. Field-programmable analog array implemented using delta-sigma based digital signal processing. Ottawa: National Library of Canada, 2003.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
9

MEYER-BAESE, UWE. DIGITAL SIGNAL PROCESSING WITH FIELD PROGRAMMABLE GATE ARRAYS. SPRINGER-VERLAG BERLIN AND HEIDELBERG GMBH & CO. KG, 2004.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
10

Meyer-Baese, Uwe. Digital Signal Processing with Field Programmable Gate Arrays. Springer, 2014.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
More sources

Book chapters on the topic "Field programmable mixed-signal arrays"

1

Embabi, S. H. K., X. Quan, N. Oki, A. Manjrekar, and E. Sánchez-Sinencio. "A Current-Mode based Field-Programmable Analog Array for Signal Processing Applications." In Field-Programmable Analog Arrays, 125–42. Boston, MA: Springer US, 1998. http://dx.doi.org/10.1007/978-1-4757-5224-3_7.

Full text
APA, Harvard, Vancouver, ISO, and other styles
2

Meyer-Baese, Uwe. "Multirate Signal Processing." In Digital Signal Processing with Field Programmable Gate Arrays, 143–207. Berlin, Heidelberg: Springer Berlin Heidelberg, 2001. http://dx.doi.org/10.1007/978-3-662-04613-5_5.

Full text
APA, Harvard, Vancouver, ISO, and other styles
3

Meyer-Baese, Uwe. "Multirate Signal Processing." In Digital Signal Processing with Field Programmable Gate Arrays, 305–416. Berlin, Heidelberg: Springer Berlin Heidelberg, 2014. http://dx.doi.org/10.1007/978-3-642-45309-0_5.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Mayer-Baese, Uwe. "Multirate Signal Processing." In Digital Signal Processing with Field Programmable Gate Arrays, 175–239. Berlin, Heidelberg: Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-662-06728-4_5.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Turner, L. E., and P. J. W. Graumann. "Rapid hardware prototyping of Digital Signal Processing systems using Field Programmable Gate Arrays." In Field-Programmable Logic and Applications, 129–38. Berlin, Heidelberg: Springer Berlin Heidelberg, 1995. http://dx.doi.org/10.1007/3-540-60294-1_106.

Full text
APA, Harvard, Vancouver, ISO, and other styles
6

Meyer-Baese, Uwe. "Introduction." In Digital Signal Processing with Field Programmable Gate Arrays, 1–27. Berlin, Heidelberg: Springer Berlin Heidelberg, 2001. http://dx.doi.org/10.1007/978-3-662-04613-5_1.

Full text
APA, Harvard, Vancouver, ISO, and other styles
7

Meyer-Baese, Uwe. "Computer Arithmetic." In Digital Signal Processing with Field Programmable Gate Arrays, 29–78. Berlin, Heidelberg: Springer Berlin Heidelberg, 2001. http://dx.doi.org/10.1007/978-3-662-04613-5_2.

Full text
APA, Harvard, Vancouver, ISO, and other styles
8

Meyer-Baese, Uwe. "Finite Impulse Response (FIR) Digital Filters." In Digital Signal Processing with Field Programmable Gate Arrays, 79–114. Berlin, Heidelberg: Springer Berlin Heidelberg, 2001. http://dx.doi.org/10.1007/978-3-662-04613-5_3.

Full text
APA, Harvard, Vancouver, ISO, and other styles
9

Meyer-Baese, Uwe. "Infinite Impulse Response (IIR) Digital Filters." In Digital Signal Processing with Field Programmable Gate Arrays, 115–41. Berlin, Heidelberg: Springer Berlin Heidelberg, 2001. http://dx.doi.org/10.1007/978-3-662-04613-5_4.

Full text
APA, Harvard, Vancouver, ISO, and other styles
10

Meyer-Baese, Uwe. "Fourier Transforms." In Digital Signal Processing with Field Programmable Gate Arrays, 209–55. Berlin, Heidelberg: Springer Berlin Heidelberg, 2001. http://dx.doi.org/10.1007/978-3-662-04613-5_6.

Full text
APA, Harvard, Vancouver, ISO, and other styles

Conference papers on the topic "Field programmable mixed-signal arrays"

1

Looby, C. A. "Field programmable analogue arrays: a DFT view." In IEE Colloquium on Testing Mixed Signal Circuits and Systems. IEE, 1997. http://dx.doi.org/10.1049/ic:19971193.

Full text
APA, Harvard, Vancouver, ISO, and other styles
2

Chow, P., P. G. Gulak, and P. Chow. "A Field-Programmable Mixed-Analog-Digital Array." In Third International ACM Symposium on Field-Programmable Gate Arrays. IEEE, 1995. http://dx.doi.org/10.1109/fpga.1995.242048.

Full text
APA, Harvard, Vancouver, ISO, and other styles
3

Hall, T., and C. Twigg. "Field-programmable analog arrays enable mixed-signal prototyping of embedded systems." In 48th Midwest Symposium on Circuits and Systems, 2005. IEEE, 2005. http://dx.doi.org/10.1109/mwscas.2005.1594045.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Zha, Yue, Jialiang Zhang, Zhiqiang Wei, and Jing Li. "A Mixed-Signal Data-Centric Reconfigurable Architecture enabled by RRAM Technology (Abstract Only)." In FPGA '17: The 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. New York, NY, USA: ACM, 2017. http://dx.doi.org/10.1145/3020078.3021759.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Celik, Ali Recai. "Image processing on Field Programmable Gate Arrays." In 2015 23th Signal Processing and Communications Applications Conference (SIU). IEEE, 2015. http://dx.doi.org/10.1109/siu.2015.7130130.

Full text
APA, Harvard, Vancouver, ISO, and other styles
6

Haroun, B., and B. Sajjadi. "Synthesis of Signal Processing Structured Datapaths for FPGAs Supporting RAMs and Busses." In Third International ACM Symposium on Field-Programmable Gate Arrays. IEEE, 1995. http://dx.doi.org/10.1109/fpga.1995.242044.

Full text
APA, Harvard, Vancouver, ISO, and other styles
7

Bai, Yu, and Mingjie Lin. "Energy-Efficient Discrete Signal Processing with Field Programmable Analog Arrays (FPAAs)." In FPGA '15: The 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. New York, NY, USA: ACM, 2015. http://dx.doi.org/10.1145/2684746.2689078.

Full text
APA, Harvard, Vancouver, ISO, and other styles
8

Mudza, Zbigniew. "Relocatable Partial Bitstreams For Virtual Overlay Architectures atop Field-Programmable Gate Arrays." In 2020 27th International Conference on Mixed Design of Integrated Circuits and System (MIXDES). IEEE, 2020. http://dx.doi.org/10.23919/mixdes49814.2020.9155790.

Full text
APA, Harvard, Vancouver, ISO, and other styles
9

Liu, Leibo, Yingjie Chen, Dong Wang, Min Zhu, Shouyi Yin, and Shaojun Wei. "A Mixed-Grained Reconfigurable Computing Platform for Multiple-Standard Video Decoding (Abstract Only)." In FPGA '15: The 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. New York, NY, USA: ACM, 2015. http://dx.doi.org/10.1145/2684746.2689116.

Full text
APA, Harvard, Vancouver, ISO, and other styles
10

Becker, J., F. Henrici, and Y. Manoli. "System-level analog simulation of a mixed-signal continuous-time field programmable analog array." In Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05). IEEE, 2005. http://dx.doi.org/10.1109/iwsoc.2005.102.

Full text
APA, Harvard, Vancouver, ISO, and other styles
You might also be interested in the extended bibliographies on the topic 'Field programmable mixed-signal arrays' for particular source types:
Journal articles Dissertations / Theses Books
We offer discounts on all premium plans for authors whose works are included in thematic literature selections. Contact us to get a unique promo code!

To the bibliography