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1
Krishna, Dr B. Vamsy, Siva Ganeshraju Sarikonda, and Jonnakuti Sharath Chandra. "Design and Implementation Low Pass FIR Digital Filter Using Windowing Techniques." INTERANTIONAL JOURNAL OF SCIENTIFIC RESEARCH IN ENGINEERING AND MANAGEMENT 09, no. 04 (2025): 1–9. https://doi.org/10.55041/ijsrem43943.
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A filter can need to have a certain frequency response, or a particular reaction to an impulse, step, or ramp, or mimic an analogue system. Digital filters can be categorised into Finite Impulse Response (FIR) filters & Infinite Impulse Response (IIR) filters depending on the system response. The thesis addresses FPGA low pass FIR filter design. Theoretical and experimental findings conducted FIR low pass filter point to the window design approach as very straightforward and user-friendly due to the presence of well-defined equation. Comparison indicated that the Direct-Form structure technique is simpler and performs better than other typical filter structures whereas Kaiser window gives the minimal main-lobe width and a sharp cut-off indicating smaller transition width. Experimental research of coefficient quantisation reveals a link between the frequency response, number of coefficients, and bit count. Key words: Digital Signal Processing (DSP),Finite Impulse Response (FIR) Filter, Low- Pass Filter, Verilog HDL, Windowing Techniques, Hamming Window, Hanning Window.
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Poornima, Y., and M. Kamalanathan. "Design of Low Power Vedic Multiplier Based Reconfigurable Fir Filter for DSP Applications." International Journal of Advance Research and Innovation 7, no. 2 (2019): 57–60. http://dx.doi.org/10.51976/ijari.721908.
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Recent advances in mobile computing and multimedia applications demand high - performance and low - power VLSI digital signal processing (DSP) systems. One of the most widely used operations in DSP is finite - impulse response (FIR) filtering. In the existing method FIR filter is designed using array multiplier, which is having higher delay and power dissipation. The proposed method presents a programmable digital finite impulse response (FIR) filter for high - performance applications. One of the most widely used operations in DSP is finite - impulse response (FIR) filtering. In the existing method FIR filter is designed using array multiplier, which is having higher delay and power dissipation. The proposed method presents a programmable digital finite impulse response (FIR) filter for high performance applications. The FIR filter performs the weighted summations of input sequences and is widely used in video convolution functions, signal preconditioning, and various communication applications. Recently, due to the high - performance requirement and increasing complexity of DSP and multimedia communication application. In this work, , FIR filter multipliers are extensively characterized with power simulations, providing a methodology for the perturbation of the coefficients of baseline filters at the algorithm level to trade-off reduced power consumption for filter quality. The proposed optimization technique does not require any hardware overhead and it enables the possibility of scaling the power consumption of the filter at runtime.
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Neelam, Kumari *1 Priyanka Jaglan 2. "DESIGN OF FIR FILTER USING PSO: A REVIEW." INTERNATIONAL JOURNAL OF ENGINEERING SCIENCES & RESEARCH TECHNOLOGY 6, no. 9 (2017): 283–86. https://doi.org/10.5281/zenodo.891698.
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Digital filters are devices which allow some frequencies to pass without being altered while completely blocking others. Mainly two types of digital filters are available: FIR (finite impulse response) and IIR (infinite impulse response). FIR filters are used in wide variety of applications due to their linear phase response and stability. Filter designing involves use of traditional non-optimization techniques that provides suboptimal results. In order to further enhance the efficiency of designed filter, a number of optimization techniques have been proposed. Particle Swarm Optimization (PSO) is one of such optimization algorithm. This paper presents a review of FIR filter designing using PSO.
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Aparna, A., and T. Vigneswaran. "DESIGN OF HIGH PERFORMANCE MULTIPLIERLESS LINEAR PHASE FINITE IMPULSE RESPONSE FILTERS." Asian Journal of Pharmaceutical and Clinical Research 10, no. 13 (2017): 66. http://dx.doi.org/10.22159/ajpcr.2017.v10s1.19564.
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This research work proposes the finite impulse response (FIR) filters design using distributed arithmetic architecture optimized for field programmable gate array. To implement computationally efficient, low power, high-speed FIR filter a two-dimensional fully pipelined structure is used. The FIR filter is dynamically reconfigured to realize low pass and high pass filter by changing the filter coefficients. The FIR filter is most fundamental components in digital signal processing for high-speed application. The aim of this research work is to design multiplier-less FIR filter for the requirements of low power and high speed various embedded applications.
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Wang, Zixuan. "Different Methods of Linear Phase IIR Filer Realization." Highlights in Science, Engineering and Technology 27 (December 27, 2022): 167–71. http://dx.doi.org/10.54097/hset.v27i.3739.
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Signal processing has become one of the most popular research topics. Researchers have designed a variety of digital filters to exclude unwanted random noises during the transmission or extract part of the signal in the desired range. There is a prevalent trend for digital filters to replace analog ones since they do not require hardwires. All the performances are operated on a single processor and are free from the effect of external factors. Finite impulse response (FIR) and infinite impulse response (IIR) filters in digital filters respectively provide infinite and finite impulse responses. In the application, it is preferred to have a linear phase digital filter, and FIR filters are naturally linear. However, FIR filters have higher orders and group delay than IIR filters, so researchers found various ways to implement linear phase IIR filters for improvement. This paper introduces and compares Powell and Chau Linear Phase IIR Filter, Kwan Linear Phase IIR Filter, and Xiao, Oliver, and Agathoklis Linear Phase IIR Filter.
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Kwon, Bokyu, and Sang-il Kim. "Recursive Optimal Finite Impulse Response Filter and Its Application to Adaptive Estimation." Applied Sciences 12, no. 5 (2022): 2757. http://dx.doi.org/10.3390/app12052757.
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In this paper, the recursive form of an optimal finite impulse response filter is proposed for discrete time-varying state-space models. The recursive form of the finite impulse response filter is derived by employing finite horizon Kalman filtering with optimally estimated initial conditions. The horizon initial state and its error covariance on the horizon are optimally estimated by using recent finite measurements, in the sense of maximum likelihood estimation, then initiating the finite horizon Kalman filter. The optimality and unbiasedness of the proposed filter are proved by comparison with the conventional optimal finite impulse response filter in batch form. Moreover, an adaptive FIR filter is also proposed by applying the adaptive estimation scheme to the proposed recursive optimal FIR filter as its application. To evaluate the performance of the proposed algorithms, a computer simulation is performed to compare the conventional Kalman filter and adaptive Kalman filters for the gas turbine aircraft engine model.
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Fursov, V. A. "Constructing a quadratic-exponential FIR-filter with an extended frequency response midrange." Computer Optics 42, no. 2 (2018): 297–305. http://dx.doi.org/10.18287/2412-6179-2018-42-2-297-305.
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This article is concerned with synthesizing filter with finite impulse response (FIR-filters) employed to correct radially symmetric distortions such as defocusing. We propose a new parametric class of finite impulse response filters (FIR-filters) based on a model of the one-dimensional radially symmetric frequency response. In the proposed method, the one-dimensional frequency response is composed of quadratic and exponential functions. The two-dimensional impulse response of the filter is constructed by sampling one-dimensional impulse responses for all directions. The development consists in introducing an extended mid-frequency region of the frequency response, thus increasing the contribution of the frequencies to image correction. Examples are given in order to illustrate the possibility of the high-quality distortion correction. In particular, it is shown that the proposed method provides the restoration quality higher than that obtained when using an optimal Wiener filter (taken from OpenCV).
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Kocoń, Sławomir, and Jacek Piskorowski. "Digital Finite Impulse Response Notch Filter with Non-Zero Initial Conditions, Based on an Infinite Impulse Response Prototype Filter." Metrology and Measurement Systems 19, no. 4 (2012): 767–76. http://dx.doi.org/10.2478/v10178-012-0068-x.
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Abstract In this paper a concept of finite impulse response (FIR) narrow band-stop (notch) filter with non-zero initial conditions, based on infinite impulse response (IIR) prototype filter, is proposed. The filter described in this paper is used to suppress power line noise from ECG signals. In order to reduce the transient response of the proposed FIR notch filter, optimal initial conditions for the filter have been determined. The algorithm for finding the length of the initial conditions vector is presented. The proposed values of the length of initial conditions vector, for several ECG signals and interfering frequencies, are calculated. The proposed filters are tested using various ECG signals. Computer simulations demonstrate that the proposed FIR filters outperform traditional FIR filters with initial conditions set to zero.
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Heena, K. P. "A Review of High Throughput FIR Filter Design." International Journal for Research in Applied Science and Engineering Technology 12, no. 7 (2024): 1180–90. http://dx.doi.org/10.22214/ijraset.2024.63734.
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Abstract: Advancements in Finite Impulse Response (FIR) filter design have significantly propelled the field of Digital Signal Processing (DSP), addressing the increasing need for high-performance and efficient digital filters. FIR filters are renowned for their stability, linear phase response, and computational efficiency, making them indispensable in applications such as image filtering and frequency modulation. Their inherent advantages, including the ability to leverage Fast Fourier Transformation (FFT) techniques and minimal finite precision arithmetic errors, often make them preferable over Infinite Impulse Response (IIR) filters. Recent research efforts have focused on algorithmic and hardware modifications to optimize FIR filter architectures, employing techniques such as retiming, pipelining, and parallel processing. This paper explores various design techniques and architectures aimed at optimizing FIR filter performance. Additionally, the role of high-speed adder structures, like carry-lookahead adders, is examined for their impact on enhancing digital filter efficiency and the critical role of continuous exploration and optimization in FIR filter design to advance DSP. By addressing the demands of modern technology, these innovations foster the development of high-performance, efficient digital filters, essential for diverse applications and the ongoing progression of digital signal processing.
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Pushpalatha, P., and K. Babulu. "Design and implementation of systolic architecture based FIR filter." i-manager's Journal on Digital Signal Processing 10, no. 1 (2022): 17. http://dx.doi.org/10.26634/jdp.10.1.18852.
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In signal processing, a filter is a device or process that removes some unwanted components or features from a signal. Digital filters are mainly divided into Infinite Impulse Response (IIR) filters and Finite Impulse Response (FIR) filters. FIR filters are mostly used in applications like image processing, communications, Digital Signal Processing (DSP) etc. One of the most used filters for designing of VLSI circuits is FIR filter. Systolic architecture is a Processing Element (PE) network that generates and passes data rhythmically through the system. The concept of systolic architecture can map high-level computing into hardware structures. FIR filter with systolic architectures provide better examples for efficient VLSI and FPGA implementations of many digital signal processing applications because of their modularity and regularity features.
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Bukke, Balaji Naik, Kamsali Manjunathachari, and Srinivas Sabbavarapu. "Implementation of a Finite Impulse Response Filter using PUFs to Avoid Trojans." Engineering, Technology & Applied Science Research 13, no. 6 (2023): 12151–57. http://dx.doi.org/10.48084/etasr.6133.
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In the modern era of signal processing, digital filters play an important role in real-time applications such as communication, consumer electronics, digital signal processing, audio, etc. In digital filter design, Finite Impulse Response (FIR) filters are highly preferable due to their linear phase and inherent stability. These filters benefit from being time-invariant and simple to implement with minimal computational requirements. Therefore, the hardware security of FIR filters is essential for good performance and reliable results. On the other hand, there is the possibility of hardware threats, such as tampering, reverse engineering, hardware Trojans, etc., as the design of an FIR filter involves many stages. Such hardware attacks on FIR filters can cause several problems, including performance degradation, leakage of confidential information, lack of stability, etc. This study presents the design and implementation of a Trojan-aware FIR filter using Physical Unclonable Functions (PUFs). The key feature of PUFs is that they generate a unique and unpredictable response for each given challenge. In the proposed design, PUFs were used to generate the FIR filter coefficients that are unique and unpredictable by attackers/trojans to improve security. The security of FIR with PUF was tested using ML-based challenges, and the results showed approximately 30% more reliability and consistency compared to the FIR without PUFs.
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Uma, A., and P. Kalpana. "ECG Noise Removal Using Modified Distributed Arithmetic Based Finite Impulse Response Filter." Journal of Medical Imaging and Health Informatics 11, no. 5 (2021): 1444–52. http://dx.doi.org/10.1166/jmihi.2021.3770.
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ECG monitoring is essential to support human life. During signal acquisition, the signals are contaminated by various noises that occur due to different sources. This paper focuses on Baseline wander and Muscle Artifact noise removal using Distributed Arithmetic (DA) based FIR filters. An area-efficient modified DA based FIR filter consists of LUT-less structure and used for noise removal. The performance of the modified DA based FIR filter is compared with the conventional DA FIR filter. An arbitrary real-time ECG record is taken from MIT-BIH database and Baseline Wander noise, Muscle artifact noises are taken from MIT-BIH noise stress test database. The performance of both filters is evaluated in terms of output Signal to Noise Ratio (SNR) and Mean Square Error (MSE). For Baseline wander noise removal, the modified DA based FIR filter produces high output SNR and also low MSE of 76.6% than the conventional filter. Similarly, for Muscle Artifact noise removal, it produces high SNR, and MSE is reduced to 73.8%. A modified DA based FIR filter is synthesized for the target FPGA device Spartan3E XC3s2000-4fg900 and hardware resource utilization is presented.
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Kumar, Sandeep, and Vigneswaran T. "HIGH PERFORMANCE ADAPTIVE FINITE IMPULSE RESPONSE FILTER USING NEW DISTRIBUTED ARITHMETIC ALGORITHM." Asian Journal of Pharmaceutical and Clinical Research 10, no. 13 (2017): 352. http://dx.doi.org/10.22159/ajpcr.2017.v10s1.19754.
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Finite Impulse Response (FIR) filters is very important in signal Processing Applications. This research is to analyze the performance of FIR filter with the Xilinx Software. The Distributed Arithmetic (DA) algorithm is extensively used in FIR Filter to improve its speed and reducing the area of the filter. The design of low power filter will be achieved by pipelining and parallel processing concept on distributed Arithmetic. The aim is to design filter which has less delay time and supports the pipelining/parallel processing feature, helps in high speed with less power dissipation and area. The paper discusses FPGA implementation of FIR filter and due to parallel data processing its computation is fast and also provides an efficient architecture in terms of area and power consumption. New Distributed Arithmetic is a high performance and for low power filter.
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PERIŠIĆ, DJURDJE. "TIME-FINITE IMPULSE RESPONSE DIGITAL FILTER BASED ON THE TIME DIFFERENCES." REVUE ROUMAINE DES SCIENCES TECHNIQUES — SÉRIE ÉLECTROTECHNIQUE ET ÉNERGÉTIQUE 70, no. 2 (2025): 217–22. https://doi.org/10.59277/rrst-ee.2025.2.11.
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This work describes one model of the time-finite impulse response (FIR) digital filter whose output is based on the time differences between the input and output periods. It is intended for the filtering of the pulse signal periods. The filter is a linear, discrete system that functions as a frequency locked loop (FLL). The output correction is performed once per period. The specific properties of the FLL are described, thanks to which it is suitable to be adapted to function as a time-FIR either low-pass or high-pass digital filter. The procedure for adjusting the fourth-order FLL into the Time-FIR digital filter is presented. Mathematical analyses were performed using the Z-transform. The system’s operation was simulated. For analysis in the frequency domain, the theory and the corresponding MATLAB software packages, intended for the development of the classical FIR digital filters, were used. The properties of the fourth-order FLL, as well as the filtering abilities of the developed Time-FIR digital filter, are demonstrated in the time and frequency domains.
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Liu, Yi, and Shunyi Zhao. "Trajectory Tracking Using Cumulative Risk–Sensitive Finite Impulse Response Filters." Micromachines 16, no. 4 (2025): 365. https://doi.org/10.3390/mi16040365.
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Trajectory tracking is a critical component of autonomous driving and robotic motion control. This paper proposes a novel robust finite impulse response (FIR) filter for linear time-invariant systems, aimed at enhancing the accuracy and robustness of trajectory tracking. To address the limitations of infinite impulse response (IIR) filters in complex environments, we integrate a cumulative risk–sensitive criterion with an FIR structure. The proposed filter effectively mitigates model mismatches and temporary modeling uncertainties, making it highly suitable for trajectory tracking in dynamic and uncertain environments. To validate its performance, a comprehensive vehicle trajectory tracking experiment is conducted. The experimental results demonstrate that, compared to the Kalman filter (KF), risk–sensitive filter (RSF), and unbiased FIR (UFIR) filter, the proposed algorithm significantly reduces the average tracking error and exhibits superior robustness in complex scenarios. This work provides a new and effective solution for trajectory tracking applications, with broad potential for practical implementation.
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Mehta, Avinash, Munish Verma, Vijay K. Lamba, Susheel Kumar, and Sandeep Kumar. "ANALYSIS OF MODIFIED COSH WINDOW FUNCTION AND PERFORMANCE EVALUATION OF THE FIR FILTER DESIGNED USING WINDOWING TECHNIQUES." INTERNATIONAL JOURNAL OF COMPUTERS & TECHNOLOGY 3, no. 2 (2012): 324–28. http://dx.doi.org/10.24297/ijct.v3i2c.2893.
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Filters are used in electronic circuits to remove the unwanted frequency components from desired signals. A digital filter basically provide high attenuation to the unwanted ones and offer very low or ideally zero attenuation to desired signal components when it’s impulse response is adjusted as per requirement. For ideal filters, the length of such an impulse response is infinite and also the filter will be non-causal and unrealizable. So, we need to truncate this infinite impulse response to make it finite. For this truncation, we use window functions. Using window functions, we obtain a finite impulse response or simply FIR filter. The shape of a window in time domain decides the characteristics of resultant filter in frequency domain. Several window functions are available in literature. For the present work we have choosen the three parameter Cosh window for truncation of infinite impulse response. It is also called as modified Cosh window because it has been obtained by inserting a third parameter in the basic 2-parameter Cosh window function. The main goal of this work is to study this modified Cosh window and design a digital low pass FIR filter using the same in MATLAB. First of all the properties of window function are described and frequeny domain responses of window function is obtained. Then FIR filter is analyzed using window design method and it’s characteristics have also been studied in frequency domain.
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Mousa, Wail A., Said Boussakta, Desmond C. McLernon, and Mirko Van der Baan. "Implementation of 2D explicit depth extrapolation FIR digital filters for 3D seismic volumes using singular value decomposition." GEOPHYSICS 75, no. 1 (2010): V1—V12. http://dx.doi.org/10.1190/1.3294424.
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We propose a new scheme for implementing predesigned 2D complex-valued wavefield extrapolation finite impulse response (FIR) digital filters, which are used for extrapolating 3D seismic wavefields. The implementation is based on singular value decomposition (SVD) of quadrantally symmetric 2D FIR filters (extrapolators). To simplify the SVD computations for such a filter impulse response structure, we apply a special matrix transformation on the extrapolation FIR filter impulse responses where we guarantee the retention of their wavenumber phase response. Unlike the existing 2D FIR filter implementation methods that are used for this geophysical application such as the McClellan transformation or its improved version, this implementation via SVD results in perfect circularly symmetrical magnitude and phase wavenumber responses. In this paper, we also demonstrate that the SVD method can save (depending on the filter size) more than 23% of the number of multiplications per output sample and approximately 62% of the number of additions per output sample when compared to direct implementation with quadrantal symmetry via true 2D convolution. Finally, an application to extrapolation of a seismic impulse is shown to prove our theoretical conclusions.
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Kaplun, Dmitry, Denis Butusov, Valerii Ostrovskii, Alexander Veligosha, and Vyacheslav Gulvanskii. "Optimization of the FIR Filter Structure in Finite Residue Field Algebra." Electronics 7, no. 12 (2018): 372. http://dx.doi.org/10.3390/electronics7120372.
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This paper introduces a method for optimizing non-recursive filtering algorithms. A mathematical model of a non-recursive digital filter is proposed and a performance estimation is given. A method for optimizing the structural implementation of the modular digital filter is described. The essence of the optimization is that by using the property of the residue ring and the properties of the symmetric impulse response of the filter, it is possible to obtain a filter having almost a half the length of the impulse response compared to the traditional modular filter. A difference equation is given by calculating the output sample of modules p1 … pn in the modified modular digital filter. The performance of the modular filters was compared with the performance of positional non-recursive filters implemented on a digital signal processor. An example of the estimation of the hardware costs is shown to be required for implementing a modular digital filter with a modified structure. This paper substantiates the expediency of applying the natural redundancy of finite field algebra codes on the example of the possibility to reduce hardware costs by a factor of two. It is demonstrated that the accuracy of data processing in the modular digital filter is higher than the accuracy achieved with the implementation of filters on digital processors. The accuracy advantage of the proposed approach is shown experimentally by the construction of the frequency response of the non-recursive low-pass filters.
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Ibarra-Manzano, Oscar G., José A. Andrade-Lucio, and Yuriy S. Shmaliy. "Gain Computation for Batch H2-FIR Filtering of Predictive Uncertain Disturbed Models using LMI." WSEAS TRANSACTIONS ON SYSTEMS 24 (April 1, 2025): 112–19. https://doi.org/10.37394/23202.2025.24.13.
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The gain for the receding horizon (RH) H2 finite impulse response (FIR) filter is derived using linear matrix inequality (LMI) under uncertainties, disturbances, initial, and measurement errors. The RH H2-FIR filter is developed by minimizing the squared Frobenius norm of the weighted error-to-error transfer function, where the weights are related to errors. The filter is tested by a harmonic model with an uncertain system matrix, and its higher accuracy is shown against the OFIR, Kalman, maximum likelihood FIR, and unbiased FIR (UFIR) filters.
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Jacinta, Potsangbam1 and Manoj Kumar2. "DESIGN AND IMPLEMENTATION OF COMBINED PIPELINING AND PARALLEL PROCESSING ARCHITECTURE FOR FIR AND IIR FILTERS USING VHDL." International Journal of VLSI design & Communication Systems (VLSICS) Vol 10, No 4, August 2019 10, no. 4 (2019): 01–16. https://doi.org/10.5281/zenodo.3387030.
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Along with the advancement in VLSI (Very Large Scale Integration) technology, the implementation of Finite impulse response (FIR) filters and Infinite impulse response (IIR) filters with enhanced speed has become more demanding. This paper aims at designing and implementing a combined pipelining and parallel processing architecture for FIR and IIR filter using VHDL (Very High Speed Integrated Circuit Hardware Descriptive Language) to reduce the power consumption and delay of the filter. The proposed architecture is compared with the original FIR and IIR filter respectively in terms of speed, area, and power. Also, the proposed architecture is compared with existing architectures in terms of delay. The implementation is done by using VHDL codes. FIR and IIR filters structures are implemented at 1200 KHz clock frequency. Synthesis and simulation have been accomplished on Artix-7 series FPGA, target device (xc7a200tfbg676) (speed grade -1) using VIVADO 2016.3.
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Zhang, Kui, Gong Liu Yang, Wei Zhen Zheng, and Ren Dong Ma. "Digital Signal Processing Approach of Dithered RLG Based on IFIR Digital Filter." Advanced Materials Research 989-994 (July 2014): 4195–99. http://dx.doi.org/10.4028/www.scientific.net/amr.989-994.4195.
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An interpolated finite impulse response (IFIR) digital filter approach was purposed to improve the demerits of traditional finite impulse response (FIR) digital filter in the case of noise attenuation for dithered Ring Laser Gyroscope (RLG). Concentrated on the time delay and computation complexity, a comparison of FIR and IIR digital filter was illustrated. By optimizing the stretch factor L, an IFIR digital filter was designed to reach the requirements of a typical RLG. The static experiment results show that the impulse number is decreased from 250 to below 0.15, attenuation of the dither noise is nearly 100 dB and group delay remains the same level by 11.25ms.
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Debasis, Behera, Patnaik Asutosh, Kumar Barik Prabhat, and Sankar Rath Girija. "VLSI Implementation of Digital Filter using Novel RTSD Adder and Booth Multiplier." International Journal of Engineering and Advanced Technology (IJEAT) 9, no. 3 (2020): 4131–39. https://doi.org/10.35940/ijeat.C6562.029320.
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Finite Impulse Response (FIR) filters are most important element in signal processing and communication. Area and speed optimization are the essential necessities of FIR filter design. This work looks at the design of Finite Impulse Response (FIR) filters from an arithmetic perspective. Since the fundamental arithmetic operations in the convolution equations are addition and multiplication, they are the objectives of the design analysis. For multiplication, Booth encoding is utilized in order to lessen the quantity of partial products. Consequently, considering carry-propagation free addition strategies should improve the addition operation of the filter. The redundant ternary signed-digit (RTSD) number framework is utilized to speedup addition in the filter. The redundant ternary representation utilizes more bits than required to denote the single binary digit because of which most numbers have several representations. This special behavior of RTSD allows the addition along with the absence of typical carry propagation. Xilinx ISE design suite 14.5 is used for the design and validation of proposed method. From the implementation result, the proposed design of FIR filter is compared with other conventional techniques to show the better performance by means of power, area and delay.
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Zhao, Snunyi, Yuriy Shmaliy, and Sanowar Khan. "Embedded Unbiasedness: Effect on Optimal FIR Filtering Estimates." EQUATIONS 1 (August 16, 2021): 55–61. http://dx.doi.org/10.37394/232021.2021.1.8.
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In this paper, we give an analysis of the embedded unbiasedness (EU) on optimal finite impulse response (OFIR) estimates. By minimizing the mean square error (MSE) constrained by the unbiasedness condition, a new OFIR-EU filter is derived. We show that the OFIR-EU filter does not require the initial conditions, and occupies an intermediate place between the UFIR and OFIR filters. It is also shown that the MSEs of the OFIR-EU and OFIR filters diminish with the estimation horizon. A numerical example has demonstrated that the OFIR-UE filter has better robustness against temporary model uncertainties than the OFIR and Kalman filters.
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Daraghma, Raed S. M. "M-ary phase-shift keying using finite impulse response filter based on window function method." International Journal of Electrical and Computer Engineering (IJECE) 11, no. 1 (2021): 451. http://dx.doi.org/10.11591/ijece.v11i1.pp451-457.
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Digital filters are vastly utilized in the area of communication. A perfect digital filter efficiency is significant and hence to design a digital finite impulse response filter (FIR) favorable all the wanted situations is necessary. In this paper, a new proposed FIR digital filter designed, the fineness of the submitted filter is tested in terms of BER and then matched with another window, namely Hamming, Hanning, and Blackman. The design procedure done in the MATLAB software. It is concluded that the Blackman window is the best window to design the FIR digital filter, because it is bit error rate is better than another window.
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Raed, S. M. Daraghma. "M-ary phase-shift keying using finite impulse response filter based on window function method." International Journal of Electrical and Computer Engineering (IJECE) 11, no. 1 (2021): 451–57. https://doi.org/10.11591/ijece.v11i1.pp451-457.
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Digital filters are vastly utilized in the area of communication. A perfect digital filter efficiency is significant and hence to design a digital finite impulse response filter (FIR) favorable all the wanted situations is necessary. In this paper, a new proposed FIR digital filter designed, the fineness of the submitted filter is tested in terms of BER and then matched with another window, namely Hamming, Hanning, and Blackman. The design procedure done in the MATLAB software. It is concluded that the Blackman window is the best window to design the FIR digital filter, because it is bit error rate is better than another window.
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Das, Bhagwan, Javed Ali Jamali, Mahendar Kumar, Dilip Kumar Ramnani, and Z. A. Memon. "Design and Performance Analysis of Improved FIR Filter using UltraScale FPGA." Sir Syed University Research Journal of Engineering & Technology 12, no. 1 (2022): 14–22. http://dx.doi.org/10.33317/ssurj.414.
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It is discussed in many studies and demonstrated in the many researches that based on certain applications, analog design of filter has several issues including complex design, re-use Limitations, and accuracy of generating the output at various frequencies. Therefore, instead of analog filter design the digital design of the filter is preferred for both Finite and Infinite Impulse Response Filter. This paper demonstrates the design of the digital FIR filter designed is demonstrated using ultrascale Field Programming Gate Array. The filter is designed using Coefficient multiplier via Canonic Signed Digit – CSD Technique. The optimized design of digital filter is carried out via real-time implementation is performed using Ultra Scale FPGA. The filter is designed and tested with ordinary filter at 10 MHz and 10 GHz frequencies. The performance analysis of the system is illustrated using the response rate at the bit stream of 16 bit. In the results, it is demonstrated that for 10 MHz frequency design FIR filter in FPGA the 30% faster response filter is achieved at for 10 GHz, the 15% faster response is achieved at the IO Standard of LVCOMS. The proposed Improved Finite Impulse Response Filter Design using Ultra Scale FPGA helps in increasing design performance to increase the speed of overall response of FIR filter that is lacking in ordinary Filters.
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Fan, Xuefeng, and Fei Liu. "State Fusion of Decentralized Optimal Unbiased FIR Filters." Journal of Electrical and Computer Engineering 2018 (June 3, 2018): 1–11. http://dx.doi.org/10.1155/2018/1505137.
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The paper presents a decentralized fusion strategy based on the optimal unbiased finite impulse response (OUFIR) filter for discrete systems with correlated process and measurement noise. We extend OUFIR filter to apply in the model with control inputs. Taking it as local filters, cross covariance between any two is calculated; then it is expressed to the fast iterative form. Finally based on cross covariance, optimal weights are utilized to fuse local estimates and the overall outcome is obtained. The numerical examples show that the proposed filter exhibits better robustness against temporary modeling uncertainties than the fusion Kalman filter used commonly.
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Fan, Xuefeng, Shunyi Zhao, and Yuriy S. Shmaiy. "Linear Optimal Fusion of Local Unbiased FIR Filters." MATEC Web of Conferences 210 (2018): 05004. http://dx.doi.org/10.1051/matecconf/201821005004.
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This paper presents a multi-sensor decentralized fusion unbiased finite impulse response (UFIR) filter for discrete time-invariant state-space models. Fusion is provided in the minimum variance sense. By calculating the cross covariance between any of two local filters for the extended state-space model, linear optimal weights are derived to fuse local UFIR estimates. Simulation conduced for a two-state polynomial model shows that the proposed fusion UFIR filter has higher robustness than the fusion Kalman filter against errors in the noise statistics and temporary model uncertainties.
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Stamenkovic, Negovan, and Vladica Stojanovic. "Constant-coefficient FIR filters based on residue number system arithmetic." Serbian Journal of Electrical Engineering 9, no. 3 (2012): 325–42. http://dx.doi.org/10.2298/sjee1203325s.
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In this paper, the design of a Finite Impulse Response (FIR) filter based on the residue number system (RNS) is presented. We chose to implement it in the (RNS), because the RNS offers high speed and low power dissipation. This architecture is based on the single RNS multiplier-accumulator (MAC) unit. The three moduli set {2n+1,2n,2n-1}, which avoids 2n+1 modulus, is used to design FIR filter. A numerical example illustrates the principles of residue encoding, residue arithmetic, and residue decoding for FIR filters.
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Gurpadam, Singh, and R. Prakash Neelam. "FPGA Implementation of Higher Order FIR Filter." International Journal of Electrical and Computer Engineering (IJECE) 7, no. 4 (2017): 1874–81. https://doi.org/10.11591/ijece.v7i4.pp1874-1881.
Full textAbstract:
The digital Finite-Impulse-Response (FIR) filters are mainly employed in digital signal processing applications. The main components of digital FIR filters designed on FPGAs are the register bank to save the samples of signals, adder to implement sum operations and multiplier for multiplication of filter coefficients to signal samples. Although, design and implementation of digital FIR filters seem simple but the design bottleneck is multiplier block for speed, power consumption and FPGA chip area occupation. The multipliers are an integral part in FIR structures and these use a large part of the chip area. This limits the number of processing elements (PE) available on the chip to realize a higher order of filter. A model is developed in the Matlab/Simulink environment to investigate the performance of the desired higher order FIR filter. An equivalent FIR filter representation is designed by the Xilinx FIR Compiler by using the exported FIR filter coefficients. The Xilinx implementation flow is completed with the help of Xilinx ISE 14.5. It is observed how the use of higher order FIR filter impacts the resource utilization of the FPGA and it’s the maximum operating frequency.
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Lu, Richard S. "Finite‐impulse‐response reduction‐to‐the‐pole filter." GEOPHYSICS 63, no. 6 (1998): 1958–64. http://dx.doi.org/10.1190/1.1444489.
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Convolving a finite‐impulse‐response (FIR) filter with a magnetic anomaly map produces a reduction‐to‐the‐pole (RTP) that is superior to that of the conventional Fourier‐transform approach. The conventional approach, in which the map’s Fourier transform is multiplied by the frequency response of the RTP filter, is flawed by not accounting properly for the dimensions of the respective Fourier transforms. The resultant wraparound effect of circular convolution degrades the RTP map. The FIR filter, combined with linear convolution and appropriate choices for dimensions of data and filter, eliminates the wraparound effect, minimizes contamination of the result by noise, and improves stability. These properties are illustrated by a synthetic example and by application to an actual data set.
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Anjum, Muhammad Yasir Siddique, Muhammad Ali Raza Anjum, and Usman Riaz. "Multirate Adaptive Equalization." Vol 3 Issue 5 3, no. 5 (2022): 119–25. http://dx.doi.org/10.33411/ijist/2021030509.
Full textAbstract:
Finite Impulse Response (FIR) filter model emulates the Inter Symbol Interference (ISI) in a wireless communication channel. An equalizer, typically an Infinite Impulse Response (IIR) filter, behaves as an inverse filter to the FIR filter to remove the effects of the ISI. IIR filters are generally avoided due to tractability issues, and an FIR filter, with an adaptive signal processing algorithm to minimize the error due to the ISI, is deployed at the receiver. However, the filter is observed to quickly reach a steady state where further iterations do not yield a reduction in the error. This can be attributed to relatively slow variations in the steady state error which prevent further reduction of the errors. This work focuses on converting the low frequency error variations to high frequency variations by the use of multirate signal processing. As such, the steady state error can be damped as well, providing further reduction in the error and an enhanced adaptive filter performance.
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Singh, Gurpadam, and Neelam R. Prakash. "FPGA Implementation of Higher Order FIR Filter." International Journal of Electrical and Computer Engineering (IJECE) 7, no. 4 (2017): 1874. http://dx.doi.org/10.11591/ijece.v7i4.pp1874-1881.
Full textAbstract:
The digital Finite-Impulse-Response (FIR) filters are mainly employed in digital signal processing applications. The main components of digital FIR filters designed on FPGAs are the register bank to save the samples of signals, adder to implement sum operations and multiplier for multiplication of filter coefficients to signal samples. Although, design and implementation of digital FIR filters seem simple but the design bottleneck is multiplier block for speed, power consumption and FPGA chip area occupation. The multipliers are an integral part in FIR structures and these use a large part of the chip area. This limits the number of processing elements (PE) available on the chip to realize a higher order of filter. A model is developed in the Matlab/Simulink environment to investigate the performance of the desired higher order FIR filter. An equivalent FIR filter representation is designed by the Xilinx FIR Compiler by using the exported FIR filter coefficients. The Xilinx implementation flow is completed with the help of Xilinx ISE 14.5. It is observed how the use of higher order FIR filter impacts the resource utilization of the FPGA and it’s the maximum operating frequency.
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Xu, Wei, Anyu Li, Boya Shi, and Jiaxiang Zhao. "A Novel Design of Sparse FIR Multiple Notch Filters with Tunable Notch Frequencies." Mathematical Problems in Engineering 2018 (2018): 1–7. http://dx.doi.org/10.1155/2018/3490830.
Full textAbstract:
We focus on the design of finite impulse response (FIR) multiple notch filters. To reduce the computational complexity and hardware implementation complexity, a novel algorithm is developed based on the mixture of the tuning of notch frequencies and the sparsity of filter coefficients. The proposed design procedure can be carried out as follow: first, since sparse FIR filters have lower implementation complexity than full filters, a sparse linear phase FIR single notch filter with the given rejection bandwidth and passband attenuation is designed. Second, a tuning procedure is applied to the computed sparse filter to produce the desired sparse linear phase FIR multiple notch filter. When the notch frequencies are varied, the same tuning procedure can be employed to render the new multiple notch filter instead of designing the filter from scratch. The effectiveness of the proposed algorithm is demonstrated through three design examples.
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Saber, Mohamed, Mohamed E. Ghoneim, and Sunil Kumar. "Survey on Design of Digital FIR Filters using Optimization Models." Journal of Artificial Intelligence and Metaheuristics 2, no. 1 (2022): 16–26. http://dx.doi.org/10.54216/jaim.020102.
Full textAbstract:
As the discipline of Digital Signal Processing develops, digital filters play an increasingly vital role in modern technology (DSP). The FIR filter, which stands for finite impulse response, is the most common type of filter. As a result of its versatility, FIR filters find widespread application in many fields, including image filtering, frequency modulation, precision arithmetic, and many more. For this reason, digital FIR filters are designed using various optimization techniques. Using various optimization strategies yields the best results when optimizing for different filter coefficients (concerning control parameters, dependence, premature convergence, etc.). They're advantageous due to several factors, including their straightforward implementation, low error function, high-quality searching ability, and rapid convergence. In this paper, we have covered the topic of designing efficient digital filters for signal, image, and video processing using various optimization techniques.
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Dr., S. V. V. Satyanarayana, Teja Sri K, Madhavi K, Jhansi G, and Jaya Sri B. "Design and Implementation of High Speed Low Power Decimation Filter for Hearing AID Applications." International Journal of Recent Technology and Engineering (IJRTE) 12, no. 1 (2023): 27–32. https://doi.org/10.35940/ijrte.A7564.0512123.
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<strong>Abstract: </strong>This work is focused on designing and implementing a decimation filter specifically intended for use in hearing aid applications. The filter utilizes distributed arithmetic (DA) and is described in this brief. Our proposal involves the development of a reconfigurable finite impulse response (FIR) filter, which utilizes both offset binary code (OBC) and binary distributed arithmetic (DA) techniques. Additionally, we utilize canonic signed digit (CSD) representation to develop decimation filters, which include the CIC filter, half band filter, and corrector filter. In this work, we have implemented a decimation filter using Matlab Simulink. We have utilized Xilinx Vivado 19.2 to execute the FIR filters, binary DA filters, and OBC DA-based filters. Our focus is on implementing these filters using VLSI architecture, in order to achieve low power consumption, reduced latency, less area, and fast speed.
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Lim, Sungyung, Homer D. Stevens, and Jonathan P. How. "Input Shaping Design for Multi-Input Flexible Systems." Journal of Dynamic Systems, Measurement, and Control 121, no. 3 (1999): 443–47. http://dx.doi.org/10.1115/1.2802494.
Full textAbstract:
This paper investigates a new design technique of input shaping filters for multi-input flexible systems using convex optimization synthesis techniques for finite impulse response filters (FIR filters). The objective of the input shaping filter design is to find the minimum length and the minimum number of nonzero impulses of the FIR filter that forces the system to track the reference command without any residual vibration, while satisfying additional performance and control constraints. This multi-objective optimization is solved using a two-step algorithm that sequentially solves two quasi-convex optimization problems. Compared with previously published nonlinear optimization approaches, this new approach does not require a priori knowledge of the forms of input shaping filters and enables much greater flexibility for including additional performance and robustness objectives. Furthermore, this convex-based approach can be applied to multi-input systems. The multiple input shaping filter has been experimentally verified on the Stanford University Two-Link Flexible Manipulator.
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Zhao, He, Liwei Zhang, Jie Liu, Chao Zhang, Jiao Cai, and Lu Shen. "Design of a Low-Order FIR Filter for a High-Frequency Square-Wave Voltage Injection Method of the PMLSM Used in Maglev Train." Electronics 9, no. 5 (2020): 729. http://dx.doi.org/10.3390/electronics9050729.
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In position sensorless control based on a high-frequency pulsating voltage injection method, filters are used to complete the extraction of high-frequency response signals for position observation. A finite impulse response (FIR) filter has the advantages of good stability and linear phase. However, the FIR filter designed by using traditional methods has a high order which will cause a large time delay. This paper proposes a low-order FIR filter design method for a high-frequency signal injection method in the permanent magnet linear synchronous motor. Based on the frequency characteristics of the current signal, the requirement that the FIR filter needs to meet were analyzed. According to the amplitude–frequency characteristic of the FIR filter, these requirements were converted into constraint equations. By solving these equations, the coefficient of the FIR filter could be obtained. The simulation and experiment results showed the effectiveness of this low-order FIR filter.
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Rao, Dr B. Rama. "Design and Implementation of 6-Tap FIR Filter Using MAC for Low Power Applications." International Journal for Research in Applied Science and Engineering Technology 10, no. 6 (2022): 1506–11. http://dx.doi.org/10.22214/ijraset.2022.44081.
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Abstract: A Significant number of mathematical operations, such as multiplication and accumulation, are often required by a digital signal processing (DSP) algorithm. Many DSP applications have latency limitations, which mean that the DSP operation must be performed within a certain amount of time for the system to function, and because DSP gives high accuracy, filters constructed in DSP have tighter control over the output accuracy. As a result, DSP applications must be fast, have a high throughput, and use little power. Filters with a finite impulse response (FIR) are commonly employed in digital signal processing (DSP) applications. A FIR filter that is efficient in terms of electricity is being built. The multiplier and accumulator (MAC) unit used a new implementation approach to develop this system. FIR filter is a type of filter. Multipliers, adders, and a variety of other components are commonly used in FIR filters. Multipliers, adders, and a series of delays are used to form the filter's output in FIR filters. The goal of this project is to design and implement a 6-tap finite impulse response (FIR) filter by replacing multipliers with an 8-bit Multiplier and Accumulator (MAC) unit within the FIR filter, where a low-power MAC unit is always a key to achieving high performance in a DSP system, and D flip-flops are used in place of delays and constructed using a latch-based design. The Wallace tree Multiplier was utilised in the construction of the MAC unit because it reduces the amount of partial products, and the adders used for accumulation are half adders and full adders. In the FIR filter, for the purpose of summing This work evaluates performance of FIR filter in terms of speed and power and synthesis are executed in Xilinx Vivado 2018.1 software environment and the implementation is done using VHDL codes. The result analysis shows that the proposed FIR filter consumes low power than conventional (standard) FIR filter. As the dynamic power results up to 11.932W and after implementation it results up to 12.029W. Keywords: MAC, Low power, latch-based design.
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Satyanarayana, Dr S. V. V., K. Teja Sri, K. Madhavi, G. Jhansi, and B. Jaya Sri. "Design and Implementation of High Speed Low Power Decimation Filter for Hearing AID Applications." International Journal of Recent Technology and Engineering (IJRTE) 12, no. 1 (2023): 27–32. http://dx.doi.org/10.35940/ijrte.a7564.0512123.
Full textAbstract:
This work is focused on designing and implementing a decimation filter specifically intended for use in hearing aid applications. The filter utilizes distributed arithmetic (DA) and is described in this brief. Our proposal involves the development of a reconfigurable finite impulse response (FIR) filter, which utilizes both offset binary code (OBC) and binary distributed arithmetic (DA) techniques. Additionally, we utilize canonic signed digit (CSD) representation to develop decimation filters, which include the CIC filter, half band filter, and corrector filter. In this work, we have implemented a decimation filter using Matlab Simulink. We have utilized Xilinx Vivado 19.2 to execute the FIR filters, binary DA filters, and OBC DA-based filters. Our focus is on implementing these filters using VLSI architecture, in order to achieve low power consumption, reduced latency, less area, and fast speed.
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Guo, Yan, Shi Dan Li, and De Sheng Wang. "Research of Sea Clutter Suppression Algorithm Based on GPU." Applied Mechanics and Materials 239-240 (December 2012): 1194–201. http://dx.doi.org/10.4028/www.scientific.net/amm.239-240.1194.
Full textAbstract:
This paper presents an algorithm of sea clutter suppression using graphics processing unit (GPU) to meet the real-time requirement in the general radar terminal system. The main idea is to convert an infinite impulse response (IIR) filter to a finite impulse response (FIR) filter, which is suitable for the parallelization processing of GPU. Finally, the converted FIR filter algorithm is implemented on the GPU efficiently, achieving a speed approximately twice as fast as that of the previous IIR filter algorithm implemented on the CPU.
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Prashanth, B. U. V., Mohammed Riyaz Ahmed, and Manjunath R. Kounte. "Design and implementation of DA FIR filter for bio-inspired computing architecture." International Journal of Electrical and Computer Engineering (IJECE) 11, no. 2 (2021): 1709. http://dx.doi.org/10.11591/ijece.v11i2.pp1709-1718.
Full textAbstract:
This paper elucidates the system construct of DA-FIR filter optimized for design of distributed arithmetic (DA) finite impulse response (FIR) filter and is based on architecture with tightly coupled co-processor based data processing units. With a series of look-up-table (LUT) accesses in order to emulate multiply and accumulate operations the constructed DA based FIR filter is implemented on FPGA. The very high speed integrated circuit hardware description language (VHDL) is used implement the proposed filter and the design is verified using simulation. This paper discusses two optimization algorithms and resulting optimizations are incorporated into LUT layer and architecture extractions. The proposed method offers an optimized design in the form of offers average miminimizations of the number of LUT, reduction in populated slices and gate minimization for DA-finite impulse response filter. This research paves a direction towards development of bio inspired computing architectures developed without logically intensive operations, obtaining the desired specifications with respect to performance, timing, and reliability.
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Jain, Ekta H., and Chandu N. Bhoyar. "Implementation of High Speed Operating FIR Filter with DA Algorithm Comparing Results with MAC Algorithm and Simple FIR Filter Result." Journal of Advance Research in Electrical & Electronics Engineering (ISSN: 2208-2395) 2, no. 4 (2015): 10–17. http://dx.doi.org/10.53555/nneee.v2i4.204.
Full textAbstract:
Recent years there has been a increasing trend to implement digital signal processing functions in Field ProgrammableGate Array (FPGA). therefor, we need to put great effort in designing efficient architectures for digital signal processing functionssuch as FIR filters, which are widely used in audio and video signal processing, telecommunications etc. We are going to present amethod for implementing high speed Finite Impulse Response (FIR) filters using MAC (MULTIPLY AND ACCUMULATE) andDistributed Arithmetic (DA) method. MAC is a conventional FIR filter In these method adders, multipliers and delay elements areused. Distributed Arithmetic (DA) has been used to implement a bit-serial scheme of a general symmetric version of an FIR filter dueto its high stability and linearity by taking optimal advantage of the look-up table (LUT) based structure of FPGAs. The performanceof the DA technique for FIR filter design is analyzed and the results are compared to the MAC design technique.
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Nakamori, Seiichi. "Robust Recursive Least-Squares Finite Impulse Response Filter in Linear Continuous-Time Stochastic Systems with Uncertainties." WSEAS TRANSACTIONS ON SIGNAL PROCESSING 20 (December 27, 2024): 92–108. https://doi.org/10.37394/232014.2024.20.11.
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The current research designs an original robust recursive least-squares (RLS) finite impulse response (FIR) filter for linear continuous-time systems with uncertainties in both the system and observation matrices. These uncertainties in the state-space model generate the degraded signal and observed value. The robust RLS FIR filter does not account for the norm-bounded uncertainties in the system and observation matrices. This study uses an observable companion form to represent the degraded signal state-space model. The system and observation matrices are estimated based on the author's previous computational methods. The robust RLS FIR filtering problem aims to minimize the mean-square errors in FIR filtering for the system state. The robust FIR filtering estimate is formulated as an integral transformation of the degraded observations using an impulse response function. Section 3 obtains the integral equation satisfied by the optimal impulse response function. Theorem 1 presents the robust RLS FIR filtering algorithms for the signal and the system state. This integral equation derives the robust RLS-FIR filtering algorithms. Numerical simulation examples show the validity of the proposed robust RLS FIR filter.
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Novosad, Oleh, and Serhiy Shcherbovskykh. "REDUCING THE COMPUTATIONAL COMPLEXITY OF FINITE IMPULSE RESPONSE FILTERS IN INTEGRATED SYSTEMS." Computer Design Systems. Theory and Practice 7, no. 1 (2025): 1–10. https://doi.org/10.23939/cds2025.01.001.
Full textAbstract:
The problem of optimizing finite impulse response (FIR) digital filters is relevant in the context of limited computational resources of embedded systems. Existing methods for implementing FIR filters often lead to significant energy consumption and processing time, which limits their application in real-world conditions. The objective of this work is to develop methods for optimizing FIR filters to reduce computational complexity and ensure efficient operation on embedded systems with limited resources. The research methodology includes the analysis of structurally optimized filter circuits, in particular multi-stage and block configurations, as well as the use of algorithms to reduce the bit depth of coefficients. The results of the study show that the proposed approaches can significantly reduce computational cost and power consumption without sacrificing filter quality. The novelty of the work lies in the combination of structural optimization methods with algorithmic techniques that consider the peculiarities of hardware implementation on embedded systems. The practical significance of the work lies in the possibility of using optimized filters for real-time signal processing on devices with limited resources. Directions for further research include studying the effectiveness of the optimization methods on different platforms, such as FPGAs and microcontrollers, as well as adaptation to different types of signals.
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Maeda, Yoshihiro, Norishige Fukushima, and Hiroshi Matsuo. "Taxonomy of Vectorization Patterns of Programming for FIR Image Filters Using Kernel Subsampling and New One." Applied Sciences 8, no. 8 (2018): 1235. http://dx.doi.org/10.3390/app8081235.
Full textAbstract:
This study examines vectorized programming for finite impulse response image filtering. Finite impulse response image filtering occupies a fundamental place in image processing, and has several approximated acceleration algorithms. However, no sophisticated method of acceleration exists for parameter adaptive filters or any other complex filter. For this case, simple subsampling with code optimization is a unique solution. Under the current Moore’s law, increases in central processing unit frequency have stopped. Moreover, the usage of more and more transistors is becoming insuperably complex due to power and thermal constraints. Most central processing units have multi-core architectures, complicated cache memories, and short vector processing units. This change has complicated vectorized programming. Therefore, we first organize vectorization patterns of vectorized programming to highlight the computing performance of central processing units by revisiting the general finite impulse response filtering. Furthermore, we propose a new vectorization pattern of vectorized programming and term it as loop vectorization. Moreover, these vectorization patterns mesh well with the acceleration method of subsampling of kernels for general finite impulse response filters. Experimental results reveal that the vectorization patterns are appropriate for general finite impulse response filtering. A new vectorization pattern with kernel subsampling is found to be effective for various filters. These include Gaussian range filtering, bilateral filtering, adaptive Gaussian filtering, randomly-kernel-subsampled Gaussian range filtering, randomly-kernel-subsampled bilateral filtering, and randomly-kernel-subsampled adaptive Gaussian filtering.
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Naseer, Muhammad Muzammal, and Wail A. Mousa. "Linear complementarity problem: A novel approach to design finite-impulse response wavefield extrapolation filters." GEOPHYSICS 80, no. 2 (2015): S55—S63. http://dx.doi.org/10.1190/geo2014-0244.1.
Full textAbstract:
In this paper, the problem of complex valued finite impulse response (FIR) wavefield extrapolation filter design was considered as a linear complementarity problem (LCP). LCP is not an optimization technique because there is no objective function to optimize; however, quadratic programming, one of the applications of LCP, can be used to find an optimal solution for the 1D FIR wavefield extrapolation filter. Quadratic programs are an extremely important source of applications of LCP; in fact, several algorithms for quadratic programs are based on LCP. We found that FIR wavefield extrapolation filter design problem can be written as a quadratic program and then, finally, to an equivalent LCP. There are two families of algorithms available to solve for LCP: (1) direct (pivoting-based) algorithms and (2) indirect (iterative) algorithms. In this study, the LCP has been solved using direct and indirect algorithms. To show the effectiveness of the proposed method, the SEG/EAGE salt velocity model data have been extrapolated via wavefield extrapolation FIR filters designed by our LCP approach, which resulted with practically stable seismic images.
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Raja, Dr T. Kali, B. Bharath Kumar Reddy, M. Sunny, C. Hemanth, C. Bhanu Prakash, and C. Shyam Pavan Kumar. "Design and Implementation of FIR Filters for Biomedical Applications." International Journal for Research in Applied Science and Engineering Technology 12, no. 4 (2024): 4032–40. http://dx.doi.org/10.22214/ijraset.2024.60615.
Full textAbstract:
Abstract: Digital signal processing (DSP) greatly facilitates the continuous capture, monitoring, processing, and analysis of signals in real-world applications, particularly in biomedical or wearable devices. Within DSP systems, the design of Finite Impulse Response (FIR) filters is pivotal. In scenarios demanding intricate calculations and high precision, higher-order filters are employed. Multipliers are crucial components in filter design, consuming significant chip space and introducing extra computation overhead. Designers strive to optimize multipliers to enhance performance. In this project we are going to design pipelined based FIR filter by applying pipelining concept to the FIR filter and following the previous implementations such as the FIR filter with high accuracy compared to existing method. The proposed system architectures are known to be efficient for real signal processing, offering advantages over conventional based designs. The proposed design is anticipated to yield benefits in terms of area, power consumption, and timing performance. The synthesis and simulation of the existing and proposed designs are implemented using Cadence Virtuoso.
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Jain, Ekta H., and Chandu N. Bhoyar. "Implementation of High Speed Operating FIR Filter with DA Algorithm Comparing Results with MAC Algorithm and Simple FIR Filter Result." Journal of Advance Research in Electrical & Electronics Engineering (ISSN: 2208-2395) 2, no. 2 (2015): 10–17. http://dx.doi.org/10.53555/nneee.v2i2.231.
Full textAbstract:
Recent years there has been a increasing trend to implement digital signal processing functions in Field Programmable Gate Array (FPGA). therefor, we need to put great effort in designing efficient architectures for digital signal processing functions such as FIR filters, which are widely used in audio and video signal processing, telecommunications etc. We are going to present a method for implementing high speed Finite Impulse Response (FIR) filters using MAC (MULTIPLY AND ACCUMULATE) and Distributed Arithmetic (DA) method. MAC is a conventional FIR filter In these method adders, multipliers and delay elements are used. Distributed Arithmetic (DA) has been used to implement a bit-serial scheme of a general symmetric version of an FIR filter due to its high stability and linearity by taking optimal advantage of the look-up table (LUT) based structure of FPGAs. The performance of the DA technique for FIR filter design is analyzed and the results are compared to the MAC design technique.
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Miękina, Andrzej, and Andrzej Podgórski. "Digital-Filter-Based Compensation of Case Effect in Sound-Level Meters." International Journal of Electronics and Telecommunications 56, no. 3 (2010): 263–66. http://dx.doi.org/10.2478/v10177-010-0034-z.
Full textAbstract:
Digital-Filter-Based Compensation of Case Effect in Sound-Level Meters The methodology for the design of a digital filter, which should compensate the effect of reflections and diffraction from the sound-level meter's casing (the so-called case effect), is presented. The coefficients of the family of the finite impulse response (FIR) filters, which were selected to fulfill the requirements of the compensation, were obtained in the MATLAB environment using the Remez algorithm. The frequency response of the selected designed filter are given. The chosen FIR filter was implemented in an on-chip Enhanced Filter Coprocessor of a fixed point 24-bit digital signal processor of a sound-level meter.