Dissertations / Theses: 'Firmware and software'

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Nilsson, Daniel. "System for firmware verification." Thesis, University of Kalmar, School of Communication and Design, 2009. http://urn.kb.se/resolve?urn=urn:nbn:se:hik:diva-2372.

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Software verification is an important part of software development and themost practical way to do this today is through dynamic testing. This reportexplains concepts connected to verification and testing and also presents thetesting-framework Trassel developed during the writing of this report.Constructing domain specific languages and tools by using an existinglanguage as a starting ground can be a good strategy for solving certainproblems, this was tried with Trassel where the description-language forwriting test-cases was written as a DSL using Python as the host-language.

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Webster, David D. "Hardware, software, firmware allocation of functions in systems development." Diss., Virginia Polytechnic Institute and State University, 1987. http://hdl.handle.net/10919/49907.

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The top-down development methodology is, for the most part, a well defined subject. There is, however, one area of top-down development that lacks structure and definition. The undefined topic is the hardware, software, and firmware allocation of functions. This research addresses this deficiency in top-down system development. The key objective is the restructuring of the hardware, software, and firmware process from a subjective, qualitative decision process to a structured, quantitative one. Factors that affect the hardware, software, and firmware allocation process are identified. Qualitative data on the influence of the factors on the allocation process are systematized into quantitative information. This information is used to develop a model to provide a recommendation for implementing a function in hardware, software, or firmware. The model applies three analytical methods: 1) the analytic hierarchy process, 2) the general linear model, and 3) the second order regression technique. These three methods are applied to the quantified information of the hardware, software, firmware allocation process. A computer-based software tool is developed by this research to aid in the evaluation of the hardware, software, and firmware allocation process. The software support tool assists in data collection. Future application of the support tool will enable the capture and documentation of expert knowledge on the hardware, software, and firmware allocation process. The improved knowledge base can be used to improve the model which in tum will improve the system development process, and resulting system.
Ph. D.
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Chang, Daniel Y. "A systematic software, firmware, and hardware codesign methodology for digital signal processing." Thesis, Monterey, California: Naval Postgraduate School, 2014. http://hdl.handle.net/10945/41358.

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Approved for public release; distribution is unlimited.
Creating an embedded system that meets its functional, performance, cost, and schedule goals is a software-and-hardware codesign problem, since the design of the software and hardware components influence each other. The traditional design methodology is sequential, with hardware designed first and then software. The lack of a unified and unbiased approach can lead to suboptimal design and incompatibilities across the software and hardware boundary. To solve these problems, we propose a new software/firmware/hardware codesign methodology to systematically build correct designs efficiently. This codesign methodology includes requirements development, architecture forming, software/ firmware/hardware partitioning, design-pattern mapping, new-design pattern synthesis, integration, and testing. We tested our methods on three application areas. One was a digitizer-filter architecture for ultra-high frequency signals for which we synthesized design patterns in firmware to meet high-frequency requirements. Another was a digitizer-filter architecture for low-frequency signals. A third was a hidden Markov model using dynamic programming. We implemented and tested the first application on a Tektronix/Synopsys embedded system and the second on a Pentek embedded system based on the requirements provided by the stakeholders

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Bayendang, Nganyang Paul. "Nano-satellite GPS receiver design and Implementation : a software-to-firmware approach." Thesis, Cape Peninsula University of Technology, 2015. http://hdl.handle.net/20.500.11838/1176.

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Thesis submitted in partial fulfilment of the requirements for the degree Master of Technology: Electrical Engineering in the Faculty of Engineering at the Cape Peninsula University of Technology 2015
Space-borne GPS receivers designed for nano-satellites are faced with various challenges. This research is undertaken to address the problems of inefficiency and high-costs associated with space-borne GPS receivers. The problem of inefficiency relates to poor performances of the GPS receiver in terms of the algorithmic models, execution speed, memory usage and errors proness. The problem of high-costs relates to the spacegrade hardware cost, implementation complexity, development time, as well as the manufacturing, production and the testing processes involved. The research objectives are to i) establish an efficient high-dynamics software-defined GPS receiver, ii) demonstrate a firmware approach and then iii) postulate a low-cost hardware implementation roadmap. The research methodology employed to address the problems and to attain the objectives is based-on using Matlab computing platform to i) implement a software-defined GPS receiver using free open-source GPS receiver algorithms, ii) further develop the software GPS receiver and lastly iii) convert the improved GPS receiver algorithms to firmware. The GPS receiver was successfully implemented in Matlab floating-point algorithms with a ±100kHz Doppler search bins and was used to post-process a pre-captured real GPS L1 C/A signal dataset. The pre-captured GPS signal was acquired, tracked, decoded and post-processed to extract the navigation message; use to compute the GPS receiver position, UTC date and time. Attempt to convert the entire Matlab floating-point GPS receiver algorithms to equivalent VHDL implementations failed; however, three of the Matlab floating-point algorithms (check_t.m, deg2dms.m and findUtmZone.m), were successfully converted to equivalent fixed-point formats in Matlab, Simulink and finally VHDL. These three algorithms, now created and optimised to fixed-point formats (efficient and enable implementation unto a low-cost microcontroller), set the basis for the firmware implementation. They were simulated and verified in Matlab, Simulink and VHDL using the Matlab HDL Coder workflow. Altera Quartus II software was then used to compile (synthesise, place & route and generate programming files) the three converted generic VHDL algorithms to embedded firmware, suitable for a FPGA programming. The Matlab HDL Coder workflow used in this research is feasible and can be used to accurately design and implement an improved GPS receiver and furthermore achieve it in three equivalent algorithms. This conclusion was drawn and the proposed recommendations are to address the conversion issues in the other Matlab floating-point GPS receiver algorithms that failed in the conversion process and to further develop and implement the GPS receiver as a fully functional unit, based-on the Xilinx space-grade, radiation hardened and low-cost Virtex 5QV FPGA.

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Pastore, Cesare. "Progetto software/firmware di un’interfaccia per acquisizione dati da un nodo sensore basato su microcontrollore." Bachelor's thesis, Alma Mater Studiorum - Università di Bologna, 2017. http://amslaurea.unibo.it/12957/.

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L'elaborato descrive le modalità di progettazione e programmazione di un firmware per il microcontrollore PIC16F1823 che implementa lo scambio di dati tra un nodo sensore e un personal computer, tramite i protocolli UART e SPI.

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Kaczmarczyk, Václav. "Diagnostika komunikačního protokolu ARION." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2008. http://www.nusl.cz/ntk/nusl-217256.

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The main goal of this thesis is creating diagnostic software for analyse communication via protocol ARION. That software would record and store communication data which can be analyzed late and also allows direct communication analysis in real time. Except that there will be visualization functions, for effective representation of data (stored or real-time recorded). This software can be used either by net developers or by end-users like easy visualization software. Next point is describing communication protocol ARION and create developer’s handbook. The practical part of this thesis consists of two points. The first one is developing simple device which allows communicating via protocol ARION. In second communication firmware for that device is written and tested.

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Cellarosi, Francesco Giuseppe. "Progetto software/firmware di un'interfaccia grafica per acquisizione dati da un nodo sensore basato su microcontrollore." Bachelor's thesis, Alma Mater Studiorum - Università di Bologna, 2016. http://amslaurea.unibo.it/12438/.

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Nell’ambito della progettazione di circuiti elettronici assume un ruolo fondamentale la possibilità di contare su ambienti di verifica stabili e integrati, che riescano ad interfacciare il dispositivo con sistemi a più alto livello, ad esempio un calcolatore. Questo vale in maniera ancora più significativa se consideriamo dispositivi come sensori per acquisizioni a basso consumo, che richiedono tensioni di funzionamento relativamente basse e risultano molto sensibili al rumore indotto dalla scheda di test. L'obbiettivo di questo elaborato è quello di sviluppare un'interfaccia grafica, in linguaggio Java, che permetta l’acquisizione dati da un nodo sensore collegato ad un microcontrollore. Il microcontrollore da un lato è collegato al sensore tramite interfaccia seriale SPI e da esso riceve dati, dall’altro lato è collegato tramite interfaccia seriale UART ad un calcolatore su cui viene eseguita l’applicazione oggetto della tesi, che comunica col sensore e rende disponibili all'utente i dati acquisiti attraverso un'apposita interfaccia grafica. I requisiti richiesti per l’interfaccia grafica sono i seguenti: permettere all’utente di selezionare la porta seriale con cui voler comunicare e i parametri della porta seriale scelta (baud rate, numero di bit di dato, numero di bit di stop), permettere all’utente tramite la pressione di un pulsante di inizializzare la porta seriale scelta, permettere all’utente di effettuare scrittura e lettura di dati dal sensore. L’interfaccia di comunicazione del sensore può essere vista come una memoria costituita da una serie di registri ad 8 bit accessibili in lettura e scrittura; è quindi necessario, sia in fase di lettura che scrittura, sapere a quale dei registri del sensore l’utente voglia accedere.

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Gora, Michael Arthur. "Securing Software Intellectual Property on Commodity and Legacy Embedded Systems." Thesis, Virginia Tech, 2010. http://hdl.handle.net/10919/33473.

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The proliferation of embedded systems into nearly every aspect of modern infrastructure and society has seen their deployment in such diverse roles as monitoring the power grid and processing commercial payments. Software intellectual property (SWIP) is a critical component of these increasingly complex systems and represents a significant investment to its developers. However, deeply immersed in their environment, embedded systems are difficult to secure. As a result, developers want to ensure that their SWIP is protected from being reverse engineered or stolen by unauthorized parties. Many techniques have been proposed to address the issue of SWIP protection for embedded systems. These range from secure memory components to complete shifts in processor architectures. While powerful, these approaches often require the development of systems from the ground up or the application of specialized and often expensive hardware components. As a result they are poorly suited to address the security concerns of legacy embedded systems or systems based on commodity components. This work explores the protection of SWIP on heavily constrained, legacy and commodity embedded systems. We accomplish this by evaluating a generic embedded system to identify the security concerns in the context of SWIP protection. The evaluation is applied to determine the limitations of a software only approach on a real world legacy embedded system that lacks any specialized security hardware features. We improve upon this system by developing a prototype system using only commodity components. Finally we propose a Portable Embedded Software Intellectual Property Security (PESIPS) system that can easily be deployed as a framework on both legacy and commodity systems.
Master of Science

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Nappier, Jennifer M. "An FPGA Abstraction Layer for the Space Telecommunications Radio System." Case Western Reserve University School of Graduate Studies / OhioLINK, 2009. http://rave.ohiolink.edu/etdc/view?acc_num=case1227033556.

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Persson, Marcus. "Software Development and Qualification Testing of a CubeSat X-ray Monitor." Thesis, Luleå tekniska universitet, Institutionen för system- och rymdteknik, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-76843.

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The CUBES (CUbesat x-ray Background Explorer using Scintillators) is a payload on the KTH student satellite MIST (MIniature STudent satellite) to evaluate Silicon Photo-multiplier technology and new scintillators such as GAGG (Gadolinium Aluminium Gallium Garnet, Gd3Al2Ga3O12) for future use in hard X-ray polarisation studies of Gamma-Ray Bursts. CUBES itself is designed to study the MIST in-orbit radiation environment by using a detector which is comprised of a silicon photomultiplier coupled to different scintillator materials. Three of these detectors will be mounted on the payload platform and then coupled to inputs of an Application Specific Integrated Circuit (ASIC) and connected to a Field-programmable Gate Array (FPGA) which will store and send data through the downlink on the MIST satellite to ground. This thesis covers the software development for the FPGA, together with two radiation tests of components and the preparation of these.
CUBES
MIST

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Oliva, Alessandro. "Implementazione software/firmware di un sistema di acquisizione dati per interfacciamento a matrici di sensori tramite una demo-board commerciale basata su FPGA." Bachelor's thesis, Alma Mater Studiorum - Università di Bologna, 2019.

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Nel mondo della ricerca della fisica nucleare, subnucleare e particellare diventa sempre più importante avere sistemi di acquisizione dati solidi ed affidabili da mettere a disposizione di progetti sperimentali per l'analisi di dati ottenuti con sensori monolitici. L'obiettivo di questo studio è cercare di progettare un sistema protitipale di questi sistemi di acquisizione, impiegando hardware a basso costo e altamente personalizzabile come dei System-on-Chip basati su FPGA, permettendo di lavorare sia a livello di logica programmabile che a livello di processing system, potendo raggiungere prestazioni molto alte, requisito cruciale poiché il tracking deve essere ad alta precisione sia nello spazio che nel tempo.

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Maric, Danilo. "Firmware development of a User Interface on medical devices of DIMA ITALIA Srl." Master's thesis, Alma Mater Studiorum - Università di Bologna, 2018.

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This dissertation was written based on an internship experience at Dima Italia Srl, a leader in designing, production and marketing of medical ventilators. Once these ventilators were simple machines for breathing support, manually pumping the air in and out. Today, medical ventilators are computerized machines, electronically controlled by a small embedded system. They feature a plethora of available modes and an easy-to-use graphical interface. Exactly this is the topic of the thesis: developing a firmware with graphical interface for the next ventilator, produced and sold by Dima Italia. The firmware is based on C++ language and was developed in a Qt Creator framework, ideal for developing applications with graphical interfaces on Linux-based devices. In the paper are found all the pages of the firmware, along with the logic of operation of the application. Moreover, all the details about the operation and modes of a medical ventilator are also found in the document. In the end, there's a section related to deployment of a Qt application on a device, along with the issues and bugs encountered during the development process.

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Stamenkovich, Joseph Allan. "Enhancing Trust in Autonomous Systems without Verifying Software." Thesis, Virginia Tech, 2019. http://hdl.handle.net/10919/89950.

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The complexity of the software behind autonomous systems is rapidly growing, as are the applications of what they can do. It is not unusual for the lines of code to reach the millions, which adds to the verification challenge. The machine learning algorithms involved are often "black boxes" where the precise workings are not known by the developer applying them, and their behavior is undefined when encountering an untrained scenario. With so much code, the possibility of bugs or malicious code is considerable. An approach is developed to monitor and possibly override the behavior of autonomous systems independent of the software controlling them. Application-isolated safety monitors are implemented in configurable hardware to ensure that the behavior of an autonomous system is limited to what is intended. The sensor inputs may be shared with the software, but the output from the monitors is only engaged when the system violates its prescribed behavior. For each specific rule the system is expected to follow, a monitor is present processing the relevant sensor information. The behavior is defined in linear temporal logic (LTL) and the associated monitors are implemented in a field programmable gate array (FPGA). An off-the-shelf drone is used to demonstrate the effectiveness of the monitors without any physical modifications to the drone. Upon detection of a violation, appropriate corrective actions are persistently enforced on the autonomous system.
Master of Science
Autonomous systems are surprisingly vulnerable, not just from malicious hackers, but from design errors and oversights. The lines of code required can quickly climb into the millions, and the artificial decision algorithms can be inscrutable and fully dependent upon the information they are trained on. These factors cause the verification of the core software running our autonomous cars, drones, and everything else to be prohibitively difficult by traditional means. Independent safety monitors are implemented to provide internal oversight for these autonomous systems. A semi-automatic design process efficiently creates error-free monitors from safety rules drones need to follow. These monitors remain separate and isolated from the software typically controlling the system, but use the same sensor information. They are embedded in the circuitry and act as their own small, task-specific processors watching to make sure a particular rule is not violated; otherwise, they take control of the system and force corrective behavior. The monitors are added to a consumer off-the-shelf (COTS) drone to demonstrate their effectiveness. For every rule monitored, an override is triggered when they are violated. Their effectiveness depends on reliable sensor information as with any electronic component, and the completeness of the rules detailing these monitors.

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Seshadri, Sangeetha. "Enhancing availability in large scale." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/29715.

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Thesis (Ph.D)--Computing, Georgia Institute of Technology, 2009.
Committee Chair: Ling Liu; Committee Member: Brian Cooper; Committee Member: Calton Pu; Committee Member: Douglas Blough; Committee Member: Karsten Schwan. Part of the SMARTech Electronic Thesis and Dissertation Collection.

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Mohan, Aneesha. "Agile Project Management Challenges : Analyzing and Exploring Agile Project Management Challenges from a Practitioner Perspective: A case study on HMS." Thesis, Högskolan i Halmstad, Akademin för ekonomi, teknik och naturvetenskap, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-37536.

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Crha, Adam. "Inteligentní programovatelné razítko na bázi inkoustového tisku." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2013. http://www.nusl.cz/ntk/nusl-412886.

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This thesis deals with a concept and physical prototype of an intelligent, electronically programmable stamp, based on inkjet print. The stamp is basically a small inkjet printer. The stamp can print a simple custom text and is meant to replace regular office stamps. The benefit of the proposed stamp should include cost reduction and need for multiple stamps. The theoretical concept is followed by a prototype, which is an essential part of this work.

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Savarese, Andrea. "Development of an enhanced transfer data channel for a hybrid SoC FPGA used in a DAQ system aimed at improving hadrontherapy protocols." Master's thesis, Alma Mater Studiorum - Università di Bologna, 2020. http://amslaurea.unibo.it/21044/.

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In questa tesi è presentato il lavoro svolto su un sistema di acquisizione utilizzato in un esperimento di fisica nucleare facente parte del progetto FOOT, volto ad ottenere ulteriori informazioni sulla frammentazione nucleare per migliorare i protocolli medici di adroterapia e le metodologie di radioprotezione spaziale. Il sistema si basa su una scheda Terasic DE10-Nano che monta un SoC FPGA Cyclone V. L'obiettivo principale del lavoro è stato aumentare il throughput del trasferimento dei dati acquisiti dai sensori verso la memoria principale: a tal fine è stata utilizzata direttamente la memoria RAM del processore integrato come buffer circolare temporaneo. È stata inoltre implementata l'interfaccia (realizzata dall'Università di Perugia) per la sensoristica e un controller per l'ADC della scheda. Il lavoro ha compreso sia lo sviluppo del firmware, quindi VHDL e Platform Designer, sia del software, con la scrittura di funzioni in C++ per l'interfacciamento all'hardware. È stata inoltre necessaria una modifica al Device Tree del kernel del sistema operativo Linux presente sul SoC. Il sistema è stato simulato e testato in laboratorio con esito positivo. La scheda DE10-Nano vanta un banda di trasmissione massima teorica di 60 MB/s, che però scende a circa 10 MB/s quando la scheda è installata nel sistema completo di acquisizione, limitazione dovuta a fattori esterni alla scheda, come lo stato della rete del laboratorio e l'overhead degli altri componenti. Questi risultati sono eccellenti e, inoltre, il massimo throughput di 60 MB/s supporterà future ottimizzazioni del sistema senza creare colli di bottiglia per gli altri dispositivi. Operazioni di ottimizzazione sull'infrastruttura sono tutt'ora in corso, quindi ci si aspetta un ulteriore incremento della performance in un vicino futuro.

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Červínek, David. "Zařízení pro testování malých elektrických motorů a lineárních aktuátorů." Master's thesis, Vysoké učení technické v Brně. Fakulta strojního inženýrství, 2018. http://www.nusl.cz/ntk/nusl-378725.

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Aktuální postup testování je příliš zdlouhavý a nepřesný, zároveň není měření některých vlastností motoru vůbec možné. Hlavním úkolem zařízení je zrychlení a zjednodušení procesu testování spolu s možností otestovat všechny vlastnosti motorů. Realizace zařízení začala definováním požadavků zákazníka, dalším krokem byla analýza daných požadavků a návrh zařízení. Následovala výroba a programovaní firmwaru spolu se softwarem. Výsledkem práce je funkční přístroj schopný automatického testování sedmi základních typů motorů, měření všech požadovaných funkcí spolu s novou možností měření počtu tiků enkodéru, periody FG signálu z řídící elektroniky BLDC motorů a napěťové úrovně těchto signálů. Dalšími rozšířeními jsou možnost uložení výsledků z uskutečněných testů pro možné budoucí využití a možnost vizualizace proudu motorem. Uživatel je tedy schopný otestovat velké množství motorů v kratším časovém úseku a zároveň se o testovaných motorech dozvědět mnohem více informací než doposud.

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Pejchal, Luboš. "Akviziční jednotka pro zabezpečovací techniku." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2012. http://www.nusl.cz/ntk/nusl-219850.

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Project is focused to development of security unit for security of homes, flats and other similar spaces against intruders (thieves). Design is focused to solution of hardware and firmware for security units and their control software for PC. Hardware design solve supply over ethernet PoE, backup of supply, connection securities sensors to security unit. Firmware prevents failure of units and it is communicating with sensors and PC. Software in PC provides settings of security units, deactivating of alarm and measure temperature by security unit.

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Silva, Tiago Barros da. "Desenvolvimento de uma Plataforma de Todo-o-Terreno." Master's thesis, 2015. http://hdl.handle.net/10316/40459.

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Jie-Cheng, Lin, and 林傑澄. "The Software, Firmware, Calibration, and Running of the BGO Background/Luminosity Monitor in BEAST2 for SuperKEKB Commissioning." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/5qcp7s.

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碩士
國立臺灣大學
物理學研究所
105
Beam commissioning of the SuperKEKB collider began in 2016. The Beam Ex-orcism for A STable experiment II (BEAST II) project is particularly designed to measure the beam backgrounds around the interaction point of the SuperKEKB collider for the Belle II experiment. We developed a system using undoped bismuth germanium oxide (BGO) crystals with optical ﬁber connections to a multianode photomultiplier tube and one ﬁeld-programmable gate array embedded DAQ (data acquisition) board for real-time beam radiation background monitoring. The radia-tion sensitivity of the BGO system is calibrated as 2.2E−12 ± 11.75% Gy/ADU (analog-to-digital unit) at the 700-V operation voltage with the nominal 10-m-long ﬁbers for transmission. Our γ-ray irradiation study of the BGO system shows that the BGO crystals suﬀered from radiation damage. The light yields of the BGO crystals dropped by ∼40% after receiving 4.5 krad dose in 2.5 h, which agrees with the results of the radiation hardness study we have reported. The irradiation study also proves that the BGO system is very reliable, being able to function at fairly high radiation conditions without serious saturation or other problems. Besides, the running of the BGO system in BEAST II was very successful. It has provided much useful data for the beam background study. The data that the BGO system provided will facilitate the development of the entire BEAST II project. My study contains the design of the ﬁrmware and software, the calibration of the device, the analysis of the results of the irradiation study, and the integration of the data obtained during the running in BEAST II. In this thesis, I make a comprehensive portrait of the BGO system, including the design, calibration, tests, and the results of the beam background study in BEAST II.

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Po-HsunChen and 陳柏勳. "Design and Implementation of Embedded Software and Firmware on LR-BOOK Handheld Device Based on ARM920T Architecture." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/08213501313083650589.

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碩士
國立成功大學
電機工程學系碩博士班
98
This thesis develops a listening and reading book (LR-Book) system with the Samsung ARM920T based S3C2440 fixed-point processor. The LR-Book system is designed to enhance the convenience of reading style for senior people, and it consists of two major parts: firmware design and software design. In the firmware part, to deal with the interaction between complicated application programs and hardware, we port the boot loader, file system, and the Linux 2.6.14 kernel to a prototype development board. In the software design, we integrate the speech synthesis and OCR. We modify the floating-point HTS 1.0.2 speech synthesis engine into fixed-point version. Moreover, two fixed-point mathematical operations of division and exponentiation are specially designed by the Newton-Raphson method and the least squares approximation, respectively. To overcome the problems of snapshot of rotating and shrinking in OCR, we propose a new feature extraction method that utilities the rotation invariant characteristic of a number’s center. According to the experimental results, the fixed-point speech synthesizer is faster 45 times than floating-point HTS_engine_1.0.2, and reaches real-time on the embedded device without Floating Point Units (FPUs). The recognition rate of OCR reaches 89%.

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Bastos, João Pedro Gonçalves. "Gestão remota de dispositivos." Master's thesis, 2020. http://hdl.handle.net/10773/31310.

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Devido aos avanços tecnológicos ocorridos nos sensores e nos seus controladores, estes têm atualmente mais e melhores características como capacidade de processamento, não serem cablados e o próprio custo. A sua utilização traz benefícios como, por exemplo, o aumento da eficiência da produção ou redução de emissões CO2. Ao assimilar estes benefícios, as empresas utilizam-nos em elevadas quantidades e disperses por uma grande área. Neste projeto de dissertação, foi desenvolvida uma ferramenta que procura direcionar os desafios de deployment em massa – configuração inicial, atualização de firmware e de software e ainda verificação do estado atual do dispositivo ou do agregado de sensores. A ferramenta foi ainda desenvolvida tendo em consideração ser low-cost e recorrendo a software Open-Source do working group Eclipse IoT – neste caso utilizando os serviços Bosch IoT Hub, Bosch IoT Things e Bosch IoT Rollouts (todos serviços da Bosch IoT Suite) – e o Node-RED para conectar os dispositivos, as APIs e a aplicação desenvolvida. Foram ainda utilizados como Internet of Thing Devices o Raspberry Pi e o ESP8266, utilizando protocolos de comunicação MQTT e HTTP.
Due to technological advances in sensors and their controllers, they currently have more and better features such as processing capacity, not being wired and the cost itself. Its use brings benefits such as, for example, increasing production efficiency or reducing CO2 emissions. By assimilating these benefits, companies use them in large quantities and spread over a large area. In this dissertation project, a tool was developed that seeks to address the challenges of mass deployment - initial configuration, firmware and software update and also verification of the current state of the device or sensor aggregate. The tool was also developed considering low cost and using Open-Source software from the working group Eclipse IoT - in this case using the services Bosch IoT Hub, Bosch IoT Things and Bosch IoT Rollouts (all services from Bosch IoT Suite) - and Node-RED to connect devices, APIs and the developed application. Raspberry Pi and ESP8266 were also used as Internet of Thing Devices, using MQTT and HTTP communication protocols
Mestrado em Engenharia Mecânica

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(10645670), Christopher M. Wright. "EMULATION FOR MULTIPLE INSTRUCTION SET ARCHITECTURES." Thesis, 2021.

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Abstract:

System emulation and firmware re-hosting are popular techniques to answer various security and performance related questions, such as, does a firmware contain security vulnerabilities or meet timing requirements when run on a specific hardware platform. While this motivation for emulation and binary analysis has previously been explored and reported, starting to work or research in the field is difficult. Further, doing the actual firmware re-hosting for various Instruction Set Architectures(ISA) is usually time consuming and difficult, and at times may seem impossible. To this end, I provide a comprehensive guide for the practitioner or system emulation researcher, along with various tools that work for a large number of ISAs, reducing the challenges of getting re-hosting working or porting previous work for new architectures. I layout the common challenges faced during firmware re-hosting and explain successive steps and survey common tools to overcome these challenges. I provide emulation classification techniques on five different axes, including emulator methods, system type, fidelity, emulator purpose, and control. These classifications and comparison criteria enable the practitioner to determine the appropriate tool for emulation. I use these classifications to categorize popular works in the field and present 28 common challenges faced when creating, emulating and analyzing a system, from obtaining firmware to post emulation analysis. I then introduce a HALucinator [1 ]/QEMU [2 ] tracer tool named HQTracer, a binary function matching tool PMatch, and GHALdra, an emulator that works for more than 30 different ISAs and enables High Level Emulation.

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Dissertations / Theses on the topic 'Firmware and software'

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