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Journal articles on the topic 'Fourier multiplier'

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Published: 25 January 2025

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1

Fackler, Stephan, Tuomas P. Hytönen, and Nick Lindemulder. "Weighted estimates for operator-valued Fourier multipliers." Collectanea Mathematica 71, no. 3 (December 20, 2019): 511–48. http://dx.doi.org/10.1007/s13348-019-00275-0.

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AbstractWe establish Littlewood–Paley decompositions for Muckenhoupt weights in the setting of UMD spaces. As a consequence we obtain two-weight variants of the Mikhlin multiplier theorem for operator-valued multipliers. We also show two-weight estimates for multipliers satisfying Hörmander type conditions.

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2

Monica, Kommalapati, Dereddy Anuradha, Syed Rasheed, and Barnala Shereesha. "VLSI implementation of Wallace Tree Multiplier using Ladner-Fischer Adder." International Journal of Intelligent Engineering and Systems 14, no. 1 (February 28, 2021): 22–31. http://dx.doi.org/10.22266/ijies2021.0228.03.

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Nowadays, most of the application depends on arithmetic designs such as an adder, multiplier, divider, etc. Among that, multipliers are very essential for designing industrial applications such as Finite Impulse Response, Fast Fourier Transform, Discrete cosine transform, etc. In the conventional methods, different kind of multipliers such as array multiplier, booth multiplier, bough Wooley multiplier, etc. are used. These existing multipliers are occupied more area to operate. In this study, Wallace Tree Multiplier (WTM) is implemented to overcome this problem. Two kinds of multipliers have designed in this research work for comparison. At first, existing WTM is designed with normal full adders and half adders. Next, proposed WTM is designed using Ladner Fischer Adder (LFA) to improve the hardware utilization and reduce the power consumption. Field Programmable Gate Array (FPGA) performances such as slice Look Up Table (LUT), Slice Register, Bonded Input-Output Bios (IOB) and power consumption are evaluated. The proposed WTM-LFA architecture occupied 374 slice LUT, 193 slice register, 59 bonded IOB, and 26.31W power. These FPGA performances are improved compared to conventional multipliers such asModified Retiming Serial Multiplier (MRSM), Digit Based Montgomery Multiplier (DBMM), and Fast Parallel Decimal Multiplier (FPDM).

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3

Padmanabhan, Khamalesh Kumar, Umadevi Seerengasamy, and Abraham Sudharson Ponraj. "High-Speed Grouping and Decomposition Multiplier for Binary Multiplication." Electronics 11, no. 24 (December 16, 2022): 4202. http://dx.doi.org/10.3390/electronics11244202.

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In the computation systems that are frequently utilized in Digital Signal Processing (DSP)- and Fast Fourier transform (FFT)-based applications, binary multipliers play a crucial role. Multipliers are one of the basic arithmetic components used, and they require more hardware resources and computational time. Due to this, numerous studies have been performed so as to decrease the computational time and hardware requirements. In this research study on reducing the necessary computational time, a high-speed binary multiplier known as the Grouping and Decomposition (GD) multiplieris proposed. The proposed multiplier aims to achieve competency in processing algorithms over existing multiplier architectures through a combination of the parallel grouping of partial products of the same size and the decomposition of each grouped partial-product bit, with the final summation performed using a 5:2 logic adder (5LA). The usage of parallel processing and decomposition logic reduces the number of computation steps and hence achieves a higher speed in multiplication. The front-end and physical design implementation of the proposed GD multiplier have been executed in the 180 nm technology library using the Cadence® Virtuoso and Cadence® Virtuoso Assura tools. From the front-end design of the 8 × 8 proposed GD multiplier, it was observed that the GD multiplier achieves a reduction of approximately 56% in computation time and a reduction of 53% in power–delay product when compared to existing multiplier architectures. A further reduction in the power–delay product is achieved by the physical design implementation of the proposed multiplier due to the internal routing of subsystems with the shortest-path algorithm. The proposed multiplier works better with higher-order multiplication and is suitable for high-end applications.

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4

Bloom, Walter R., and Zengfu Xu. "Fourier Multipliers For Local Hardy Spaces On Chébli-Trimèche Hypergroups." Canadian Journal of Mathematics 50, no. 5 (October 1, 1998): 897–928. http://dx.doi.org/10.4153/cjm-1998-047-9.

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AbstractIn this paper we consider Fourier multipliers on local Hardy spaces hp (0 < p ≤ 1) for Chébli-Trimèche hypergroups. The molecular characterization is investigated which allows us to prove a version of Hörmander’s multiplier theorem.

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5

Huang, Yongdong, and Fengjuan Zhu. "Characterization of matrix Fourier multipliers for A-dilation Parseval multi-wavelet frames." International Journal of Wavelets, Multiresolution and Information Processing 13, no. 06 (November 2015): 1550051. http://dx.doi.org/10.1142/s0219691315500514.

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Let [Formula: see text] be a [Formula: see text] expansive integral matrix with [Formula: see text]. This paper investigates matrix Fourier multipliers for [Formula: see text]-dilation Parseval multi-wavelet frames, which are [Formula: see text] matrices with [Formula: see text] function entries, map [Formula: see text]-dilation Parseval multi-wavelet frames of length [Formula: see text] to [Formula: see text]-dilation Parseval multi-wavelet frames of length [Formula: see text], where [Formula: see text]. We completely characterize all matrix Fourier multipliers for [Formula: see text]-dilation Parseval multi-wavelet frames and construct several numerical examples. As Fourier wavelet frame multiplier, matrix Fourier multipliers can be used to derive new [Formula: see text]-dilation Parseval multi-wavelet frames and can help us better understand the basic properties of frame theory.

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6

Suvarna, S., K. Rajesh, and T. Radhu. "A Modified Architecture for Radix-4 Booth Multiplier with Adaptive Hold Logic." International Journal of Students' Research in Technology & Management 4, no. 1 (March 10, 2016): 01–05. http://dx.doi.org/10.18510/ijsrtm.2016.411.

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High speed digital multipliers are most efficiently used in many applications such as Fourier transform, discrete cosine transforms, and digital filtering. The throughput of the multipliers is based on speed of the multiplier, and then the entire performance of the circuit depends on it. The pMOS transistor in negative bias cause negative bias temperature instability (NBTI), which increases the threshold voltage of the transistor and reduces the multiplier speed. Similarly, the nMOS transistor in positive bias cause positive bias temperature instability (PBTI).These effects reduce the transistor speed and the system may fail due to timing violations. So here a new multiplier was designed with novel adaptive hold logic (AHL) using Radix-4 Modified Booth Multiplier. By using Radix-4 Modified Booth Encoding (MBE), we can reduce the number of partial products by half. Modified booth multiplier helps to provide higher throughput with low power consumption. This can adjust the AHL circuit to reduce the performance degradation. The expected result will be reduce threshold voltage, increase throughput and speed and also reduce power. This modified multiplier design is coded by Verilog and simulated using Xilinx ISE 12.1 and implemented in Spartan 3E FPGA kit.

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7

Tharun, Kumar Reddy M., M. Bharathi, N. Padmaja, and B. Ashreetha. "A novel multiplication design based on LUT method." i-manager's Journal on Circuits and Systems 10, no. 2 (2022): 28. http://dx.doi.org/10.26634/jcir.10.2.18907.

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Every digital signal processing application performs multiplication operations. The addition and shift operations are part of multiplication operation. Many ideas have been created for computing systems with different design goals in terms of power, area, and speed. Typical architecture of these applications include digital signal processor (DSP), fast Fourier transform (FFT), and Multiply and Accumulate (MAC) unit. This paper offers a new way to increase the speed of DSP systems. This method uses four 2x2 LUT (look-up table) multipliers to demonstrate it at a 4x4 multiplier. The proposed multiplier was created using the Xilinx Vivado software and programmed in the Verilog HDL language. In addition, the delay, area, and power consumption of the proposed multiplier design differ from those of conventional multipliers. The simulation results show that, compared to typical methods, the operation consumes less power, reaching only 3.751 W compared to the conventional multiplier of 4.804 W, and shows lower latency.

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8

Lebedev, V., and A. Olevskiî. "Idempotents of Fourier multiplier algebra." Geometric and Functional Analysis 4, no. 5 (September 1994): 539–44. http://dx.doi.org/10.1007/bf01896407.

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9

Zhao, Guoping, Jiecheng Chen, and Weichao Guo. "Remarks on the Unimodular Fourier Multipliers onα-Modulation Spaces." Journal of Function Spaces 2014 (2014): 1–8. http://dx.doi.org/10.1155/2014/106267.

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We study the boundedness properties of the Fourier multiplier operatoreiμ(D)onα-modulation spacesMp,qs,α (0≤α<1)and Besov spacesBp,qs(Mp,qs,1). We improve the conditions for the boundedness of Fourier multipliers with compact supports and for the boundedness ofeiμ(D)onMp,qs,α. Ifμis a radial functionϕ(|ξ|)andϕsatisfies some size condition, we obtain the sufficient and necessary conditions for the boundedness ofeiϕ(|D|)betweenMp1,q1s1,αandMp2,q2s2,α.

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10

Hong, Sangjin, Suhwan Kim, and Wayne E. Stark. "Low-power Application-specific Parallel Array Multiplier Design for DSP Applications." VLSI Design 14, no. 3 (January 1, 2002): 287–98. http://dx.doi.org/10.1080/10655140290011087.

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Digital Signal Processing (DSP) often involves multiplications with a fixed set of coefficients. This paper presents a novel multiplier design methodology for performing these coefficient multiplications with very low power dissipation. Given bounds on the throughput and the quantization error of the computation, our approach scales the original coefficients to enable the partitioning of each multiplication into a collection of smaller multiplications with shorter critical paths. Significant energy savings are achieved by performing these multiplications in parallel with a scaled supply voltage. Dissipation is further reduced when conventional array multiplier is modified disabling the multiplier rows that do not affect the multiplication's outcome. We have used our methodology to design low-power parallel array multipliers for the Fast Fourier Transform (FFT). Simulation results show that our approach can result in significant up to 76% power savings over conventional array multipliers on 64-coefficient FFT computation.

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11

Zimmermann, Frank. "On vector-valued Fourier multiplier theorems." Studia Mathematica 93, no. 3 (1989): 201–22. http://dx.doi.org/10.4064/sm-93-3-201-222.

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12

Štrkalj, Željko, and Lutz Weis. "On operator-valued Fourier multiplier theorems." Transactions of the American Mathematical Society 359, no. 08 (March 20, 2007): 3529–47. http://dx.doi.org/10.1090/s0002-9947-07-04417-0.

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13

Юдин, В. А. "A multiplier in double Fourier series." Analysis Mathematica 17, no. 1 (March 1991): 67–73. http://dx.doi.org/10.1007/bf02055089.

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14

Brevig, Ole Fredrik, Joaquim Ortega-Cerdà, and Kristian Seip. "Idempotent Fourier multipliers acting contractively on $$H^p$$ spaces." Geometric and Functional Analysis 31, no. 6 (December 2021): 1377–413. http://dx.doi.org/10.1007/s00039-021-00586-0.

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AbstractWe describe the idempotent Fourier multipliers that act contractively on $$H^p$$ H p spaces of the d-dimensional torus $$\mathbb {T}^d$$ T d for $$d\ge 1$$ d ≥ 1 and $$1\le p \le \infty $$ 1 ≤ p ≤ ∞ . When p is not an even integer, such multipliers are just restrictions of contractive idempotent multipliers on $$L^p$$ L p spaces, which in turn can be described by suitably combining results of Rudin and Andô. When $$p=2(n+1)$$ p = 2 ( n + 1 ) , with n a positive integer, contractivity depends in an interesting geometric way on n, d, and the dimension of the set of frequencies associated with the multiplier. Our results allow us to construct a linear operator that is densely defined on $$H^p(\mathbb {T}^\infty )$$ H p ( T ∞ ) for every $$1 \le p \le \infty $$ 1 ≤ p ≤ ∞ and that extends to a bounded operator if and only if $$p=2,4,\ldots ,2(n+1)$$ p = 2 , 4 , … , 2 ( n + 1 ) .

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15

Thakur, Garima, Harsh Sohal, and Shruti Jain. "High Speed RADIX-2 Butterfly Structure Using Novel Wallace Multiplier." International Journal of Engineering & Technology 7, no. 3.4 (June 25, 2018): 213. http://dx.doi.org/10.14419/ijet.v7i3.4.16777.

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In Signal Processing applications the arithmetic units mainly consists of adders and multipliers. These arithmetic units are used in to enhance the performance of Fast Fourier Transform (FFT) Butterfly structure implementation. This paper discusses the addition and multiplication algorithms for parameters like speed, area and power. The best suited among all adders are Kogge Stone Adder (KSA) while among multipliers are Wallace multiplier(WM) which is used for the implementation of the FFT structure. Verilog coding is used for implementation of circuit and the tool used is Xilinx ISE 14.1 Design suite.

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16

Hu, Guoen, and Chin-Cheng Lin. "Weighted norm inequalities for multilinear singular integral operators and applications." Analysis and Applications 12, no. 03 (April 10, 2014): 269–91. http://dx.doi.org/10.1142/s0219530514500043.

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In this paper, weighted norm inequalities with Ap weights are established for the multilinear singular integral operators whose kernels satisfy certain Lr′-Hörmander regularity condition. As applications, we recover a weighted estimate for the multilinear Fourier multiplier obtained by Fujita and Tomita, and obtain several new weighted estimates for the multilinear Fourier multiplier as well.

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17

Chen, Jiao, Liang Huang, and Guozhen Lu. "Hörmander Fourier multiplier theorems with optimal Besov regularity on multi-parameter Hardy spaces." Forum Mathematicum 33, no. 6 (October 21, 2021): 1605–27. http://dx.doi.org/10.1515/forum-2021-0201.

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Abstract We will establish the boundedness of the Fourier multiplier operator T m ⁢ f T_{m}f on multi-parameter Hardy spaces H p ⁢ ( R n 1 × ⋯ × R n r ) H^{p}(\mathbb{R}^{n_{1}}\times\cdots\times\mathbb{R}^{n_{r}}) ( 0 < p ≤ 1 0<p\leq 1 ) when the multiplier 𝑚 is of optimal smoothness in multi-parameter Besov spaces B 2 , q ( s 1 , … , s r ) ⁢ ( R n 1 × ⋯ × R n r ) B^{{(s_{1},\ldots,s_{r})}}_{2,q}(\mathbb{R}^{n_{1}}\times\cdots\times\mathbb{R}^{n_{r}}) , where T m ⁢ f ⁢ ( x ) = ∫ R n 1 × ⋯ × R n r m ⁢ ( ξ ) ⁢ f ^ ⁢ ( ξ ) ⁢ e 2 ⁢ π ⁢ i ⁢ x ⋅ ξ ⁢ d ξ T_{m}f(x)=\int_{\mathbb{R}^{n_{1}}\times\cdots\times\mathbb{R}^{n_{r}}}m(\xi)\hat{f}(\xi)e^{2\pi ix\cdot\xi}\,d\xi for x ∈ R n 1 × ⋯ × R n r x\in{\mathbb{R}^{n_{1}}\times\cdots\times\mathbb{R}^{n_{r}}} . We will show ∥ T m ∥ H p → H p ≲ sup j 1 , … , j r ∈ Z ⁡ ∥ m j 1 , … , j r ∥ B 2 , q ( s 1 , … , s r ) , \lVert T_{m}\rVert_{H^{p}\to H^{p}}\lesssim\sup_{j_{1},\ldots,j_{r}\in\mathbb{Z}}\lVert m_{j_{1},\ldots,j_{r}}\rVert_{B^{{(s_{1},\ldots,s_{r})}}_{2,q}}, where 0 < q < ∞ 0<q<\infty and s i > n i ⁢ ( 1 p - 1 2 ) s_{i}>n_{i}\bigl{(}\frac{1}{p}-\frac{1}{2}\bigr{)} . Here we have used the notation m j 1 , … , j r ⁢ ( ξ ) = m ⁢ ( 2 j 1 ⁢ ξ 1 , … , 2 j r ⁢ ξ r ) ⁢ ψ ( 1 ) ⁢ ( ξ 1 ) ⁢ ⋯ ⁢ ψ ( r ) ⁢ ( ξ r ) , m_{j_{1},\ldots,j_{r}}(\xi)=m(2^{j_{1}}\xi_{1},\ldots,2^{j_{r}}\xi_{r})\psi^{(1)}(\xi_{1})\cdots\psi^{(r)}(\xi_{r}), and ψ ( i ) ⁢ ( ξ i ) \psi^{(i)}(\xi_{i}) is a suitable cut-off function on R n i \mathbb{R}^{n_{i}} for 1 ≤ i ≤ r 1\leq i\leq r . This multi-parameter Hörmander multiplier theorem is in the spirit of the earlier work of Baernstein and Sawyer in the one-parameter setting and sharpens our recent result of Hörmander multiplier theorem in the bi-parameter case which was established using R. Fefferman’s boundedness criterion. Because R. Fefferman’s boundedness criterion fails in the cases of three or more parameters, it is substantially more difficult to establish such Hörmander multiplier theorems in three or more parameters than in the bi-parameter case. To assume only the optimal smoothness on the multipliers, delicate and hard analysis on the sharp estimates of the square functions on arbitrary atoms are required. Our main theorems give the boundedness on the multi-parameter Hardy spaces under the smoothness assumption of the multipliers in multi-parameter Besov spaces and show the regularity conditions to be sharp.

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18

Blasco, Oscar, and Paco Villarroya. "Transference of Vector-valued Multipliers on Weighted Lp-spaces." Canadian Journal of Mathematics 65, no. 3 (June 1, 2013): 510–43. http://dx.doi.org/10.4153/cjm-2012-041-0.

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AbstractNew transference results for Fourier multiplier operators defined by regulated symbols are presented. We prove restriction and extension of multipliers between weighted Lebesgue spaces with two different weights, which belong to a class more general than periodic weights, and two different exponents of integrability that can be below one.We also develop some ad-hoc methods that apply to weights defined by the product of periodic weights with functions of power type. Our vector-valued approach allows us to extend our results to transference of maximal multipliers and provide transference of Littlewood–Paley inequalities.

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19

Udechukwu, Felix Chimezie, Mamilus Ahaneku, Vincent Chukwudi Chijindu, Dumtoochukwu Oyeka, Chineke-Ogbuka Ifeanyi Maryrose, and Douglas Amobi Amoke. "Hybridization of Cockcroft-Walton and Dickson Voltage Multipliers for Maximum Output Through Effective Frequency Dedication in Harvesting Radio Frequency Energy." Revista de Gestão Social e Ambiental 18, no. 11 (November 11, 2024): e09750. http://dx.doi.org/10.24857/rgsa.v18n11-102.

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Objective: This study investigates solutions to the challenges of limited RF energy harvesting by designing a hybridized voltage multiplier system aimed at optimizing output across a wide frequency range. Theoretical Framework: The research centers on the principles and comparative efficiencies of the Cockcroft-Walton and Dickson voltage multipliers, known for their applications in RF energy harvesting. These multipliers’ performance was analyzed theoretically to guide a hybrid design that could adaptively respond to input frequency variations. Method: Voltage multipliers were designed and simulated in Multisim, with further analysis in MATLAB. Both the Cockcroft-Walton and Dickson voltage multipliers were subjected to a constant input of 1V across frequencies from 50 Hz to 5 GHz to assess their respective efficiencies. Subsequently, a hybrid voltage multiplier system was developed, combining an 8-stage Cockcroft-Walton and an 8-stage Dickson multiplier. A fast Fourier transform (FFT) frequency-selective algorithm, implemented in MATLAB, dynamically directed input voltages to the optimal multiplier based on frequency. Results and Discussion: Results showed that the Dickson multiplier excelled in the lower frequency range (50 Hz to 1 MHz), achieving a maximum output of 14.763V at 5 kHz and 10 kHz. In contrast, the Cockcroft-Walton multiplier was more effective in the higher frequency range (1 MHz to 5 GHz), reaching a peak output of 6.671V at 5 GHz. The hybrid system demonstrated efficient, frequency-dependent voltage multiplication and aligned well with anticipated performance metrics, suggesting an improvement in RF energy harvesting across the tested frequency range. Research Implications: This work contributes to the field of RF energy harvesting by introducing a frequency-adaptive system that enhances voltage output through targeted frequency routing. The results underscore the potential for hybrid designs to overcome limitations associated with individual voltage multipliers, presenting a versatile approach to harvesting RF energy effectively across broad frequency spectra. Originality/Value: By implementing a hybrid approach with a frequency-selective algorithm, this study offers an innovative solution for frequency-dependent RF energy harvesting. The findings provide a foundation for future research into adaptable energy harvesting systems that optimize voltage output across diverse frequencies, with practical implications for RF-powered devices and wireless energy transfer applications.

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20

Miyachi, Akihiko, and Naohito Tomita. "Boundedness criterion for bilinear Fourier multiplier operators." Tohoku Mathematical Journal 66, no. 1 (2014): 55–76. http://dx.doi.org/10.2748/tmj/1396875662.

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21

Rozendaal, Jan, and Mark Veraar. "Fourier Multiplier Theorems Involving Type and Cotype." Journal of Fourier Analysis and Applications 24, no. 2 (March 1, 2017): 583–619. http://dx.doi.org/10.1007/s00041-017-9532-z.

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22

Zhang, AnQi, XueMei Wang, and ShengMei Zhao. "The multiplier based on quantum Fourier transform." CCF Transactions on High Performance Computing 2, no. 3 (July 20, 2020): 221–27. http://dx.doi.org/10.1007/s42514-020-00040-x.

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23

Hytönen, Tuomas. "Fourier embeddings and Mihlin-type multiplier theorems." Mathematische Nachrichten 274-275, no. 1 (October 2004): 74–103. http://dx.doi.org/10.1002/mana.200310203.

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24

Park, Bae Jun. "Fourier multiplier theorems for Triebel–Lizorkin spaces." Mathematische Zeitschrift 293, no. 1-2 (November 12, 2018): 221–58. http://dx.doi.org/10.1007/s00209-018-2180-4.

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25

Et. al., C. Padma,. "Energy Efficient Floating Point Fft/Ifft Processor For Mimo-Ofdm Applications." Turkish Journal of Computer and Mathematics Education (TURCOMAT) 12, no. 10 (April 28, 2021): 5248–56. http://dx.doi.org/10.17762/turcomat.v12i10.5319.

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There are several methods to accomplish Fast Fourier Transform and Inverse Fast Fourier Transform processor for multiple inputs multiple output-orthogonal frequency division multiplexing applications. It requires high performance and low power implementation methodologies for reducing the hardware complexity and cost. In conventional fixed point arithmetic calculation is complex to utilize because the dynamic range of computations must be limited in order to overcome overflow and under flow problems. This paper presents floating point arithmetic optimization technique to implement radix-2 butterfly structures for the reduction of complex multipliers presented. Implementations of 32 bit floating point multiplier and floating point adder are presented by using single precision and compare the synthesis results with conventional system. In order to reduce the error we used floating point arithmetic for the butterfly structure. Energy efficient multiplier based on modified booth algorithm is used in radix-2 butterflies. By adopting this architecture the FFT/IFFT implementation using Xilinx FPGA Vertex-7 will improve the 25% logic utilization and the reduction in space utilization. Using arithmetic reduction the power delay product for radix 2 butterfly is reduced by 2.5% compared to normal implementation.

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Bojtsun, L. G., and S. V. Kocherga. "Absolute summation of Fourier integrals with multiplier by G.F. Voronoi method." Researches in Mathematics 16 (February 7, 2021): 35. http://dx.doi.org/10.15421/240805.

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We provide the theorem that is connected with functional method of G.F. Voronoi. We establish sufficient conditions for a function that generates the summation method of G.F. Voronoi, on function-multiplier, and on function $f(t)$, under which the Fourier integral of this function with multiplier is absolutely summable by the functional method of G.F. Voronoi.

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27

Si, Zengyan. "Some Weighted Estimates for Multilinear Fourier Multiplier Operators." Abstract and Applied Analysis 2013 (2013): 1–10. http://dx.doi.org/10.1155/2013/987205.

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We first provide a weighted Fourier multiplier theorem for multilinear operators which extends Theorem 1.2 in Fujita and Tomita (2012) by usingLr-based Sobolev spaces (1<r≤2). Then, by using a different method, we obtain a result parallel to Theorem 6.2 which is an improvement of Theorem 1.2 under assumption (i) in Fujita and Tomita (2012).

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28

Wang, Songbai, Yinsheng Jiang, and Peng Li. "Weighted Morrey Estimates for Multilinear Fourier Multiplier Operators." Abstract and Applied Analysis 2014 (2014): 1–10. http://dx.doi.org/10.1155/2014/570450.

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The multilinear Fourier multipliers and their commutators with Sobolev regularity are studied. The purpose of this paper is to establish that these operators are bounded on certain product Morrey spacesLp,k(ℝn). Based on the boundedness of these operators fromLp1(ω1)×⋯×Lpm(ωm)toLp(∏j=1m‍ωp/pj), we obtained that they are also bounded fromLp1,k(ω1)×⋯×Lpm,k(ωm)toLp,k(∏j=1m‍ωp/pj), with0<k<1,1<pj<∞,1/p=1/p1+⋯+1/pm, andωj∈Apj,j=1,…,m.

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29

Ciaurri, Óscar, and Krzysztof Stempak. "Transplantation and multiplier theorems for Fourier-Bessel expansions." Transactions of the American Mathematical Society 358, no. 10 (February 20, 2006): 4441–65. http://dx.doi.org/10.1090/s0002-9947-06-03885-2.

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30

Weisz, Ferenc. "Multiplier Theorems for the Short-Time Fourier Transform." Integral Equations and Operator Theory 60, no. 1 (November 14, 2007): 133–49. http://dx.doi.org/10.1007/s00020-007-1546-5.

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31

Bu, Shangquan, and Jin-Myong Kim. "OPERATOR-VALUED FOURIER MULTIPLIER THEOREMS ON TRIEBEL SPACES." Acta Mathematica Scientia 25, no. 4 (October 2005): 599–609. http://dx.doi.org/10.1016/s0252-9602(17)30199-6.

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32

Hu, Guoen. "Weighted norm inequalities for bilinear Fourier multiplier operators." Mathematical Inequalities & Applications, no. 4 (2015): 1409–25. http://dx.doi.org/10.7153/mia-18-110.

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33

Liu, Yin, and Ji an Zhao. "Bilinear Fourier multiplier operators on variable Triebel spaces." Mathematical Inequalities & Applications, no. 2 (2019): 677–90. http://dx.doi.org/10.7153/mia-2019-22-46.

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34

Hu, Guoen, and Wentan Yi. "Estimates for the commutator of bilinear Fourier multiplier." Czechoslovak Mathematical Journal 63, no. 4 (December 2013): 1113–34. http://dx.doi.org/10.1007/s10587-013-0074-5.

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35

Hu, Guoen. "Weighted compact commutator of bilinear Fourier multiplier operator." Chinese Annals of Mathematics, Series B 38, no. 3 (May 2017): 795–814. http://dx.doi.org/10.1007/s11401-017-1096-3.

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36

Young, Wo-Sang. "Littlewood-Paley and Multiplier Theorems for Vilenkin-Fourier Series." Canadian Journal of Mathematics 46, no. 3 (June 1, 1994): 662–72. http://dx.doi.org/10.4153/cjm-1994-036-3.

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AbstractLet S2jf be the 2j-th partial sum of the Vilenkin-Fourier series of f ∊ L1, and set S2-1f = 0. For , we show that the ratiois contained between two bounds (independent of f) . From this we obtain the Marcinkiewicz multiplier theorem for Vilenkin-Fourier series.

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37

Arendt, Wolfgang, and Shangquan Bu. "Operator-valued multiplier theorems characterizing Hilbert spaces." Journal of the Australian Mathematical Society 77, no. 2 (October 2004): 175–84. http://dx.doi.org/10.1017/s1446788700013550.

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Duoandikoetxea, Javier, and Ana Vargas. "Maximal operators associated to Fourier multipliers with an arbitrary set of parameters." Proceedings of the Royal Society of Edinburgh: Section A Mathematics 128, no. 4 (1998): 683–96. http://dx.doi.org/10.1017/s0308210500021715.

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We present here some general results of boundedness on LP for maximal operators of the form , where E is a subset of the positive real numbers and Tt is a dilation of a fixed multiplier operator. The range of values of p depends only on the decay at infinity of the multiplier and the Minkowski dimension of E. For the case being the maximal operator associated to a convex body, we prove that the norm of the operator is independent of the body.

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39

Cipriani, Alessandra, Jan de Graaff, and Wioletta M. Ruszel. "Scaling Limits in Divisible Sandpiles: A Fourier Multiplier Approach." Journal of Theoretical Probability 33, no. 4 (November 7, 2019): 2061–88. http://dx.doi.org/10.1007/s10959-019-00952-7.

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Abstract In this paper we investigate scaling limits of the odometer in divisible sandpiles on d-dimensional tori following up the works of Chiarini et al. (Odometer of long-range sandpiles in the torus: mean behaviour and scaling limits, 2018), Cipriani et al. (Probab Theory Relat Fields 172:829–868, 2017; Stoch Process Appl 128(9):3054–3081, 2018). Relaxing the assumption of independence of the weights of the divisible sandpile, we generate generalized Gaussian fields in the limit by specifying the Fourier multiplier of their covariance kernel. In particular, using a Fourier multiplier approach, we can recover fractional Gaussian fields of the form $$(-\varDelta )^{-s/2} W$$ ( - Δ ) - s / 2 W for $$s>2$$ s > 2 and W a spatial white noise on the d-dimensional unit torus.

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Arendt, Wolfgang, and Shangquan Bu. "OPERATOR-VALUED FOURIER MULTIPLIERS ON PERIODIC BESOV SPACES AND APPLICATIONS." Proceedings of the Edinburgh Mathematical Society 47, no. 1 (February 2004): 15–33. http://dx.doi.org/10.1017/s0013091502000378.

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AbstractLet $1\leq p,q\leq\infty$, $s\in\mathbb{R}$ and let $X$ be a Banach space. We show that the analogue of Marcinkiewicz’s Fourier multiplier theorem on $L^p(\mathbb{T})$ holds for the Besov space $B_{p,q}^s(\mathbb{T};X)$ if and only if $1\ltp\lt\infty$ and $X$ is a UMD-space. Introducing stronger conditions we obtain a periodic Fourier multiplier theorem which is valid without restriction on the indices or the space (which is analogous to Amann’s result (Math. Nachr.186 (1997), 5–56) on the real line). It is used to characterize maximal regularity of periodic Cauchy problems.AMS 2000 Mathematics subject classification: Primary 47D06; 42A45

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41

Asmar, Nakhle, Florence Newberger, and Saleem Watson. "A multiplier theorem for Fourier series in several variables." Colloquium Mathematicum 106, no. 2 (2006): 221–30. http://dx.doi.org/10.4064/cm106-2-4.

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HU, GuoEn. "Weighted norm inequalities for the multilinear Fourier multiplier operators." SCIENTIA SINICA Mathematica 44, no. 5 (May 1, 2014): 477–96. http://dx.doi.org/10.1360/n012013-00106.

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Hu, Guoen. "COMPACTNESS OF THE COMMUTATOR OF BILINEAR FOURIER MULTIPLIER OPERATOR." Taiwanese Journal of Mathematics 18, no. 2 (March 2014): 661–75. http://dx.doi.org/10.11650/tjm.18.2014.3676.

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44

Jiao, Yulan. "A weighted norm inequality for multilinear Fourier multiplier operator." Mathematical Inequalities & Applications, no. 3 (2014): 899–912. http://dx.doi.org/10.7153/mia-17-65.

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45

Weis, Lutz. "Operator–valued Fourier multiplier theorems and maximal $L_p$-regularity." Mathematische Annalen 319, no. 4 (April 2001): 735–58. http://dx.doi.org/10.1007/pl00004457.

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Wojciechowski, Michał. "A Necessary Condition for Multipliers of Weak Type (1, 1)." Canadian Mathematical Bulletin 44, no. 1 (March 1, 2001): 121–25. http://dx.doi.org/10.4153/cmb-2001-015-8.

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47

Maryani, Sri, Dede Bagus Suhada, and Bambang Hendriya Guswanto. "Partial Fourier Transform Method for Solution Formula of Stokes Equation with Robin Boundary Condition in Half-space." JTAM (Jurnal Teori dan Aplikasi Matematika) 8, no. 1 (January 19, 2024): 25. http://dx.doi.org/10.31764/jtam.v8i1.16917.

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The area of applied science known as fluid dynamics studied how gases and liquids moved. The motion of the fluid in the liquid and vapour phases is described by a special system of partial differential equations. The research purpose of this article investigated the solution formula of incompressible Stokes equation with the Robin boundary condition in half-space case. The solution formula for Stokes equation was calculated using the partial Fourier transform. This calculation was carried out over the Weis’s multipliers theorem. Our calculation showed that the solution formula of Stokes equation with Robin boundary condition in half-space for velocity and pressure were contained multipliers as due to work Shibata & Shimada. Due to our consideration of the half-space situation, the partial Fourier transform approach is the most appropriate one to use to get the velocity and pressure for the Stokes equation with Robin boundary condition. Furthermore, research methods in this article, in the first stage, we use the resolvent problem of the model. Secondly, we apply the partial Fourier transform to the model problem and finally, we use inverse partial Fourier transform to get the solution formula of the incompressible type of Stokes equation for velocity and pressure. This result indicates that Weis' multiplier theorem also allows us to find the local well-posedness of the model problem in addition to the maximal Lp-Lq regularity class (Gerard-Varet et al., 2020).

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48

Moussai, Madani. "On the Fourier Multipliers of the Space 𝐿𝑝." gmj 12, no. 2 (June 2005): 331–36. http://dx.doi.org/10.1515/gmj.2005.331.

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Abstract We prove that the function 𝑚(ξ) = ψ (ξ) 𝑒𝑖ϕ(ξ) is not the Fourier multiplier of the space 𝐿𝑝, where the real phase ϕ has the property ϕ″ ≥ 𝑐 > 0, the amplitude ψ vanishes near the origin, ψ (ξ) = 𝑂(|ξ|–2) as ξ → ∞, and ψ′ ∈ 𝐿1.

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Xiao, Jinsen, Jianxun He, and Yingzhu Wu. "Mikhlin-Type Hp Multiplier Theorem on the Heisenberg Group." Axioms 13, no. 11 (October 29, 2024): 745. http://dx.doi.org/10.3390/axioms13110745.

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The classical Fourier multiplier theorem by Mikhlin in Hardy spaces is extended to the Heisenberg group. The proof relies on the theories of atom and molecule functions and the property of special Hermite functions. The main result is a Mikhlin-type Hp multiplier theorem on the Heisenberg group. If an operator-valued function M(λ) satisfies certain conditions, the right-multiplier operator TM is bounded on the Hardy space Hp(Hn), which is defined in terms of maximal functions, and elements can be decomposed into atoms or molecules. The paper also discusses the relationship with other results and open problems.

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Forrest, Brian E., and Volker Runde. "Norm One Idempotent cb-Multipliers with Applications to the Fourier Algebra in the cb-Multiplier Norm." Canadian Mathematical Bulletin 54, no. 4 (December 1, 2011): 654–62. http://dx.doi.org/10.4153/cmb-2011-098-0.

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AbstractFor a locally compact group G, let A(G) be its Fourier algebra, let McbA(G) denote the completely bounded multipliers of A(G), and let AMcb (G) stand for the closure of A(G) in McbA(G). We characterize the norm one idempotents in McbA(G): the indicator function of a set E ⊂ G is a norm one idempotent in McbA(G) if and only if E is a coset of an open subgroup of G. As applications, we describe the closed ideals of AMcb (G) with an approximate identity bounded by 1, and we characterize those G for which AMcb (G) is 1-amenable in the sense of B. E. Johnson. (We can even slightly relax the norm bounds.)

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