Relevant bibliographies by topics / FPAA/FPGA

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  1. Journal articles
  2. Dissertations / Theses
  3. Book chapters
  4. Conference papers

Academic literature on the topic 'FPAA/FPGA'

Author: Grafiati
Published: 3 June 2025
Last updated: 19 July 2025

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Journal articles on the topic "FPAA/FPGA"

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Hasler, Jennifer. "The Potential of SoC FPAAs for Emerging Ultra-Low-Power Machine Learning." Journal of Low Power Electronics and Applications 12, no. 2 (2022): 33. http://dx.doi.org/10.3390/jlpea12020033.

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Large-scale field-programmable analog arrays (FPAA) have the potential to handle machine inference and learning applications with significantly low energy requirements, potentially alleviating the high cost of these processes today, even in cloud-based systems. FPAA devices enable embedded machine learning, one form of physical mixed-signal computing, enabling machine learning and inference on low-power embedded platforms, particularly edge platforms. This discussion reviews the current capabilities of large-scale field-programmable analog arrays (FPAA), as well as considering the future potential of these SoC FPAA devices, including questions that enable ubiquitous use of FPAA devices similar to FPGA devices. Today’s FPAA devices include integrated analog and digital fabric, as well as specialized processors and infrastructure, becoming a platform of mixed-signal development and analog-enabled computing. We address and show that next-generation FPAAs can handle the required load of 10,000–10,000,000,000 PMAC, required for present and future large fielded applications, at orders of magnitude of lower energy levels than those expected by current technology, motivating the need to develop these new generations of FPAA devices.
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KILIC, RECAI. "UNIVERSAL PROGRAMMABLE CHAOS GENERATOR: DESIGN AND IMPLEMENTATION ISSUES." International Journal of Bifurcation and Chaos 20, no. 02 (2010): 419–35. http://dx.doi.org/10.1142/s021812741002551x.

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Chaos generators are generally designed and implemented by using analog circuit design techniques. Analog implementations require a variety of circuitry that comprises different passive and active electronic components like individual op-amps, comparators, analog multipliers, trigonometric function generators. Anyone who wants to experimentally investigate different structurally chaotic systems has to provide a significant amount of circuit hardware. This process may be hard and time consuming. At this stage, the question to be asked: Is there a unique analog component for implementing a universal analog chaos generator which is capable of generating the chaotic signals of nearly all analog-based chaotic systems. Fortunately, we can now answer this question positively. This analog device is FPAA (Field-Programmable Analog Array). FPAA is the analog equivalent of the FPGA (Field-Programmable Gate Array) used as programmable device in digital signal processing. FPAA is a programmable device for implementing a rich variety of systems including analog functions via dynamic reconfiguration. FPAA can be configured in real time which allows the designers to modify the design or make completely new design in real time. In this paper, we aim to show how FPAA device can be used as universal device for design and implementation of programmable analog chaos generators. For this purpose, we will introduce three FPAA-based design examples: autonomous Chua's circuit, nonautonomous MLC (Murali–Lakshmanan–Chua) circuit and a chaotic system based on a PLL (Phase Locked Loop) model.
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Hejn, Konrad, Jerzy Jędrachowicz, and Antoni Leśniewski. "B17: Oversampling Delta-Sigma converter implementation in FPAA and FPGA." IFAC Proceedings Volumes 37, no. 20 (2004): 257–62. http://dx.doi.org/10.1016/s1474-6670(17)30607-9.

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Budikarso, Anang, Kukuh Setyadjit, Aripin Aripin, et al. "Rancang Bangun Sistem Spread-Spectrum dan Analisa Simulasi Kanal Multipath berbasis Fpga (Field Programmable Gate Array) Menggunakan Pseudo Noise Gold Code." El Sains Jurnal Elektro 4, no. 1 (2022): 23–30. http://dx.doi.org/10.30996/elsains.v4i1.6793.

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Dengan berkembangnya teknologi IC terprogram yang semakin canggih dan modern seperti FPGA, FPAA dan yang lainnya, maka pada tesis kali ini dibuat suatu modul sistem spread-spektrum dengan FPGA sebagai implementatornya.
 Dalam penelitian ini dilakukan rancang bangun sistem spread spectrum dan simulasi kanal multipath berbasis FPGA (Field Programmable Gate Array), sebagai kode acak semu dipilih jenis kode Gold. Untuk melihat kinerja sistem tersebut dilakukan uji coba dan pengukuran hasil terhadap pengaturan pen-delay-an pada lintasan jamaknya.
 Dari hasil percobaan yang dilakukan sifat kanal frekwensi selektif muncul saat rms delay spreadnya 215,723 nS dengan time symbol 125 nS, perbedaan yang agak jauh dikarenakan keterbatasan pembuatan delay dalam skala kecil.
 Modul peralatan yang dibuat dapat digunakan sebagai simulasi secara hardware untuk membantu praktikum spread-spectrum, dimana untuk melihat sinyal-sinyal spreading-despreading, sinyal-sinyal PN serta simulasi kanal multipath spread spectrum.
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Felgueiras, Manuel Carlos, Dinis Areias, Andre Fidalgo, Clovis Petry, and Gustavo Alves. "Using Remote Lab for Enhancing E-Learning on FPAAs." International Journal of Online Engineering (iJOE) 12, no. 04 (2016): 58. http://dx.doi.org/10.3991/ijoe.v12i04.5230.

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Analog and digital electronic subjects are part of the electronic engineer degree but its taught is not easy because they are founded in opposite methodologies. The electronic design in the digital field is centered in the use of microprocessor and FPGA based circuits using high level programing/configuring languages. The counterpart analog design is traditionally based in the use of elementary components associated with macroblocks such operational amplifiers in order to built-up the wanted mission circuit. Some few components, as the FPAA, are analogically configurable in a similar manner already used with the FPGA. However the use of this kind of components is not straightforward once is necessary acquire some concepts not taught in the traditionally analog electronic classes. The current work present an innovative remote lab to support teaching of the FPAAs.
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krishna, Mr P. V. Murali, and Kantumajji Navyasri. "ACCELERATING HIGH-PERFORMANCE VOLTAGE SOURCE INVERTER PROTOTYPING WITH FPGA IMPLEMENTATION." INTERANTIONAL JOURNAL OF SCIENTIFIC RESEARCH IN ENGINEERING AND MANAGEMENT 07, no. 12 (2023): 1–10. http://dx.doi.org/10.55041/ijsrem27818.

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This paper highlights the advantages of FPGA-based rapid prototyping as a powerful tool for accelerating the development cycle of high-performance Voltage Source Inverters. By providing a flexible and efficient platform for algorithm testing, hardware evaluation, and performance optimization, it contributes to advancements in power electronics and facilitates the deployment of robust VSIs in diverse application domains. Through extensive experimentation, we demonstrate the effectiveness of the FPGA-based rapid prototyping platform in achieving high- performance VSI control. The FPGA's real-time capabilities facilitate swift algorithm development and testing, ensuring robustness and reliability. Moreover, the platform supports real-time hardware-level fault analysis and mitigation strategies, enhancing the overall resilience of the VSI. This paper presents an innovative approach utilizing Field- Programmable Gate Arrays (FPGAs) for rapid prototyping of high-performance VSIs. This abstract outlines the core objectives, methods, and potential contributions of a project aimed at expediting the development of high-performance Voltage Source Invertersthrough FPGA-based prototyping. KEYWORDS FPGA (Field-Programmable Gate Array), Voltage Source Inverter, High-Performance Prototyping, Power Electronics, Hardware-in-the-Loop (HIL), Rapid Prototyping, Real-Time Simulation, Control Algorithms, Digital Signal Processing (DSP),Power Conversion, Description Language (HDL),System-on-Chip (SoC),Field-Programmable Analog Array (FPAA),Power Quality, Grid Integration
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Zayer, Salam, Marwah Muneer Al-bayati, György Györök, and Ahmed Bouzid. "Pragmatic Implementation of the Front-End of an N-bit/V ADC based on FPGA and FPAA." Carpathian Journal of Electronic and Computer Engineering 13, no. 2 (2020): 12–15. http://dx.doi.org/10.2478/cjece-2020-0008.

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Abstract Reconfigurability has made it possible, among other benefits, to replace traditional discrete components with chips, whose internal components can be programmed in this case FPAAs (Field Programmable Analog Arrays). This paper presents a design and implementation of FPAA of the analog front end dedicated to a new ADC architecture called “N-bit/V”. After validation of the algorithm in simulation, the experimentation results show that the obtained reconfigurable circuit can replace the traditional discrete components-based circuits.
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Mayacela, Margarita, Leonardo Rentería, Luis Contreras, and Santiago Medina. "Comparative Analysis of Reconfigurable Platforms for Memristor Emulation." Materials 15, no. 13 (2022): 4487. http://dx.doi.org/10.3390/ma15134487.

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The memristor is the fourth fundamental element in the electronic circuit field, whose memory and resistance properties make it unique. Although there are no electronic solutions based on the memristor, interest in application development has increased significantly. Nevertheless, there are only numerical Matlab or Spice models that can be used for simulating memristor systems, and designing is limited to using memristor emulators only. A memristor emulator is an electronic circuit that mimics a memristor. In this way, a research approach is to build discrete-component emulators of memristors for its study without using the actual models. In this work, two reconfigurable hardware architectures have been proposed for use in the prototyping of a non-linearity memristor emulator: the FPAA (Field Programing Analog Arrays) and the FPGA (Field Programming Gate Array). The easy programming and reprogramming of the first architecture and the performance, high area density, and parallelism of the second one allow the implementation of this type of system. In addition, a detailed comparison is shown to underline the main differences between the two approaches. These platforms could be used in more complex analog and/or digital systems, such as neural networks, CNN, digital circuits, etc.
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Mallan, Vasudev S., Anitha Gopi, Chithra Reghuvaran, Aswani A. Radhakrishnan, and Alex James. "Rapid prototyping mixed-signal development kit for tactile neural computing." Frontiers in Neuroscience 17 (February 7, 2023). http://dx.doi.org/10.3389/fnins.2023.1118615.

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Intelligent sensor systems are essential for building modern Internet of Things applications. Embedding intelligence within or near sensors provides a strong case for analog neural computing. However, rapid prototyping of analog or mixed signal spiking neural computing is a non-trivial and time-consuming task. We introduce mixed-mode neural computing arrays for near-sensor-intelligent computing implemented with Field-Programmable Analog Arrays (FPAA) and Field-Programmable Gate Arrays (FPGA). The combinations of FPAA and FPGA pipelines ensure rapid prototyping and design optimization before finalizing the on-chip implementations. The proposed approach architecture ensures a scalable neural network testing framework along with sensor integration. The experimental set up of the proposed tactile sensing system in demonstrated. The initial simulations are carried out in SPICE, and the real-time implementation is validated on FPAA and FPGA hardware.
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"BIST for Reconfigurable System on Chip (SOC) for Micro-Vibration Measurement." International Journal of Engineering and Advanced Technology 8, no. 6S2 (2019): 67–70. http://dx.doi.org/10.35940/ijeat.f1090.0886s219.

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This paper presents methodology for testing mixed signal circuits in the SOC configured for micro vibration measurement. The SOC for micro vibration measurement contains a Bi morph sensor and front end electronics containing an amplifier, peak detector interface with A/D converter and memory. The amplifier is tested by applying triangular stimuli input generated by Test Pattern Generator (TPG) configured in the FPGA. The peak detector is tested by applying a test pulses generated by test generator system. The outputs of the test circuit are analyzed by output response analyzer (ORA) in the FPGA. The required hardware for testing analog as well as digital circuits of the SOC are configured by the on chip portion of FPGA and FPAA. The whole SOC can be tested by applying stimuli generated in TPG and checking the output by comparing patterns stored in memory with reference pattern using ORA. Simulation results are reported for counter and test ADC
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Dissertations / Theses on the topic "FPAA/FPGA"

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Mou, Pedro Antonio. "General purpose bioelectric signals acquisition platform combining FPGA and FPAA = 結合FPGA及FPAA的通用生物電信號採集平台". Thesis, University of Macau, 2010. http://umaclib3.umac.mo/record=b2182896.

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Schüler, Erik. "Uma interface para o aumento da faixa de freqüências de operação de FPAAS." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2004. http://hdl.handle.net/10183/6466.

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O crescente avanço nas mais diversas áreas da eletrônica, desde instrumentação em baixa freqüência até telecomunicações operando em freqüências muito elevadas, e a necessidade de soluções baratas em curto espaço de tempo que acompanhem a demanda de mercado, torna a procura por circuitos programáveis, tanto digitais como analógicos, um ponto comum em diversas pesquisas. Os dispositivos digitais programáveis, que têm como grande representante os Field Programmable Gate Arrays (FPGAs), vêm apresentando um elevado e contínuo crescimento em termos de complexidade, desempenho e número de transistores integrados, já há várias décadas. O desenvolvimento de dispositivos analógicos programáveis (Field Programmable Analog Arrays – FPAAs), entretanto, esbarra em dois pontos fundamentais que tornam sua evolução um tanto latente: a estreita largura de banda alcançada, conseqüência da necessidade de um grande número de chaves de programação e reconfiguração, e a elevada área consumida por componentes analógicos como resistores e capacitores, quando integrados em processos VLSI Este trabalho apresenta uma proposta para aumentar a faixa de freqüências das aplicações passíveis de serem utilizadas tanto em FPAAs comerciais quanto em outros FPAAs, através da utilização de uma interface de translação e seleção de sinais, mantendo características de programabilidade do FPAA em questão, sem aumentar em muito sua potência consumida. A proposta, a simulação e a implementação da interface são apresentadas ao longo desta dissertação. Resultados de simulação e resultados práticos obtidos comprovam a eficácia da proposta.<br>The increasing advance in several areas of electronics, from low frequency instrumentation to telecommunications operating in very high frequencies, and the necessity of low cost solutions in a short space of time, following the demand of the market, makes the search for digital and analog programmable circuits a common point in many researches. Digital programmable devices, which have as a great representant Field Programmable Gate Arrays (FPGAs) devices, have shown a high and continuous increase in terms of complexity, performance and number of integrated transistors for many decades. The development of analog programmable devices (Field Programmable Analog Arrays – FPAAs), however, stops in two fundamental points that make their evolution slow: the narrow bandwidth reached, consequence of the necessity of a great number of programming and configuration switches, and the huge area occupied for analog components as resistors and capacitors, when integrated in a VLSI process. This work presents a proposal to increase the frequency range of the applications that can be used also with commercials FPAAs and others FPAAs, through the use of an interface to translate and select signals, keeping the programmability characteristics of the FPAA, without increasing so much the dissipated power. The proposal, simulation and implementation of the interface are presented in this dissertation. The simulations and practical results obtained show the proposal efficiency.
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Book chapters on the topic "FPAA/FPGA"

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Chiaberge, M., S. Carabelli, P. Rolando, et al. "A DSP/FPGA/FPAA Based Approach for Electronic Embedded Instrumentation." In Microelectronics Education. Springer Netherlands, 2004. http://dx.doi.org/10.1007/978-1-4020-2651-5_9.

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Mou, Pedro Antonio, Chang Hao Chen, Sio Hang Pun, Peng Un Mak, and Mang I. Vai. "Portable Intelligent Bioelectric Signals Acquisition System with an Adaptive Frontend Implemented Using FPGA and FPAA." In IFMBE Proceedings. Springer Berlin Heidelberg, 2009. http://dx.doi.org/10.1007/978-3-642-03904-1_97.

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Conference papers on the topic "FPAA/FPGA"

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Kalupahana, Ayanga, Nisal Hemadasa, Nipun Wijerathne, Anuranga Ranasinghe, and Ajith Pasqual. "FPAA and FPGA based universal sensor node design." In 2017 Eleventh International Conference on Sensing Technology (ICST). IEEE, 2017. http://dx.doi.org/10.1109/icsenst.2017.8304452.

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Ganesan, Sreelakshmi P., and Ranga Vemuri. "FPGA/FPAA-based rapid prototyping environment for mixed signal systems." In Photonics East '99, edited by John Schewel, Peter M. Athanas, Steven A. Guccione, Stefan Ludwig, and John T. McHenry. SPIE, 1999. http://dx.doi.org/10.1117/12.359542.

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Gunay, Enis, and Kenan Altun. "BER analysis and application in FPGA and FPAA based communication systems." In 2017 International Artificial Intelligence and Data Processing Symposium (IDAP). IEEE, 2017. http://dx.doi.org/10.1109/idap.2017.8090227.

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Dorie, L., and O. Hammami. "A combined FPAA-FPGA platform for mixed-signals design space exploration." In 2005 12th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2005). IEEE, 2005. http://dx.doi.org/10.1109/icecs.2005.4633560.

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Selow, Roberto, Heitor S. Lopes, and Carlos R. Erig Lima. "A comparison of FPGA and FPAA technologies for a signal processing application." In 2009 International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2009. http://dx.doi.org/10.1109/fpl.2009.5272306.

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Morales, Diego P., Antonio Garcia, Alberto J. Palma, and Antonio Martinez-Olmos. "Merging FPGA and FPAA Reconfiguration Capabilities for IEEE 1451.4 Compliant Smart Sensor Applications." In 2007 3rd Southern Conference on Programmable Logic. IEEE, 2007. http://dx.doi.org/10.1109/spl.2007.371753.

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Vinayakamoorthy, Kumaresan, P. Eswaran, S. Sivasankar, and J. Neelakandan. "Design and implementation of ASIC for weather monitoring application using FPAA and FPGA." In 2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT). IEEE, 2014. http://dx.doi.org/10.1109/iccicct.2014.6992988.

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Chen, Xuhai, and Min Du. "Automatic gain control for multi-channel electrochemical detection system combining FPGA and FPAA." In 2012 5th International Conference on Biomedical Engineering and Informatics (BMEI). IEEE, 2012. http://dx.doi.org/10.1109/bmei.2012.6512886.

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GUNAY, Enis, Kenan ALTUN, and Cengiz UNAL. "FPGA and FPAA Implementation of Switched-State-Controlled CNN Based Sprott C Chaos Generator." In 2018 International Conference on Artificial Intelligence and Data Processing (IDAP). IEEE, 2018. http://dx.doi.org/10.1109/idap.2018.8620820.

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Gunay, Enis, and Kenan Altun. "A performance comparison study of programmable platforms: FPAA and FPGA implementation of COOK communication system." In 2017 European Conference on Circuit Theory and Design (ECCTD). IEEE, 2017. http://dx.doi.org/10.1109/ecctd.2017.8093237.

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