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Dissertations / Theses on the topic 'Frequency convertor'
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1
Watson, N. R. "Frequency-dependent A.C. system equivalents for harmonic studies and transient convertor simulation." Thesis, University of Canterbury. Electrical Engineering, 1987. http://hdl.handle.net/10092/6055.
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This thesis describes the algorithms developed for synthesizing frequency matched a.c. system equivalents for use with a Transient Convertor Simulator program. Two synthesis methods are outlined, with the merits of each being illustrated by applying them to the lower South Island portion of New Zealand's primary transmission system.
Validation of the diakoptical technique used to model the frequency dependent mutual coupling, as well as data preparation, is achieved by using the current source model to inject harmonic currents into the frequency-matched a.c. system equivalent.
The need for frequency matched a.c. system equivalents is demonstrated by using the Transient Convertor Simulator program for harmonic penetration studies.
Finally the effect of the frequency-dependence of an a.c. system model on the transient behaviour of a convertor is illustrated by simulating both a.c. and d.c. disturbances. The difference in transient behaviour with asymmetric a.c. faults as well as the harmonic assessment for harmonic penetration studies both demonstrate the need for frequency matched a.c. system equivalents that more accurately model the actual system.
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Tigga, Celine. "Modelling of Measurement Equipment for High Frequency Electromagnetic Fields." Thesis, Högskolan i Gävle, Avdelningen för elektronik, matematik och naturvetenskap, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:hig:diva-18894.
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The aim of this thesis was to develop a model of a receiver which could be quickly used to analyze radiated interference levels from data captured at the output of the antenna equipment used to measure radiated energy. Active circuits were mainly used in developing this model for the ease with which the design and simulations could be carried out in OrCAD. The guiding document for the thesis work has been CISPR 16-1-1 (International Special Committee on Radio Interference part 16-1-1) which specifies the characteristics and performance of equipment for the measurement of radiated interference. The testing of this receiver model was carried out as far as possible based on the test setups recommended in CISPR, and all results have been compared with the standards laid down for the model. Using the results, it will be shown that a CISPR EMI receiver can be modeled as a simple EMI receiver consisting of filtering, mixing and detecting circuits built according to specifications.
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Wood, Alan R. "An analysis of non-ideal HVDC convertor behaviour in the frequency domain, and a new control proposal." Thesis, University of Canterbury. Electrical Engineering, 1993. http://hdl.handle.net/10092/5740.
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This thesis describes a linear and direct method of analysing the interaction of waveform distortion around an HVdc convertor.
Existing analysis techniques are reviewed, and their strengths and weaknesses outlined. Both time domain simulation and iterative harmonic domain solutions are potentially very accurate. However, the lack of insight they provide into the important mechanisms of waveform distortion interaction, coupled with the computational expense (time domain), or limitation to steady state integer harmonics (harmonic domain), are considerable shortcomings. The frequency domain transfer function approach is chosen, and extended to cover the most important mechanisms of frequency transfer.
The developed approach is used first to consider the convertor in isolation, secondly to consider the convertor coupled with either the ac system or the dc system impedance, and finally the convertor embedded within both an ac and dc system. In this way the importance of the different mechanisms of distortion transfer through a convertor are established, the frequency dependent impedance of a convertor is developed, and a description of waveform distortion dynamics around a convertor with realistic ac and dc conditions is achieved. A new indicator, the Saturation Stability Factor, is used to describe the dynamics of transformer core saturation instability.
The linearised frequency domain convertor model is demonstrated to have useful accuracy, and with its ease and speed of use should prove a useful complement to existing analysis techniques.
Finally, a new control system structure for back -to-back HVdc links is proposed, fully utilising the proximity of the rectifier and inverter. The proposed control system lends itself to a number of strategies, and two new criteria are developed for their evaluation.
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Blanc-Russac, Jean-Marie. "Conversion statique de frequence par le moyen de dispositifs magnetiques." Paris 6, 1987. http://www.theses.fr/1987PA066270.
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Etude de la ferroresonance en regime de saturation en vue de l'obtension d'un spectre harmonique riche. Application aux circuits d'allumage pour lampes a decharge. Realisation de circuits selecteurs d'harmonique
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Svoboda, Josef. "Přímý číslicový frekvenční syntezátor." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2009. http://www.nusl.cz/ntk/nusl-217986.
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Direct Digital Frequency Synthesis (DDFS) is a method of producing an analog waveform, usually a sine wave, by generating a time varying signal in digital form a then performing a digital to analog conversion. Because operations within a DDFS device are primarily digital, it can offer fast switching between output frequencies, fine frequency resolution and operation over a broad spectrum of frequencies.
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David, Alain. "Insensibilisation des convertisseurs de fréquence aux creux et coupures de tension." Cachan, Ecole normale supérieure, 1993. http://www.theses.fr/1993DENS0009.
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Les convertisseurs de fréquence pour machine asynchrone sont en fort développement depuis une dizaine d'années. Cette structure s'avère cependant très sensible aux creux et coupures brèves de tension du réseau d'alimentation. Ces perturbations peuvent occasionner une perte de contrôle du convertisseur, entrainant, le plus souvent, un arrêt total du système, avec un redémarrage rarement automatique de l'équipement au retour de l'alimentation. Ces arrêts impromptus sont problématiques et couteux pour beaucoup d'applications industrielles. De nouvelles stratégies de commande du convertisseur pour palier à ce problème sont proposées dans cette thèse. Un modèle de l'ensemble convertisseur de fréquence-machine asynchrone est développé en régime transitoire en supposant une tension d'alimentation quelconque. Les effets des perturbations réseau sur le système sont ensuite étudies. Plusieurs techniques d'insensibilisation sont ensuite proposées: a) une régulation du système pour compenser les effets des creux de tension, b) une identification de la vitesse de la machine en roue libre (nécessaire pour un rattrapage au vol après une coupure brève triphasée), c) une technique de rattrapage au vol basée sur une synchronisation du convertisseur sur les tensions résiduelles générées par le flux rémanent de la machine, d) une régulation a glissement nul assurant le maintien du synchronisme entre le convertisseur et la machine lors de coupures brèves triphasées. Ces techniques ont été validées sur simulations numériques et sur un banc d'essais de 7. 5 kw, avec des performances satisfaisantes: contrôle permanent du système, minimisation des chutes de vitesse, redémarrage automatique du système au retour de la tension normale sans surcourant ou à-coup de couple. L'ensemble des résultats et les performances des commandes sont étudies d'un point de vue théorique sur la base du modèle développé
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Li, Jian Ming. "Evaluation des possibilités fréquentielles des transistors bipolaires de puissance haute tension." Grenoble INPG, 1989. http://www.theses.fr/1989INPG0049.
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Cette étude vise les possibilités d'utilisation des T. B. P. H. T. Dans les convertisseurs à résonance à des fréquences de quelques centaines de kHz et des puissances de quelques dizaines de kw. Pour atteindre cet objectif, une modélisation analytique uni-dimensionnelle du semi-conducteur est proposée: elle permet d'obtenir les caractéristiques de la commande de base aux fréquences correspondantes et d'analyser les performances fréquentielles des circuits de base aux fréquences correspondantes et d'analyser les performances fréquentielles des circuits de base classiques. Les synthèses de commande et les interrupteurs du type “CASCODE” sont représentés. Deux convertisseurs à résonance réalisés, un onduleur de tension 200 kHz-10 kW et un onduleur de courant 100 kHz-20 kW montrent la faisabilité de l'objectif en optimisant la commande des T. B. P. H. T
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Dufernez, Bruno. "Étude et simulation numérique d'un cycloconvertisseur à commande entièrement numérique." Vandoeuvre-les-Nancy, INPL, 1992. http://www.theses.fr/1992INPL133N.
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Le travail présenté dans cette thèse a été réalisé au sein du groupe de recherches en électrotechnique et électronique de Nancy, en collaboration avec le centre de recherche en automatique de Nancy. Il s'agit d'une étude sur les cycloconvertisseurs et plus particulièrement sur la réalisation de la commande d'un cycloconvertisseur triphasé à 36 thyristors, entièrement numérique, sans courant de circulation et sans liaison de neutre. Cette commande numérique est basée sur un générateur d'impulsions de type allumeur à retard. L'étude a été réalisée principalement par simulation numérique. Le programme de simulation a été réalisé avec GASPE (générateur automatique de programme de simulation des procédés électromécaniques), en utilisant une méthode de modélisation permettant de prendre en compte toutes les topologies du convertisseur, en particulier les commutations avec empiétement. La comparaison entre les différentes stratégies de commande s'appuie sur l'observation des formes d'ondes et des taux d'harmoniques. L'ébauche d'une réalisation pratique d'un cycloconvertisseur monophasé, sans courant de circulation et entièrement numérique est aussi présentée
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Kantzon, David. "PFC-design for frequency converter." Thesis, Linköpings universitet, Fysik och elektroteknik, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-124547.
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This thesis deals with power factor correction for three-phase systems. A boost-buck topology was described, modeled and then simulated in MATLAB/Simulink. The simulation results show that the system provides a power factor over 99% over the tested power output range. Moreover, the harmonic injection concept was introduced which reduces the total harmonic distortion to 8.72% at full output power. A prototype system was also built using an FPGA for the control system. The prototype did not provide the performance seen in simulation but showed that the method is valid and does provide a higher power factor when used.
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Amaral, Heberty Huilton. "Conversor Boost ZCZVT aplicado em um sistema de iluminação de emergência com LED." Universidade Tecnológica Federal do Paraná, 2011. http://repositorio.utfpr.edu.br/jspui/handle/1/223.
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Fundação AraucáriaNeste trabalho foi realizado um estudo sobre um sistema de iluminação de emergência não permanente. Este sistema é constituído de baterias, conversor boost e o LED de potência. O foco do trabalho é analisar o conversor boost, que emprega duas técnicas de comutação, sendo elas: comutação dissipativa e comutação suave. As análises feitas no conversor são referentes a comutação da chave semicondutora principal ocorrer de forma dissipativa ou suave para a técnica de comutação dissipativa e verificar se para a comutação suave as chaves semicondutoras (principal e auxiliar) comutam de forma dissipativa ou suave. Outro fato importante é avaliar o rendimento do conversor boost para as duas técnicas de comutação. Ainda é averiguada a autonomia do sistema de iluminação de emergência e também se ele está em conformidade com que cita a norma IEEE 446, referente a autonomia do sistema. Por fim é apresentada as formas de onda da corrente fornecida ao LED. Em suma, o conversor que emprega a técnica de comutação dissipativa demonstrou que a comutação ocorre de forma dissipativa, já para a técnica de comutação suave, a comutação transcorreu de forma suave. A eficiência do conversor mensurada através da autonomia do sistema de iluminação de emergência comprovou que a comutação suave apresenta maior eficiência do que a comutação dissipativa, em torno de 34%, devido a redução das perdas no chaveamento. Foi relatado que o conversor com a técnica de comutação suave empregado no sistema de iluminação de emergência obteve uma autonomia de uma hora e quatro minutos, já o conversor que utiliza a técnica de comutação dissipativa obteve uma autonomia de quarenta e dois minutos. Portanto, os sistemas de iluminação de emergência, no qual o conversor boost faz uso das duas técnicas de comutação estão em conformidade com a norma IEEE- Std 446. Em análise última observou-se que a corrente fornecida ao LED proveniente de um conversor com comutação suave possui uma ondulação em torno de 35% menor que a corrente oriunda de um conversor com comutação dissipativa e, ainda não possui oscilação do nível de corrente, tais características elevam a vida útil do LED e não alteram as características fotométricas do LED.
In this paper we present a study of an emergency lighting system is not permanent. This system consists of batteries, LED boost converter and power. The focus of the paper is to analyze the boost converter, which employs two switching techniques, which are: hard switching and soft switching. The analysis made in the converter are related to the commutation of the main semiconductor switch occur hard or soft switching technique for hard and check for soft switching the switches (main and auxiliary) switch in a hard or soft. Another important fact is to evaluate the performance of the boost converter for the two switching techniques. Also investigated is the autonomy of the emergency lighting system and also if he is quoting in accordance with IEEE 446, regarding the autonomy of the system. Finally is shown the waveform of the current supplied to the LED. In short, the converter that employs the technique of switched hard demonstrated that switching occurs in a hard, since the techniques of soft switching, the switch went soft. The measured efficiency of the converter through the autonomy of the emergency lighting system has proven that soft switching is more efficient than the hard switching, around 34% due to reduction in switching losses. It was reported that the converter with soft switching technique used in emergency lighting system achieved an endurance of one hour and four minutes, as the converter using the switching technique obtained a hard range of forty-two minutes. Therefore, emergency lighting systems, in which the boost converter makes use of two switching techniques are in accordance with IEEE Std-446. In ultimate analysis it was observed that the current supplied to the LED from a converter with soft switching has a ripple around 35% lower than the current coming from a switching converter with hard and does not have oscillation current level, such features increase the lifetime of the LED and do not alter the photometric characteristics of the LED.
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Šrámek, Petr. "Implementace softwarového rádia do FPGA." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2009. http://www.nusl.cz/ntk/nusl-217786.
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The common objective of this project is implementation of software defined radio (SDR) into FPGA. The text contains review and comparison of several hardware concepts intended for SDRs implementation then the methods for digital implementation of various components of radios as the filters, mixers and others are mentioned. Part of the text introduces used hardware platform and describes software support for designing, simulations and implementation into hardware. Significant part of project describes complex of external hardware components as filter, amplifier and control panel designed and built within the project realization. But the main part of project demonstrates design of the software solution of radio receiver. There is specified architecture of radio for FM broadcast receiving, next the more complex systems with carrier recovery algorithm are presented. These systems are able to work with AM, BPSK and QPSK modulations. It is possible to implement all these receivers into hardware and verify their operation. The practical laboratory theme has been outlined within the project run.
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Tolstoy, Georg. "High-Efficiency SiC Power Conversion : Base Drivers for Bipolar Junction Transistors and Performance Impacts on Series-Resonant Converters." Doctoral thesis, KTH, Elektrisk energiomvandling, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-168163.
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This thesis aims to bring an understanding to the silicon carbide (SiC) bipolar junction transistor (BJT). SiC power devices are superior to the silicon IGBT in several ways. They are for instance, able to operate with higher efficiency, at higher frequencies, and at higher junction temperatures. From a system point of view the SiC power device could decrease the cost and complexity of cooling, reduce the size and weight of the system, and enable the system to endure harsher environments. The three main SiC power device designs are discussed with a focus on the BJT. The SiC BJT is compared to the SiC junction field-effect transistor (JFET) and the metal-oxide semiconductor field-effect transistor (MOSFET). The potential of employing SiC power devices in applications, ranging from induction heating to high-voltage direct current (HVDC), is presented. The theory behind the state-of-the-art dual-source (2SRC) base driver that was presented by Rabkowski et al. a few years ago is described. This concept of proportional base drivers is introduced with a focus on the discretized proportional base drivers (DPBD). By implementing the DPBD concept and building a prototype it is shown that the steady-state consumption of the base driver can be reduced considerably. The aspects of the reverse conduction of the SiC BJT are presented. It is shown to be of importance to consider the reduced voltage drop over the base-emitter junction. Last the impact of SiC unipolar and bipolar devices in series-resonant (SLR) converters is presented. Two full-bridges are designed and constructed, one with SiC MOSFETs utilizing the body diode for reverse conduction during the dead-time, and the second with SiC BJTs with anti-parallel SiC Schottky diodes. It is found that the SiC power devices, with their absence of tail current, are ideal devices to fully utilize the soft-switching properties that the SLR converters offer. The SiC MOSFET benefits from its possibility to utilize reverse conduction with a low voltage drop. It is also found that the size of capacitance of the snubbers can be reduced compare to state-of-the-art silicon technology. High switching frequencies of 200 kHz are possible while still keeping the losses low. A dead-time control strategy for each device is presented. The dual control (DuC) algorithm is tested with the SiC devices and compared to frequency modulation (FM). The analytical investigations presented in this thesis are confirmed by experimental results on several laboratory prototype converters.QC 20150529
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Luschas, Susan 1975. "Radio frequency digital to analog converter." Thesis, Massachusetts Institute of Technology, 2003. http://hdl.handle.net/1721.1/28277.
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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2003.Includes bibliographical references (p. 124-126).
Dynamic performance of high speed, high resolution digital-to-analog converters (DACs) is limited by distortion at the data switching instants. Inter-symbol interference (ISI), imperfect timing synchronization and clock jitter are all culprits. A DAC output current controlled by an oscillating waveform is proposed to mitigate the effects of the switching distortion. The oscillating waveform should be a multiple (k*fs) of the sampling frequency (f), where k>l. The waveforms can be aligned so that the data switching occurs in the zero regions of the oscillating output. This makes the DAC insensitive to switch dynamics and jitter. The architecture has the additional benefit of mixing the DAC impulse response energy to a higher frequency. An image of a low IF input signal can therefore be output directly at a high IF or RF frequency for transmit communications applications. A narrow-band sigma-delta DAC with eight unit elements is chosen to demonstrate the radio frequency digital-to-analog converter (RF DAC) concept. A sigma-delta architecture allows the current source transistors to be smaller since mismatch shaping is employed. Smaller current source transistors have a lower drain capacitance, allowing large high frequency output impedance to be achieved without an extra cascode transistor. Elimination of the cascode reduces transistor headroom requirements and allows the DAC to be built with a 1.8V supply. The RF DAC prototype is targeted to GSM transmit specifications and implemented in 0.1 8ptm CMOS technology. Measured single-tone SFDR is -75dBc, SNR is 52dB, and IMD3 is -70.8dBc over a 17.5MHz bandwidth centered at 942.5MHz. Measured SNR has the predicted dependence on the phase alignment of the data clock and oscillating pulse.
by Susan Luschas.
Ph.D.
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Xu, Ping. "High-frequency Analog Voltage Converter Design." PDXScholar, 1994. https://pdxscholar.library.pdx.edu/open_access_etds/4891.
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For many high-speed, high-performance circuits, purely differential inputs are needed. This project focuses on building high-speed voltage converters which can transfer a single-ended signal to a purely differential signal, or a differential input signal to a single-ended signal. Operational transconductance amplifier (OTAs) techniques are widely used in high-speed continuous-time integrated analog signal processing (ASP) circuits because resistors, inductors, integrators, buffers, multipliers and filters can be built by OT As and capacitors. Taking advantage of OT As, very-high-speed voltage converters are designed in CMOS technology. These converters can work in a frequency range from DC (OHz) up to lOOMHz and higher, and keep low distortion over a± 0.5V input range. They can replace transformers so that designing fully integrated differential circuits becomes possible. The designs are based on a MOSIS 2μm n-well process. SPICE simulations of these designs are given. The circuit was laid out with MAGIC layout tools and fabricated through MOSIS. The chip was measured at PSU and Intel circuit labs and the experimental results show the correctness of the designs.
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Liu, Kwang-Hwa. "High-frequency quasi-resonant converter techniques." Diss., Virginia Polytechnic Institute and State University, 1986. http://hdl.handle.net/10919/74737.
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Two waveform-shaping techniques to reduce or eliminate the switching stresses and switching losses in switching-mode power conversion circuits are developed: the zero-current switching technique and the zero-voltage switching technique.
Based on these two techniques two new families of quasi-resonant converters are derived. Since the stresses on semiconductor switching devices are significantly alleviated, these quasi-resonant (QRC) converters are suitable for high-frequency operations with much improved performances and equipment power density.
Employing the duality principle, the duality relationship between these two families of quasi-resonant converters are derived. The establishment of the duality relationship provides a framework allowing the knowledge obtained from one converter family to be readily transferred to the other.
Further topological refinements are derived through the utilization of parasitic elements in the devices and the circuit. In particular, the two most significant parasitic elements, the leakage inductance of the transformer and the junction capacitances of the semiconductor switch, are incorporated as part of the resonant-tank circuit required by these quasi-resonant converters. Consequently, the detrimental effects due to these parasitic elements are eliminated, and the converters can be operated at very high frequencies.Ph. D.
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Abou-Fakher, Yehia. "Implementing and simulating low frequency inverters using high frequency transformers and devices." Thesis, University of Bath, 1997. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.362147.
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LI, QUAN, and q. li@cqu edu au. "HIGH FREQUENCY TRANSFORMER LINKED CONVERTERS FOR PHOTOVOLTAIC APPLICATIONS." Central Queensland University. N/A, 2006. http://library-resources.cqu.edu.au./thesis/adt-QCQU/public/adt-QCQU20060830.110106.
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This thesis examines converter topologies suitable for Module Integrated Converters
(MICs) in grid interactive photovoltaic (PV) systems, and makes a contribution to
the development of the MIC topologies based on the two-inductor boost converter,
which has received less research interest than other well known converters.
The thesis provides a detailed analysis of the resonant two-inductor boost converter
in the MIC implementations with intermediate constant DC links. Under variable
frequency control, this converter is able to operate with a variable DC gain while
maintaining the resonant condition. A similar study is also provided for the resonant
two-inductor boost converter with the voltage clamp, which aims to increase the
output voltage range while reducing the switch voltage stress. An operating point
with minimized power loss can be also established under the fixed load condition.
Both the hard-switched and the soft-switched current fed two-inductor boost
converters are developed for the MIC implementations with unfolding stages. Nondissipative
snubbers and a resonant transition gate drive circuit are respectively
employed in the two converters to minimize the power loss.
The simulation study of a frequency-changer-based two-inductor boost converter is
also provided. This converter features a small non-polarised capacitor in a second
phase output to provide the power balance in single phase inverter applications.
Four magnetic integration solutions for the two-inductor boost converter have also
been presented and they are promising in reducing the converter size and power loss.
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Holme, Peter R. "Digital control of high frequency PWM convertors." Thesis, Loughborough University, 1994. https://dspace.lboro.ac.uk/2134/7160.
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The thesis begins with a review of presently available analogue and digital control schemes for high frequency PWM converters. Advantages and disadvantages of each scheme are identified, to determine which features would be desirable in a new digital control scheme. An extensive examination of peak and average current mode control is undertaken, using state-space/sampled data modelling, to gain more detailed information on the properties of current mode control. On the basis of this information, a new digital current mode control scheme is put forward. This uses samples of the inductor current, line voltage and output voltage to implement a control strategy in software. Average inductor current is calculated each switching cycle and compared to the current program level, providing true current mode control. This has some advantages over traditional methods. Accurate inductor current tracking of the current program level is achieved and no slope compensation is required for stable operation over the full range of duty ratios. Line voltage feed-forward is possible in buck derived topologies, which provides an effective null in the audio susceptibility transfer function, independent of compensation parameters. Current loop stability is independent of line voltage or load current in the buck topology, allowing operation with optimum loop compensation under all normal operating conditions. Practical implementation of a digital current mode controlled current-fed converter is described. This includes a modular architecture for the hardware and documentation for the software. Effects of component selection on the achievable converter switching frequency and dynamic performance are discussed. A method is put forward for the direct digital measurement of loop gain and phase in digital control systems. This is used to obtain actual loop responses from a test bed digital current mode controlled current-fed converter. Line and load transient response tests are presented which demonstrate the dynamic characteristics of digital current mode control.
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Balakrishnan, Anand Kumar. "Soft switched high frequency ac-link converter." [College Station, Tex. : Texas A&M University, 2008. http://hdl.handle.net/1969.1/ETD-TAMU-3156.
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Chin, Yuan. "Constant-frequency parallel-resonant converter (clamped-mode)." Thesis, Virginia Polytechnic Institute and State University, 1986. http://hdl.handle.net/10919/104308.
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Tsai, Fu-Sheng. "Constant-frequency, clamped-mode resonant converters." Diss., Virginia Polytechnic Institute and State University, 1989. http://hdl.handle.net/10919/54800.
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Two novel clamped-mode resonant converters are analyzed. These clamped-mode converters operate at a constant frequency while retaining many desired features of conventional resonant converters such as fast responses, zero-voltage turn-on or zero-current turn-off, and low EMI levels, etc. The converters are able to regulate the output from no load to full load and are particularly suitable for off-line, high-power applications.
To provide insights to the operations and derive design guidelines for the clamped-mode resonant converters, a complete dc characterization of both the clamped-mode series-resonant converter and the clamped-mode parallel-resonant converter, operating above and below resonant frequency, is performed. State-plane analysis techniques are employed. By portraying the converters' operation on a state-plane diagram, various circuit operating modes are identified. The boundaries between different operating modes are determined. The regions for natural and force commutation of the active switches are defined. Important dc characteristics, such as control-to-output transfer ratio, rms inductor current, peak capacitor voltage, rms switch currents, average diode currents, switch turn-on currents, and switch turn-off currents are derived to facilitate the converter designs.
To illustrate the converter designs in different operating regions, several design examples are given. Finally, three prototype circuits are built to verify the analytical results.Ph. D.
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Li, Quan, and q. li@cqu edu au. "DEVELOPMENT OF HIGH FREQUENCY POWER CONVERSION TECHNOLOGIES FOR GRID INTERACTIVE PV SYSTEMS." Central Queensland University. School of Advanced Technologies & Processes, 2002. http://library-resources.cqu.edu.au./thesis/adt-QCQU/public/adt-QCQU20020807.152750.
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This thesis examines the development of DC-DC converters that are suitable for Module Integrated Converters, (MICs), in grid interactive photovoltaic (PV) systems, and especially concentrates on the study of the half bridge dual converter, which was previously developed from the conventional half bridge converter. Both hard-switched and soft-switched half bridge dual converters are constructed,
which are rated at 88W each and transform a nominal 17.6Vdc input to an output in the range from 340V to 360Vdc. An initial prototype converter operated at 100kHz and is used as a base line device to establish the operational behaviours of the converter. The second hard-switched converter operated at 250kHz and included a coaxial matrix transformer that significantly reduced the power losses related to the transformer leakage inductance. The soft-switched converter operated at 1MHz and is capable of absorbing the parasitic elements into the resonant tank. Extensive theoretical analysis, simulation and experimental results are provided for each converter. All three converters
achieved conversion efficiencies around 90%. The progressive increases in the operation frequency, while maintaining the conversion efficiency, will translate into the reduced converter size and weight. Finally different operation modes for the
soft-switched converter are established and the techniques for predicting the occurrence of those modes are developed. The analysis of the effects of the transformer winding capacitance also shows that soft switching condition applies for both the primary side mosfets and the output rectifier diodes.
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Singh, Gunjan. "Computer control of a pulse width modulated AC/DC converter under a variable frequency power supply." Ohio : Ohio University, 1993. http://www.ohiolink.edu/etd/view.cgi?ohiou1175884455.
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Patel, Chirag. "A time-to-voltage converter." Ohio : Ohio University, 1999. http://www.ohiolink.edu/etd/view.cgi?ohiou1175794164.
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Mejzlík, Jiří. "Návrh jednoúčelového stroje pro měření průhybu." Master's thesis, Vysoké učení technické v Brně. Fakulta strojního inženýrství, 2015. http://www.nusl.cz/ntk/nusl-232101.
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The aim of the thesis is to design a special purpose tool for sag measurement. Three possible solutions are proposed, for each the production cycle time is calculated and its approximate costs are estimated. The best solution in terms of a trade-off between both key quantities is suggested. Next part of the work deals with the selection of suitable drives for the manipulator as well as of the other components for the whole electrical device. Finally, a possible automated control of the complete machinery, including the electrical wiring diagram, is presented.
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Lopez, Arevalo Saul. "Matrix converter for frequency changing power supply applications." Thesis, University of Nottingham, 2008. http://eprints.nottingham.ac.uk/10477/.
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The purpose of this work is to investigate the design and implementation of a 7.5kVA Matrix Converter-based power supply for aircraft applications (GPU Ground Power Unit). A Matlab/Simulink as well as SABER simulation analysis of the candidate Matrix Converter system is provided. The design and implementation of the Matrix Converter is described, with particular attention to the strict requirements of the given power supply application. This AC-AC system is proposed as an effective replacement for the conventional AC-DC-AC system which employs a two-step power conversion. The Matrix Converter is an attractive topology of power converter for power supply applications where factors such as the absence of electrolytic capacitors, the potentiality of increasing power density, reducing size and weight and good input power quality are fundamental. An improved control structure is proposed. This structure employs an ABC reference frame implementation comprising at the Repetitive Control strategy combined with a traditional tracking controller in order to attenuate or eliminate the unwanted harmonic distortion in the output voltage waveform of the Matrix Converter and to compensate for the steady-state error. The system with the proposed control was initially fully analyzed and verified by simulation. The analysis of the input and output waveforms identified the constraints that need to be satisfied to ensure successful operation of the converter. Finally, to demonstrate both the Matrix Converter concept and the control strategy proposed, a 7.5kVA prototype of the proposed system was constructed and tested in Nottingham PEMC laboratory. The experimental results obtained confirmed the expectations from the simulation study and the validity of the power converter and control design.
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Wen, Yangyang. "MODELING AND DIGITAL CONTROL OF HIGH FREQUENCY DC-DC POWER CONVERTERS." Doctoral diss., University of Central Florida, 2007. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3671.
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The power requirements for leading edge digital integrated circuits have become increasingly demanding. Power converter systems must be faster, more flexible, more precisely controllable and easily monitored. Meanwhile, in addition to control process, the new functions such as power sequencing, communication with other systems, voltage dynamic programming,load line specifications, phase current balance, protection, power status monitoring and system diagnosis are going into today's power supply systems. Digital controllers, compared withanalog controllers, are in a favorable position to provide basic feedback control as well as those power management functions with lower cost and great flexibility. The dissertation gives an overview of digital controlled power supply systems bycomparing with conventional analog controlled power systems in term of system architecture,modeling methods, and design approaches. In addition, digital power management, as one of the most valuable and "cheap" function, is introduced in Chapter 2. Based on a leading-edge digital controller product, Chapter 3 focuses on digital PID compensator design methodologies, design issues, and optimization and development of digital controlled single-phase point-of-load (POL)dc-dc converter. Nonlinear control is another valuable advantage of digital controllers over analogcontrollers. Based on the modeling of an isolated half-bridge dc-dc converter, a nonlinear control method is proposed in Chapter 4. Nonlinear adaptive PID compensation scheme is implemented based on digital controller Si8250. The variable PID coefficient during transients improves power system's transient response and thus output capacitance can be reduced to save cost. In Chapter 5, another nonlinear compensation algorithm is proposed for asymmetric flybackforward half bridge dc-dc converter to reduce the system loop gain's dependence on the input voltage, and improve the system's dynamic response at high input line. In Chapter 6, a unified pulse width modulation (PWM) scheme is proposed to extend the duty-cycle-shift (DCS) control, where PWM pattern is adaptively generated according to the input voltage level, such that the power converter's voltage stress are reduced and efficiency is improved. With the great flexibility of digital PWM modulation offered by the digital controller Si8250, the proposed control scheme is implemented and verified. Conclusion of the dissertation work and suggestions for future work in related directions are given in final Chapter.Ph.D.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering PhD
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Biglarbegian, Mehrdad. "High Frequency GaN Power Converters Digital Twin." Thesis, The University of North Carolina at Charlotte, 2018. http://pqdtopen.proquest.com/#viewpdf?dispub=10979304.
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There is a need for a foundation of a research study aimed at investigations on near real-time reliability awareness of Gallium Nitride devices in high-frequency power converters for which we need advanced hardware and algorithms. This dissertation is moving beyond traditional reliability analysis and looking to more applicable and accurate analytical tools by introducing deep learning techniques and advanced sensing solutions. The computational structures will be applied at the edge of the power converter through online sensing and data processing units as well as on a remote server. They will provide an iterative ability to predict the time until the device may fail or reach a pre-defined degradation threshold.
With the availability of the most granular information deduced from advanced devices, a new data-driven scheme is proposed for system monitoring and possible lifetime extension Gallium Nitride power converters. The approach relies on the real-time on-resistance data extraction from the power converter, and calibration of an adaptive model using multi-physics co-simulations under power cycling. More specifically, the focus is on deploying machine learning algorithms to exploit for the parameter estimation in power electronics engineering reliability. The proposed techniques in this work are quite new and have not yet been developed and analyzed for high-frequency power converters specifically with Gallium Nitride power semiconductor devices.
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Pan, Yaobin, and Xizhuo Li. "Design and Implementation of Sigma-Delta Converter : in Oversampling frequency." Thesis, Linnéuniversitetet, Institutionen för fysik och elektroteknik (IFE), 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:lnu:diva-53052.
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Nowadays, Sigma-Delta analog-to-digital converters have been widely used in the technology of analog-to-digital conversion. It depends on the merits that the approach of Sigma-Delta has. The signal converted by oversampling is precise and well-suited in signal processing systems.This thesis mainly focuses on the principles and simulations of fundamental first-order Sigma-Delta converter, and some brief introductions about other Sigma-Delta converters.The main researches of this thesis are as follows: (1)This thesis shows not only the path about development of technology of different ADCs, but also the features and principles of these ADCs and their structures. (2)The thesis discusses how the technologies of oversampling and noise shaping are used in Sigma-Delta analog-to-digital conversion. (3)Illustrate different orders Sigma-Delta converters in different bits and their advantages and disadvantages, respectively. (4)The simulation is given in Matlab(Simulink). Typical first-order SigmaDelta converter is simulated with additional noise which will impact the input signal when implement.Sigma-Delta Converter
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Druyts, Jan. "Control induction motor by frequency converter : Simulation electric vehicle." Thesis, Halmstad University, Energiteknik, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-4968.
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Summary
Today we are probably on a point of change for the car industry. The last century was the century of vehicles with internal combustion engines. Fossil fuels were relative cheap, easy accessible and they have a high specific energy. The pollution and dependency on oil caused the last decade an increasing demand for alternatives. Alternatives for electric power plants and for car drives. Yet the turnover to hybrids is a fact and much research is done for pure electric vehicles. Research about the control of electric motors is by that become a hot topic.
To simulate an electric vehicle drive with an induction motor, a frequency converter is needed. This combination of motor and converter led to many possible experiments. With a few experiments already done and a broad theoretical background report this thesis provides a good bundle of information to start with further experiments. The experiments can become even broader when a flywheel is added as mass inertia momentum and a DC source on the DC-link. Both elements contribute for a better simulation of an electric motor in an electric vehicle.
What is described in this theoretical report about the combination of an induction motor and converter is only the tip of the iceberg. I had too less time to begin experimenting with the flying wheel. The DC-link voltage becomes ca. 540V. From the perspective of safety I could never work alone with the DC-link. Even with a companion it was too dangerous because the equipment of the Halmstad University is not made for such dangerous voltages. That’s why this thesis contains more theoretical background and less actual practical data.
SAMENVATTING
Momenteel bevinden we ons in een tijd van omslag. Na een eeuw waarin de brandstofmotor het transportlandschap domineerde, is er nood aan een alternatief. Fossiele brandstof zorgt voor schadelijke uitlaatgassen bij verbranding en de afhankelijkheid van andere landen voor de bevoorrading van fossiele brandstof blijft altijd een risicofactor. De eerste stap in deze verandering is gezet met de ontwikkeling van hybride wagens. De toekomst zal waarschijnlijk helemaal elektrisch worden. Daarom is het onderzoek naar de controle van elektrische motoren belangrijk.
In de universiteit van Halmstad zijn er verscheidene inductiemotoren aanwezig in het elektriciteitslabo. De doelstelling was dat ik een frequentieomvormer selecteerde, bestelde en parametreerde op basis van deze motoren. Daarnaast kreeg ik de vrijheid om een elektrische wagen te simuleren. Dit zou ik doen door een vliegwiel voor de traagheid en door een batterij na te bootsen om de DC-link te voeden. Al mijn informatie moest ik bundelen in deze thesistekst zodat het eventueel een handige bundel werd voor toekomstige studenten die willen werken met de convertor.
Ik had slechts 2 maanden de tijd om dit uit te voeren, metingen te doen en een theoretisch verslag te schrijven. Vanwege deze korte tijdspanne was het niet mogelijk het vliegwiel te implementeren. Daarnaast was de tussenkringspanning ongeveer 540V DC. Dit is zeer gevaarlijk zodat ze liever hadden dat ik de proeven met een gesimuleerde batterij liet varen. Dit verklaart enigszins waarom uitgebreide meetresultaten ontbreken en deze thesis vooral een bredere theoretische toets heeft.
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Ahmad, Nisar. "Design and Implementation of a High Frequency Flyback Converter." Thesis, Mittuniversitetet, Avdelningen för elektronikkonstruktion, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:miun:diva-24598.
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The power supply designers choose flyback topology due to its promising features of design simplicity, cost effectiveness and multiple outputs handling capability. The designed product based on flyback topology should be smaller in size, cost effective and energy efficient. Similarly, designers focus on reducing the circuit losses while operating at high frequencies that affect the converter efficiency and performance. Based on the above circumstances, an energy efficient open loop high frequency flyback converter is designed and operated in MHz frequency region using step down multilayer PCB planar transformer. The maximum efficiency of 84.75% is observed and maximum output power level reached is 22.8W. To overcome the switching losses, quasi-resonant soft switching technique is adopted and a high voltage CoolMOS power transistor is used.
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Tian, Feng. "Pulse Frequency Modulation ZCS Flyback Converter in Inverter Applications." Doctoral diss., University of Central Florida, 2009. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/4266.
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Renewable energy source plays an important role in energy co-generation and distribution. A traditional solar-based inverter system has two stages cascaded, which has simpler controller but low efficiency. A new solar-based single-stage grid-connected inverter system can achieve higher efficiency by reducing the power semiconductor switching loss and output stable and synchronizing sinusoid current into the utility grid. In Chapter 1, the characteristic I-V and P-V curve of PV array has been illustrated. Based on prediction of the PV power capacity installed on the grid-connected and off-grid, the trends of grid-tied inverter for DG system have been analyzed. In Chapter 2, the topologies of single-phase grid-connect inverter system have been listed and compared. The key parameters of all these topologies are listed in a table in terms of topology, power decoupling, isolation, bi-directional/uni-directional, power rating, switching frequency, efficiency and input voltage. In Chapter 3, to reduce the capacitance of input filter, an active filter has been proposed, which will eliminate the 120/100Hz low frequency ripple from the PV array's output voltage completely. A feedforward controller is proposed to optimize the step response of PV array output voltage. A sample and hold also is used to provide the 120/100Hz low frequency decoupling between the controller of active filter and inverter stage. In Chapter 4, the single-stage inverter is proposed. Compared with conventional two-stage inverter, which has two high frequency switching stages cascaded, the single-stage inverter system increases the system efficiency by utilizing DC/DC converter to generate rectified sinusoid voltage. A transformer analysis is conducted for the single-stage inverter system, which proves the transformer has no low-frequency magnetic flux bias. To apply peak current mode control on single-stage inverter and get unified loop gain, adaptive slope compensation is also proposed for single-stage inverter. In Chapter 5, a digital controller for single-stage inverter is designed and optimized by the Matlab Control Toolbox. A Psim simulation verified the performance of the digital controller design. In Chapter 6, three bi-directional single-stage inverter topologies are proposed and compared. A conventional single-stage bi-directional inverter has certain shortcoming that cannot be overcome. A modular grid-connect micro-inverter system with dedicated reactive energy processing unit can overcome certain shortcoming and increase the system efficiency and reliability. A unique controller design is also proposed. In Chapter 7, a PFM ZCS flyback inverter system is invented. By using half-wave quasi-resonant ZCS flyback resonant converter and PFM control, this topology completely eliminates switching loss. A detailed mathematical analysis provides all the key parameters for the inverter design. As the inductance of transformer secondary side get smaller, the power stage transfer function of PFM ZCS flyback inverter system demonstrates nonlinearity. An optimized PFM ZCS flyback DC/DC converter design resolves this issue by introducing a MOSFET on the secondary side of transformer. In Chapter 8, experimental results of uni-direcitonal single-stage inverter with grid-connection, bi-directional single-stage inverter and single-stage PFM ZCS flyback inverter have been provided. Conclusions are given in Chapter 9.Ph.D.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering PhD
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Salazar, Nathaniel Jay Tobias. "High frequency AC power converter for low voltage circuits." Thesis, Massachusetts Institute of Technology, 2012. http://hdl.handle.net/1721.1/77026.
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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.
Includes bibliographical references (p. 74-76).
This thesis presents a novel AC power delivery architecture that is suitable for VHF frequency (50-100MHz) polyphase AC/DC power conversion in low voltage integrated circuits. A complete AC power delivery architecture was evaluated demonstrating the benefits of delivering power across the interconnect at high voltage and lower current with on- or over-die transformation to low voltage and high current. Two approaches to polyphase matching networks in the transformation stage are compared: a 3-phase system with separate single-phase matching networks and individual full bridge rectifiers, and a 3-phase delta-to-wye matching network and a 3-phase rectifier bridge. In addition, a novel switch-capacitor rectifier capable of 3V, 1W output, was evaluated as an alternative circuit to the diode rectifiers. A 50MHz prototype of each version of the system was designed and built for a 12:1 conversion ratio with 24Vpp line-to-line AC input, 2V DC output and 0.7W output power. The measured overall system efficiency is about 63 % for the 3-phase delta system. Although the application is intended for an integrated CMOS implementation, this thesis primarily focuses on discrete PCB level realizations of the proposed architectures to validate the concept and provide insights for future designs.
by Nathaniel Jay Tobias Salazar.
M.Eng.
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Goldberg, Andrew Franklin. "A radio frequency DC-to-DC resonant power converter." Thesis, Massachusetts Institute of Technology, 1985. http://hdl.handle.net/1721.1/27944.
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Thesis (Elect. E.)--Massachusetts Institute of Technology, Dept. of Electrical Engieering and Computer Science, 1985.MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING.
Bibliography: leaves 136-139.
by Andrew Franklin Goldberg.
Elect.E.
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Collins, Steven John. "A radio frequency capacitive discharge digital to analogue converter." Thesis, University of Glasgow, 2012. http://theses.gla.ac.uk/3371/.
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As the communications revolution continues there is an ever increasing demand for integrated transmitters and receivers on silicon in devices such as mobile phones and networking products. The demand to integrate complete systems onto a single die has driven a need to minimise the area of transmitters which has led to research into combining digital to analogue converters and RF mixers to minimise their area. The drive for increasing speeds and smaller transistors has resulted in higher capacitance densities and lower operating voltages, the latter making it more difficult to implement conventional transmitter circuits. Therefore there is a need for passive transmitter systems that maximise the output power to the load by minimising the voltage overhead on the output signal. This thesis proposes and demonstrates that it is possible to use a digital to analogue converter that performs RF up conversion using direct capacitive discharge to the load, which takes advantage of the large capacitance densities of a modern 40nm CMOS process. The DAC uses charge sharing in a similar manner to a charge sharing DAC without the bandwidth limitations imposed by an output amplifier. The RF frequency up conversion at the DAC data clock rate is produced using two DACs that differentially output the complement of each other on different halves of the clock cycle (one outputting while the other is charging) thereby emulating a passive switched mixer. The thesis shows that an 8 bit capacitive discharge DAC of 0.16mm2 can output 3dBm into a 50Ω load at 2.15GHz using a clock rate of 2GHz with MTPR of greater than 30dBc.
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Van, Der Kogel André, and Niklas Österlund. "High frequency dc/dc power converter with galvanic isolation." Thesis, Linköpings universitet, Fysik och elektroteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-128831.
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There is a steady demand to increase the efficiency and raise the power density of power converters. This trend is desired since it leads to reduced size of the converter. The purpose of this thesis is to investigate materials, topologies, core structure and then build a prototype to demonstrate the result. Two core materials have been compared, Fair-Rite material 68 and Ferroxcube 4F1. The goal was to have 50 V input and 30 V output with 80 % efficiency of the converter. The converter with the Fair-Rite material 68 accomplished a peak efficiency at 11 MHz with 54 % efficiency. The core material Ferroxcube 4F1, reached an efficiency of 52 % at 7 MHz. These results were however with 5 V input and 3 V output. The converter had a low efficiency at 50 V input, which lead to ripple in the circuit. One reason for this behaviour was because the design of the PCB was not optimized for MHz operation. The focus of the PCB was that it should be easy to work with instead of achieving peak performance. Also, from the beginning it was decided that no PCB should be made. The focus was instead on the theory and simulations of the converter so no thoroughly investigation of PCB design was done. The leakage inductance of the transformer core was about 10 % of the primary inductance for both materials. The high leakage inductance is believed to further reduce the efficiency of the converter.
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Gunawan, Tadeus. "Two-Phase Boost Converter." DigitalCommons@CalPoly, 2009. https://digitalcommons.calpoly.edu/theses/200.
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A boost converter is one of the most efficient techniques to step up DC input voltage to a higher needed DC output voltage. The boost converter has many possible applications, such as in a photovoltaic system, hybrid car and battery charger. The proposed prototype in this report is a proof of concept that a Two-Phase Boost Converter is a possible improvement topology to offer higher efficiency without compromising any advantages readily offered by a basic boost. The prototype is designed to be able to handle up to 200 watts of output power with an input of 36 volts and an output of 48 volts. This paper goes through step-by-step the calculation, design, build and test of a Two-Phase Boost Converter. Calculations found in this paper were done on Mathcad and the simulations were done on LTSpice and Pspice. These include converter’s efficiency and other measures of converter’s performance. Advantages, disadvantages as well as possible improvements of the proposed topology will be presented. Data collected and analyzed from the prototype were done on a bench test, not through an actual application.
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Bai, Yuming. "Optimization of Power MOSFET for High-Frequency Synchronous Buck Converter." Diss., Virginia Tech, 2003. http://hdl.handle.net/10919/28915.
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Evolutions in microprocessor technology require the use of a high-frequency synchronous buck converter (SBC) in order to achieve low cost, low profile, fast transient response and high power density. However, high frequency also causes more power loss on MOSFETs. Optimization of the MOSFETs plays an important role in the system performance.
Circuit and device modeling is important in understanding the relationship between the device parameters and the power loss. The gate-to-drain charge (Qgd) is studied by a novel nonlinear model and compared with the simulation results. A new switching model is developed, which takes into account the effect of parasitic inductance on the switching process. Another model for dv/dt-induced false triggering-on relates the false-trigger-on voltage with the parasitic elements of the device and the circuits.
Some techniques are proposed to reduce the simulation time of FEA in the circuit simulation. Based on this approach, extensive simulations are performed to study the switching performance of the MOSFET with the effect of the parasitic elements. Directed by the analytical models and the experience acquired in the circuit simulation, the MOSFET optimization is realized using FEA. Different optimization algorithms are compared. The experimental results show that the optimized MOSFETs surpass the mainstream commercialized products in both cost and performance.Ph. D.
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Zhang, Zhemin. "High-frequency Quasi-square-wave Flyback Regulator." Diss., Virginia Tech, 2016. http://hdl.handle.net/10919/77434.
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Motivated by the recent commercialization of gallium-nitride (GaN) switches, an effort was initiated to determine whether it was feasible to switch the flyback converter at 5 MHz in order to improve the power density of this versatile isolated topology. Soft switching techniques have to be utilized to eliminate the switching loss to maintain high efficiency at multi-megahertz. Compared to the traditional modeling of zero-voltage-switching quasi-square-wave converters, a numerical methodology of parameters design is proposed based on the steady-state model of zero-voltage switching quasi-square-wave flyback converter. The magnetizing inductance is selected to guarantee zero-voltage switching for the entire input and load range with the trade-off design for conduction loss and turn-off loss.
A design methodology is introduced to select a minimum core volume for an inductor or coupled inductors experiencing appreciable core loss. The geometric constant Kgac = MLT/(Ac2WA) is shown to be a power function of the core volume Ve, where Ac is the effective core area, WA is the area of the winding window, and MLT is the mean length per turn for commercial toroidal, ER, and PQ cores, permitting the total loss to be expressed as a direct function of the core volume. The inductor is designed to meet specific loss or thermal constraints. An iterative procedure is described in which two- or three-dimensional proximity effects are first neglected and then subsequently incorporated via finite-element simulation. Interleaved and non-interleaved planar PCB winding structures were also evaluated to minimize leakage inductance, self-capacitance and winding loss. The analysis on the trade-off between magnetic size, frequency, loss and temperature indicated the potential for a higher density flyback converter.
A small-signal equivalent circuit of QSW converter was proposed to design the control loop and to understand the small-signal behavior. By adding a simple damping resistor on the traditional small-signal CCM model, it can predict the pole splitting phenomenon observed in QSW converter. With the analytical expressions of the transfer functions of QSW converters, the impact of key parameters including magnetizing inductance, dead time, input voltage and output power on the small-signal behavior can be analyzed. The closed-loop bandwidth can be pushed much higher with this modified model, and the transient performance is significantly improved.
With the traditional fix dead-time control, a large amount of loss during dead time occurred, especially for the eGaN FETs with high reverse voltage drop. An adaptive dead time control scheme was implemented with simple combinational logic circuitries to adjust the turn on time of the power switches. A variable deadtime control was proposed to further improve the performance of adaptive dead-time control with simplified sensing circuit, and the extra conduction loss caused by propagation delay in adaptive dead-time control can be minimized at multi-megahertz frequency.Ph. D.
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Tian, Shuilin. "Equivalent Circuit Model of High Frequency PWM and Resonant Converters." Diss., Virginia Tech, 2015. http://hdl.handle.net/10919/56676.
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Distributed power system (DPS) is widely adopted in Power supplies for the telecom, computer and network applications. Constant on-time current mode control and V2 control are widely used as point-of-load (POL) converters and voltage regulators (VR) in DPS systems. Series resonant converters (SRC) are widely used in aerospace systems and LLC resonant converters are widely used as Front-end converters in DPS systems. The technological innovations bring increasing demand for optimizing the dynamic performance of the switching regulators in these applications. There has been a strong desire to develop simple and accurate equivalent circuit models to facilitate the design of these converters.
Constant on-time current-mode control has been widely used in POL and VRM converters. For multi-phase application, external ramp is required to improve jittering performance using pulse distribution method. Chapter II analyzes the effect of external ramp on small-signal model of constant on-time current mode control. It is found that external ramp brings additional dynamics by introducing a moving pole and a static zero. Next, a three-terminal switch model is proposed based on non-ideal current source concept, where the non-idealness of the current source is presented by a Re2-Le2 branch. Based on the proposed model, design guidelines are proposed based on either worst case design strategy or auto-tuning strategy.
V2 control has advantages of simple implementation and fast transient response and is widely used in industry for POL and VR applications. However, the capacitor voltage sideband effect, which casues the instability problem when ceramic capacitors are employed, also needs to be taken into consideration in modeling. Chapter III proposed a unified equivalent circuit model of V2 control, the model is built based on non-ideal voltage source concept. The model represents capacitor voltage sideband effect with a Re2-Le2 branch, which forms the double pole by resonating with power stage output capacitor. The equivalent circuit model is a complete model and can be used to examine all the transfer functions. Bsed on the unified equivalent circuit model, design guidelines for VR applications and general POL applications are provided in Chapter IV, for both constant on-time V2 control and constant frequency V2 control.
For resonant converters, the small-sginal modelling is very challenging as some of the state variables do not have dc components but contain strong switching frequency component and therefore the average concept breaks down. For SRC, the equivalent circuit model proposed by E. Yang in [E26] based on the results by the extended describing function concept is the most successful model. However, the order of the equivalent circuit model is too high and the transfer functions are still derived based on numerical solution instead of analytical solutions. Chapter V proposes a methodology to simplify the fifth-order equivalent circuit of SRC to a third-order equivalent circuit. The proposed equivalent circuit model can be used to explain the beat frequency dynamics: when switching frequency is far away from resonant frequency, beat frequency will occur; when the two frequencies are close, beat frequency will disappear and another double pole which is determined by equivalent inductor and output capacitor will be formed. For the first time, analytical solutions are provided for all the transfer functions which are very helpful for feedback design.
LLC resonant converters are widely adopted as front-end converter in distributed power system for the telecom, computer and network applications [F2]. Besides, LLC resonant converters are also very popular in other applications, such as LCD, LED and plasma display in TV and flat panels [F3]-[F6]; iron implanter arc power supply[F7]; solar array simulator in photovoltaic application[F8]; fuel cell applications[F9],and so on. For LLC, no simple equivalent circuit model is available and no analytical expressions of transfer functions are presented. Chapter VI proposes an equivalent circuit model for LLC resonant converter. When Fs ≥ Fo, Lm is clamped by the output voltage and LLC behaves very similar as SRC. As a result, the dynamic behavior is similar as SRC: when switching frequency is larger than resonant frequency, the beat frequency double pole show up and the circuit is third-order; when switching frequency is close to resonant frequency, beat frequency double pole disappear and a new double pole formed by equivalent inductor Le and equivalent output capacitor Cf show up. The circuit reduces to second order. When Fs
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Kaštánek, Martin. "Vstupní díl UHF přijímače s velmi nízkou spotřebou." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2008. http://www.nusl.cz/ntk/nusl-217183.
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The purpose of this work was to make a proposal for input parts of receiver for band 430 to 440 MHz. A model of chosen semiconductor triode BFP540 was created in simulation software. Possibilities how to decrease consumption of this semiconductor triode, keeping the profit, were investigated through the simulation.In compromise consumption, keeping the profit of the amplifier - an optimal operating point for this semiconductor triode UCE = 1,2 V and IC = 2 mA was found. It was tested through the testing wiring with noise microstrips conformity. Ascertained knowledge was used for construction of tuner for UHF receiver. An operating point of input amplifier of UHF receiver was owing to power supply amplifier forced for bigger effectiveness to UCE = 2,65 V and IC = 2,0 mA. Suppression of mirror frequency is provided with Helix filter of the third order, because of intermediate frequency 10,7 MHz. Mixing on intermediate frequency is made again by semiconductor triode BFP540. Selectivity of receiver is provided with intermediate frequency crystal filter 10,7 MHz with bandwidth 15 kHz. Designed input part enables reception of SSB, FM and digital types of modulation.Bandwidth intermediate frequency exit is adapted to this request To receive particular modulation , it is necessary to complete intermediate frequency signal way with appropriate intermediate frequency filter.
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Björsell, Niclas. "Modeling Analog to Digital Converters at Radio Frequency." Doctoral thesis, KTH, Signalbehandling, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-4523.
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Det här arbetet handlar om att ta fram beteendemodeller av analog till digital omvandlare avsedda för tillämpningar i radiofrekvensområdet. Det gäller tillämpningar inom telekommunikation men även in test- och mätinstrument där omvandlingen från analoga till digitala signaler ofta är en prestandamässig flaskhals. Modellerna är avsedda att användas för att efterbehandla utdata från omvandlaren och på så sätt förbättra prestanda på den digitala signalen. Genom att skapa modeller av verkliga omvandlare och hur dessa avviker från ett idealt beteende kan ofullständigheter korrigeras genom så kallad postkorrigering. Beteendemodeller innebär att genererar en lämplig insignal, mäta utdata och beräkna en modell. För omvandlare i radiofrekvensområdet ställs höga krav på instrumentering. Den testutrustningen som används är baserad på moderna högprestanda instrument som har kompletterats med specialbyggd utrustning för signalkonditionering och datainsamling. I avhandlingen har även olika insignaler utvärderats med såväl teoretisk som experimentell analys. Det finns ett flertal olika varianter av modeller för att modulera ett olinjär, dynamisk system. För att få en parametereffektiv modell har utgångspunkten varit att utgå från en Volterramodell som på ett optimalt sätt beskriver svagt olinjära dynamiska system, så som analog till digital omvandlare, men som är alltför omfattande i antal parametrar. Volterramodellens har sedan reducerats till en mindre parameterintensiv, modellerstruktur på så sätt att Volterrakärnans symmetriegenskaper jämförts med symmetrierna hos andra modeller. En alternativ metod är att använda en Kautz-Volterramodell. Den har samma generella egenskaper som Volterramodellen, men är inte lika parameterkrävande. I den här avhandlingen redovisas experimentella resultat av Kautz-Volterramodellen som i framtiden kommer att vara intressanta att använda för postkorrigeringen. För att kunna beskriva beteenden som en dynamiska olinjära modellen inte klarar av har modellen kompletterats med en statisk styckvis linjär modellkomponent. I avhandlingen presenteras en sluten lösning för att identifiera samtliga paramervärden i modellen. Vidare har det i avhandlingen genomförs en analys av hur respektive komponent påverkar prestanda på utsignalen. Därigenom erhålls ett mått på den maximala prestandaförbättring som kan uppnås om felet kan elimineras.This work considers behavior modeling of analog to digital converters with applications in the radio frequency range, including the field of telecommunication as well as test and measurement instrumentation, where the conversion from analog to digital signals often is a bottleneck in performance. The models are intended to post-process output data from the converter and thereby improve the performance of the digital signal. By building a model of practical converters and the way in which they deviate from ideal, imperfections can be corrected using post-correction methods. Behavior modeling implies generation of a suitable stimulus, capturing the output data, and characterizing a model. The demands on the test setup are high for converters in the radio frequency range. The test-bed used in this thesis is composed of commercial state-of-the-art instruments and components designed for signal conditioning and signal capture. Further, in this thesis, different stimuli are evaluated, theoretically as well as experimentally. There are a large number of available model structures for dynamic nonlinear systems. In order to achieve a parameter efficient model structure, a Volterra model was used as a starting-point, which can describe any weak nonlinear system with fading memory, such as analog to digital converters. However, it requires a large number of coefficients; for this reason the Volterra model was reduced to a model structure with fewer parameters, by comparing the symmetry properties of the Volterra kernels with the symmetries from other models. An alternative method is the Kautz-Volterra model, which has the same general properties as the Volterra model, but with fewer parameters. This thesis gives experimental results of the Kautz-Volterra model, which will be interesting to apply in a post-correction algorithm in the future. To cover behavior not explained by the dynamic nonlinear model, a complementary piecewise linear model component is added. In this thesis, a closed form solution to the estimation problem for both these model components is given. By gradually correcting for each component the performance will improve step by step. In this thesis, the relation between a given component and the performance of the converter is given, as well as potential for improvement of an optimal post-correction.
QC 20100629
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Björsell, Niclas. "Modeling analog to digital converters at radio frequency /." Stockholm : Signalbehandling, Kungliga Tekniska högskolan, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-4523.
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Maeser, Anna Marie. "Time-frequency dual and quantization." View electronic thesis (PDF), 2009. http://dl.uncw.edu/etd/2009-1/maesera/annamaeser.pdf.
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Ward, Gillian Anne. "Design of a multi-kilowatt, high frequency, DC-DC converter." Thesis, University of Birmingham, 2003. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.274596.
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Neveu, Florian. "Design and implementation of high frequency 3D DC-DC converter." Thesis, Lyon, INSA, 2015. http://www.theses.fr/2015ISAL0133/document.
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L’intégration ultime de convertisseurs à découpage repose sur deux axes de recherche. Le premier axe est de développer les convertisseurs à capacités commutées. Cette approche est compatible avec une intégration totale sur silicium, mais limitée en terme de densité de puissance. Le second axe est l’utilisation de convertisseurs à inductances, qui pâtissent d’imposants composants passifs. Une augmentation de la fréquence permet de réduire les valeurs des composants passifs. Cependant une augmentation de la fréquence implique une augmentation des pertes par commutation, ce qui est contrebalancé par l’utilisation d’une technologie de fabrication plus avancée. Ces technologies plus avancées souffrent quant à elles de limitations au niveau de leur tension d’utilisation. Convertir une tension de 3,3V vers une tension de 1,2V apparait donc comme un objectif ambitieux, particulièrement dans le cas où les objectifs de taille minimale et de rendement supérieur à 90 % sont visés. Un assemblage 3D des composants actifs et passifs permet de minimiser la surface du système. Un fonctionnement à haute fréquence est aussi considéré, ce qui permet de réduire les valeurs requises pour les composants passifs. Dans le contexte de l’alimentation « on-chip », la technologie silicium est contrainte par les fonctions numériques. Une technologie 40 nm CMOS de type « bulk » est choisie comme cas d’étude pour une tension d’entrée de 3,3 V. Les transistors 3,3 V présentent une figure de mérite médiocre, les transistors 1,2 V sont donc choisis. Ce choix permet en outre de présenter une meilleure compatibilité avec une future intégration sur puce. Une structure cascode utilisant trois transistors en série est étudiée est confrontée à une structure standard à travers des simulations et mesures. Une fréquence de +100MHz est choisie. Une technologie de capacités en tranchées est sélectionnée, et fabriquée sur une puce séparée qui servira d’interposeur et recevra la puce active et les inductances. Les inductances doivent être aussi fabriquées de manière intégrée afin de limiter leur impact sur la surface du convertisseur. Ce travail fournit un objet contenant un convertisseur de type Buck à une phase, avec la puce active retournée (« flip-chip ») sur l’interposeur capacitif, sur lequel une inductance est rapportée. Le démonstrateur une phase est compatible pour une démonstration à phases couplées. Les configurations standard et cascode sont comparées expérimentalement aux fréquences de 100 MHz et 200 MHz. La conception de la puce active est l’élément central de ce travail, l’interposeur capacitif étant fabriqué par IPDiA et les inductances par Tyndall National Institute. L’assemblage des différents sous-éléments est réalisé via des procédés industriels. Un important ensemble de mesures ont été réalisées, montrant les performances du convertisseur DC-DC délivré, ainsi que ses limitations. Un rendement pic de 91,5 % à la fréquence de 100 MHz a été démontréUltimate integration of power switch-mode converter relies on two research paths. One path experiments the development of switched-capacitor converters. This approach fits silicon integration but is still limited in term of power density. Inductive DC-DC architectures of converters suffer by the values and size of passive components. This limitation is addressed with an increase in frequency. Increase in switching losses in switches leads to consider advanced technological nodes. Consequently, the capability with respect to input voltage is then limited. Handling 3.3 V input voltage to deliver an output voltage in the range 0.6 V to 1.2 V appears a challenging specification for an inductive buck converter if the smallest footprint is targeted at +90 % efficiency. Smallest footprint is approached through a 3D assembly of passive components to the active silicon die. High switching frequency is also considered to shrink the values of passive components as much as possible. In the context of on-chip power supply, the silicon technology is dictated by the digital functions. Complementary Metal-Oxide- Semiconductor (CMOS) bulk C40 is selected as a study case for 3.3 V input voltage. 3.3 V Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) features poor figure of merits and 1.2 V standard core, regular devices are preferred. Moreover future integration as an on-chip power supply is more compatible. A three-MOSFET cascode arrangement is experimented and confronted experimentally to a standard buck arrangement in the same technology. The coupled-phase architecture enables to reduce the switching frequency to half the operating frequency of the passive devices. +100MHz is selected for operation of passive devices. CMOS bulk C40 offers Metal-Oxide-Metal (MOM) and MOS capacitors, in density too low to address the decoupling requirements. Capacitors have to be added externally to the silicon die but in a tight combination. Trench-cap technology is selected and capacitors are fabricated on a separate die that will act as an interposer to receive the silicon die as well as the inductors. The work delivers an object containing a one-phase buck converter with the silicon die flip-chipped on a capacitor interposer where a tiny inductor die is reported. The one-phase demonstrator is suitable for coupled-phase demonstration. Standard and cascode configurations are experimentally compared at 100 MHz and 200 MHz switching frequency. A design methodology is presented to cover a system-to-device approach. The active silicon die is the central design part as the capacitive interposer is fabricated by IPDiA and inductors are provided by Tyndall National Institute. The assembly of the converter sub-parts is achieved using an industrial process. The work details a large set of measurements to show the performances of the delivered DC/DC converters as well as its limitations. A 91.5% peak efficiency at 100MHz switching frequency has been demonstrated
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Sagneri, Anthony (Anthony David). "Design of a Very High Frequency dc-dc boost converter." Thesis, Massachusetts Institute of Technology, 2007. http://hdl.handle.net/1721.1/38664.
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Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.Includes bibliographical references (p. 167-169).
Passive component volume is a perennial concern in power conversion. With new circuit architectures operating at extreme high frequencies it becomes possible to miniaturize the passive components needed for a power converter, and to achieve dramatic improvements in converter transient performance. This thesis focuses on the development of a Very High Frequency (VHF, 30 - 300 MHz) dc-dc boost converter using a MOSFET fabricated from a typical power process. Modeling and design studies reveal the possibility of building VHF dc-dc converters operable over the full automotive input voltage range (8 - 18 V) with transistors in a 50 V power process, through use of newly-developed resonant circuit topologies designed to minimize transistor voltage stress. Based on this, a study of the design of automotive boost converters was undertaken (e.g., for LED headlamp drivers at output voltages in the range of 22 - 33 V.) Two VHF boost converter prototypes using a [Phi]2 resonant boost topology were developed. The first design used an off the shelf RF power MOSFET, while the second uses a MOSFET fabricated in a BCD process with no special modifications.
(cont.) Soft switching and soft gating of the devices are employed to achieve efficient operation at a switching frequencies of 75 MHz in the first case and 50 MHz in the latter. In the 75 MHz case, efficiency ranges to 82%. The 50 MHz converter, has efficiencies in the high 70% range. Of note is low energy storage requirement of this topology. In the case of the 50 MHz converter, in particular, the largest inductor is 56 nH. Finally, closed-loop control is implemented and an evaluation of the transient characteristics reveals excellent performance.
by Anthony Sagneri.
S.M.
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Jacques, R. "A frequency converter to power a soudronic VAA20 welding machine." Master's thesis, University of Cape Town, 1991. http://hdl.handle.net/11427/22037.
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Bibliography: pages 135-136.This thesis covers the design, manufacture and testing of a frequency converter, that transforms three phase AC 380V, into one phase AC 50 to 120Hz, 100 to 650V. The inverter output is intended to power a Soudronic VAA2 O welding machine. The input to the converter was stepped down and rectified to generate an unregulated DC bus of 250V. A full bridge transistorised inverter was controlled by a 6809 microprocessor that generated pulse width modulated waveforms to derive a desired inverter output current and frequency. A base drive was developed to control the power transistor in the inverter. It facilitates the rapid switching of the transistors and provides them with overcurrent protection. The inverter was originally constructed in push-pull configuration. At 20KVA this type of inverter was found to be undesirable, so a full bridge configuration was used in the final design. The converter has been installed and is operating successfully. Many recommendations are made for the improvement of future converters. The changes will improve the operation of the converter and can also reduce the size, cost and weight of it.
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Chu, Alex. "Evaluation and Design of a SiC-Based Bidirectional Isolated DC/DC Converter." Thesis, Virginia Tech, 2018. http://hdl.handle.net/10919/81994.
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Galvanic isolation between the grid and energy storage unit is typically required for bidirectional power distribution systems. Due to the recent advancement in wide-bandgap semiconductor devices, it has become feasible to achieve the galvanic isolation using bidirectional isolated DC/DC converters instead of line-frequency transformers.
A survey of the latest generation SiC MOSFET is performed. The devices were compared against each other based on their key parameters. It was determined that under the given specifications, the most suitable devices are X3M0016120K 1.2 kV 16 mohm and C3M0010090K 900 V 10 mohm SiC MOSFETs from Wolfspeed.
Two of the most commonly utilized bidirectional isolated DC/DC converter topologies, dual active bridge and CLLC resonant converter are introduced. The operating principle of these converter topologies are explained. A comparative analysis between the two converter topologies, focusing on total device loss, has been performed. It was found that the CLLC converter has lower total device loss compared to the dual active bridge converter under the given specifications. Loss analysis for the isolation transformer in the CLLC resonant converter was also performed at different switching frequencies. It was determined that the total converter loss was lowest at a switching frequency of 250 kHz
A prototype for the CLLC resonant converter switching at 250 kHz was then designed and built. Bidirectional power delivery for the converter was verified for power levels up to 25 kW. The converter waveforms and efficiency data were captured at different power levels. Under forward mode operation, a peak efficiency of 98.3% at 15 kW was recorded, along with a full load efficiency value of 98.1% at 25 kW. Under reverse mode operation, a peak efficiency of 98.8% was measured at 17.8 kW. The full load efficiency at 25 kW under reverse mode operation is 98.5%.Master of Science
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Kratochvíl, Petr. "Generátor přesného kmitočtu - DDS." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2009. http://www.nusl.cz/ntk/nusl-217814.
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This work deals with frequency generators based on the direct digital synthesis method DDS. Basic principles and attributes of the frequency generator DDS are explained. The text describes parameters influencing and defining a quality of the generated signal. The list of available integrated circuits realizing the direct digital synthesis is mentioned. A construction of the DDS generator with a device AD9954 and the generator control are described. At the end of the work, the function and parameters of the designed generator are verified.