Academic literature on the topic 'Gain-boosting of cascode amplifiers'

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Journal articles on the topic "Gain-boosting of cascode amplifiers"

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Wang, Lin Feng, Qiao Meng, and Hao Zhi. "Design of a Gain-Boosted Cascode Amplifier with High Unity-Bandwidth." Applied Mechanics and Materials 614 (September 2014): 237–40. http://dx.doi.org/10.4028/www.scientific.net/amm.614.237.

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This paper presents a high unity gain bandwidth fully differential folded-cascode operational amplifier using gain-boosted technique. The amplifier is designed in TSMC 0.18μm 1P6M CMOS technology. The unity-gain bandwidth (GBW) and poles of the gain-boosting amplifiers were carefully designed to improve the stability. The implemented design provides a direct current (DC) gain of around 93 dB with a unity gain frequency of 1.8GHz. It exhibits a DC gain larger than 88dB when the output common-mode voltage between 0.6 V and 1.2V. the overall layout size is 96μm×120μm.
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Raman, J., P. Rombouts, and L. Weyten. "Folded-cascode amplifier with efficient feedforward gain-boosting." Electronics Letters 46, no. 21 (2010): 1425. http://dx.doi.org/10.1049/el.2010.2543.

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BEN-ESMAEL, M., F. J. LIDGEY, K. HAYATLEH, and B. L. HART. "GAIN-BANDWIDTH TRADE-OFF IN THE CMOS CASCODE AMPLIFIER." Journal of Circuits, Systems and Computers 22, no. 03 (March 2013): 1350013. http://dx.doi.org/10.1142/s0218126613500138.

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The cascode amplifier has the potential of providing high gain and high bandwidth simultaneously. However, the design is not as intuitive as one might at first think. In this paper, we present a detailed analysis of the single cascode amplifiers. The relationship between gain and bandwidth is important. When used to achieve maximum bandwidth the voltage gain of the common-source stage is close to unity. However, when the cascode is designed to obtain a high voltage gain, then the gain-bandwidth trade-off, typical in the common source amplifier, reappears. This analysis is used to provide the basis for practical cascode amplifier design.
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Monsurrò, Pietro, Salvatore Pennisi, Giuseppe Scotti, and Alessandro Trifiletti. "0.9-V CMOS cascode amplifier with body-driven gain boosting." International Journal of Circuit Theory and Applications 37, no. 2 (March 2009): 193–202. http://dx.doi.org/10.1002/cta.539.

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Assaad, Rida, and Jose Silva-Martinez. "Recent Advances on the Design of High-Gain Wideband Operational Transconductance Amplifiers." VLSI Design 2009 (July 28, 2009): 1–11. http://dx.doi.org/10.1155/2009/323595.

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Feed-forward techniques are explored for the design of high-frequency Operational Transconductance Amplifiers (OTAs). For single-stage amplifiers, a recycling folded-cascode OTA presents twice the GBW (197.2 MHz versus 106.3 MHz) and more than twice the slew rate (231.1 V/s versus 99.3 V/s) as a conventional folded cascode OTA for the same load, power consumption, and transistor dimensions. It is demonstrated that the efficiency of the recycling folded-cascode is equivalent to that of a telescopic OTA. As for multistage amplifiers, a No-Capacitor Feed-Forward (NCFF) compensation scheme which uses a high-frequency pole-zero doublet to obtain greater than 90 dB DC gain, GBW of 325 MHz and better than phase margin is discussed. The settling-time- of the NCFF topology can be faster than that of OTAs with Miller compensation. Experimental results for the recycling folded-cascode OTA fabricated in TSMC 0.18 m CMOS, and results of the NCFF demonstrate the efficiency and feasibility of the feed-forward schemes.
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Wang, Zhe Fei, Yi Jiang Cao, and Ju Meng Feng. "A Design of High Performance CMOS Folded Cascode Operational Amplifier." Advanced Materials Research 981 (July 2014): 31–35. http://dx.doi.org/10.4028/www.scientific.net/amr.981.31.

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This paper describes a kind of folded cascode amplifier, which not only has high gain, large output swing characteristics, and its outputs can be self-compensation, it has a strong suppression capability with voltage noise. Based on a 0.5μm CMOS process uses two operational amplifiers. Through software emulation corrected the error which was caused by theoretical calculation. Has good performance in gain, noise, swing, phase margin, common mode rejection ratio and other parameters.
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Akbari, Meysam, and Omid Hashemipour. "Multi-Path Class AB Operational Amplifier with High Performance for SC Circuits." Journal of Circuits, Systems and Computers 25, no. 11 (August 14, 2016): 1650144. http://dx.doi.org/10.1142/s0218126616501449.

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In this paper, a single-stage multi-path operational transconductance amplifier (OTA) with fast-settling response for high performance applications is designed. The produced amplifier uses current-shunt technique, double recycling structure, cross-coupled positive feedback configuration and all idle devices in the signal path to enhance transconductance of the conventional folded cascode (FC) amplifier. These transconductance boosting techniques lead to higher DC gain, gain bandwidth (GBW), slew rate and lower settling time compared to the previous FC structures while phase margin is degraded. Simulation results are presented using 90 nm CMOS technology which show 1,800% increment in GBW and a 33.2 dB DC gain improvement in the approximately same power consumption compared to the conventional FC amplifier.
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He, Fei, Qian Xie, and Zheng Wang. "A study on gain boosting techniques of cascode amplifier at near-f frequencies based on gain plane approach." Microelectronics Journal 112 (June 2021): 105064. http://dx.doi.org/10.1016/j.mejo.2021.105064.

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Idros, Norhamizah, Zulfiqar Ali Abdul Aziz, and Jagadheswaran Rajendran. "A 1-mm2 CMOS-pipelined ADC with integrated folded cascode operational amplifier." Microelectronics International 37, no. 4 (September 11, 2020): 205–13. http://dx.doi.org/10.1108/mi-05-2020-0030.

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Purpose The purpose of this paper is to demonstrate the acceptable performance by using the limited input range towards lower open-loop DC gain operational amplifier (op-amp) of an 8-bit pipelined analog-to-digital converter (ADC) for mobile communication application. Design/methodology/approach An op-amp with folded cascode configuration is designed to provide the maximum open-loop DC gain without any gain-boosting technique. The impact of low open-loop DC gain is observed and analysed through the results of pre-, post-layout simulations and measurement of the ADC. The fabrication process technology used is Silterra 0.18-µm CMOS process. The silicon area by the ADC is 1.08 mm2. Findings Measured results show the differential non-linearity (DNL) error, integral non-linearity (INL) error, signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) are within −0.2 to +0.2 LSB, −0.55 LSB for 0.4 Vpp input range, 22 and 27 dB, respectively, with 2 MHz input signal at the rate of 64 MS/s. The static power consumption is 40 mW with a supply voltage of 1.8 V. Originality/value The experimental results of ADC showed that by limiting the input range to ±0.2 V, this ADC is able to give a good reasonable performance. Open-loop DC gain of op-amp plays a critical role in ADC performance. Low open-loop DC gain results in stage-gain error of residue amplifier and, thus, leads to nonlinearity of output code. Nevertheless, lowering the input range enhances the linearity to ±0.2 LSB.
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Basu, Joydeep, and Pradip Mandal. "Switched-Capacitor Common-Mode Feedback-Based Fully Differential Operational Amplifiers and its Usage in Implementation of Integrators." Journal of Circuits, Systems and Computers 29, no. 14 (March 20, 2020): 2050223. http://dx.doi.org/10.1142/s0218126620502230.

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For stabilizing the common-mode output voltage of fully differential operational amplifiers, switched-capacitor (SC) type of common-mode feedback (CMFB) is a familiar technique. This is appropriate for implementing high-gain wide-swing low-power op-amps due to its benefits of minimum power consumption, superior linearity across a large amplifier output swing range, and improved feedback loop stability in comparison to continuous-time CMFB. However, the usage of SC-CMFB requires careful attention to some realistic aspects, details of many of which are available in literature. Nonetheless, its adverse effect on the op-amp’s differential-mode gain has not been investigated much. The explanation for this effect is the SC-CMFB-induced equivalent resistive loading, and this is particularly significant in amplifiers like folded cascode which are intended to provide a high gain. This issue of drop in op-amp dc gain because of SC-CMFB, and the consequence on the realization of continuous-time and discrete-time forms of integrators utilizing such amplifiers is the topic of discussion in this paper. Relevant analytical derivations and circuit simulations at the transistor level are provided. A couple of design guidelines and circuit topologies for minimizing the loading-induced gain reduction are also presented.
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Dissertations / Theses on the topic "Gain-boosting of cascode amplifiers"

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Sarkar, Saikat. "Silicon-based millimeter-wave front-end development for multi-gigabit wireless applications." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2007. http://hdl.handle.net/1853/26590.

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Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2008.
Committee Chair: Laskar, Joy; Committee Member: Chang, Jae Joon; Committee Member: Cressler, John D.; Committee Member: Kornegay, Kevin T.; Committee Member: Lee, Chang-Ho; Committee Member: Tentzeris, Manos M.. Part of the SMARTech Electronic Thesis and Dissertation Collection.
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Vora, Ashish. "A 90 dB, 85 MHz operational transconductance amplifier (OTA) using gain boosting technique /." Link to online version, 2005. https://ritdml.rit.edu/dspace/handle/1850/1319.

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Säll, Erik. "Design of a Low Power, High Performance Track-and-Hold Circuit in a 0.18µm CMOS Technology." Thesis, Linköping University, Department of Electrical Engineering, 2002. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1353.

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This master thesis describes the design of a track-and-hold (T&H) circuit with 10bit resolution, 80MS/s and 30MHz bandwidth. It is designed in a 0.18µm CMOS process with a supply voltage of 1.8 Volt. The circuit is supposed to work together with a 10bit pipelined analog to digital converter.

A switched capacitor topology is used for the T&H circuit and the amplifier is a folded cascode OTA with regulated cascode. The switches used are of transmission gate type.

The thesis presents the design decisions, design phase and the theory needed to understand the design decisions and the considerations in the design phase.

The results are based on circuit level SPICE simulations in Cadence with foundry provided BSIM3 transistor models. They show that the circuit has 10bit resolution and 7.6mW power consumption, for the worst-case frequency of 30MHz. The requirements on the dynamic performance are all fulfilled, most of them with large margins.

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Cai, Xiaowei Ph D. Massachusetts Institute of Technology. "Efficient THz lasers and broadband amplifiers based on quantum cascade gain media." Thesis, Massachusetts Institute of Technology, 2014. http://hdl.handle.net/1721.1/93073.

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Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014.
Cataloged from PDF version of thesis.
Includes bibliographical references (pages 105-110).
One of the most important applications for Terahertz (THz) quantum cascade (QC) lasers is to provide compact and powerful frequency-stabilized solid-state sources as local oscillators in heterodyne receivers for astronomical studies. The first part of the thesis is dedicated to the device cavity design, fabrication and characterization of the microstrip antenna coupled third-order distributed feedback QC lasers aimed for 2.060 THz atomic oxygen line. THz travelling-wave QC amplifiers are highly desired to achieve broadband amplification of THz radiation in free space. The second part of the thesis focuses on the development of 4.3 THz travelling-wave QC amplifier by monolithically integrating horn antennas and attaching silicon lenses at the metal-metal waveguide facets.
by Xiaowei Cai.
S.M.
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Singh, Rishi Pratap. "A High-Gain, Low-Power CMOS Operational Amplifier Using Composite Cascode Stage in the Subthreshold Region." BYU ScholarsArchive, 2011. https://scholarsarchive.byu.edu/etd/2510.

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This thesis demonstrates that the composite cascode differential stage, operating in the subthreshold region, can form the basis of a high gain (113 dB) and low-power op amp (28.1 µW). The circuit can be fabricated without adding a compensation capacitance. The advantages of this architecture include high voltage gain, low bandwidth, low harmonic distortion, low quiescent current and power, and small chip area. These advantages suggest that this design might be well-suited for biomedical applications where low power, low noise bio-signal amplifiers capable of amplifying signals in the millihertz-to-kilohertz range is required.
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Kilic, Hasan Huseyin. "Design And Fabrication Of A High Gain, Broadband Microwave Limiting Amplifier Module." Master's thesis, METU, 2011. http://etd.lib.metu.edu.tr/upload/12613616/index.pdf.

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Microwave limiting amplifiers are the key components of Instantaneous Frequency Measurement (IFM) systems. Limiting amplifiers provide constant output power level in a wide input dynamic range and over a broad frequency band. Moreover, limiting amplifiers are high gain devices that are used to bring very low input power levels to a constant output power level. Besides, limiting amplifiers are required to provide minimum small signal gain ripple in order not to reduce the sensitivity of the IFM system over the operating frequency band. In this thesis work, a high gain, medium power, 2-18 GHz limiting amplifier module is designed, simulated, fabricated and measured. First, a 3-stage cascaded amplifier with 27 dB small signal gain is designed and fabricated. The 3-stage amplifier is composed of a novel cascaded combination of negative feedback and distributed amplifiers that provides the minimum small signal gain ripple and satisfactory input and output return losses inside 2-18 GHz frequency band. Then, the designed two 3-stage amplifiers and one 4-stage amplifier are cascaded to constitute a limiting amplifier module with minimum 80 dB small signal gain. The designed 10-stage limiting amplifier module also includes an analog voltage controllable attenuator to be used for compensating the gain variations resulting from temperature changes. The fabricated 10-stage limiting amplifier module provides 20 +/- 1.2 dBm output power level and excellent small signal gain flatness, +/- 2.2 dB, over 2-18 GHz frequency range.
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Sengupta, Susanta. "Technology-independent CMOS op amp in minimum channel length." Diss., Available online, Georgia Institute of Technology, 2004:, 2004. http://etd.gatech.edu/theses/available/etd-07092004-101204/unrestricted/sengupta%5Fsusanta%5F200407%5Fphd.pdf.

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Thesis (Ph. D.)--School of Electrical and Computer Engineering, Georgia Institute of Technology, 2005. Directed by Phillip Allen.
Morley, Thomas, Committee Member ; Leach, Marshall, Committee Member ; Ayazi, Farrokh, Committee Member ; Rincon-Mora, Gabriel, Committee Member ; Allen, Phillip, Committee Chair. Includes bibliographical references.
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Huang, Guan-Jie, and 黃冠傑. "Design of K-Band CMOS Gain Boosting Low Noise Amplifier and V-Band GaAs pHEMT Cascode Balance Power Amplifier." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/70560293778324393836.

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Yeh, Han Chih, and 葉涵之. "Design and Analysis of Millimeter-wave Variable Gain Amplifiers with Built-in Linearizer and Transformer Cascode LowNoise Amplifiers." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/41274662703844394528.

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博士
國立臺灣大學
電信工程學研究所
101
In this dissertation, the designs and analysis of millimeter-wave (MMW) variable gain amplifier (VGA) in millimeter-wave (MMW) regime, MMW transformer multi-cascode low noise amplifiers (LNAs) and low voltage cascode LNAs with magnetic coupled technique are investigated. One goal of the dissertation is to design and implement the MMW VGA with impressive performance in modern compound semiconductor process. Based on current steering technique and noise reduction technique, the VGA has a wide gain control range and low noise figure at the high gain state at MMW frequencies in TSMC complementary metal-oxide-semiconductor (CMOS) 90nm technology. Compared with conventional designs, this work presents better RF performance than the previous reported V-band VGAs. At the same time, it overcomes the linearity design bottleneck of VGAs to operate at V-band frequency, and is the first RF VGA with the built-in linearizers in MMW regime. The transformer multi-cascode amplified structure and the low voltage multi-cascode structure are also described and analyzed in the dissertation. The multi-cascode structure has the advantages of miniature size and high gain. However, since the multi-cascode structure will contribute excess noise at high frequency. Consequently, a low power transformer multi-cascode structure, which incorporates with the high gain characteristic is proposed and employed to the design of millimeter-wave LNAs. For demonstration, a Q-band LNA in CMOS 90 nm process with transformer quadruple-cascode structure and a V-band LNA in 90 nm technology with transformer triple-cascode device are fabricated. The two LNAs feature lower power consumption, better noise figure, higher gain, wider band performance and more compact size than the conventional LNAs. To the best of our knowledge, the Q-band LNA is the first quadruple-cascode LNA implemented in MMW frequency. In order to improve the high supply voltage issue in multi-cascode structure, the magnetic coupled technique is proposed. With this technique, the supply voltage and the noise figure are further reduced. Thus, the multi-cascode topology can be applied to implement CMOS LNAs for low voltage system applications. For demonstration, a Q-band LNA and two V-band LNAs with this technique are designed and fabricated by using 90nm CMOS technology. These three LNAs feature higher gain, lower noise figure, much lower supply voltage and better linearity than the conventional multi-cascode LNAs and the conventional LNAs.
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Lin, Tse-Hsiao, and 林則孝. "Research on Gain Flatness and Stability for Cascade Low Noise Amplifier." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/c2u8y5.

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碩士
國立臺北科技大學
電資碩士在職專班研究所
102
This thesis focuses on the research and development of cascade low noise amplifier circuit that works with high dynamic input rang and suits for Digital Vedio Broadcasting-Terrestrial(DVB-T) frequency. There are two interest topics in this thesis, one is the unstability that caused by high linear gain of cascade low noise amplifier. Two is the gain flatness degradation which occurs with cascade LNA, This thesis proposes a solution to slove with those two issues, that is a inter-stage circuit considered with passive inductor, capacitor and resistor components. The goal of the cascade LNA not only obtain an unconditional stability, but also has good gain flatness. The measurements present that the proposed cascade LNA possesses low noise figure(NF<1), High gain(40±0.5), good flatness(±0.5dB), and unconditional stable (K>1) with respect to the frequency from 470 to 862MHz for DVB-T receiver system.
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Books on the topic "Gain-boosting of cascode amplifiers"

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Póvoa, Ricardo Filipe Sereno, João Carlos da Palma Goes, and Nuno Cavaco Gomes Horta. A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain. Cham: Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-319-95207-9.

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João Carlos da Palma Goes, Nuno Cavaco Gomes Horta, and Ricardo Filipe Sereno Póvoa. A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain. Springer, 2019.

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Book chapters on the topic "Gain-boosting of cascode amplifiers"

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Póvoa, Ricardo Filipe Sereno, João Carlos da Palma Goes, and Nuno Cavaco Gomes Horta. "Proposed Family of CMOS Amplifiers." In A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain, 45–84. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-95207-9_3.

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Pereira, Nuno, Luis B. Oliveira, and João Goes. "Design of Cascode-Based Transconductance Amplifiers with Low-Gain PVT Variability and Gain Enhancement Using a Body-Biasing Technique." In IFIP Advances in Information and Communication Technology, 590–99. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-37291-9_64.

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Vogel, Burkhard. "The Cascode Amplifier (CAS)." In How to Gain Gain, 303–17. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-33033-9_14.

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Póvoa, Ricardo Filipe Sereno, João Carlos da Palma Goes, and Nuno Cavaco Gomes Horta. "Introduction." In A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain, 1–5. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-95207-9_1.

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Póvoa, Ricardo Filipe Sereno, João Carlos da Palma Goes, and Nuno Cavaco Gomes Horta. "Background and State of the Art." In A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain, 7–44. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-95207-9_2.

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Póvoa, Ricardo Filipe Sereno, João Carlos da Palma Goes, and Nuno Cavaco Gomes Horta. "Design Optimization and Results." In A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain, 85–114. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-95207-9_4.

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Póvoa, Ricardo Filipe Sereno, João Carlos da Palma Goes, and Nuno Cavaco Gomes Horta. "Integrated Prototypes and Experimental Evaluation." In A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain, 115–32. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-95207-9_5.

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Póvoa, Ricardo Filipe Sereno, João Carlos da Palma Goes, and Nuno Cavaco Gomes Horta. "Conclusions and Future Prospects." In A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain, 133–35. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-95207-9_6.

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El Bakkali, Moustapha, Naima Amar Touhami, and Taj-Eddin Elhamadi. "High Gain Cascaded GaAs-pHEMT Broadband Planar Low Noise Amplifier for WiMAX-802.16b Applications." In Lecture Notes in Electrical Engineering, 1101–10. Singapore: Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-33-6893-4_100.

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Yip, Ching Wen. "The Design and Modeling of 2.4 GHz and 3.5 GHz MMIC LNA." In Advances in Monolithic Microwave Integrated Circuits for Wireless Systems, 157–84. IGI Global, 2012. http://dx.doi.org/10.4018/978-1-60566-886-4.ch007.

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LNA is an electronic amplifier that is required in receiver systems to increase the amplitude of the very low level signals from the antenna without adding too much noise. Software Advance Design System (ADS) was used to simulate the circuit and design the layout. LNA was designed using cascode topology with feedback techniques which produces better matching and unconditionally stable over the entire desired frequencies. For the 2.4 GHz operation, the amplifier achieves gain of 14.949 dB, noise figure of 1.951 dB and input reflection coefficient of -10.419 dB. With operating voltage supply at 3V, the total current consumption is 13 mA. For 3.5GHz amplifier, gain is 22.985 dB, noise figure is 1.964dB, input reflection coefficient is -12.427 dB and current consumption is 18 mA.
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Conference papers on the topic "Gain-boosting of cascode amplifiers"

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Bradford, Bryce T., Wolfgang Krautschneider, and Dietmar Schroeder. "A Gain Boosted Folded Cascode using Telescopic Boosting Amplifiers with Switched Capacitor Input Level Shifters." In Biomedical Engineering. Calgary,AB,Canada: ACTAPRESS, 2013. http://dx.doi.org/10.2316/p.2013.791-052.

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Scanlan, A. "Fast settling gain boosted folded cascode amplifiers." In IET Irish Signals and Systems Conference (ISSC 2006). IEE, 2006. http://dx.doi.org/10.1049/cp:20060459.

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Rahim, S. A. Enche Ab, and I. M. Azmi. "A CMOS single stage fully differential folded cascode amplifier employing gain boosting technique." In 2011 International Symposium on Integrated Circuits (ISIC). IEEE, 2011. http://dx.doi.org/10.1109/isicir.2011.6131939.

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Ahmed, Moaaz, Ikramullah Shah, Fang Tang, and Amine Bermak. "An improved recycling folded cascode amplifier with gain boosting and phase margin enhancement." In 2015 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2015. http://dx.doi.org/10.1109/iscas.2015.7169186.

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Ni, Menghu, Qian Xie, Fei He, and Zheng Wang. "A Novel Design of Double Gain Boosting Inductor Cascode Amplifier at Near-fmax Frequencies." In 2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA). IEEE, 2020. http://dx.doi.org/10.1109/icta50426.2020.9331993.

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Yang, Yi, David M. Binkley, and Changzhi Li. "Modeling and optimization of fast-settling time gain-boosted cascode CMOS amplifiers." In SOUTHEASTCON 2010. IEEE, 2010. http://dx.doi.org/10.1109/secon.2010.5453927.

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Banda, Gowthami Prasanna, and Subhajit Sen. "A low voltage cascode biasing circuit with gain-boosting." In 2015 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT). IEEE, 2015. http://dx.doi.org/10.1109/conecct.2015.7383872.

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Harsoori, Mohammed Mazharuddin, Tun Zainal Azni Zulkifli, Umber Abbas, and Sami Sattar. "A gain boosting single stage cascode LNA for millimeter-wave applications." In 2017 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia). IEEE, 2017. http://dx.doi.org/10.1109/primeasia.2017.8280376.

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Nakamura, H., S. Ichino, H. Hayakawa, and H. Ogoshi. "CSO distortion suppression by gain spectrum control of cascaded EDFAs." In Optical Amplifiers and Their Applications. Washington, D.C.: OSA, 1994. http://dx.doi.org/10.1364/oaa.1994.fb2.

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Liu, Yongqian, Manish Sharma, and Mark F. Krol. "Dual-cavity Optical Gain Control for EDFAs and EDFA Cascades." In Optical Amplifiers and Their Applications. Washington, D.C.: OSA, 1999. http://dx.doi.org/10.1364/oaa.1999.tha6.

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