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Dissertations / Theses on the topic 'GENERATING CIRCUITS'

Author: Grafiati

Published: 11 September 2023

Last updated: 19 July 2025

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1

Sheikhbahaei, Shahriar. "Astroglial control of respiratory rhythm generating circuits." Thesis, University College London (University of London), 2017. http://discovery.ucl.ac.uk/10037956/.

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Astrocytes, the most numerous glial cells of the central nervous system, are well known to provide neuronal circuits with essential structural and metabolic support. There is also evidence that astrocytes may modulate the activities of neuronal circuits controlling motor rhythms including those of the brainstem’s preBötzinger complex (preBötC) that generates the rhythm of breathing in mammals. However, the extent and mechanisms of active astroglial control of the respiratory rhythm-generating circuits remain unknown. The morphological features of astrocytes in this critical brainstem region

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2

Wang, Jianwei. "Generating, manipulating, distributing and analysing light's quantum states using integrated photonic circuits." Thesis, University of Bristol, 2015. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.702227.

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The emergence of integrated quantum photonics is revolutionising the field of photonic quantum information science and technology. Quantum photonic waveguide platforms, capable of integrating single photon sources, quantum optical circuits and single photon detectors on semiconductor chips by exploring mature micro- or nano-fabrication technology, greatly promise unprecedented complexity, miniaturisation, scalability and robustness for advanced quantum information applications, including quantum communication, sensing, simulation, machine learning and computing. This thesis is to continually e

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3

McKnight, Walter Lee. "A meta system for generating software engineering environments /." The Ohio State University, 1985. http://rave.ohiolink.edu/etdc/view?acc_num=osu1487260531958418.

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4

Ferraz, Rafael da Silva. "Dispositivo para medição de impedância em sistemas de aterramento elétricos em alta frequência." Universidade Federal de Goiás, 2016. http://repositorio.bc.ufg.br/tede/handle/tede/6615.

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Submitted by Cássia Santos (cassia.bcufg@gmail.com) on 2016-12-16T12:38:56Z No. of bitstreams: 2 Dissertação - Rafael da Silva Ferraz - 2016.pdf: 8992095 bytes, checksum: 11544acef63b20e945753d7b895bb5ae (MD5) license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5)<br>Approved for entry into archive by Jaqueline Silva (jtas29@gmail.com) on 2016-12-16T16:57:34Z (GMT) No. of bitstreams: 2 Dissertação - Rafael da Silva Ferraz - 2016.pdf: 8992095 bytes, checksum: 11544acef63b20e945753d7b895bb5ae (MD5) license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5)<br>Mad

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5

Krishnamurthy, Smitha. "SOLAR AND FUEL CELL CIRCUIT MODELING, ANALYSIS AND INTEGRATIONS WITH POWER CONVERSION CIRCUITS FOR DISTRIBUTED GENERATION." Master's thesis, University of Central Florida, 2009. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3501.

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Renewable energy is considered to be one of the most promising alternatives for the growing energy demand in response to depletion of fossil fuels and undesired global warming issue. With such perspective, Solar Cells and Fuel Cells are most viable, environmentally sound, and sustainable energy sources for power generation. Solar and Fuel cells have created great interests in modern applications including distributed energy generation to provide clean energy. The purpose of this thesis was to perform a detailed analysis and modeling of Solar and Fuel cells using Cadence SPICE, and to investiga

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6

Bollinger, S. Wayne. "Hierarchical test generation for CMOS circuits." Diss., This resource online, 1992. http://scholar.lib.vt.edu/theses/available/etd-07282008-134708/.

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7

Hutton, Michael D. "Characterization and parameterized generation of digital circuits." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/tape16/PQDD_0021/NQ27666.pdf.

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8

Vasudevan, Dilip Prasad. "Automatic test pattern generation for asynchronous circuits." Thesis, University of Edinburgh, 2012. http://hdl.handle.net/1842/7670.

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The testability of integrated circuits becomes worse with transistor dimensions reaching nanometer scales. Testing, the process of ensuring that circuits are fabricated without defects, becomes inevitably part of the design process; a technique called design for test (DFT). Asynchronous circuits have a number of desirable properties making them suitable for the challenges posed by modern technologies, but are severely limited by the unavailability of EDA tools for DFT and automatic test-pattern generation (ATPG). This thesis is motivated towards developing test generation methodologies for asy

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9

Franco, Eduardo Vala. "Photonic integrated circuits for next generation PONs." Master's thesis, Universidade de Aveiro, 2017. http://hdl.handle.net/10773/23473.

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Mestrado em Engenharia Eletrónica e Telecomunicação<br>We are living in a time where communications became essential for most of our lives, whether it's in the business world, or in our own homes. The increasing need of higher bandwidth inhibits other networks other than optical ber based ones. Nowadays communications are responsible for a substantial percentage of our energetic footprint, hence Passive Optical Network(PON) are a strong contender for the next step of network implementation. These networks present a low energy consumption because between the transmitter and the receive

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10

Tupuri, Raghuram Srinivasa. "Hierarchical sequential test generation for large circuits /." Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.

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11

Lazzari, Cristiano. "Transistor level automatic generation of radiation-hardened circuits." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2007. http://hdl.handle.net/10183/15506.

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Tecnologias submicrônicas (DSM) têm inserido novos desafios ao projeto de circuitos devido a redução de geometrias, redução na tensão de alimentação, aumento da freqüência e aumento da densidade de lógica. Estas características reduzem significativamente a confiabilidade dos circuitos integrados devido a suscetibilidade a efeitos como crosstalk e acoplamento de substrato. Ainda, os efeitos da radiação são mais significantes devido as partículas com baixa energia começam a ser um problema em tecnologias DSM. Todas essas características enfatizam a necessidade de novas ferramentas de automação.

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12

Lee, Kyung Tek. "Crosstalk fault test generation and hierarchical timing verification in VLSI digital circuits /." Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.

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13

Barradas, Henrique Molina. "Análise do impacto da inserção massiva de geração distribuída fotovoltaica nos níveis de curto-circuito em redes de distribuição de energia elétrica /." Ilha Solteira, 2018. http://hdl.handle.net/11449/157395.

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Orientador: Fábio Bertequini Leão<br>Resumo: Com a crescente utilização de fontes renováveis de geração de energia por parte dos consumidores de energia elétrica, há a necessidade de se avaliar quais serão os impactos da conexão destes geradores no sistema de distribuição. De modo geral, um sistema onde há geradores distribuídos (GDs) conectados apresentará alteração na corrente de curtocircuito devido ao aumento do nível de tensão. A mudança na corrente de curto-circuito que passa pelos dispositivos de proteção pode leva-los a atuações indesejadas, a atuações descoordenadas e a não atuarem. P

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14

Du, Bin. "A global test generation system for sequential circuits." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk2/tape17/PQDD_0007/NQ34670.pdf.

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15

Vilches, Antonio. "First generation monolithically integrated SiGe HFET micropower circuits." Thesis, Imperial College London, 2004. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.405888.

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16

Dezan, Catherine. "Generation automatique de circuits avec alpha du centaur." Rennes 1, 1993. http://www.theses.fr/1993REN10017.

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Alpha du centaur est un atelier de conception d'architectures regulieres. Afin de completer la chaine de conception, une extension de alpha du centaur pour la generation de circuits sous forme d'asic est proposee. La conception d'un circuit se fait par raffinements successifs de specifications initiales abstraites. Les differentes etapes de la conception sont realisees par transformations de programmes decrits en alpha. Les transformations de synthese d'architecture deja existantes sont alors completees par de nouvelles transformations. Ces dernieres permettent de generer le controle du circui

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17

SAMPATH, HEMANTH KUMAR. "A MODULE GENERATION ENVIRONMENT FOR MIXED-SIGNAL CIRCUITS." University of Cincinnati / OhioLINK, 2003. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1052321882.

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18

Dowrick, Thomas Martin. "Biologically motivated circuits for third generation neural networks." Thesis, University of Liverpool, 2011. http://livrepository.liverpool.ac.uk/3024754/.

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19

Yu, Tein-Yow 1961. "Efficient backtracking strategies in test generation." Thesis, The University of Arizona, 1989. http://hdl.handle.net/10150/277191.

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This thesis addresses the problem of backtracking strategies in test generation. First, a methodology which uses status of absolute dominators as a means for causing backtracking during the test generation process is presented. Then, different heuristics that force the test generation to execute the backtracking procedure are investigated. Experiments which generated test patterns for over 30,000 faults have been used to evaluate these heuristics. According to the experimental results, we recommend a new backtracking strategy that has the best performance among the six strategies explored in t

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20

Chang, Wing Chien Christopher. "Operational characteristics of an SCR-based pulse generating circuit." Thesis, Monterey, California: Naval Postgraduate School, 2014. http://hdl.handle.net/10945/44535.

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Approved for public release; distribution is unlimited<br>A commercial off-the-shelf silicon controlled rectifier (SCR) was connected in series with a parallel RC load under DC bias to produce self-terminating voltage pulses. The physics underlying the switching mechanism of the SCR in such a circuit was investigated and the values of load resistance and capacitance varied to ascertain their role on the pulse-generating capability of the circuit. When pulsing was successfully achieved, a reverse recovery current was always present to return the SCR from its on state to its off state. In additi

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21

Jangkrajarng, Nuttorn. "Analog/RF VLSI layout generation : layout retargeting via symbolic template /." Thesis, Connect to this title online; UW restricted, 2006. http://hdl.handle.net/1773/6084.

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22

Prabhu, Sarvesh P. "Techniques for Enhancing Test and Diagnosis of Digital Circuits." Diss., Virginia Tech, 2015. http://hdl.handle.net/10919/51181.

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Test and Diagnosis are critical areas in semiconductor manufacturing. Every chip manufactured using a new or premature technology or process needs to be tested for manufacturing defects to ensure defective chips are not sold to the customer. Conventionally, test is done by mounting the chip on an Automated Test Equipment (ATE) and applying test patterns to test for different faults. With shrinking feature sizes, the complexity of the circuits on chip is increasing, which in turn increases the number of test patterns needed to test the chip comprehensively. This increases the test application t

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23

Thakar, Sarita. "On the generation of test patterns for combinational circuits." Thesis, Virginia Tech, 1993. http://hdl.handle.net/10919/41915.

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24

Li, Wencheng. "A test generation system for behaviorally modeled digital circuits." Diss., This resource online, 1996. http://scholar.lib.vt.edu/theses/available/etd-09232008-144806/.

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25

Macías, Montero José Gabriel. "VIPPIX: A readout ASIC for the next generation of human brain PET scanners." Doctoral thesis, Universitat de Barcelona, 2018. http://hdl.handle.net/10803/663182.

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Positron emission tomography (PET) is a molecular imaging technique used for several decades in nuclear medicine that provides precise physiological information of the human body, what is crucial in oncology, cardiology, and neuropsychiatry. Due to physical, the best spatial resolution of PET is approximately 1 mm for human brain scanners. Unfortunately, the minimum resolution of the best commercial PET scanners for humans is 4-5 mm due to technological limitations. In this thesis, an application specific integrated circuit (ASIC) to readout the energy and the time stamp of a high-density and

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26

Cho, Chang H. "A formal model for behavioral test generation." Diss., This resource online, 1994. http://scholar.lib.vt.edu/theses/available/etd-06062008-170406/.

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27

Raik, Jaan. "Hierarchical test generation for digital circuits represented by decision diagrams /." Tallinn : TTU Press, 2001. http://www.loc.gov/catdir/toc/fy0611/2006530982.html.

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28

Gautrin, Eric. "Madmacs : un systeme d'edition et de generation pour circuits integres." Rennes 1, 1986. http://www.theses.fr/1986REN10082.

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Madmacs est un logiciel interactif de dessin de circuits integres. Outre les commandes classiques de ce type d'editeur, permettant la creation et la modification de figures, madmacs contient des mecanismes originaux qui lui donnent une grande puissance: des commandes de deplacements relatifs du curseur graphique permettent a l'utilisateur de s'affranchir dans une large mesure de la taille des objets manipules; un mecanisme de macro-commandes autorise la definition de nouvelles commandes arbitrairement complexes, (a ce titre madmacs est un systeme ouvert); des procedures d'implantation automati

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29

Caron, David. "Generating a control/data-flow graph representation of a circuit from VHDL for use in circuit synthesis." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk2/tape17/PQDD_0011/MQ27011.pdf.

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30

Lee, Hoon-Kyeu. "An automatic test pattern generation in the logic gate level circuits and MOS transistor circuits at Ohio University." Ohio : Ohio University, 1986. http://www.ohiolink.edu/etd/view.cgi?ohiou1183139647.

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31

Ebbutt, Ralph. "Generation of dicing damage in silicon wafers." Thesis, Georgia Institute of Technology, 1996. http://hdl.handle.net/1853/17878.

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32

Zhang, Yu. "Ultra-thin nanocomposite diffusion barriers for the next-generation integrated circuits /." Available to subscribers only, 2006. http://proquest.umi.com/pqdweb?did=1136093561&sid=27&Fmt=2&clientId=1509&RQT=309&VName=PQD.

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33

Chakrabarti, Sudip. "Test generation for fault isolation in analog and mixed-mode circuits." Diss., Georgia Institute of Technology, 2001. http://hdl.handle.net/1853/14899.

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34

Xia, Likun. "Automatic generation of high level fault simulation models for analogue circuits." Thesis, University of Hull, 2008. http://hydra.hull.ac.uk/resources/hull:1601.

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High level modelling (HLM) for operational amplifiers (op amps) has been previously carried out successfully using models generated by published automated model generation (AMG) approaches. Furthermore, high level fault modelling (HLFM) has been shown to work reasonably well using manually designed fault models. However, no evidence shows that published AMG approaches based on op amps have been used in HLFM.This thesis describes an investigation into the development of adaptive self-tuning algorithms for automated analogue circuit modelling suitable for HLM and HLFM applications. The algorithm

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35

Lazzari, Cristiano. "Automatic layout generation of static CMOS circuits targeting delay and power." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2003. http://hdl.handle.net/10183/5690.

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A crescente evolução das tecnologias de fabricação de circuitos integrados demanda o desenvolvimento de novas ferramentas de CAD. O desenvolvimento tradicional de circuitos digitais a nível físico baseia-se em bibliotecas de células. Estas bibliotecas de células oferecem certa previsibilidade do comportamento elétrico do projeto devido à caracterização prévia das células. Além disto,diferentes versões para cada célula são requeridas de forma que características como atraso e consumo sejam atendidos, aumentando o número de células necessárias em uma bilioteca. A geração automática de leiautes é

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36

KANKIPATI, SUNDER RAJAN. "MACRO MODEL GENERATION FOR SYNTHESIS OF ANALOG AND MIXED SIGNAL CIRCUITS." University of Cincinnati / OhioLINK, 2004. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1077297705.

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37

Huynh, Sam DuPhat. "Testability analysis for mixed analog/digital circuit test generation and design for test /." Thesis, Connect to this title online; UW restricted, 1999. http://hdl.handle.net/1773/6134.

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38

Repole, Kenzo K. D. "Generation of dicing damage in passivated silion wafers." Thesis, Georgia Institute of Technology, 1998. http://hdl.handle.net/1853/17126.

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39

Chen, Baifeng. "High-efficiency Transformerless PV Inverter Circuits." Diss., Virginia Tech, 2015. http://hdl.handle.net/10919/56686.

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With worldwide growing demand for electric energy, there has been a great interest in exploring photovoltaic (PV) sources. For the PV generation system, the power converter is the most essential part for the efficiency and function performance. In recent years, there have been quite a few new transformerless PV inverters topologies, which eliminate the traditional line frequency transformers to achieve lower cost and higher efficiency, and maintain lower leakage current as well. With an overview of the state-of-the-art transformerless PV inverters, a new inverter technology is summarized in th

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40

Nickoloff, Jacob L. "Layout generation and its application." Online access for everyone, 2007. http://www.dissertations.wsu.edu/Thesis/Summer2007/J_Nickoloff_081407.pdf.

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41

VIJAY, VIKAS. "A TOP-DOWN METHODOLOGY FOR SYNTHESIS OF RF CIRCUITS." University of Cincinnati / OhioLINK, 2004. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1100584283.

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42

Kapoor, Shekhar. "Process level test generation for VHDL behavioral models." Thesis, This resource online, 1994. http://scholar.lib.vt.edu/theses/available/etd-05022009-040753/.

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43

Koripalli, Venkat N. "An automatic test pattern generation technique for sequential circuits using scan applications /." Available to subscribers only, 2006. http://proquest.umi.com/pqdweb?did=1203571411&sid=16&Fmt=2&clientId=1509&RQT=309&VName=PQD.

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44

Alani, Alaa Fadhil. "A steady-state response test generation technique for mixed-signal integrated circuits." Thesis, Brunel University, 1993. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.316941.

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45

Thompson, David. "DESIGN OF EMBEDDED POWER SIGNATURE GENERATION CIRCUITS FOR INTERNET OF THINGS SECURITY." OpenSIUC, 2020. https://opensiuc.lib.siu.edu/theses/2707.

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With the wide adoption of Internet of Things (IoT) in applications that involve sensitive information, the security of IoT devices is becoming an important concern. IoT devices face many challenges in securing information due to their low cost and computation constrains. To over come such challenges, different techniques have been developed. One such technique is power analysis. However, power analysis requires equipment that is often bulky, power hungry and expensive, making them unsuitable for many IoT applications. This thesis developed two energy signature capturing circuits that can be em

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46

YANG, WEI. "AUTOMATIC HIGH-LEVEL MODEL GENERATION FOR ANALOG RF CIRCUITS IN VHDL-AMS." University of Cincinnati / OhioLINK, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1109207864.

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47

Lee, Hyung Ki. "Fault simulation and test pattern generation for synchronous and asynchronous sequential circuits." Diss., This resource online, 1993. http://scholar.lib.vt.edu/theses/available/etd-06062008-171759/.

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48

Moore, Christopher Wayne. "Microfabricated Fuel Cells To Power Integrated Circuits." Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/7106.

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Microfabricated fuel cells have been designed and constructed on silicon integrated circuit wafers using many processes common in integrated circuit fabrication, including sputtering, polymer spin coating, reactive ion etching, and photolithography. Fuel delivery microchannels were made through the use of sacrificial polymers. The characteristics of different sacrificial polymers were studied to find the most suitable for this work. A polypropylene carbonate solution containing a photo-acid generator could be directly patterned with ultraviolet exposure and thermal decomposition. The materi

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49

Bittner, Ray Albert. "Development and VLSI implementation of a new neural net generation method." Thesis, This resource online, 1993. http://scholar.lib.vt.edu/theses/available/etd-12042009-020129/.

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50

Johnston, Robert Thomas. "A traffic generation algorithm for SDH digital cross-connects." Diss., Georgia Institute of Technology, 1999. http://hdl.handle.net/1853/15723.

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