Academic literature on the topic 'Germanium sur isolant'
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Journal articles on the topic "Germanium sur isolant":
Akter, T., S. Ahmed, and R. Biswas. "Isolation and identification of some gram-negative bacteria from cockroaches collected from hospital, restaurant and slum areas of Dhaka city, Bangladesh." Journal of Biodiversity Conservation and Bioresource Management 3, no. 2 (April 25, 2018): 63–68. http://dx.doi.org/10.3329/jbcbm.v3i2.36029.
Dissertations / Theses on the topic "Germanium sur isolant":
Cammilleri, Vincenzo Davide. "Hétéroépitaxie latérale de germanium sur silicium oxydéApplication au MOSFET tout germanium sur isolant." Paris 11, 2010. http://www.theses.fr/2010PA112026.
Germanium on insulator (GeOi) layers are necessary for the realization of advanced MOSFET devices such as the ultra thin body fully depleted MOSFET. In this work we studied a growth process by ultra high vacuum chemical vapor deposition for epitaxial lateral overgrowth of germanium on silicon oxide starting from nanometric silicon seeds for the local integration of a GeOI layer on a standard silicon wafer. Preliminary study of a growth process on chemically oxided silicon has shown that defect free monocrystalline Ge crystals develop laterally by wetting the SiO2 layer with an angle of 125 °. For lateral growth on thermal oxide, a process based on the LOCalized Oxidation of Silicon (LOCOS) process has been developed in order to obtain silicon seeds of ten nanometers in width surrounding a silicon oxide layer. The lateral growth of the germanium crystals strongly depends on the orientation of the seeds from which the growth begins. Analyses by high resolution transmission electron microscopy and by X-ray diffraction show that the Ge crystals are monocrystalline and almost completely relaxed. The interface between oxide and germanium is free from defects. The coalescence of Ge crystals from different seeds leads to crystal without grain boundary. The observed dislocations are localized at the silicon/germanium interface and are identified as misfit dislocation for adaptation in the non-nanometric direction of the seed : the relaxation is elastic in the order direction. Planarization of the facetted Ge crystals by chemical mechanical polishing is possible, which is interesting for heterogeneous integration of materials on silicon substrate
Vincent, Benjamin. "Procédés de réalisation de matériaux "germanium sur isolant" par technique de condensation du germanium." Grenoble INPG, 2008. http://www.theses.fr/2008INPG0079.
Elaboration of SGOI (Silicon Germanium On Insulator) - GeOI (Ge On Insulator) substrates is detailed in this thesis report, by an innovative process called the Germanium condensation technique. A first identification of the SGOI layers characteristics, which elaboration by the Ge condensation technique is adapted for is proposed: the process is particul, efficient to obtain 10-20nm mid Ge enriched (25-75%) SGOI layers whereas it presents different issues for elaboration ultrathin «10nm) and high Ge enriched (>75%) ones. An entire procedure is proposed for elaboration of 50nm G wafers with subsequent device integrations and characterizations. A 100% enhancement for hole mobility within pMOSFETs elaborated on such layers compared to SOI devices has been demonstrated. Due to the lack of performances concerning GeOI nMOSFETs, elaboration of hybrid SOI-GeOI substrates by local Ge condensation techniques is finally proposed
Ngo, Thi-Phuong. "Cristaux photoniques sur silicium avec des îlots quantiques Ge/Si et du germanium pur." Paris 11, 2010. http://www.theses.fr/2010PA112001.
The work of this thesis investigates photonic devices based on Ge/Si quantum dots and pure germanium for near-infrared nanophotonics. The first part explores the high quality factor photonic crystal cavities by using of self-assembled Ge/Si quantum dot photoluminescence. This work concentrates in L3 and H1 cavities realized on photonic air-bridge structures in silicon. By using the internal source technique we show that the optical characterization allows the determination of the parameters associated with recombination dynamics of charge carriers. The quality factor of the fundamental mode in these cavities is only limited by the spectrometer resolution, not the fabrication process. The second part focuses on germanium-on-insulator (GeOI) photonic crystals. The GeOI substrate consists of a thin layer of pure germanium, separated by a silica layer from the silicon substrate. The optical properties are probed by the direct band gap recombination of pure germanium at room temperature. Resonant optical modes are observed between 1300 nm and 1700 nm in L3 and H1 cavities. The spectral position of the resonances can be controlled by the lattice periodicity and air filling factor of the photonic crystals. Close to the band edge of germanium, the quality factors are limited by the bulk material absorption. Finally, we investigate n-type germanium photoluminescence. The n-type doping is achieved by the gas immersion laser doping (GILD) and metal organic vapour phase epitaxy (MOVPE) process. This work shows that the photoluminescence is strongly enhanced at room temperature both in n-type bulk germanium and germanium-on-insulator. The perspectives for achieving laser emission using silicon are discussed
Passanante, Thibault. "Mécanismes de démouillage à l'état solide : Etude par microscopie à électrons lents des systèmes SOI et GOI." Thesis, Aix-Marseille, 2014. http://www.theses.fr/2014AIXM4020.
This work is devoted to the experimental study of the dewetting mechanisms of ultrathin solid films by which a metastable film transforms into an assembly of tridimensional crystallites. Using low energy Electron Microscopy (LEEM) we analyse, in situ and in real time, the morphology and the kinetics of the dewetting of Si/SiO2 (SOI) and Ge/SiO2 (GOI) systems obtained by molecular bonding (Smart Cut™ process). Further information has been obtained by Grazing Incidence Small Angle X–ray Scattering (GISAXS) and Atomic Force Microscopy (AFM) measurements. We show that the dewetting is driven by surface free energy minimization and mediated by surface diffusion. A complementary study of artificial well-oriented dewetting fronts obtained by lithography enables us to analyze the important role played by facets, the crystal anisotropy and the rim thickening mechanism. We show that the rim thickening proceeds in a layer-by-layer mode and is limited by 2D nucleation. Thanks to analytical models and Kinetics Monte Carlo simulations, numerical values of the pertinent physical parameters involved in the dewetting process are obtained and the morphological differences between SOI and GOI are attributed to the presence of specific facets
Hutin, Louis. "Etude des transistors MOSFET à barrière Schottky, à canal Silicium et Germanium sur couches minces." Grenoble INPG, 2010. http://www.theses.fr/2010INPG0159.
Until the early 2000’s Dennard’s scaling rules at the transistor level have enabled to achieve a performance gain while still preserving the basic structure of the MOSFET building block from one generation to the next. However, this conservative approach has already reached its limits as shown by the introduction of channel stressors for the sub-130 nm technological nodes, and later high-k/metal gate stacks for the sub-65 nm nodes. Despite the introduction of high-k gate dielectrics, constraints in terms of gate leakage and reliability have been delaying the diminution of the equivalent oxide thickness (EOT). Concurrently, lowering the supply voltage (VDD) has become a critical necessity to reduce both the active and passive power density in integrated circuits. Hence the challenge: how to keep decreasing both gate length and supply voltage faster than the EOT without losing in terms of ON-state/OFF-state performance trade-off? Several solutions can be proposed aiming at solving this conundrum for nanoscale transistors, with architectures in rupture with the plain old Silicon-based MOSFET with doped Source and Drain invented in 1960. One approach consists in achieving an ION increase while keeping IOFF (and Vth) mostly unchanged. Specifically, two options are considered in detail in this manuscript through a review of their respective historical motivations, state-of-the-art results as well as remaining fundamental (and technological) challenges: i/ the reduction of the extrinsic parasitic resistance through the implementation of metallic Source and Drain (Schottky Barrier FET architecture); ii/ the reduction of the intrinsic channel resistance through the implementation of Germanium-based mobility boosters (Ge CMOS, compressively-strained SiGe channels, n-sSi/p-sSiGe Dual Channel co-integration). In particular, we study the case of thin films on insulator (SOI, SiGeOI, GeOI substrates), a choice justified by: the preservation of the electrostatic integrity for the targeted sub-22nm nodes; the limitation of ambipolar leakage in SBFETs; the limitation of junction leakage in (low-bandgap) Ge-based FETs. Finally, we show why, and under which conditions the association of the SBFET architecture with a Ge-based channel could be potentially advantageous with respect to conventional Si CMOS
Potavin, Olivier. "Contribution à l'étude des performances et de la fiabilité des architectures MOS fabriquées en technologie silicium massif, silicium sur isolant et silicium germanium." Grenoble INPG, 2003. http://www.theses.fr/2003INPG0103.
Mugny, Gabriel. "Simulation et modèles prédictifs pour les nanodispositifs avancés à canaux à base de matériaux alternatifs." Thesis, Lille 1, 2017. http://www.theses.fr/2017LIL10060/document.
This PhD work aims at contributing to the development of numerical tools for advanced device simulation including alternative materials (InGaAs and SiGe). It is a collaboration work, between the industry (STMicroelectronics--Crolles) and research institutes (CEA--Grenoble and IEMN--Lille). The modeling of advanced low-power MOSFET devices is investigated with predictive, but efficient tools, that can be compatibles with an industrial TCAD framework. The study includes different aspects, such as: i) the electronic properties of bulk materials and nanostructures, with tools ranging from atomistic tight-binding and empirical pseudo-potential to effective mass model; ii) the electrostatic properties of III-V Ultra-Thin Body and bulk MOSCAPs; iii) the transport properties (low-field effective mobility and saturation velocity) of thin films and nanowires; iv) the simulation of template 14nm FDSOI devices in linear and saturation regime. This work makes use of a broad variety of approaches, models and techniques. Physical-based tools are developed, allowing to improve the predictive power of TCAD models for advanced devices with short-channel length and alternative channel materials
Dupuis, Véronique. "Localisation d'Anderson dans des alliages amorphes métalliques et dans des structures multicouches : étude sous champ magnétique intense." Toulouse, INSA, 1987. http://www.theses.fr/1987ISAT0016.