Journal articles: 'Ground leakage current'

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Migliazza, Giovanni, Emilio Lorenzani, Fabio Immovilli, and Giampaolo Buticchi. "Single-Phase Current Source Inverter with Reduced Ground Leakage Current for Photovoltaic Applications." Electronics 9, no. 10 (2020): 1618. http://dx.doi.org/10.3390/electronics9101618.

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Integrated power electronics for photovoltaic applications has attracted increasing interest, due to the possibility of having grid-connected photovoltaic modules with independent maximum power point tracking and high reliability. In this paper, a single-phase Current Source Inverter (CSI) is discussed for a photovoltaic application. The basic CSI topology will be explained for the sake of completeness, highlighting its main features and analyzing the ground leakage current problem, an important benchmark for photovoltaic application. A novel topology, called CSI5, is proposed in this work. The main feature is the presence of additional switches for ground leakage current reduction. The performance of the proposed topology is assessed by numerical simulation, and the experimental results confirm that this solution is able to strongly reduce the ground leakage current and conduction power losses.

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Martinez-Rodriguez, Panfilo R., Gerardo Vazquez-Guzman, Gerardo O. Perez-Bustos, et al. "Analysis and Improved Behavior of a Single-Phase Transformerless PV Inverter." Machines 11, no. 12 (2023): 1091. http://dx.doi.org/10.3390/machines11121091.

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Transformerless inverters have an important role in the electrical energy market. The high-efficiency and reliable inverter concept is one of the most widely used inverters in single-phase photovoltaic systems because of its high efficiency, low cost, and reduced leakage ground current. However, the leakage ground current behavior depends on the power and weather conditions, which can increase the parasitic capacitance value, thus producing an increase in the leakage ground current magnitude. In this paper, it is proposed to add a passive inductive–capacitive output filter to the inverter structure in order to reduce the dependency of the leakage ground current on the system power and weather conditions. The inductive–capacitive output filter is designed in such a way that it can provide a low impedance path for the leakage ground current, different from the ground path. The proposed system was evaluated both through simulations and experimentally in a 1 kW laboratory prototype.

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Laisina, Luwis H. "LEAK CURRENT DETECTOR IN LOW VOLTAGE NETWORK (JTR) SYSTEM USING ZMPT101B SENSOR BASED ON THE INTERNET OF THINGS (IoT)." International Journal of Multidisciplinary Sciences and Arts 2, no. 1 (2023): 39–44. http://dx.doi.org/10.47709/ijmdsa.v2i1.2301.

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Phase-to-ground leakage in low-voltage network systems can cause transformer damage due to overload. Overloading on transformers is not caused by customer usage but rather by wasted electrical energy to the ground which causes losses. If there is a current leakage, the potential difference between neutral and ground is measured to produce a voltage value. Considering that there is little written about transformer damage caused by current leakage to ground in low voltage network systems, in this research a tool is made that can detect current leakage to ground in low voltage network systems using the ZMPT101B voltage sensor based on IoT. This research is in the form of design and manufacture of a leakage current detector to ground. The method used is the Research and Development method (research and development), namely in the form of observation, literature study. The research stage starts from a literature study in the form of finding references related to research, designing tools, making tools and programs, and testing the tools that are made. Based on the results of Based on the results of the research, this tool can detect leakage current to the ground from the lowest voltage of 24.3 Volts to the highest voltage of 184 Volts so that it can be displayed on the LCD and the blynk application and the system automatically sounds a buzzer as a warning of current leakage to ground. .

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INOUE, Hiromu, and Hideki NINOMIYA. "Leakage Current and Ground Fault Indicators Using ECD." Transactions of the Society of Instrument and Control Engineers 28, no. 4 (1992): 439–48. http://dx.doi.org/10.9746/sicetr1965.28.439.

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Mousavi, Navid, Tohid Rahimi, and Homayoun Meshgin Kelk. "Reduction EMI of BLDC Motor Drive Based on Software Analysis." Advances in Materials Science and Engineering 2016 (2016): 1–9. http://dx.doi.org/10.1155/2016/1497360.

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In the BLDC motor-drive system, the leakage current from a motor to a ground network and existence of high-frequency components of the DC link current are the most important factors that cause conducting interference. The leakage currents of the motors, flow through common ground, will interfere with other equipment because of the high density of electrical and electronic systems in the spacecraft and aircrafts. Moreover, generally there are common DC buses in the mentioned systems, which aggravate the problem. Function of the electric motor causes appearance of the high-frequency components in the DC link current, which can interfere with other subsystems. In this paper, the analysis of electromagnetic noise and presentation of the proposed method based on the frequency spectrum of the DC link current and the leakage current from the motor to the ground network are done. The proposed method presents a new process based on the filtering method to overcome EMI. To cover the requirement analysis, the Maxwell software is used.

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Mukherjee, Debasis, and B. V. R. Reddy. "Leakage Process and Minimization -Transistor Stacking Effect, Data Retention Gated Ground Cache, Drowsy Cache." Advanced Materials Research 403-408 (November 2011): 4287–94. http://dx.doi.org/10.4028/www.scientific.net/amr.403-408.4287.

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Leakage Current is found to be gradually increasing in CMOS VLSI circuits with advance of technologies, specially in nanometer range. Though area of a transistor is becoming less and lesser, but precious control over the operations of a transistor is not possible in such a small structure. Reductions of threshold voltage, channel length, and gate oxide thickness are responsible for generation of leakage current. In this paper we have reviewed eight types of leakage current present in CMOS VLSI circuits, namely 1. Reverse Bias pn Junction Current, 2. Sub-threshold Leakage, 3. Drain Induced Barrier Lowering Effect, 4. Gate Induced Drain Leakage current, 5. Punch Through, 6. Narrow Channel Effects, 7. Gate Oxide Tunneling leakage current and 8. Hot-Carrier Injection. After that, we have reviewed 6-T SRAM read and write operation. Next to that, we have reviewed three techniques of leakage reduction namely 1. Transistor Stacking Effect, 2. Data Retention Gated-Ground Cache and 3. Drowsy Cache. We have reproduced the simulation result of these leakage minimization techniques. Finally we have shown comparison of 1. Conventional 6-T SRAM leakage current, 2. leakage current using Data Retention Gated-Ground Cache techniques and 3. leakage current using Drowsy Cache techniques. To obtain these three results we have used Cadence Virtuso & SoC Encounter tools. All these three results has been simulated with IBM 90 nanometer technology file.

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Choi, Woo-Young, and Min-Kwon Yang. "Transformerless Line-Interactive UPS With Low Ground Leakage Current." IEEE Transactions on Industrial Electronics 65, no. 12 (2018): 9468–77. http://dx.doi.org/10.1109/tie.2018.2815948.

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Lorenzani, Emilio, Giovanni Migliazza, Fabio Immovilli, Chris Gerada, He Zhang, and Giampaolo Buticchi. "Internal Current Return Path for Ground Leakage Current Mitigation in Current Source Inverters." IEEE Access 7 (2019): 96540–48. http://dx.doi.org/10.1109/access.2019.2929062.

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Sofwan, A., A. Multi, R. Soleman, Sugianto, and A. Kusuma Septian. "Leak Current Monitoring System On The Ground Cables Medium Voltage Transformer 150/20 kV." MATEC Web of Conferences 218 (2018): 01008. http://dx.doi.org/10.1051/matecconf/201821801008.

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On January, 2017 there had been fault trip at PMT 150/20 kV transformer in Jatirangon substation. For fault detection, that rele differential phase T and REF 20 kV have worked to detect this fault. The resulted impact of this fault is Power outage in feeder a 1350 A, 35 MW and 5 Mvar. The cause of this fault is the occurrence of breakdown on ground cables 20kV T-phase-core 1. This results in a short circuit to the ground so that the differential protection relay and REF 20kV work because the relay detects a fault in the ptotection zone. The result of this research is the design of an early detection monitoring tool. This tool is used to determine the amount of leakage current on the ground cable in order to minimize the occurrence of interference that causes the occurrence of electrical power outage. The result of the leakage current monitor on the ground phase cable T obtained a current of 0.6A with temperature 35 °C. With thermal failure calculation method for leakage current obtained result of 0,56180A with temperature 35 °C. Comparison of the calculation with the measurement of leakage current on the ground cable T phase is obtained at 6.36%.

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SINGH, RAGHVENDRA, and SHYAM AKASHE. "MODELING AND ANALYSIS OF LOW POWER 10 T FULL ADDER WITH REDUCED GROUND BOUNCE NOISE." Journal of Circuits, Systems and Computers 23, no. 01 (2014): 1450005. http://dx.doi.org/10.1142/s0218126614500054.

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In the design of high performance complex arithmetic logic circuits, ground bounce noise, leakage current and leakage power are important and challenging issues in nanometer down scaling. In this paper, the low power and reduced ground bounce noise using 10 transistor full adder has been proposed. Full adder is the most important basic building of digital circuits employing arithmetic operation. Adder circuit is widely used in many digital circuits not only for arithmetic operation but also for address generation in processors and microcontrollers. It is therefore necessary to make these systems more efficient so that they consume less power. Here, we use stacking power gating technique to evaluate leakage current, power and ground bounce noise. This paper describes reduction of leakage power and ground bounce noise from the 10 T full adder circuits to make it more reliable to be used to have low power and stable and errorless output. All the simulation in this paper has been carried out using cadence virtuoso at 45 nm technology at various voltages and various temperatures. By using this technique the leakage current reduction can be improved by 80% and leakage power to 70% as compared to conventional 10 T full adder. Ground bounce noise can be reduced to 60% as compared to the base full adder.

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11

Gaafar, Mahmoud A., Mohamed Orabi, Ahmed Ibrahim, Ralph Kennel, and Mohamed Abdelrahem. "Common-Ground Photovoltaic Inverters for Leakage Current Mitigation: Comparative Review." Applied Sciences 11, no. 23 (2021): 11266. http://dx.doi.org/10.3390/app112311266.

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In photovoltaic systems, parasitic capacitance is often formed between PV panels and the ground. Because of the switching nature of PV converters, a high-frequency voltage is usually generated over these parasitic capacitances; this, in turn, can result in a common-mode current known as leakage current. This current can badly reach a high value if a resonance circuit is excited through the PV’s parasitic capacitance and the converter’s inductive components. Transformers are usually used for leakage current mitigation. However, this decreases the efficiency and increases the cost, size, and weight of the PV systems. Number of strategies have been introduced to mitigate the leakage current in transformer-less converters. Among these strategies, using common-ground converters is considered the most effective solution as it offers a solid connection between the negative terminal of PV modules and the neutral of the grid side; thus, complete mitigation of the leakage current is achieved. Number of common-ground inverters have been recently presented. These inverters are different in their size, cost, boosting capability, the possibility of producing DC currents, and their capability to offer multilevel shaping of output voltage. This work introduces a comprehensive review and classification for various common-ground PV inverters. Therefore, a clear picture of the advantages and disadvantages of these inverters is clarified. This provides a useful indication for a trade-off between gaining some of the advantages and losing others in PV systems. In addition, the potentials for optimization based on different performance indicators are identified.

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Szymański, Jerzy Ryszard, and Marta Żurek-Mortka. "Ground Leakage Current Caused by Common-Mode Voltage of PWM inverter." Journal of Civil Engineering and Transport 1, no. 1 (2020): 15–25. http://dx.doi.org/10.24136/tren.2019.002.

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In railway tractive vehicles, three-phase PWM (Pulse Width Modulation) inverters generate parasitic Differential-Mode Voltages (DMV) and Common-Mode Voltages (CMV). Parasitic voltages are a side effect of using the width modulation to shape the phase-to-phase inverter’s voltage. In this article, the authors present a mathematical description of the DM and CM voltages and carry out their spectral analysis. Based on the spectral harmonics analysis, the authors present a method for filtration of harmonics of DM and CM voltages aimed at limiting the capacitance parasitic currents: due to DM voltage – phase-to-phase parasitic current and CM voltage – ground parasitic currents. As the final result of the tests, almost complete elimination of leakage parasitic current form PE shock protection system was achieved.

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13

Pattanaik, Manisha, Balwinder Raj, Shashikant Sharma, and Anjan Kumar. "Diode Based Trimode Multi-Threshold CMOS Technique for Ground Bounce Noise Reduction in Static CMOS Adders." Advanced Materials Research 548 (July 2012): 885–89. http://dx.doi.org/10.4028/www.scientific.net/amr.548.885.

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In this paper a high performance diode based trimode Multi-Threshold CMOS (MTCMOS) technique is introduced which minimizes standby leakage current and provides a better way to control the ground bounce noise during sleep to active mode transition using one additional mode i.e. hold mode. Analysis of trimode MTCMOS technique using low power 16-bit full adder has been done for reduction of standby leakage current and ground bounce noise. Further, to evaluate the effectiveness of diode based trimode Multi-Threshold CMOS technique, simulation has been done on low power 16-bit full adder circuit with BPTM 90nm technology at room temperature with supply voltage of 1 V. Diode based trimode Multi-Threshold CMOS technique reduces ground bounce noise by 89.36% and standby leakage current by 19.24% as compared to the standard trimode MTCMOS technique.

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14

Mohd, Azhar Aina Suhailah, Maaspaliza Azri, Halim Wahidah Abd, Md Hairul Nizam Talib, Zulhani Rasin, and Mohd Fayzul Mohammed. "Hysteresis current control for single-phase transformerless inverter." International Journal of Applied Power Engineering (IJAPE) 14, no. 1 (2025): 1–10. https://doi.org/10.11591/ijape.v14.i1.pp1-10.

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The total harmonic distortion (THD) of grid current and leakage current are significant for transformerless inverters, as they impact power quality, efficiency, and compliance with grid codes. Monitoring and minimizing these currents ensure safe and reliable grid integration of photovoltaic (PV) systems while reducing electromagnetic interference. Therefore, in this paper, the analysis THD of grid current and leakage current is described. The bipolar pulse width modulation (BPWM) technology provides a stable common-mode voltage (200 V), fewer leakage currents (< 30 mA), and better system efficiency, compared to the unipolar pulse width modulation (UPWM) technique. To ensure the inverter complies with the IEC 61000-3-2 class C (THDi < 5%), the current control strategy should be considered during the design of the transformerless inverter. Therefore, this paper presents an implementation and evaluation of the bipolar hysteresis current control (BHCC) technique. In comparison to the BPWM technique, the BHCC technique delivers lower leakage current (0.007274 A), reduced grid current harmonic distortion (1.81%), and increased efficiency.

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Wang, Peng, Song Nan Wang, Ji Xin Chen, et al. "The Research and Application Based on Removable High-Precision DC Weak Current Sensor." Advanced Materials Research 893 (February 2014): 751–54. http://dx.doi.org/10.4028/www.scientific.net/amr.893.751.

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sensor used in DC ground fault detection system according to measurement method can be divided into low frequency AC signal detecting and DC signal detecting of leakage current . It greatly affect the accuracy of the earth fault signal because of the existence of capacitance in the detecting of low frequency AC signal and it doesnt have online measurement DC current sensor in the market when we want to measure load leakage current. Caliper DC ammeter cant meet the requirements in DC system ground fault diction in terms of resolution, accuracy, range, on-line installation and on-line measurement.

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Ko, Wan-Su, and Chung-Seog Choi. "Development and Safety Evaluation of Earth Leakage Alarm Breaker Equipped with Fire Current (IGR) Alarming Function." Fire Science and Engineering 34, no. 3 (2020): 43–48. http://dx.doi.org/10.7731/kifse.32b27a7f.

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The purpose of this study is to develop an earth leakage alarm circuit breaker, equipped with a leakage alarming function (JER-E2S, ETECKOREA Co., Korea), and to analyze its characteristics. The developed mechanism is exclusively used for single-phase and 220 V circuits, with a rated current of 32 A, 20 A, 20 A (for restrooms), 16 A, etc. It satisfies all characteristics of existing earth leakage circuit breakers (ELB). If a fire current, which is a resistive leakage current (Igr), flows through an electric line, the device detects the leakage current in real time and warns against the leakage through a blinking LED lamp. Since the developed device displays a tolerance to a capacitative leakage current (Igc) that inevitably occurs in LED lamps, communication devices, etc., it ensures a stable power supply. In addition, the earth leakage alarm circuit breaker protects against power failure due to a momentary ground fault. Therefore, it can supply power without the risk of the circuit breaker malfunctioning due to a momentary ground fault caused by water droplets, leaves, etc. Moreover, with a standby power of less than 0.1 W, the developed earth leakage alarm circuit breaker exhibits a power saving performance that is 3~8 times greater than that of other ELBs. Installation of approximately 10 earth leakage alarm circuit breakers in one apartment household, with an area of 120 m2, can save 2~5 kWh per month. Therefore, the developed earth leakage alarm breaker not only satisfies the characteristics of existing earth leakage breakers, but also exhibits outstanding power supply quality since it has the functions of electric fire prevention and malfunction prevention. Therefore, this device can innovatively contribute to electric fire prevention.

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Su, Li. "The topology-based approach to leakage current suppression on transformerless photovoltaic inverters." Journal of Physics: Conference Series 2479, no. 1 (2023): 012021. http://dx.doi.org/10.1088/1742-6596/2479/1/012021.

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Abstract With the increase in demand for renewable energy, photovoltaic power generation is gradually becoming the most promising new energy source. However, the electrical connection of PV cells to the grid, and parasitic capacitance between the PV cell and the ground can introduce severe leakage currents into the grid. The scientific community has developed various topology-based techniques to suppress leakage currents. This paper is dedicated to a review of these techniques. Firstly the H5, HERIC, FB-DCBP, oH5, H8, and H6 are analyzed. These techniques are then reviewed more fully in terms of quality, efficiency, size, and complexity. All six of these topologies can meet the requirements for leakage current suppression, and there is an increasing trend toward reducing the size and simplifying topologies. Finally, future trends in topology-based techniques for suppressing leakage currents are predicted. The significance of this paper is that it provides a comprehensive review and summary of the various topology-based techniques for suppressing leakage currents.

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Migliazza, Giovanni, Emilio Carfagna, Giampaolo Buticchi, Fabio Immovilli, and Emilio Lorenzani. "Effect of Semiconductor Parasitic Capacitances on Ground Leakage Current in Three-Phase Current Source Inverters." Energies 14, no. 21 (2021): 7364. http://dx.doi.org/10.3390/en14217364.

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This paper investigates the influence of power semiconductor parasitic components on the ground leakage current in the three-phase Current Source Inverter topology, in the literature called H7 or CSI7. This topology allows reducing converter conduction losses with respect to the classic CSI, but at the same time makes the topology more susceptible to the parasitic capacitances of the semiconductors devices. In the present work, a grid-connected converter for photovoltaic power systems is considered as a case study, to investigate the equivalent circuit for ground leakage current. The same analysis can be extended to applications regarding electric drives, since the HF model of electric machines is characterized by stray capacitance between windings and the stator slots/motor frame. Simulation results proved the correctness of the proposed simplified common-mode circuit and highlighted the need of an additional common-mode inductor filter in case of resonance frequencies of the common-mode circuit close to harmonics of the power converter switching frequency. Experimental results are in agreement with the theoretical analysis.

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Lee, Kyung-Min, and Chul-Won Park. "Pole to Ground Fault Detection Using Leakage Current for DC Distribution System with IT ground." Journal of the Korean Institute of Illuminating and Electrical Installation Engineers 37, no. 6 (2023): 43–49. http://dx.doi.org/10.5207/jieie.2023.37.6.043.

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N. H. Khan, Md, Md T. Anowar, Md D. Hossen, Md M. Alam, and K. J. Ahmad. "PV-Transformer-Less Inverter Topology for Battery-Equivalent DC Supply from Leakage Current." International Journal of Electrical and Computer Engineering (IJECE) 6, no. 5 (2016): 2025. http://dx.doi.org/10.11591/ijece.v6i5.10566.

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Solar panels used for electricity generation have got inverters as their core components. Such inverters are made from switching devices coupled with additional circuit component configured in a transformer-less topology in recent reported works. A transformer-less topology suffers from the drawbacks of lack of isolation leading to leakage current flow from various points of it down to ground. The leakage in inverters might be troublesome as it may lead to loss in power, and may cause malfunctioning of analog devices normally used in power inverters. In this work, we identify possible leakage currents in a given transformer-less topology using the circuit analysis principles. The conversion of so obtained leakage currents into a useful DC voltage is carried out in this work. This work focuses on converting leakage current into small DC voltage in the range of ~1.1004V using recently reported rectifier circuits, supplying a load of 200Ω in the mW range. Although small in magnitude, such voltage sources could be used for battery charging purposes or driving small loads.

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N. H. Khan, Md, Md T. Anowar, Md D. Hossen, Md M. Alam, and K. J. Ahmad. "PV-Transformer-Less Inverter Topology for Battery-Equivalent DC Supply from Leakage Current." International Journal of Electrical and Computer Engineering (IJECE) 6, no. 5 (2016): 2025. http://dx.doi.org/10.11591/ijece.v6i5.pp2025-2032.

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Solar panels used for electricity generation have got inverters as their core components. Such inverters are made from switching devices coupled with additional circuit component configured in a transformer-less topology in recent reported works. A transformer-less topology suffers from the drawbacks of lack of isolation leading to leakage current flow from various points of it down to ground. The leakage in inverters might be troublesome as it may lead to loss in power, and may cause malfunctioning of analog devices normally used in power inverters. In this work, we identify possible leakage currents in a given transformer-less topology using the circuit analysis principles. The conversion of so obtained leakage currents into a useful DC voltage is carried out in this work. This work focuses on converting leakage current into small DC voltage in the range of ~1.1004V using recently reported rectifier circuits, supplying a load of 200Ω in the mW range. Although small in magnitude, such voltage sources could be used for battery charging purposes or driving small loads.

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Selmi, Tarek, and Maher Rezgui. "A Novel DC-AC Inverter Topology to Eliminate Leakage Current." International Journal of Power Electronics and Drive Systems (IJPEDS) 9, no. 4 (2018): 1733. http://dx.doi.org/10.11591/ijpeds.v9.i4.pp1733-1744.

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Experiments confirmed that Transformerless Inverters (TIs) deliver more reliability and higher energy efficiency. Nonetheless, one of the shortcomings of TIs is the leakage current that occurs between the photovoltaic (PV) string terminals and the ground. Such a drawback is justified by the non-galvanic isolation caused by the transformer being omitted. As such, this study is intended to develop a novel TI inverter topology for solar PV systems. The latter is meant to remove the leakage current and enhance the operating system of the entire PV conversion as well. Added to its null zero-crossing distortion and capability regarding energy efficiency, the developed TI, being validated by simulation and experiment, eradicated the leakage current.

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Wang, Lei, Xinfang Zhang, Xiaoqing Han, Yu Ren, Baifu Zhang, and Peng Wang. "A Transformerless Converter with Common-Mode Decoupling in Low-Voltage Hybrid Grids." Processes 12, no. 3 (2024): 507. http://dx.doi.org/10.3390/pr12030507.

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Compared with isolated converters, transformerless converters are a preferred choice in low-voltage grids due to their efficiency and lower cost. However, leakage current and common mode (CM) voltage appear through the converter and ground in hybrid grids, which consist of AC and DC subgrids. The leakage current and CM voltage seriously influence operation and power quality in low-voltage distribution systems. This paper proposes a common-ground-type (CGT) converter equipped with a CM decoupling control strategy to eliminate the leakage current and CM voltage. A CM model is derived, and the leakage current and CM voltage are analyzed in detail. A CGT four-leg converter is constructed to eliminate the high frequency CM voltage. A dual DQ current control loop is developed to suppress the DC double-frequency ripple. Additionally, an active damping method is proposed, based on the neutral current feed-forward plus inductor current feedback, to attenuate the low frequency CM voltage. The proposed converter and control strategy guarantees excellent performance in suppressing leakage current and CM voltage. The DC voltage of the converter connected to the DC grid maintains stability and symmetry. The leakage current is significantly reduced, and the leakage current suppression performance is improved by 83%. The high frequency CM voltage is attenuated from 50%udc to 2%udc, and the low frequency CM voltage is suppressed from approximately 32%udc to 3%udc, which is a significant improvement compared with the traditional method. In addition, the proposed control strategy has good transient performance when the load changes abruptly. Finally, an experimental platform is established to validate the feasibility and performance. The experiment results showed that the proposed control strategy improves the system performance and power quality.

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Pakdel, M., and S. Jalilzadeh. "A Novel Neutral Point Clamped Full-Bridge Topology for Transformerless Photovoltaic Grid-Connected Inverters." Engineering, Technology & Applied Science Research 7, no. 2 (2017): 1460–63. https://doi.org/10.5281/zenodo.571278.

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This paper presents a novel neutral point clamped full-bridge topology for transformerless photovoltaic grid-tied inverters. Transformerless grid-connected inverters have been used widely in recent years since they offer higher efficiency and lower costs. Ground leakage current suppression is the main issue which should be considered carefully in transformerless photovoltaic grid-connected inverters. Among different methods used to decline ground leakage current, neutral point clamped (NPC) topologies are considered more useful and effective. In NPC topologies, the short-circuited output voltage at the freewheeling period is clamped to the middle of the DC bus voltage. Therefore, the common-mode voltage (CM) will be constant at the whole switching period. Various NPC topologies such as H6 [1], HB-ZVR [2], oH5 [3], and PN-NPC [4] have been proposed. In this paper, a novel NPC topology is proposed which has lower power losses and higher efficiency over previous topologies. Furthermore, the proposed NPC topology exhibits a similar ground leakage current with the PN-NPC topology. The proposed NPC topology is analyzed theoretically using simulation studies and an experimental prototype is provided to verify theoretical analysis and simulation studies.

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Sundar, D. John, and M. Senthil Kumaran. "Common mode behavior in grid connected DC and AC decoupled PV Inverter topologies." Archives of Electrical Engineering 65, no. 3 (2016): 481–93. http://dx.doi.org/10.1515/aee-2016-0035.

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Abstract The transformer-less grid connected inverters are gaining more popularity due to their high efficiency, very low ground leakage current and economic feasibility especially in photovoltaic systems. The major issue which surfaces these systems is that of common mode leakage current which arises due to the absence of an electrical transformer connected between the inverter and the utility grid. Several topologies have evolved to reduce the impact of common mode leakage current and a majority of them have succeeded in eliminating the impacts and have well kept them within the limits of grid standards. This paper compares and analyses the impact of the common mode leakage current for four popular inverter configurations through simulation of the topologies such as H5, H6, HERIC and FBZVR inverters.

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Pakdel, M., and S. Jalilzadeh. "A Novel Neutral Point Clamped Full-Bridge Topology for Transformerless Photovoltaic Grid-Connected Inverters." Engineering, Technology & Applied Science Research 7, no. 2 (2017): 1460–63. http://dx.doi.org/10.48084/etasr.1010.

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This paper presents a novel neutral point clamped full-bridge topology for transformerless photovoltaic grid-tied inverters. Transformerless grid-connected inverters have been used widely in recent years since they offer higher efficiency and lower costs. Ground leakage current suppression is the main issue which should be considered carefully in transformerless photovoltaic grid-connected inverters. Among different methods used to decline ground leakage current, neutral point clamped (NPC) topologies are considered more useful and effective. In NPC topologies, the short-circuited output voltage at the freewheeling period is clamped to the middle of the DC bus voltage. Therefore, the common-mode voltage (CM) will be constant at the whole switching period. Various NPC topologies such as H6 [1], HB-ZVR [2], oH5 [3], and PN-NPC [4] have been proposed. In this paper, a novel NPC topology is proposed which has lower power losses and higher efficiency over previous topologies. Furthermore, the proposed NPC topology exhibits a similar ground leakage current with the PN-NPC topology. The proposed NPC topology is analyzed theoretically using simulation studies and an experimental prototype is provided to verify theoretical analysis and simulation studies.

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Mahtani, Kumar, Ricardo Granizo, José M. Guerrero, and Carlos A. Platero. "Detection of Faulty Energizations in High Voltage Direct Current Power Cables by Analyzing Leakage Currents." Electronics 13, no. 20 (2024): 4120. http://dx.doi.org/10.3390/electronics13204120.

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The use of multi-terminal high voltage direct current (HVDC) power transmission systems is being adopted in many new links between different generation and consumption areas due to their high efficiency. In these systems, cable energization must be performed at the rated voltage. Healthy energizations at the rated voltage result in large inrush currents, especially in long cables, primarily due to ground capacitance. State-of-the-art protection functions struggle to distinguish between transients caused by switching and those associated with ground faults, leading to potential unwanted tripping of the protection systems. To prevent this, tripping is usually blocked during the energization transient, which delays fault detection and clearing. This paper presents a novel method for prompt discrimination between healthy and faulty energizations. The proposed method outperforms conventional protection functions as this discrimination allows for earlier and more reliable tripping, thus avoiding extensive damage to the cable and the converter due to trip blocking. The method is based on the transient analysis of the current in the cable shields, therefore, another technical advantage is that high voltage-insulated measuring devices are not required. Two distinct tripping criteria are proposed: one attending to the change in current polarity, and the other to the change in current derivative sign. Extensive computer simulations and laboratory tests confirmed the correct operation in both cases.

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Chen, Qiong, Zhizhong Kang, Zhen Cao, et al. "Combining Cylindrical Voxel and Mask R-CNN for Automatic Detection of Water Leakages in Shield Tunnel Point Clouds." Remote Sensing 16, no. 5 (2024): 896. http://dx.doi.org/10.3390/rs16050896.

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Water leakages can affect the safety and durability of shield tunnels, so rapid and accurate identification and diagnosis are urgently needed. However, current leakage detection methods are mostly based on mobile LiDAR data, making it challenging to detect leakage damage in both mobile and terrestrial LiDAR data simultaneously, and the detection results are not intuitive. Therefore, an integrated cylindrical voxel and Mask R-CNN method for water leakage inspection is presented in this paper. This method includes the following three steps: (1) a 3D cylindrical-voxel data organization structure is constructed to transform the tunnel point cloud from disordered to ordered and achieve the projection of a 3D point cloud to a 2D image; (2) automated leakage segmentation and localization is carried out via Mask R-CNN; (3) the segmentation results of water leakage are mapped back to the 3D point cloud based on a cylindrical-voxel structure of shield tunnel point cloud, achieving the expression of water leakage disease in 3D space. The proposed approach can efficiently detect water leakage and leakage not only in mobile laser point cloud data but also in ground laser point cloud data, especially in processing its curved parts. Additionally, it achieves the visualization of water leakage in shield tunnels in 3D space, making the water leakage results more intuitive. Experimental validation is conducted based on the MLS and TLS point cloud data collected in Nanjing and Suzhou, respectively. Compared with the current commonly used detection method, which combines cylindrical projection and Mask R-CNN, the proposed method can achieve water leakage detection and 3D visualization in different tunnel scenarios, and the accuracy of water leakage detection of the method in this paper has improved by nearly 10%.

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Sitanggang, Adi Franata H., and Yuliyanto Agung Prabowo. "Perancangan Alat Monitoring Arus Bocor pada Kabel 20 kV Menggunakan Filter Kalman Berbasis Internet of Things." Elektrika 14, no. 2 (2022): 41. http://dx.doi.org/10.26623/elektrika.v14i2.4849.

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One of the problems that often occurs in the use of ground cables is insulation failure. This condition can cause leakage current in the 20 kV cable on the secondary side of the transformer. The greater the value of the leakage current, the more heat will cause the insulation to worsen. If this condition is not handled immediately, it can lead to the opportunity for a short-circuit current between the phase and ground. Therefore, an Internet of Thing-based monitoring tool is needed that can determine the amount of leakage current contained in the 20 kV cable on the secondary side of the transformer by applying the Kalman filter method and sending it to the substation operator using Wifi. Based on the test, it was found that the implementation of this monitoring tool obtained more constant measurement results than the actual measurement value using a measuring instrument with an average error per phase, 1.5594% phase R, 1.5535% phase S, 1.5548% phase T.

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Despotović, Željko V., and Miodrag Vuković. "Detection and Control of Leakage Current of PV Inverters." Energija, ekonomija, ekologija XXVI, no. 2 (2024): 38–46. http://dx.doi.org/10.46793/eee24-2.38d.

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The leakage current in photovoltaic (PV) systems, which is also known as residual current is a consequence of the parasitic capacitance between the PV and the ground (free-field PV plants) or the PV system and the structure of the object that is grounded (roof-top PV plants). When the PV system-power grid parasitic capacitance forms a loop, the common mode voltage will produce a common mode current across the parasitic capacitance. The motivation for writing this short study came from practice where the authors faced the mentioned problem on a specific PV power plant with an output power of 500kW. Therefore, the main topic of the paper will be the topologies of PV inverters and their additional impact on the residual current, as well as ways of its detection. An overview of the relevant standards in this field and some possible techniques for controlling leakage currents in FN systems with solar inverters will also be given.

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Abdul Latiff, Nurul Ain, Hazlee Azil Illias, Ab Halim Abu Bakar, Syahirah Abd Halim, and Sameh Ziad Dabbak. "Design technique for leakage current reduction in surge arrester using gravitational search algorithm and imperialist competitive algorithm." COMPEL - The international journal for computation and mathematics in electrical and electronic engineering 37, no. 1 (2018): 357–74. http://dx.doi.org/10.1108/compel-03-2017-0116.

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Purpose Leakage current is one of the factors, which can contribute towards degradation of surge arresters. Thus, the purpose of this paper is to study on leakage current within surge arresters and improvement on their design. Design/methodology/approach In this work, a three-dimensional model geometry of 11 kV zinc oxide surge arrester was designed in finite element analysis and was applied to calculate the leakage current under normal operating condition and being verified with measurement results. The optimisation methods were used to improve the arrester design by minimising the leakage current across the arrester using imperialist competitive algorithm (ICA) and gravitational search algorithm (GSA). Findings The arrester design in reducing leakage current was successfully optimised by varying the glass permittivity, silicone rubber permittivity and the width of the ground terminal of the surge arrester. It was found that the surge arrester design obtained using ICA has lower leakage current than GSA and the original design of the surge arrester. Practical implications The comparison between measurement and simulation enables factors that affect the mechanism of leakage current in surge arresters to be identified and provides the ideal design of arrester. Originality/value Surge arrester design was optimised by ICA and GSA, which has never been applied in past works in designing surge arrester with minimum leakage current.

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Tu, Jian, Zhen Hui Huang, and Zhen Juan Huang. "Study on the Sensitivity of Selective Leakage Protection of Different Ground of Grid." Advanced Materials Research 765-767 (September 2013): 2426–29. http://dx.doi.org/10.4028/www.scientific.net/amr.765-767.2426.

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In view of the current direct supply situation of our coal mines high voltage distribution networks commonly used 6kV or 10kV electric cables,on the base of describing mechanism of three different neutral point grounded of underground high voltage distribution networks,detailed analysising three different grounded way of high-voltage power grid parameter sensitivity of leakage protection. The results show that, mine the sensitivity of the high-voltage grid leakage protection and start zero-sequence voltage have a great relationship, the greater the zero-sequence voltage setting value, the device's ability to detect leakage faults weaker corresponding lower sensitivity.

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Khan, M. N. H., K. J. Ahmad, S. Khan, and M. Hasanuzzaman. "Leakage Current Paths in PV Transformer-Less Single-Phase Inverter Topology and Its Mitigation through PWM for Switching." International Journal of Power Electronics and Drive Systems (IJPEDS) 6, no. 1 (2015): 148. http://dx.doi.org/10.11591/ijpeds.v6.i1.pp148-159.

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The Photovoltaic (PV) is a part and parcel and well known for cost-effective and easy to operatefeatures when it is used with transformer-less inverter-based grid-tied distribution generation systems. It reduces the leakage current issue that actually occurs making paths from PV penal to ground. In this paper has been addressed this issue as main problem for reducing leakage current. Moreover, here iscompared the proposed topology’s results to AC and DC-based transformer-less topologies. The possibilities of larger number of leakage current paths indicatepower loss, which is the focus of work in this paper for different switching conditions. The results on leakage current paths using PSpice with different parasitic capacitance values from inverters of different topologies are compared with the simulation results of the topology proposed in this paper.

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Al-Mamoori, Dalya Hamzah, Naziha Ahmad Azli, Shahrin Md Ayob, and Ali A. Abdullah Albakry. "A multilevel boost inverter with removed leakage current and a reduced number of elements for photovoltaic applications." International Journal of Power Electronics and Drive Systems (IJPEDS) 15, no. 1 (2024): 312. http://dx.doi.org/10.11591/ijpeds.v15.i1.pp312-322.

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Recent research has concerted on transformer-less multilevel inverters (TL-MLIs) due to their high-voltage or high-power capacity for converting the low-voltage output of renewable energy sources to the desired output. Moreover, they yield higher efficiency, lower cost and size than the conventional type. However, these inverters usually suffer from leakage current. The proposed inverter attempts to accommodate this concern to the greatest extent feasible. The proposed inverter structure exhibits a common ground between the input and output ports. Due to this, the total common mode voltage (CMV) is constant. The photovoltaic (PV) source to the grid parasitic capacitor is short-circuited due to this common ground feature, which results in negligible leakage current. The proposed inverter also features a boosting output voltage using only a single voltage source with minimum power devices. The number of output levels can be increased with the modular application of the proposed inverter. Finally, the mathematical analysis for the proposed inverter has been accomplished, and the MATLAB/Simulink simulation results are presented. Also, the results show the output voltage boost capability, zero leakage current and suitable total harmonic distortion for output voltage and current waveforms.

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P.Kamalakar. "Grid Connected PV Wind System with Implementation." International Journal of Trend in Scientific Research and Development 1, no. 6 (2017): 339–41. https://doi.org/10.31142/ijtsrd2518.

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Renewable energy sources are getting more and more widespread, mainly due to the fact that they generate energy by keeping the environment clean. Most of these systems have an isolation transformer included, which if excluded from the system would increase the efficiency and decrease the size of PV installations, furthermore it would lead to a lower cost for the whole investment. For safety reasons grid connected PV systems include galvanic isolation. In case of transformerless inverters, the leakage ground current through the parasitic capacitance of the PV panels, can reach very high values. A common mode model based on analytical approach is introduced, used to predict the common mode behavior, at frequencies lower than 50kHz, of the selected topologies and to explain the influence of system imbalance on the leakage current. It will be demonstrated that the neutral inductance has a crucial influence on the leakage current. Finally simulation results will be shown for the NPC multilevel inverter topology, emphasizing the low leakage current for the case of a grid connection without galvanic isolation. P.Kamalakar "Grid-Connected PV-Wind System with Implementation" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-1 | Issue-6 , October 2017, URL: https://www.ijtsrd.com/papers/ijtsrd2518.pdf

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MUSSA AL-MAMOORI, DALYA HAMZAH, Shahrin Md Ayob, Ali A. Abdullah Albakry, and Razman Ayop. "A Five-Level Common-Ground Inverter with Dynamic Voltage Boost and Fewer Elements for Photovoltaic Applications." ELEKTRIKA- Journal of Electrical Engineering 23, no. 2 (2024): 53–61. http://dx.doi.org/10.11113/elektrika.v23n2.516.

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Transformer-less multilevel inverters (TL-MLIs) are the subject of recent research due to their high-voltage or high-power capacity to convert low-voltage output from renewable energy sources into the desired output. They are also less expensive and smaller than traditional varieties. Nevertheless, leakage current is a common problem with these inverters. The proposed inverter aims to address this issue to the maximum extent possible. In the proposed inverter structure, there is a common ground for the input and output terminals. As a result, the overall common mode voltage (CMV) remains constant. This common ground feature short-circuits the Photovoltaic (PV) source to the grid parasitic capacitor, resulting in negligible leakage current. Furthermore, the proposed inverter boosts output voltage using the least amount of power devices and a single voltage source. The proposed inverter can be used modularly, increasing the number of output levels that can be achieved. The simulation results from MATLAB/Simulink and the conclusion of the mathematical analysis for the proposed inverter are shown. The results also demonstrate the output voltage boost capability, zero leakage current, and an appropriate total harmonic distortion for the output voltage and current waveforms.

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Venkatesan, Rattan Kumar, and Chitra Lakshmikanthan. "Five-level transformerless inverter with reduced voltage stress on components." International Journal of Power Electronics and Drive Systems (IJPEDS) 15, no. 4 (2024): 2357–66. https://doi.org/10.11591/ijpeds.v15.i4.pp2357-2366.

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Leakage current flow is an important issue of transformerless (TL) inverters due to the absence of galvanic isolation between the source and grid sides in grid-connected solar photovoltaic (PV) systems. This article proposes a five-level (5L) TL direct ground point (DGP) type inverter employing two switched capacitors (SCs). The DGP configuration shares a common ground point for the PV negative terminal with grid neutral, thereby completely suppressing the leakage current. The employed semiconductors endure maximum voltage stress equivalent to the input voltage, while the switched capacitors (SCs) are rated at only half of the input voltage. This significantly reduces both the size and cost of the inverter. In addition, it uses reduced power components and has a lower total standing voltage per unit among the recent same art of topologies. A detailed comparison to show the merits of the proposed inverter is presented. Simulations and experiments were conducted at a 1 kW output power level in stand-alone as well as grid-connected mode to validate the feasibility of the proposed inverter.

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Sitthiphol, Nopphadol, Chatchai Sirisamphanwong, Nipon Ketjoy, and Kobsak Sriprapha. "Insulation Resistance and Leakage Current in PV Modules and Strings with Different Grounding Configurations." Applied Mechanics and Materials 839 (June 2016): 114–18. http://dx.doi.org/10.4028/www.scientific.net/amm.839.114.

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Thailand is located in the tropical zone dominated by monsoons for more than six months in a year. These climatic conditions illustrate elevated relative humidity and temperature that contributes to Potential Induced Degradation (PID). Humidity has been reported to be potential cause of degradation in the systems with high voltages. Moisture helps leakage currents in passing through laminate permeation and back sheet from cell to ground frame. The PID occure in PV systems when connected in series using DC voltages of high orders. This research shows comparisons of both PV systems, with negative grounding and floating grounding with a system voltage about 800 Vdc. Investigations of insulation resistance (MΩ) in PV strings and modules after two years operation has been done. It was found that the decrement in average insulation resistance (MΩ) of PV string using negative grounding, floating grounding was 14.5 MΩ, 11.0 MΩ and average leakage current per string was 68.9 µA, 90.9 µA respectively. Moreover, the wet leakage current per module showed the decrement in average insulation resistance (MΩ.m2) was 174 MΩ.m2, 133 MΩ.m2 and average leakage current per module was 5.75 µA, 7.51 µA respectively.

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INTACHOT, Terdsak, Nontawat CHULADAYCHA, Yothin PREMPRANEERACH, and Shuichi NITTA. "A Current Mode Analysis on Ground Leakage Current Noise Generation in Unbalanced and Balanced Switching Converters." IEICE Transactions on Communications E93-B, no. 8 (2010): 2142–57. http://dx.doi.org/10.1587/transcom.e93.b.2142.

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SHAKIL, D. JAMADAR, SHRAVANKUMAR AKIREDDY, and ANITHA CHIRRA. "A NOVEL LOGIC TO STATOR SINGLE PHASE - TO - GROUND FAULT FOR POWER-FORMER." JournalNX - A Multidisciplinary Peer Reviewed Journal 3, no. 3 (2017): 53–57. https://doi.org/10.5281/zenodo.1462659.

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The stator single-phase to ground fault is one of the most common fault that a Generator will suffer. If such fault is neglected then there are chances of converting it into phase to phase fault. So there is need to detect and isolate the faulty part from the rest of the system as early as possible. Because of this, protection is very important otherwise there is shortage of power in our system. The proposed approach detects the ground fault by analyzing the direction, magnitude, and energy of leakage current, which is the difference of zero-sequence current fault component between the neutral and the terminal of Power-former. The aim of the study carried out was realizing 100% coverage of fault detection in internal &external fault protection for the stator winding of Power former.] https://journalnx.com/journal-article/20150187

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Kołodziejski, Wojciech, Jacek Jasielski, Stanisław W. Kuta, Grzegorz Szerszeń, and Witold Machowski. "Review and comparison of methods for limiting leakage currents in single-phase transformerless PV inverter topologies." Science, Technology and Innovation 16, no. 3-4 (2023): 1–19. http://dx.doi.org/10.55225/sti.477.

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Transformerless inverters are widely used in different photovoltaic nonisolated ac module applications, mainly in grid-tied photovoltaic (PV) generation systems, due to the benefits of achieving high efficiency over a wide load range, and low cost. Various transformerless inverter topologies have been proposed to meet the safety requirement of low ground leakage currents, such as specified in the VDE-4105 standard and low-output ac-current distortion. Topology modifications of transformerless full bridge inverters are designed to balance and maintain a constant common mode output voltage, thereby eliminating or reducing leakage currents. This article reviews and compares the different methods for limiting leakage currents in known topologies of the full-bridge transformerless inverters, such as: H4, H5, H6, HERIC, and their improvements. The main topologies and strategies used to reduce the leakage current in transformerless schemes are summarized, highlighting advantages and disadvantages and establishing points of comparison with similar topologies. To compare the properties of different medium to high power inverters, PV inverter topologies were implemented using IGBTs and tested with the same components, same simulation parameters in PSPICE to evaluate their performance in terms of energy efficiency and leakage current characteristics. The detailed power stage operating principles, extended PWM modulator, and integrated universal gate driver with galvanic isolation in the transmission path of control signal for all IGBTs of the inverter, as well isolated and floating bias power supply for gate drivers are described.

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Jiang, Yue. "Comprehensive analysis of current mitigation strategies for non-isolated photovoltaic inverter." Applied and Computational Engineering 11, no. 1 (2023): 8–23. http://dx.doi.org/10.54254/2755-2721/11/20230198.

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Out of consideration for sustainable development, photovoltaic power generation system has become a hot research issue in the future energy strategy due to its significant cleanliness and reproducibility. Meanwhile, playing an important role in connecting the PV cell and the grid, the non-isolated photovoltaic inverter not only has the ability to convert energy with great efficiency but also with low loss and cost. In that case, the non-isolated inverter is widely used in the production. However, the leakage current is a big challenge that should be addressed with caution. This paper focuses on the leakage current mitigation strategy and makes a comprehensive analysis of each topology. The author analyses the generation mechanism of leakage current based on the single-phase inverter circuit. After that, the common ground type inverter topology and the H-Bridge type inverter topology will be further analysed for their universal utilization. Specific topologies from the two types of inverters are under comparison based on several perspectives, ranging from the degree of leakage current suppression to the complexity of the circuit structure, from the difficulty of analysis to the economic performance of the inverter. In addition, some improvement measures are proposed.

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Hedayati, Mohammad Hassan, and Vinod John. "EMI and ground leakage current reduction in single‐phase grid‐connected power converter." IET Power Electronics 10, no. 8 (2017): 938–44. http://dx.doi.org/10.1049/iet-pel.2016.0568.

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Vazquez-Guzman, Gerardo, Panfilo R. Martinez-Rodriguez, Jose M. Sosa-Zuñiga, et al. "Hybrid PWM Techniques for a DCM-232 Three-Phase Transformerless Inverter with Reduced Leakage Ground Current." Micromachines 13, no. 1 (2021): 36. http://dx.doi.org/10.3390/mi13010036.

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Pulse Width Modulation (PWM) strategies are crucial for controlling DC–AC power converters. In particular, transformerless inverters require specific PWM techniques to improve efficiency and to deal with leakage ground current issues. In this paper, three hybrid PWM methods are proposed for a DCM-232 three-phase topology. These methods are based on the concepts of carrier-based PWM and space vector modulation. Calculations of time intervals for active and null vectors are performed in a conventional way, and the resulting waveforms are compared with a carrier signal. The digital signals obtained are processed using Boolean functions, generating ten signals to control the DCM-232 three-phase inverter. The performance of the three proposed PWM methods is evaluated considering the reduction in leakage ground current and efficiency. The proposed modulation techniques have relevant performances complying with international standards, which make them suitable for transformerless three-phase photovoltaic (PV) inverter markets. To validate the proposed hybrid PWM strategies, numerical simulations and experimental tests were performed.

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Jahan, Hossein Khoun, Naser Vosoughi Kurdkandi, Mehdi Abapour, et al. "Common-Ground-Type Single-Source High Step-Up Cascaded Multilevel Inverter for Transformerless PV Applications." Mathematics 8, no. 10 (2020): 1716. http://dx.doi.org/10.3390/math8101716.

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The cascaded multilevel inverter (CMI) is one type of common inverter in industrial applications. This type of inverter can be synthesized either as a symmetric configuration with several identical H-bridge (HB) cells or as an asymmetric configuration with non-identical HB cells. In photovoltaic (PV) applications with the CMI, the PV modules can be used to replace the isolated dc sources; however, this brings inter-module leakage currents. To tackle the issue, the single-source CMI is preferred. Furthermore, in a grid-tied PV system, the main constraint is the capacitive leakage current. This problem can be addressed by providing a common ground, which is shared by PV modules and the ac grid. This paper thus proposes a topology that fulfills the mentioned requirements and thus, CMI is a promising inverter with wide-ranging industrial uses, such as PV applications. The proposed CMI topology also features high boosting capability, fault current limiting, and a transformerless configuration. To demonstrate the capabilities of this CMI, simulations and experimental results are provided.

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Raikwal, P., V. Neema, and A. Verma. "A New 8T SRAM Circuit with Low Leakage and High Data Stability Idle Mode at 70nm Technology." Oriental journal of computer science and technology 10, no. 1 (2017): 86–93. http://dx.doi.org/10.13005/ojcst/10.01.12.

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Memory has been facing several problems in which the leakage current is the most severe. Many techniques have been proposed to withstand leakage control such as power gating and ground gating. In this paper a new 8T SRAM cell, which adopts a single bit line scheme has been proposed to limit the leakage current as well as to gain high hold static noise margin. The proposed cell with low threshold voltage, high threshold voltage and dual threshold voltage are used to effectively reduce leakage current, and delay. Additionally, the comparison has been performed between conventional 6T SRAM cell and the new 8T SRAM cell. The proposed circuit consumes 671.22 pA leakage current during idle state of the circuit which is very less as compare to conventional 6T SRAM cell with sleep and hold transistors and with different β ratio. The proposed new 8T SRAM cell shows highest noise immunity 0.329mv during hold state. Furthermore, the proposed new 8T SRAM circuit represents minimum read and write access delays 114.13ps and 38.56ps respectively as compare to conventional 6T SRAM cell with different threshold voltages and β ratio.

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Patrao, Iván, Marian Liberos, Raúl González-Medina, Enric Torán, Emilio Figueres, and Gabriel Garcerá. "Small-Signal Model of the NPC + GCC Multilevel Transformerless Inverter in Single-Phase Photovoltaic Power Systems." Electronics 12, no. 17 (2023): 3545. http://dx.doi.org/10.3390/electronics12173545.

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Photovoltaic transformerless inverters are very efficient and economical options for solar-power generation. The absence of the isolation transformer improves the converters’ efficiency, but high-frequency voltage to ground can appear in the photovoltaic string poles. The high capacitance to ground of the photovoltaic generator leads to undesirable high-leakage currents. Using half-bridge topologies dramatically reduces the leakage to ground, and using a multilevel half-bridge inverters improves the output quality compared with classical inverters. The neutral point clamped + generation control circuit (NPC + GCC) topology is a multilevel single-phase transformerless inverter capable of tracking the maximum power point of two photovoltaic sources at the same time. This paper presents the control structure and the dynamic modeling of the NPC + GCC inverter. The pulse-width modulated (PWM) switch model in continuous conduction mode (CCM) was used to obtain the small-signal model of the two switching converters that make up the inverter. The resulting dynamic model was used to quantify the stability margins of both converters’ current and voltage loops.

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Essam, Hendawi. "A high performance grid connected PV system based on HERIC transformerless inverter." Indonesian Journal of Electrical Engineering and Computer Science 20, no. 2 (2020): 602–12. https://doi.org/10.11591/ijeecs.v20.i2.pp602-612.

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This paper presents an effective single phase grid connected photovoltaic PV system based on High Efficiency and Reliable Inverter Concept HERIC transformerless inverter. dc-dc boost converter controlled by incremental conductance IC maximum power point tracker MPPT is employed to achieve the maximum extraction power of the PV panels. Proportional integral PI controller controls the output voltage of the boost converter to meet the utility grid requirements. LCL filter is utilized to keep the inverter voltage very close to sinusoidal shape. Employing the HERIC transformerless inverter reduces significantly the ground leakage current beyond safe limits. Semiconductors losses are studied to investigate the efficiency of the proposed system at different insolation levels. Simulation results verify the high performance of the proposed system when considering leakage current and system efficiency.

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Dobrynin, E. V., K. V. Bogdanova, and E. M. Plokhov. "Evaluation of the heterogeneity impact of a traction network on operation of control system parameters of movement of electric rolling stocks." Transport of the Urals, no. 2 (2023): 108–12. http://dx.doi.org/10.20291/1815-9400-2023-2-108-112.

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A system for monitoring the parameters of a traction power supply system, consisting of current and voltage sensors installed in the inter-substation area, is considered. The impact of the inhomogeneity of a contact suspension and leakage of currents from the rail to the ground on the accuracy of determining parameters such as current consumption, voltage on a current collector and the coordinate of electric rolling stock is evaluated. The peculiar features of the monitoring system operation in the conditions of heterogeneity of the traction network are revealed, a solution is proposed to reduce the impact of this factor.

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SHRIVAS, JAYRAM, SHYAM AKASHE, and NITESH TIWARI. "A HIGH-LEVEL TECHNIQUE FOR ESTIMATION AND OPTIMIZATION OF LEAKAGE POWER FOR FULL ADDER." International Journal of Nanoscience 12, no. 02 (2013): 1350011. http://dx.doi.org/10.1142/s0219581x13500117.

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Optimization of power is a very important issue in low-voltage and low-power application. In this paper, we have proposed power gating technique to reduce leakage current and leakage power of one-bit full adder. In this power gating technique, we use two sleep transistors i.e., PMOS and NMOS. PMOS sleep transistor is inserted between power supply and pull up network. And NMOS sleep transistor is inserted between pull down network and ground terminal. These sleep transistors (PMOS and NMOS) are turned on when the circuit is working in active mode. And sleep transistors (PMOS and NMOS) are turned off when circuit is working in standby mode. We have simulated one-bit full adder and compared with the power gating technique using cadence virtuoso tool in 45 nm technology at 0.7 V at 27°C. By applying this technique, we have reduced leakage current from 2.935 pA to 1.905 pA and leakage power from 25.04μw to 9.233μw. By using this technique, we have reduced leakage power up to 63.12%.

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Journal articles on the topic 'Ground leakage current'

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