Academic literature on the topic 'Half-bridge Class D amplifier'

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Journal articles on the topic "Half-bridge Class D amplifier"

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Ponjavic, Milan, and Sasa Milic. "Switched Capacitor Compensation of Supply Distortion in Class-D Amplifiers." Electronics 9, no. 12 (2020): 2197. http://dx.doi.org/10.3390/electronics9122197.

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This paper presents a switched capacitor technique for bus-pumping compensation in a half-bridge class-D amplifier. The proposed approach, in addition to the almost complete reduction of the bus-pumping effect, allows the half-bridge class-D amplifier to preserve maximum energy efficiency. The studied hardware implementation of the proposed technique demonstrates its advantages of high efficiency, simple circuit, and low cost. The principal design and operating principles are analyzed and described. The experimental static characteristics and time-domain waveforms for the proposed technique are shown to verify its feasibility.
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Xu, Duo, Guohua Zhou, Rui Huang, Xianghong Liu, and Feiming Liu. "High Efficiency Half Bridge Class-D Audio Amplifier System With Front-End Symmetric Bipolar Outputs LLC Converter." IEEE Transactions on Industrial Electronics 68, no. 2 (2021): 1220–30. http://dx.doi.org/10.1109/tie.2020.2969098.

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Xu, Guo Hua, Ying Zhang, Ming Dong, and Qing De Meng. "The Output Researching of a Cascaded Multilevel Class-D Power Amplifier." Advanced Materials Research 482-484 (February 2012): 3–10. http://dx.doi.org/10.4028/www.scientific.net/amr.482-484.3.

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A high efficiency switch-mode power amplifier based on a cascaded multicell multilevel circuit topology is introduced in the paper. A multicell topology being operated in a unipolar phase-shifted PWM control to switch-mode amplifier system is introduced. After analysising a single-phase H-bridge unipolar PWM inverter’s output, the paper emphasis on the researching of the output of a Cascaded Multilevel Class-D Power Amplifier. The paper analyzes the advanced characteristic of the cascaded multilevel technique. Then a cascaded multilevel class-D power amplifier is built in the laboratory. The result of measurement shows a good following performance and stability.
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Tsuchiya, Hirotaka, Yoshino Michitaka, Naoto Shinkawa, Hiroyuki Akaba, and Akira Yasuda. "A Novel Boost Class-D Amplifier Using an H-bridge Circuit." IEEJ Transactions on Electrical and Electronic Engineering 5, no. 6 (2010): 660–63. http://dx.doi.org/10.1002/tee.20589.

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Zhou, Xiang, Jianping Xu, Shu Zhong, and Yan-Fei Liu. "Soft Switching Symmetric Bipolar Outputs DC-Transformer (DCX) for Eliminating Power Supply Pumping of Half-Bridge Class-D Audio Amplifier." IEEE Transactions on Power Electronics 34, no. 7 (2019): 6440–55. http://dx.doi.org/10.1109/tpel.2018.2873234.

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Li, Li, Hong-jie Li, and Yan-jing Sun. "Improved Error Correction Methods for Filterless Digital Class D Audio Power Amplifier Based on FCLNF." Mathematical Problems in Engineering 2020 (August 12, 2020): 1–9. http://dx.doi.org/10.1155/2020/5914062.

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Aiming at correcting the error caused by the nonlinear and power supply noise of the bridge-tied-load (BTL) power stage of the filterless digital class D power amplifier, an error correction method was proposed based on feedforward power supply noise suppression (FFPSNS) and first-order closed loop negative feedback (FCLNF) techniques. This method constructed the first-order LCLNF loop for the power stage and further reduced the impact of the power supply noise on the power amplifier output by using FFPSNS technology to introduce the power supply noise into the feedback loop at the same time. The 0.35 μm CMOS process is used for analysis and comparison in Cadence. Cadence simulation results indicate that PSRR at the power supply noise frequency of 200 Hz is improved with 36.02 dB. The power supply induced intermodulation distortion (PS-IMD) components are decreased by approximately 15.57 dB and the signal-to-noise ratio (SNR) of the power amplifier is increased by 17 dB. The total harmonic distortion + noise (THD + N) of the power amplifier is reduced to 0.02% by FCLNF + FFPSNS.
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Husin, Siti Huzaimah, Mohd Shakir Md Saat, Yusmarnita Yusop, Zamre Abdul Ghani, and Sing Kiong Nguang. "Development of Class D Inverter for Acoustics Energy Transfer Implantable Devices." International Journal of Power Electronics and Drive Systems (IJPEDS) 7, no. 1 (2016): 75. http://dx.doi.org/10.11591/ijpeds.v7.i1.pp75-84.

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The working principle of half-bridde Class D Parallel-Resonant Inverter (PRI) as power amplifier is presented in this paper. Simulation of the model is carried out using Proteus. In order to verify the simulation results, an experimental verification is done. This inverter is used to excite the PZT transducers at the suggested resonant frequency of 416 kHz with power level transferred through Acoustics Energy Transfer (AET) concept at about 80mW. As experimental outcome result, the system managed to transfer energy at 66mW to the receiver side.
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Wei, Xinwei, Hongliang Wang, Kangliang Wang, Kui Li, Minying Li, and An Luo. "Robust Two-Layer Model Predictive Control for Full-Bridge NPC Inverter-Based Class-D Voltage Mode Amplifier." Electronics 8, no. 11 (2019): 1346. http://dx.doi.org/10.3390/electronics8111346.

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Finite control set model predictive control (FCS-MPC) is able to handle multiple control objectives and constraints simultaneously with good dynamic performance. However, its industrial application is limited by its high dependence on system model and the huge computational effort. In this paper, a novel robust two-layer MPC (RM-MPC) with strong robustness is proposed for the full-bridge neutral-point clamped (NPC) voltage mode Class-D amplifier (CDA) aiming at this problem. The errors caused by the parameter mismatches or uncertainties of the LC filter and the load current are regarded as lumped disturbance and estimated by the designed Luenberger observer. The robust control can be achieved by compensating the estimated disturbance to the used predictive model. In order to reduce computation of the controller, a two-layer MPC is proposed for the full-bridge NPC inverter with an LC filter. The first layer is used to calculate the optimal output level which minimizes the tracking error of the output voltage. The second layer is used to determine the switching state for the purpose of capacitor voltage balancing. The experimental results show that the lumped model error is observed centrally through only one observer with low complexity. The two-layer MPC further reduced the computation without affecting the dynamic performance.
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Jie, Shao, Wang Li, Zhao WeiSong, Zhong YaQin, and Reza Malekian. "Numerical Analysis of Modeling Based on Improved Elman Neural Network." Scientific World Journal 2014 (2014): 1–12. http://dx.doi.org/10.1155/2014/271593.

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A modeling based on the improved Elman neural network (IENN) is proposed to analyze the nonlinear circuits with the memory effect. The hidden layer neurons are activated by a group of Chebyshev orthogonal basis functions instead of sigmoid functions in this model. The error curves of the sum of squared error (SSE) varying with the number of hidden neurons and the iteration step are studied to determine the number of the hidden layer neurons. Simulation results of the half-bridge class-D power amplifier (CDPA) with two-tone signal and broadband signals as input have shown that the proposed behavioral modeling can reconstruct the system of CDPAs accurately and depict the memory effect of CDPAs well. Compared with Volterra-Laguerre (VL) model, Chebyshev neural network (CNN) model, and basic Elman neural network (BENN) model, the proposed model has better performance.
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Wei, Xinwei, Hongliang Wang, An Luo, et al. "Robust Multilayer Model Predictive Control for a Cascaded Full-Bridge NPC Class-D Amplifier With Low Complexity." IEEE Transactions on Industrial Electronics 68, no. 4 (2021): 3390–401. http://dx.doi.org/10.1109/tie.2020.2977511.

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Dissertations / Theses on the topic "Half-bridge Class D amplifier"

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Engstrand, Johan, Niklas Kavathatzopoulos, and Jonathan Nordenholm. "Simulation and Construction of a Half-Bridge Class D Audio Amplifier." Thesis, Uppsala universitet, Fasta tillståndets elektronik, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-353789.

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Usage of class D audio amplifiers has become increasingly widespread in recent years, mainly due to their high efficiency, which can reach almost 100 %. Class D amplifiers can also be compact, making them suitable for mobile applications. In contrast, the most efficient conventional amplifiers such as class B can reach a maximum efficiency of 78.5 %. The high efficiency of class D amplifiers can be attributed to the switching stage, which in the case of a half-bridge design consists of two amplifying MOSFETs. These MOSFETs are never on at the same time, which minimizes the quiescent current and thereby the power losses. The goal of this project was to design, simulate and construct a half-bridge class D audio amplifier. A working amplifier with 80 % efficiency was built, with power losses occuring mainly in the voltage regulators. Simulations of the amplifier corresponded well with the constructed amplifier apart from issues originating from the aforementioned voltage regulation as well as the triangle wave generator. The goal of the project was achieved and the finished amplifier possessed good sound quality and little unwanted noise. To further improve on the design, better voltage regulation, a full-bridge configuration and a feedback loop could be utilized.
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Wang, Xusheng. "Ultrasonic Generator for Surgical Applications and Non-invasive Cancer Treatment by High Intensity Focused Ultrasound." Thesis, Université Paris-Saclay (ComUE), 2016. http://www.theses.fr/2016SACLS052/document.

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La technique de haute intensité ultrasons focalisés (HIFU) est maintenant largement utilisée pour le traitement du cancer, grâce à son avantage non-invasif. Dans un système de HIFU, une matrice de transducteurs à ultrasons est pilotée en phase pour produire un faisceau focalisé d'ultrasons (1M ~ 10 MHz) dans une petite zone de l'emplacement de la cible sur le cancer dans le corps. La plupart des systèmes HIFU sont guidées par imagerie par résonance magnétique (IRM) dans de nos jours. Dans cette étude de doctorat, un amplificateur de puissance de classe D en demi-pont et un système d'accord automatique d'impédance sont proposés. Tous deux circuits proposés sont compatibles avec le système IRM. L'amplificateur de puissance proposé a été réalisé par un circuit imprimé (PCB) avec des composants discrets. Selon les résultats du test, il a rendement de conversion en puissance de 82% pour une puissance de sortie conçue de 1,25W à une fréquence de travail de 3MHz. Le système d'accord automatique d'impédance proposé a été conçu en deux versions: une version en PCB et une version en circuit intégré (IC). Contrairement aux systèmes d'accord automatique proposés dans la littérature, il n'y a pas besoin de l'unité de microcontrôleur (MCU) ou de l'ordinateur dans la conception proposée. D'ailleurs, sans l'aide de composants magnétiques volumineux, ce système d'auto-réglage est entièrement compatible avec l'équipement IRM. La version en PCB a été conçue pour vérifier le principe du système proposé, et il est également utilisé pour guider à la conception du circuit intégré. La réalisation en PCB occupe une surface de 110cm². Les résultats des tests ont confirmé la performance attendue. Le système d'auto-tuning proposé peut parfaitement annuler l'impédance imaginaire du transducteur, et il peut également compenser l'impédance de la dérive causée par les variations inévitables (variation de température, dispersion technique, etc.). La conception du système d'auto-réglage en circuit intégré a été réalisé avec une technologie CMOS (C35B4C3) fournies par Austrian Micro Systems (AMS). La surface occupée par le circuit intégré est seulement de 0,42mm². Le circuit intégré conçu est capable de fonctionner à une large gamme de fréquence tout en conservant une consommation d'énergie très faible (137 mW). D'après les résultats de la simulation, le rendement de puissance de ce circuit peut être amélioré jusqu'à 20% comparant à celui utilisant le réseau d'accord statique<br>High intensity focused ultrasound (HIFU) technology is now broadly used for cancer treatment, thanks to its non-invasive property. In a HIFU system, a phased array of ultrasonic transducers is utilized to generate a focused beam of ultrasound (1M~10MHz) into a small area of the cancer target within the body. Most HIFU systems are guided by magnetic resonance imaging (MRI) in nowadays. In this PhD study, a half-bridge class D power amplifier and an automatic impedance tuning system are proposed. Both the class D power amplifier and the auto-tuning system are compatible with MRI system. The proposed power amplifier is implemented by a printed circuit board (PCB) circuit with discrete components. According to the test results, it has a power efficiency of 82% designed for an output power of 3W at 1.25 MHz working frequency. The proposed automatic impedance tuning system has been designed in two versions: a PCB version and an integrated circuit (IC) version. Unlike the typical auto-impedance tuning networks, there is no need of microprogrammed control unit (MCU) or computer in the proposed design. Besides, without using bulky magnetic components, this auto-tuning system is completely compatible with MRI equipment. The PCB version was designed to verify the principle of the proposed automatic impedance tuning system, and it is also used to help the design of the integrated circuit. The PCB realization occupies a surface of 110cm². The test results confirmed the expected performance. The proposed auto-tuning system can perfectly cancel the imaginary impedance of the transducer, and it can also compensate the impedance drifting caused by unavoidable variations (temperature variation, technical dispersion, etc.). The IC design of the auto-tuning system is realized in a CMOS process (C35B4C3) provided by Austrian Micro Systems (AMS). The die area of the integrated circuit is only 0.42mm². This circuit design can provide a wide working frequency range while keeping a very low power consumption (137 mW). According to the simulation results, the power efficiency can be improved can up to 20% by using this auto-tuning circuit compared with that using the static tuning network
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Chen-Si, Lin, and 林岑思. "A Full-Bridge Class-D Amplifier Using." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/h263r4.

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碩士<br>國立交通大學<br>電機與控制工程系所<br>93<br>The objective of this thesis is to design a Class D audio amplifier based on Finite Receding Horizon Quadratic Optimal Control. Comparing to the traditional Class A or Class AB amplifiers, audio amplifiers based on Class D topology are more efficient in terms of energy conversion and have low cost. An important aspect of digital signal processing is the impact of quantization errors. In this thesis, we focus on the topic about quantization errors and define a cost function, which is utilized to minimize a measure of the quantization distortion by using finite receding horizon quadratic optimal control. We propose a Multi-Step Optimal Converter, which can be implemented as a feedback loop. It embeds Sigma-Delta Modulation in a more general setting and typically provides better performance. Class D amplifiers commonly rely on Pulse-Width Modulation to generate the output switching waveforms which gives rise to more serious problems in unwanted harmonics . On the other hand, using Multi-Step Optimal Converter, it is possible to design the loop filter so that the harmonic distortion is reduced. This thesis will analyze and implement a stable digital Multi-Step Optimal Converter, USB interfaces, and a switching power stage to complete a full digital audio amplifier.
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Kang-Yuan, Chen, and 陳鏗元. "A Full-Bridge Class-D Amplifier Using Sigma Delta Modulation." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/369nxc.

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碩士<br>國立交通大學<br>電機與控制工程系所<br>93<br>This thesis proposes a design of full-digital class-D amplifier using sigma-delta modulation. The class-D amplifier operating the MOSFET (or IGBT) in saturation mode has the advantages of smaller size and higher power efficiency over traditional class-A/B ones. The underlying principle of generating the switching command is to convert the input signal into an oversampled binary signal. Compared with PWM modulation, sigma-delta modulation produces less distortion, noise and number of switching. The design and stability analysis of digital sigma-delta modulation are studied in this thesis using both 1- and 1.5-bit quantization schemes. The results show that the 1.5-bit scheme further improves the noise shaping performance and switching number reduction. The digital sigma-delta modulator is implemented on an FPGA and a full-bridge power stage is constructed to verify the design method. The resulting experimental platform is able to achieve a stereo amplifier with 22.05KHZ audio bandwidth.
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Chu, Chia-Hung, and 朱家弘. "A Full-Bridge 5.1 Channel Class-D Audio Amplifier Using Sigma-Delta Modulation." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/28075961731087209584.

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碩士<br>國立交通大學<br>電機與控制工程系所<br>94<br>This thesis designs a Class D audio amplifier based on Sigma-Delta Modulator. Instead of working in saturation mode, the transistors of Class D amplifiers operate in the triode and cut-off modes, which is more efficient in terms of energy conversion and has lower cost. Modulators that modulate any signal to a binary signal are needed for Class D amplifiers. However, compared with traditional Pulse-Width Modulator, Sigma-Delta Modulator produces less harmonic distortion and needs fewer number of switching. The quantization scheme in Sigma-Delta Modulator has the impact of quantization errors. Considering a time-optimal quantization algorithm, the in-band quantization errors can be completely eliminated by designing the loop filter running at infinitely high sampling frequency. In this thesis, a Sigma-Delta Modulator is analyzed by modeling a Sigma-Delta Modulator as an approximation of a time-optimal quantizer and its stability criterion is derived. Moreover, a USB based 5.1 channel Class D amplifier which contains a stable digital Sigma-Delta Modulator DAC with FPGA, a six channel USB audio controller, and a switching power stage is also implemented in this thesis.
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Conference papers on the topic "Half-bridge Class D amplifier"

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Sala, V. M., J. Cusido, M. Delgado, G. Ruiz, and J. A. Ortega. "Feed-Back Active Control for Half-Bridge Class-D audio amplifiers." In 2008 IEEE International Symposium on Industrial Electronics (ISIE 2008). IEEE, 2008. http://dx.doi.org/10.1109/isie.2008.4677214.

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Hwu, K. I., and Y. T. Yau. "Output power enhancement of full-bridge class-D amplifier." In 2010 International Power Electronics Conference (IPEC - Sapporo). IEEE, 2010. http://dx.doi.org/10.1109/ipec.2010.5543301.

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Zhang Yang, Lei Kaizhuo, Zhang Qunfei, He Dengfeng, and Fan Xuchao. "An embedded signal transmitter for UAC based on H-bridge class-D power amplifier." In 2016 IEEE International Conference on Signal Processing, Communications and Computing (ICSPCC). IEEE, 2016. http://dx.doi.org/10.1109/icspcc.2016.7753628.

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Sala, V., L. Romeral, T. Garcia, and M. Delgado. "Study of hybrid active control strategies for the Bus-Pumping cancellation in the Half-Bridge Class-D audio power amplifiers." In 2011 IEEE 20th International Symposium on Industrial Electronics (ISIE). IEEE, 2011. http://dx.doi.org/10.1109/isie.2011.5984197.

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Lee, Ji-Hun, Gyeong-Gu Kang, Min-Woo Ko, Gyu-Hyeong Cho та Hyun-Sik Kim. "An 8Ω, 1.4W, 0.0024% THD+N Class-D Audio Amplifier with Bridge-Tied Load Half-Side Switching Mode Achieving Low Standby Quiescent Current of 660μA". У 2020 IEEE Symposium on VLSI Circuits. IEEE, 2020. http://dx.doi.org/10.1109/vlsicircuits18222.2020.9162781.

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Hung, Tsai-Pi, Jeremy Rode, Lawrence E. Larson, and Peter M. Asbeck. "H-Bridge Class-D Power Amplifiers for Digital Pulse Modulation Transmitters." In 2007 IEEE/MTT-S International Microwave Symposium. IEEE, 2007. http://dx.doi.org/10.1109/mwsym.2007.380283.

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Trung, Nguyen Kien, Takuya Ogata, Shinichi Tanaka, and Kan Akatsu. "PCB design for 13.56MHz half-bridge class D inverter for wireless power transfer system." In 2015 9th International Conference on Power Electronics and ECCE Asia (ICPE 2015-ECCE Asia). IEEE, 2015. http://dx.doi.org/10.1109/icpe.2015.7168005.

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Gomes, Ruan C. M., Montie A. Vitorino, and Mauricio B. R. Correa. "Three-Phase Integrated PFC AC-AC Half-Bridge Boost Rectifier and Class D Resonant Inverter with Weak Coupled Coils for IH Application." In 2020 IEEE Applied Power Electronics Conference and Exposition (APEC). IEEE, 2020. http://dx.doi.org/10.1109/apec39645.2020.9124198.

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