Academic literature on the topic 'Hardware language description'
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Journal articles on the topic "Hardware language description"
PARK, SUNGWOO, and HYEONSEUNG IM. "A calculus for hardware description." Journal of Functional Programming 21, no. 1 (2010): 21–58. http://dx.doi.org/10.1017/s0956796810000249.
Full textShahdad, Lipsett, Marschner, Sheehan, and Cohen. "VHSIC Hardware Description Language." Computer 18, no. 2 (1985): 94–103. http://dx.doi.org/10.1109/mc.1985.1662802.
Full textGai, S., and A. Lioy. "A multilevel hardware description language." Microprocessing and Microprogramming 25, no. 1-5 (1989): 183–87. http://dx.doi.org/10.1016/0165-6074(89)90193-2.
Full textAcharya, Anurag, Sudipta Bhawmik, C. R. K. Prasad, and P. Palchaudhuri. "KIDLAN: A hardware description language." Microprocessing and Microprogramming 26, no. 1 (1989): 1–13. http://dx.doi.org/10.1016/0165-6074(89)90276-7.
Full textSciuto, D. "VHDL( VHSIC Hardware Description Language)." Journal of Systems Architecture 42, no. 2 (1996): 95–96. http://dx.doi.org/10.1016/1383-7621(96)00015-x.
Full textCollis, G. V., and E. J. Kappos. "Occam as a hardware description language." Software Engineering Journal 2, no. 6 (1987): 213. http://dx.doi.org/10.1049/sej.1987.0028.
Full textLieberherr, Karl J. "Toward a Standard Hardware Description Language." IEEE Design & Test of Computers 2, no. 1 (1985): 55–62. http://dx.doi.org/10.1109/mdt.1985.294685.
Full textMita, Rosario, and Gaetano Palumbo. "Microprocessor design using hardware description language." European Journal of Engineering Education 33, no. 4 (2008): 425–32. http://dx.doi.org/10.1080/03043790802253384.
Full textSaini, J. S. "MODLAN: a hardware module description language." Microprocessors and Microsystems 9, no. 7 (1985): 359. http://dx.doi.org/10.1016/0141-9331(85)90324-2.
Full textKuszynski, C. A., T. Busfield, A. M. Koelmans, M. R. McLauchlan, and D. J. Kinniment. "Graphical representation of a hardware description language." IEE Proceedings E Computers and Digital Techniques 137, no. 6 (1990): 462. http://dx.doi.org/10.1049/ip-e.1990.0058.
Full textDissertations / Theses on the topic "Hardware language description"
Park, Su-Hyun. "ADH, Aspect Described Hardware-Description-Language." Thesis, University of Canterbury. Electrical and Computer Engineering, 2006. http://hdl.handle.net/10092/1113.
Full textWang, Xiao-Lin 1955. "A TRANSLATER OF CLOCK MODE VHDL HARDWARE DESCRIPTION LANGUAGE." Thesis, The University of Arizona, 1986. http://hdl.handle.net/10150/291295.
Full textDailey, David M. "Integration of VHDL simulation and test verification into a Process Model Graph design environment." Thesis, This resource online, 1994. http://scholar.lib.vt.edu/theses/available/etd-11242009-020247/.
Full textCosti, Claudio. "A methodology for analyzing hardware description language specifications of legacy designs." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 2001. http://www.collectionscanada.ca/obj/s4/f2/dsk3/ftp04/NQ58564.pdf.
Full textBlumenthal, Carl. "Development of the NoGAP CL Hardware Description Language and its Compiler." Thesis, Linköping University, Department of Electrical Engineering, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-8865.
Full textChen, Adam Y. (Adam Yu-Chih). "Implementation of the Intel 486 SX microprocessor in Verilog hardware description language." Thesis, Massachusetts Institute of Technology, 1993. http://hdl.handle.net/1721.1/79470.
Full textShah, Sandeep R. "A framework for synthesis from VHDL." Thesis, This resource online, 1991. http://scholar.lib.vt.edu/theses/available/etd-03022010-020143/.
Full textWright, Philip A. "Rapid development of VHDL behavioral models." Thesis, This resource online, 1992. http://scholar.lib.vt.edu/theses/available/etd-11102009-020056/.
Full textSama, Anil. "Behavior modeling of RF systems with VHDL." Thesis, This resource online, 1991. http://scholar.lib.vt.edu/theses/available/etd-10102009-020211/.
Full textRao, Sanat R. "A hierarchical approach to effective test generation for VHDL behavioral models." Thesis, This resource online, 1993. http://scholar.lib.vt.edu/theses/available/etd-08042009-040513/.
Full textBooks on the topic "Hardware language description"
1953-, Moorby Philip R., ed. The Verilog hardware description language. Kluwer Academic Publishers, 1991.
Find full textThomas, D. E. The Verilog hardware description language. 2nd ed. Kluwer Academic Pub., 1995.
Find full text1953-, Moorby Philip R., ed. The Verilog hardware description language. 5th ed. Kluwer Academic Publishers, 2002.
Find full text1953-, Moorby Philip R., ed. The Verilog hardware description language. 4th ed. Kluwer Academic Publishers, 1998.
Find full text1953-, Moorby Philip R., ed. The Verilog hardware description language. 3rd ed. Kluwer Academic Publishers, 1996.
Find full textComputer Systems Laboratory (U.S.), ed. VHSIC hardware description language (VHDL). U.S. Dept. of Commerce, Technology Administration, National Institute of Standards and Technology, Computer Systems Laboratory, 1995.
Find full textThomas, Donald E., and Philip R. Moorby. The Verilog® Hardware Description Language. Springer US, 1996. http://dx.doi.org/10.1007/978-1-4757-2464-6.
Full textBook chapters on the topic "Hardware language description"
Rammig, Franz J. "The Hardware Description Language DACAPO III." In Fundamentals and Standards in Hardware Description Languages. Springer Netherlands, 1993. http://dx.doi.org/10.1007/978-94-011-1914-6_13.
Full textThomas, Donald E., and Philip R. Moorby. "Defining Gate Level Primitives." In The Verilog® Hardware Description Language. Springer US, 1991. http://dx.doi.org/10.1007/978-1-4615-3992-6_5.
Full textThomas, Donald E., and Philip R. Moorby. "Logic Level Modeling." In The Verilog® Hardware Description Language. Springer US, 1995. http://dx.doi.org/10.1007/978-1-4757-2365-6_4.
Full textThomas, Donald E., and Philip R. Moorby. "Defining Gate Level Primitives." In The Verilog® Hardware Description Language. Springer US, 1995. http://dx.doi.org/10.1007/978-1-4757-2365-6_5.
Full textThomas, Donald E., and Philip R. Moorby. "Switch Level Modeling." In The Verilog® Hardware Description Language. Springer US, 1995. http://dx.doi.org/10.1007/978-1-4757-2365-6_6.
Full textThomas, Donald E., and Philip R. Moorby. "Three Large Examples." In The Verilog® Hardware Description Language. Springer US, 1995. http://dx.doi.org/10.1007/978-1-4757-2365-6_7.
Full textThomas, Donald E., and Philip R. Moorby. "Verilog — A Tutorial Introduction." In The Verilog® Hardware Description Language. Springer US, 1995. http://dx.doi.org/10.1007/978-1-4757-2365-6_1.
Full textThomas, Donald E., and Philip R. Moorby. "Behavioral Modeling." In The Verilog® Hardware Description Language. Springer US, 1995. http://dx.doi.org/10.1007/978-1-4757-2365-6_2.
Full textThomas, Donald E., and Philip R. Moorby. "Concurrent Processes." In The Verilog® Hardware Description Language. Springer US, 1995. http://dx.doi.org/10.1007/978-1-4757-2365-6_3.
Full textThomas, Donald E., and Philip R. Moorby. "Verilog — A Tutorial Introduction." In The Verilog® Hardware Description Language. Springer US, 1996. http://dx.doi.org/10.1007/978-1-4757-2464-6_1.
Full textConference papers on the topic "Hardware language description"
Port, Oron, and Yoav Etsion. "DFiant: A dataflow hardware description language." In 2017 27th International Conference on Field Programmable Logic and Applications (FPL). IEEE, 2017. http://dx.doi.org/10.23919/fpl.2017.8056858.
Full text"The Computer Architecture and Hardware Description Language." In 2015 The 5th International Workshop on Computer Science and Engineering-Information Processing and Control Engineering. WCSE, 2015. http://dx.doi.org/10.18178/wcse.2015.04.024.
Full textBurlakov, A. S., and A. E. Khmelnov. "The Computer Architecture and Hardware Description Language." In 2015 38th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO). IEEE, 2015. http://dx.doi.org/10.1109/mipro.2015.7160433.
Full textFreytag, L. R. "Modeling interconnection networks using a hardware description language." In Proceedings PARBASE '90 International Conference on Databases, Parallel Architectures, and Their Applications. IEEE, 1990. http://dx.doi.org/10.1109/parbse.1990.77203.
Full textGauthier, Lovic, and Yohei Ishikawa. "HDLRuby, a new high productivity hardware description language." In 2018 5th International Conference on Business and Industrial Research (ICBIR). IEEE, 2018. http://dx.doi.org/10.1109/icbir.2018.8391195.
Full textAlwardi, Zaid, Robert Wille, and Rolf Drechsler. "Extensions to the Reversible Hardware Description Language SyReC." In 2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL). IEEE, 2017. http://dx.doi.org/10.1109/ismvl.2017.41.
Full textWaxman, R., J. H. Aylor, and E. Marschner. "The VHSIC hardware description language (IEEE standard 1076): language features revisited." In COMPCON Spring 88. IEEE, 1988. http://dx.doi.org/10.1109/cmpcon.1988.4880.
Full textZhou, Wenbiao, Per Karlstrom, and Dake Liu. "NoGapCL: A flexible common language for processor hardware description." In 2010 IEEE 13th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). IEEE, 2010. http://dx.doi.org/10.1109/ddecs.2010.5491778.
Full textKlassen, Nicholas, Michael Lyons, Michael Prysiazny, et al. "Manifold 2.0: A hardware description language for microfluidic devices." In 2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering (CCECE). IEEE, 2017. http://dx.doi.org/10.1109/ccece.2017.7946805.
Full textVillar, J. I., J. Juan, M. J. Bellido, J. Viejo, D. Guerrero, and J. Decaluwe. "Python as a hardware description language: A case study." In 2011 VII Southern Conference on Programmable Logic (SPL). IEEE, 2011. http://dx.doi.org/10.1109/spl.2011.5782635.
Full textReports on the topic "Hardware language description"
Aylor, James, Robert Klenke, Ron Waxman, Paul Menchini, Jack Stinson, and Bill Anderson. VHSIC Hardware Description Language (VHDL) 200X Requirements Report/Survey. Defense Technical Information Center, 1999. http://dx.doi.org/10.21236/ada406178.
Full textChung, Moon Jung. Parallel Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL) Simulation for Performance Modeling. Defense Technical Information Center, 1999. http://dx.doi.org/10.21236/ada372678.
Full textYang, Lian. The object-oriented design of a hardware description language analyser for the DIADES silicon compiler system. Portland State University Library, 2000. http://dx.doi.org/10.15760/etd.6144.
Full textMills, Michael T. A Key Element Toward Concurrent Engineering of Hardware and Software: Binding Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL) with Ada 95. Defense Technical Information Center, 1994. http://dx.doi.org/10.21236/ada294469.
Full textMills, Michael T. Proposed Object Oriented Programming (OOP) Enhancements to the Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL). Defense Technical Information Center, 1993. http://dx.doi.org/10.21236/ada274004.
Full textClarke, E. M., M. Fujita, S. P. Rajan, T. Reps, and S. Shankar. Program Slicing of Hardware Description Languages. Defense Technical Information Center, 1999. http://dx.doi.org/10.21236/ada363556.
Full textFederal Information Processing Standards Publication: VHSIC hardware description language (VHDL). National Institute of Standards and Technology, 1995. http://dx.doi.org/10.6028/nist.fips.172-1-1995.
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